1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 bool "Enable support for CRC32 instruction"
17 ARMv8 implements dedicated crc32 instruction for crc32 calculation.
18 This is faster than software crc32 calculation. This instruction may
19 not be present on all ARMv8.0, but is always present on ARMv8.1 and
22 config POSITION_INDEPENDENT
23 bool "Generate position-independent pre-relocation code"
24 depends on ARM64 || CPU_V7A
26 U-Boot expects to be linked to a specific hard-coded address, and to
27 be loaded to and run from that address. This option lifts that
28 restriction, thus allowing the code to be loaded to and executed from
29 almost any 4K aligned address. This logic relies on the relocation
30 information that is embedded in the binary to support U-Boot
31 relocating itself to the top-of-RAM later during execution.
33 config INIT_SP_RELATIVE
34 bool "Specify the early stack pointer relative to the .bss section"
36 default n if ARCH_QEMU
37 default y if POSITION_INDEPENDENT
39 U-Boot typically uses a hard-coded value for the stack pointer
40 before relocation. Enable this option to instead calculate the
41 initial SP at run-time. This is useful to avoid hard-coding addresses
42 into U-Boot, so that it can be loaded and executed at arbitrary
43 addresses and thus avoid using arbitrary addresses at runtime.
45 If this option is enabled, the early stack pointer is set to
46 &_bss_start with a offset value added. The offset is specified by
47 SYS_INIT_SP_BSS_OFFSET.
49 config SYS_INIT_SP_BSS_OFFSET
50 int "Early stack offset from the .bss base address"
52 depends on INIT_SP_RELATIVE
55 This option's value is the offset added to &_bss_start in order to
56 calculate the stack pointer. This offset should be large enough so
57 that the early malloc region, global data (gd), and early stack usage
58 do not overlap any appended DTB.
60 config LINUX_KERNEL_IMAGE_HEADER
64 Place a Linux kernel image header at the start of the U-Boot binary.
65 The format of the header is described in the Linux kernel source at
66 Documentation/arm64/booting.txt. This feature is useful since the
67 image header reports the amount of memory (BSS and similar) that
68 U-Boot needs to use, but which isn't part of the binary.
70 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
71 depends on LINUX_KERNEL_IMAGE_HEADER
74 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
75 TEXT_OFFSET value written to the Linux kernel image header.
87 ARM GICV3 Interrupt translation service (ITS).
88 Basic support for programming locality specific peripheral
89 interrupts (LPI) configuration tables and enable LPI tables.
90 LPI configuration table can be used by u-boot or Linux.
91 ARM GICV3 has limitation, once the LPI table is enabled, LPI
92 configuration table can not be re-programmed, unless GICV3 reset.
98 config DMA_ADDR_T_64BIT
108 config GPIO_EXTRA_HEADER
111 # Used for compatibility with asm files copied from the kernel
112 config ARM_ASM_UNIFIED
116 # Used for compatibility with asm files copied from the kernel
120 config SYS_ICACHE_OFF
121 bool "Do not enable icache"
123 Do not enable instruction cache in U-Boot.
125 config SPL_SYS_ICACHE_OFF
126 bool "Do not enable icache in SPL"
128 default SYS_ICACHE_OFF
130 Do not enable instruction cache in SPL.
132 config SYS_DCACHE_OFF
133 bool "Do not enable dcache"
135 Do not enable data cache in U-Boot.
137 config SPL_SYS_DCACHE_OFF
138 bool "Do not enable dcache in SPL"
140 default SYS_DCACHE_OFF
142 Do not enable data cache in SPL.
144 config SYS_ARM_CACHE_CP15
145 bool "CP15 based cache enabling support"
147 Select this if your processor suports enabling caches by using
151 bool "MMU-based Paged Memory Management Support"
152 select SYS_ARM_CACHE_CP15
154 Select if you want MMU-based virtualised addressing space
155 support via paged memory management.
158 bool 'Use the ARM v7 PMSA Compliant MPU'
160 Some ARM systems without an MMU have instead a Memory Protection
161 Unit (MPU) that defines the type and permissions for regions of
163 If your CPU has an MPU then you should choose 'y' here unless you
164 know that you do not want to use the MPU.
166 # If set, the workarounds for these ARM errata are applied early during U-Boot
167 # startup. Note that in general these options force the workarounds to be
168 # applied; no CPU-type/version detection exists, unlike the similar options in
169 # the Linux kernel. Do not set these options unless they apply! Also note that
170 # the following can be machine-specific errata. These do have ability to
171 # provide rudimentary version and machine-specific checks, but expect no
173 # CONFIG_ARM_ERRATA_430973
174 # CONFIG_ARM_ERRATA_454179
175 # CONFIG_ARM_ERRATA_621766
176 # CONFIG_ARM_ERRATA_798870
177 # CONFIG_ARM_ERRATA_801819
178 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
179 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
181 config ARM_ERRATA_430973
184 config ARM_ERRATA_454179
187 config ARM_ERRATA_621766
190 config ARM_ERRATA_716044
193 config ARM_ERRATA_725233
196 config ARM_ERRATA_742230
199 config ARM_ERRATA_743622
202 config ARM_ERRATA_751472
205 config ARM_ERRATA_761320
208 config ARM_ERRATA_773022
211 config ARM_ERRATA_774769
214 config ARM_ERRATA_794072
217 config ARM_ERRATA_798870
220 config ARM_ERRATA_801819
223 config ARM_ERRATA_826974
226 config ARM_ERRATA_828024
229 config ARM_ERRATA_829520
232 config ARM_ERRATA_833069
235 config ARM_ERRATA_833471
238 config ARM_ERRATA_845369
241 config ARM_ERRATA_852421
244 config ARM_ERRATA_852423
247 config ARM_ERRATA_855873
250 config ARM_CORTEX_A8_CVE_2017_5715
253 config ARM_CORTEX_A15_CVE_2017_5715
258 select SYS_CACHE_SHIFT_5
263 select SYS_CACHE_SHIFT_5
268 select SYS_CACHE_SHIFT_5
273 select SYS_CACHE_SHIFT_5
278 select SYS_CACHE_SHIFT_5
284 select SYS_CACHE_SHIFT_5
291 select SYS_CACHE_SHIFT_6
298 select SYS_CACHE_SHIFT_5
299 select SYS_THUMB_BUILD
305 select SYS_ARM_CACHE_CP15
307 select SYS_CACHE_SHIFT_6
311 select SYS_CACHE_SHIFT_5
320 select SYS_CACHE_SHIFT_5
324 default "arm720t" if CPU_ARM720T
325 default "arm920t" if CPU_ARM920T
326 default "arm926ejs" if CPU_ARM926EJS
327 default "arm946es" if CPU_ARM946ES
328 default "arm1136" if CPU_ARM1136
329 default "arm1176" if CPU_ARM1176
330 default "armv7" if CPU_V7A
331 default "armv7" if CPU_V7R
332 default "armv7m" if CPU_V7M
333 default "pxa" if CPU_PXA
334 default "sa1100" if CPU_SA1100
335 default "armv8" if ARM64
339 default 4 if CPU_ARM720T
340 default 4 if CPU_ARM920T
341 default 5 if CPU_ARM926EJS
342 default 5 if CPU_ARM946ES
343 default 6 if CPU_ARM1136
344 default 6 if CPU_ARM1176
349 default 4 if CPU_SA1100
353 prompt "Select the ARM data write cache policy"
354 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
356 default SYS_ARM_CACHE_WRITEBACK
358 config SYS_ARM_CACHE_WRITEBACK
359 bool "Write-back (WB)"
361 A write updates the cache only and marks the cache line as dirty.
362 External memory is updated only when the line is evicted or explicitly
365 config SYS_ARM_CACHE_WRITETHROUGH
366 bool "Write-through (WT)"
368 A write updates both the cache and the external memory system.
369 This does not mark the cache line as dirty.
371 config SYS_ARM_CACHE_WRITEALLOC
372 bool "Write allocation (WA)"
374 A cache line is allocated on a write miss. This means that executing a
375 store instruction on the processor might cause a burst read to occur.
376 There is a linefill to obtain the data for the cache line, before the
381 bool "Enable ARCH_CPU_INIT"
383 Some architectures require a call to arch_cpu_init().
384 Say Y here to enable it
386 config SYS_ARCH_TIMER
387 bool "ARM Generic Timer support"
388 depends on CPU_V7A || ARM64
391 The ARM Generic Timer (aka arch-timer) provides an architected
392 interface to a timer source on an SoC.
393 It is mandatory for ARMv8 implementation and widely available
397 bool "Support for ARM SMC Calling Convention (SMCCC)"
398 depends on CPU_V7A || ARM64
401 Say Y here if you want to enable ARM SMC Calling Convention.
402 This should be enabled if U-Boot needs to communicate with system
403 firmware (for example, PSCI) according to SMCCC.
406 bool "support boot from semihosting"
408 In emulated environments, semihosting is a way for
409 the hosted environment to call out to the emulator to
410 retrieve files from the host machine.
412 config SYS_THUMB_BUILD
413 bool "Build U-Boot using the Thumb instruction set"
416 Use this flag to build U-Boot using the Thumb instruction set for
417 ARM architectures. Thumb instruction set provides better code
418 density. For ARM architectures that support Thumb2 this flag will
419 result in Thumb2 code generated by GCC.
421 config SPL_SYS_THUMB_BUILD
422 bool "Build SPL using the Thumb instruction set"
423 default y if SYS_THUMB_BUILD
424 depends on !ARM64 && SPL
426 Use this flag to build SPL using the Thumb instruction set for
427 ARM architectures. Thumb instruction set provides better code
428 density. For ARM architectures that support Thumb2 this flag will
429 result in Thumb2 code generated by GCC.
431 config TPL_SYS_THUMB_BUILD
432 bool "Build TPL using the Thumb instruction set"
433 default y if SYS_THUMB_BUILD
434 depends on TPL && !ARM64
436 Use this flag to build TPL using the Thumb instruction set for
437 ARM architectures. Thumb instruction set provides better code
438 density. For ARM architectures that support Thumb2 this flag will
439 result in Thumb2 code generated by GCC.
442 config SYS_L2CACHE_OFF
445 If SoC does not support L2CACHE or one does not want to enable
446 L2CACHE, choose this option.
448 config ENABLE_ARM_SOC_BOOT0_HOOK
449 bool "prepare BOOT0 header"
451 If the SoC's BOOT0 requires a header area filled with (magic)
452 values, then choose this option, and create a file included as
453 <asm/arch/boot0.h> which contains the required assembler code.
455 config ARM_CORTEX_CPU_IS_UP
458 config USE_ARCH_MEMCPY
459 bool "Use an assembly optimized implementation of memcpy"
461 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
463 Enable the generation of an optimized version of memcpy.
464 Such an implementation may be faster under some conditions
465 but may increase the binary size.
467 config SPL_USE_ARCH_MEMCPY
468 bool "Use an assembly optimized implementation of memcpy for SPL"
469 default y if USE_ARCH_MEMCPY
472 Enable the generation of an optimized version of memcpy.
473 Such an implementation may be faster under some conditions
474 but may increase the binary size.
476 config TPL_USE_ARCH_MEMCPY
477 bool "Use an assembly optimized implementation of memcpy for TPL"
478 default y if USE_ARCH_MEMCPY
481 Enable the generation of an optimized version of memcpy.
482 Such an implementation may be faster under some conditions
483 but may increase the binary size.
485 config USE_ARCH_MEMMOVE
486 bool "Use an assembly optimized implementation of memmove" if !ARM64
487 default USE_ARCH_MEMCPY if ARM64
490 Enable the generation of an optimized version of memmove.
491 Such an implementation may be faster under some conditions
492 but may increase the binary size.
494 config SPL_USE_ARCH_MEMMOVE
495 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
496 default SPL_USE_ARCH_MEMCPY if ARM64
497 depends on SPL && ARM64
499 Enable the generation of an optimized version of memmove.
500 Such an implementation may be faster under some conditions
501 but may increase the binary size.
503 config TPL_USE_ARCH_MEMMOVE
504 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
505 default TPL_USE_ARCH_MEMCPY if ARM64
506 depends on TPL && ARM64
508 Enable the generation of an optimized version of memmove.
509 Such an implementation may be faster under some conditions
510 but may increase the binary size.
512 config USE_ARCH_MEMSET
513 bool "Use an assembly optimized implementation of memset"
515 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
517 Enable the generation of an optimized version of memset.
518 Such an implementation may be faster under some conditions
519 but may increase the binary size.
521 config SPL_USE_ARCH_MEMSET
522 bool "Use an assembly optimized implementation of memset for SPL"
523 default y if USE_ARCH_MEMSET
526 Enable the generation of an optimized version of memset.
527 Such an implementation may be faster under some conditions
528 but may increase the binary size.
530 config TPL_USE_ARCH_MEMSET
531 bool "Use an assembly optimized implementation of memset for TPL"
532 default y if USE_ARCH_MEMSET
535 Enable the generation of an optimized version of memset.
536 Such an implementation may be faster under some conditions
537 but may increase the binary size.
539 config ARM64_SUPPORT_AARCH32
540 bool "ARM64 system support AArch32 execution state"
542 default y if !TARGET_THUNDERX_88XX
544 This ARM64 system supports AArch32 execution state.
547 prompt "Target select"
552 select GPIO_EXTRA_HEADER
553 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
554 select SPL_SEPARATE_BSS if SPL
559 select GPIO_EXTRA_HEADER
560 select SPL_DM_SPI if SPL
563 Support for TI's DaVinci platform.
566 bool "Marvell Kirkwood"
567 select ARCH_MISC_INIT
568 select BOARD_EARLY_INIT_F
570 select GPIO_EXTRA_HEADER
573 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
579 select GPIO_EXTRA_HEADER
580 select SPL_DM_SPI if SPL
581 select SPL_DM_SPI_FLASH if SPL
590 select GPIO_EXTRA_HEADER
592 config TARGET_STV0991
593 bool "Support stv0991"
599 select GPIO_EXTRA_HEADER
606 bool "Broadcom BCM283X family"
610 select GPIO_EXTRA_HEADER
613 select SERIAL_SEARCH_ALL
618 bool "Broadcom BCM63158 family"
624 bool "Broadcom BCM68360 family"
630 bool "Broadcom BCM6858 family"
636 bool "Broadcom BCM7XXX family"
639 select GPIO_EXTRA_HEADER
642 imply OF_HAS_PRIOR_STAGE
644 This enables support for Broadcom ARM-based set-top box
645 chipsets, including the 7445 family of chips.
647 config TARGET_VEXPRESS_CA9X4
648 bool "Support vexpress_ca9x4"
652 config TARGET_BCMCYGNUS
653 bool "Support bcmcygnus"
655 select GPIO_EXTRA_HEADER
657 imply BCM_SF2_ETH_GMAC
665 bool "Support Broadcom Northstar2"
667 select GPIO_EXTRA_HEADER
669 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
670 ARMv8 Cortex-A57 processors targeting a broad range of networking
674 bool "Support Broadcom NS3"
676 select BOARD_LATE_INIT
678 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
679 ARMv8 Cortex-A72 processors targeting a broad range of networking
683 bool "Samsung EXYNOS"
693 select GPIO_EXTRA_HEADER
694 imply SYS_THUMB_BUILD
699 bool "Samsung S5PC1XX"
705 select GPIO_EXTRA_HEADER
709 bool "Calxeda Highbank"
720 imply OF_HAS_PRIOR_STAGE
722 config ARCH_INTEGRATOR
723 bool "ARM Ltd. Integrator family"
726 select GPIO_EXTRA_HEADER
731 bool "Qualcomm IPQ40xx SoCs"
737 select GPIO_EXTRA_HEADER
750 select GPIO_EXTRA_HEADER
752 select SYS_ARCH_TIMER
753 select SYS_THUMB_BUILD
759 bool "Texas Instruments' K3 Architecture"
764 config ARCH_OMAP2PLUS
767 select GPIO_EXTRA_HEADER
768 select SPL_BOARD_INIT if SPL
769 select SPL_STACK_R if SPL
771 imply TI_SYSC if DM && OF_CONTROL
776 select GPIO_EXTRA_HEADER
777 imply DISTRO_DEFAULTS
780 Support for the Meson SoC family developed by Amlogic Inc.,
781 targeted at media players and tablet computers. We currently
782 support the S905 (GXBaby) 64-bit SoC.
787 select GPIO_EXTRA_HEADER
790 select SPL_LIBCOMMON_SUPPORT if SPL
791 select SPL_LIBGENERIC_SUPPORT if SPL
792 select SPL_OF_CONTROL if SPL
795 Support for the MediaTek SoCs family developed by MediaTek Inc.
796 Please refer to doc/README.mediatek for more information.
799 bool "NXP LPC32xx platform"
804 select GPIO_EXTRA_HEADER
810 bool "NXP i.MX8 platform"
813 select GPIO_EXTRA_HEADER
816 select ENABLE_ARM_SOC_BOOT0_HOOK
819 bool "NXP i.MX8M platform"
821 select GPIO_EXTRA_HEADER
823 select SYS_FSL_HAS_SEC if IMX_HAB
824 select SYS_FSL_SEC_COMPAT_4
825 select SYS_FSL_SEC_LE
832 bool "NXP i.MX8ULP platform"
838 select GPIO_EXTRA_HEADER
842 bool "NXP i.MXRT platform"
846 select GPIO_EXTRA_HEADER
852 bool "NXP i.MX23 family"
854 select GPIO_EXTRA_HEADER
860 bool "NXP i.MX28 family"
862 select GPIO_EXTRA_HEADER
868 bool "NXP i.MX31 family"
870 select GPIO_EXTRA_HEADER
876 select GPIO_EXTRA_HEADER
878 select SYS_FSL_HAS_SEC if IMX_HAB
879 select SYS_FSL_SEC_COMPAT_4
880 select SYS_FSL_SEC_LE
881 select ROM_UNIFIED_SECTIONS
883 imply SYS_THUMB_BUILD
887 select ARCH_MISC_INIT
889 select GPIO_EXTRA_HEADER
891 select SYS_FSL_HAS_SEC if IMX_HAB
892 select SYS_FSL_SEC_COMPAT_4
893 select SYS_FSL_SEC_LE
894 imply BOARD_EARLY_INIT_F
896 imply SYS_THUMB_BUILD
901 select GPIO_EXTRA_HEADER
903 select SYS_FSL_HAS_SEC
904 select SYS_FSL_SEC_COMPAT_4
905 select SYS_FSL_SEC_LE
907 imply SYS_THUMB_BUILD
911 default "arch/arm/mach-omap2/u-boot-spl.lds"
916 select BOARD_EARLY_INIT_F
918 select GPIO_EXTRA_HEADER
923 bool "Nexell S5P4418/S5P6818 SoC"
924 select ENABLE_ARM_SOC_BOOT0_HOOK
926 select GPIO_EXTRA_HEADER
941 select LINUX_KERNEL_IMAGE_HEADER
944 select POSITION_INDEPENDENT
948 imply DISTRO_DEFAULTS
949 imply OF_HAS_PRIOR_STAGE
952 bool "Actions Semi OWL SoCs"
956 select GPIO_EXTRA_HEADER
961 select SYS_RELOC_GD_ENV_ADDR
965 bool "QEMU Virtual Platform"
974 imply OF_HAS_PRIOR_STAGE
977 bool "Renesas ARM SoCs"
980 select GPIO_EXTRA_HEADER
981 imply BOARD_EARLY_INIT_F
984 imply SYS_THUMB_BUILD
985 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
987 config ARCH_SNAPDRAGON
988 bool "Qualcomm Snapdragon SoCs"
993 select GPIO_EXTRA_HEADER
1002 bool "Altera SOCFPGA family"
1003 select ARCH_EARLY_INIT_R
1004 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
1005 select ARM64 if TARGET_SOCFPGA_SOC64
1006 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1010 select GPIO_EXTRA_HEADER
1011 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1013 select SPL_DM_RESET if DM_RESET
1014 select SPL_DM_SERIAL
1015 select SPL_LIBCOMMON_SUPPORT
1016 select SPL_LIBGENERIC_SUPPORT
1017 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
1018 select SPL_OF_CONTROL
1019 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1025 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1027 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1028 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1038 imply SPL_DM_SPI_FLASH
1039 imply SPL_LIBDISK_SUPPORT
1041 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1042 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1043 imply SPL_SPI_FLASH_SUPPORT
1048 bool "Support sunxi (Allwinner) SoCs"
1051 select CMD_MMC if MMC
1052 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1057 select DM_I2C if I2C
1059 select DM_MMC if MMC
1060 select DM_SCSI if SCSI
1062 select GPIO_EXTRA_HEADER
1063 select OF_BOARD_SETUP
1066 select SPECIFY_CONSOLE_INDEX
1067 select SPL_SEPARATE_BSS if SPL
1068 select SPL_STACK_R if SPL
1069 select SPL_SYS_MALLOC_SIMPLE if SPL
1070 select SPL_SYS_THUMB_BUILD if !ARM64
1073 select SYS_THUMB_BUILD if !ARM64
1074 select USB if DISTRO_DEFAULTS
1075 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1076 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1077 select SPL_USE_TINY_PRINTF
1079 select SYS_RELOC_GD_ENV_ADDR
1080 imply BOARD_LATE_INIT
1083 imply CMD_UBI if MTD_RAW_NAND
1084 imply DISTRO_DEFAULTS
1087 imply OF_LIBFDT_OVERLAY
1088 imply PRE_CONSOLE_BUFFER
1090 imply SPL_LIBCOMMON_SUPPORT
1091 imply SPL_LIBGENERIC_SUPPORT
1092 imply SPL_MMC if MMC
1096 imply SYSRESET_WATCHDOG
1097 imply SYSRESET_WATCHDOG_AUTO
1102 bool "ST-Ericsson U8500 Series"
1106 select DM_MMC if MMC
1108 select DM_USB_GADGET if DM_USB
1112 imply AB8500_USB_PHY
1113 imply ARM_PL180_MMCI
1118 imply NOMADIK_MTU_TIMER
1123 imply SYS_THUMB_BUILD
1124 imply SYSRESET_SYSCON
1127 bool "Support Xilinx Versal Platform"
1131 select DM_ETH if NET
1132 select DM_MMC if MMC
1135 select GPIO_EXTRA_HEADER
1138 imply BOARD_LATE_INIT
1139 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1142 bool "Freescale Vybrid"
1144 select GPIO_EXTRA_HEADER
1146 select SYS_FSL_ERRATUM_ESDHC111
1151 bool "Xilinx Zynq based platform"
1156 select DM_ETH if NET
1157 select DM_MMC if MMC
1161 select GPIO_EXTRA_HEADER
1164 select SPL_BOARD_INIT if SPL
1165 select SPL_CLK if SPL
1166 select SPL_DM if SPL
1167 select SPL_DM_SPI if SPL
1168 select SPL_DM_SPI_FLASH if SPL
1169 select SPL_OF_CONTROL if SPL
1170 select SPL_SEPARATE_BSS if SPL
1172 imply ARCH_EARLY_INIT_R
1173 imply BOARD_LATE_INIT
1177 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1180 config ARCH_ZYNQMP_R5
1181 bool "Xilinx ZynqMP R5 based platform"
1185 select DM_ETH if NET
1186 select DM_MMC if MMC
1188 select GPIO_EXTRA_HEADER
1194 bool "Xilinx ZynqMP based platform"
1198 select DM_ETH if NET
1200 select DM_MMC if MMC
1202 select DM_SPI if SPI
1203 select DM_SPI_FLASH if DM_SPI
1206 select GPIO_EXTRA_HEADER
1208 select SPL_BOARD_INIT if SPL
1209 select SPL_CLK if SPL
1210 select SPL_DM if SPL
1211 select SPL_DM_SPI if SPI && SPL_DM
1212 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1213 select SPL_DM_MAILBOX if SPL
1214 select SPL_FIRMWARE if SPL
1215 select SPL_SEPARATE_BSS if SPL
1219 imply BOARD_LATE_INIT
1221 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1228 select GPIO_EXTRA_HEADER
1229 imply DISTRO_DEFAULTS
1232 config TARGET_VEXPRESS64_AEMV8A
1233 bool "Support vexpress_aemv8a"
1235 select GPIO_EXTRA_HEADER
1238 config TARGET_VEXPRESS64_BASE_FVP
1239 bool "Support Versatile Express ARMv8a FVP BASE model"
1241 select GPIO_EXTRA_HEADER
1245 config TARGET_VEXPRESS64_JUNO
1246 bool "Support Versatile Express Juno Development Platform"
1248 select GPIO_EXTRA_HEADER
1259 imply OF_HAS_PRIOR_STAGE
1261 config TARGET_TOTAL_COMPUTE
1262 bool "Support Total Compute Platform"
1270 config TARGET_LS2080A_EMU
1271 bool "Support ls2080a_emu"
1274 select ARMV8_MULTIENTRY
1275 select FSL_DDR_SYNC_REFRESH
1276 select GPIO_EXTRA_HEADER
1278 Support for Freescale LS2080A_EMU platform.
1279 The LS2080A Development System (EMULATOR) is a pre-silicon
1280 development platform that supports the QorIQ LS2080A
1281 Layerscape Architecture processor.
1283 config TARGET_LS1088AQDS
1284 bool "Support ls1088aqds"
1287 select ARMV8_MULTIENTRY
1288 select ARCH_SUPPORT_TFABOOT
1289 select BOARD_LATE_INIT
1290 select GPIO_EXTRA_HEADER
1292 select FSL_DDR_INTERACTIVE if !SD_BOOT
1294 Support for NXP LS1088AQDS platform.
1295 The LS1088A Development System (QDS) is a high-performance
1296 development platform that supports the QorIQ LS1088A
1297 Layerscape Architecture processor.
1299 config TARGET_LS2080AQDS
1300 bool "Support ls2080aqds"
1303 select ARMV8_MULTIENTRY
1304 select ARCH_SUPPORT_TFABOOT
1305 select BOARD_LATE_INIT
1306 select GPIO_EXTRA_HEADER
1311 select FSL_DDR_INTERACTIVE if !SPL
1313 Support for Freescale LS2080AQDS platform.
1314 The LS2080A Development System (QDS) is a high-performance
1315 development platform that supports the QorIQ LS2080A
1316 Layerscape Architecture processor.
1318 config TARGET_LS2080ARDB
1319 bool "Support ls2080ardb"
1322 select ARMV8_MULTIENTRY
1323 select ARCH_SUPPORT_TFABOOT
1324 select BOARD_LATE_INIT
1327 select FSL_DDR_INTERACTIVE if !SPL
1328 select GPIO_EXTRA_HEADER
1332 Support for Freescale LS2080ARDB platform.
1333 The LS2080A Reference design board (RDB) is a high-performance
1334 development platform that supports the QorIQ LS2080A
1335 Layerscape Architecture processor.
1337 config TARGET_LS2081ARDB
1338 bool "Support ls2081ardb"
1341 select ARMV8_MULTIENTRY
1342 select BOARD_LATE_INIT
1343 select GPIO_EXTRA_HEADER
1346 Support for Freescale LS2081ARDB platform.
1347 The LS2081A Reference design board (RDB) is a high-performance
1348 development platform that supports the QorIQ LS2081A/LS2041A
1349 Layerscape Architecture processor.
1351 config TARGET_LX2160ARDB
1352 bool "Support lx2160ardb"
1355 select ARMV8_MULTIENTRY
1356 select ARCH_SUPPORT_TFABOOT
1357 select BOARD_LATE_INIT
1358 select GPIO_EXTRA_HEADER
1360 Support for NXP LX2160ARDB platform.
1361 The lx2160ardb (LX2160A Reference design board (RDB)
1362 is a high-performance development platform that supports the
1363 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1365 config TARGET_LX2160AQDS
1366 bool "Support lx2160aqds"
1369 select ARMV8_MULTIENTRY
1370 select ARCH_SUPPORT_TFABOOT
1371 select BOARD_LATE_INIT
1372 select GPIO_EXTRA_HEADER
1374 Support for NXP LX2160AQDS platform.
1375 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1376 is a high-performance development platform that supports the
1377 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1379 config TARGET_LX2162AQDS
1380 bool "Support lx2162aqds"
1382 select ARCH_MISC_INIT
1384 select ARMV8_MULTIENTRY
1385 select ARCH_SUPPORT_TFABOOT
1386 select BOARD_LATE_INIT
1387 select GPIO_EXTRA_HEADER
1389 Support for NXP LX2162AQDS platform.
1390 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1393 bool "Support HiKey 96boards Consumer Edition Platform"
1398 select GPIO_EXTRA_HEADER
1401 select SPECIFY_CONSOLE_INDEX
1404 Support for HiKey 96boards platform. It features a HI6220
1405 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1407 config TARGET_HIKEY960
1408 bool "Support HiKey960 96boards Consumer Edition Platform"
1412 select GPIO_EXTRA_HEADER
1417 Support for HiKey960 96boards platform. It features a HI3660
1418 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1420 config TARGET_POPLAR
1421 bool "Support Poplar 96boards Enterprise Edition Platform"
1425 select GPIO_EXTRA_HEADER
1430 Support for Poplar 96boards EE platform. It features a HI3798cv200
1431 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1432 making it capable of running any commercial set-top solution based on
1435 config TARGET_LS1012AQDS
1436 bool "Support ls1012aqds"
1439 select ARCH_SUPPORT_TFABOOT
1440 select BOARD_LATE_INIT
1441 select GPIO_EXTRA_HEADER
1443 Support for Freescale LS1012AQDS platform.
1444 The LS1012A Development System (QDS) is a high-performance
1445 development platform that supports the QorIQ LS1012A
1446 Layerscape Architecture processor.
1448 config TARGET_LS1012ARDB
1449 bool "Support ls1012ardb"
1452 select ARCH_SUPPORT_TFABOOT
1453 select BOARD_LATE_INIT
1454 select GPIO_EXTRA_HEADER
1458 Support for Freescale LS1012ARDB platform.
1459 The LS1012A Reference design board (RDB) is a high-performance
1460 development platform that supports the QorIQ LS1012A
1461 Layerscape Architecture processor.
1463 config TARGET_LS1012A2G5RDB
1464 bool "Support ls1012a2g5rdb"
1467 select ARCH_SUPPORT_TFABOOT
1468 select BOARD_LATE_INIT
1469 select GPIO_EXTRA_HEADER
1472 Support for Freescale LS1012A2G5RDB platform.
1473 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1474 development platform that supports the QorIQ LS1012A
1475 Layerscape Architecture processor.
1477 config TARGET_LS1012AFRWY
1478 bool "Support ls1012afrwy"
1481 select ARCH_SUPPORT_TFABOOT
1482 select BOARD_LATE_INIT
1483 select GPIO_EXTRA_HEADER
1487 Support for Freescale LS1012AFRWY platform.
1488 The LS1012A FRWY board (FRWY) is a high-performance
1489 development platform that supports the QorIQ LS1012A
1490 Layerscape Architecture processor.
1492 config TARGET_LS1012AFRDM
1493 bool "Support ls1012afrdm"
1496 select ARCH_SUPPORT_TFABOOT
1497 select GPIO_EXTRA_HEADER
1499 Support for Freescale LS1012AFRDM platform.
1500 The LS1012A Freedom board (FRDM) is a high-performance
1501 development platform that supports the QorIQ LS1012A
1502 Layerscape Architecture processor.
1504 config TARGET_LS1028AQDS
1505 bool "Support ls1028aqds"
1508 select ARMV8_MULTIENTRY
1509 select ARCH_SUPPORT_TFABOOT
1510 select BOARD_LATE_INIT
1511 select GPIO_EXTRA_HEADER
1513 Support for Freescale LS1028AQDS platform
1514 The LS1028A Development System (QDS) is a high-performance
1515 development platform that supports the QorIQ LS1028A
1516 Layerscape Architecture processor.
1518 config TARGET_LS1028ARDB
1519 bool "Support ls1028ardb"
1522 select ARMV8_MULTIENTRY
1523 select ARCH_SUPPORT_TFABOOT
1524 select BOARD_LATE_INIT
1525 select GPIO_EXTRA_HEADER
1527 Support for Freescale LS1028ARDB platform
1528 The LS1028A Development System (RDB) is a high-performance
1529 development platform that supports the QorIQ LS1028A
1530 Layerscape Architecture processor.
1532 config TARGET_LS1088ARDB
1533 bool "Support ls1088ardb"
1536 select ARMV8_MULTIENTRY
1537 select ARCH_SUPPORT_TFABOOT
1538 select BOARD_LATE_INIT
1540 select FSL_DDR_INTERACTIVE if !SD_BOOT
1541 select GPIO_EXTRA_HEADER
1543 Support for NXP LS1088ARDB platform.
1544 The LS1088A Reference design board (RDB) is a high-performance
1545 development platform that supports the QorIQ LS1088A
1546 Layerscape Architecture processor.
1548 config TARGET_LS1021AQDS
1549 bool "Support ls1021aqds"
1551 select ARCH_SUPPORT_PSCI
1552 select BOARD_EARLY_INIT_F
1553 select BOARD_LATE_INIT
1555 select CPU_V7_HAS_NONSEC
1556 select CPU_V7_HAS_VIRT
1557 select LS1_DEEP_SLEEP
1560 select FSL_DDR_INTERACTIVE
1561 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1562 select GPIO_EXTRA_HEADER
1563 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1566 config TARGET_LS1021ATWR
1567 bool "Support ls1021atwr"
1569 select ARCH_SUPPORT_PSCI
1570 select BOARD_EARLY_INIT_F
1571 select BOARD_LATE_INIT
1573 select CPU_V7_HAS_NONSEC
1574 select CPU_V7_HAS_VIRT
1575 select LS1_DEEP_SLEEP
1577 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1578 select GPIO_EXTRA_HEADER
1581 config TARGET_PG_WCOM_SELI8
1582 bool "Support Hitachi-Powergrids SELI8 service unit card"
1584 select ARCH_SUPPORT_PSCI
1585 select BOARD_EARLY_INIT_F
1586 select BOARD_LATE_INIT
1588 select CPU_V7_HAS_NONSEC
1589 select CPU_V7_HAS_VIRT
1591 select FSL_DDR_INTERACTIVE
1592 select GPIO_EXTRA_HEADER
1596 Support for Hitachi-Powergrids SELI8 service unit card.
1597 SELI8 is a QorIQ LS1021a based service unit card used
1598 in XMC20 and FOX615 product families.
1600 config TARGET_PG_WCOM_EXPU1
1601 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1603 select ARCH_SUPPORT_PSCI
1604 select BOARD_EARLY_INIT_F
1605 select BOARD_LATE_INIT
1607 select CPU_V7_HAS_NONSEC
1608 select CPU_V7_HAS_VIRT
1610 select FSL_DDR_INTERACTIVE
1614 Support for Hitachi-Powergrids EXPU1 service unit card.
1615 EXPU1 is a QorIQ LS1021a based service unit card used
1616 in XMC20 and FOX615 product families.
1618 config TARGET_LS1021ATSN
1619 bool "Support ls1021atsn"
1621 select ARCH_SUPPORT_PSCI
1622 select BOARD_EARLY_INIT_F
1623 select BOARD_LATE_INIT
1625 select CPU_V7_HAS_NONSEC
1626 select CPU_V7_HAS_VIRT
1627 select LS1_DEEP_SLEEP
1629 select GPIO_EXTRA_HEADER
1632 config TARGET_LS1021AIOT
1633 bool "Support ls1021aiot"
1635 select ARCH_SUPPORT_PSCI
1636 select BOARD_LATE_INIT
1638 select CPU_V7_HAS_NONSEC
1639 select CPU_V7_HAS_VIRT
1641 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1642 select GPIO_EXTRA_HEADER
1645 Support for Freescale LS1021AIOT platform.
1646 The LS1021A Freescale board (IOT) is a high-performance
1647 development platform that supports the QorIQ LS1021A
1648 Layerscape Architecture processor.
1650 config TARGET_LS1043AQDS
1651 bool "Support ls1043aqds"
1654 select ARMV8_MULTIENTRY
1655 select ARCH_SUPPORT_TFABOOT
1656 select BOARD_EARLY_INIT_F
1657 select BOARD_LATE_INIT
1659 select FSL_DDR_INTERACTIVE if !SPL
1660 select FSL_DSPI if !SPL_NO_DSPI
1661 select DM_SPI_FLASH if FSL_DSPI
1662 select GPIO_EXTRA_HEADER
1666 Support for Freescale LS1043AQDS platform.
1668 config TARGET_LS1043ARDB
1669 bool "Support ls1043ardb"
1672 select ARMV8_MULTIENTRY
1673 select ARCH_SUPPORT_TFABOOT
1674 select BOARD_EARLY_INIT_F
1675 select BOARD_LATE_INIT
1677 select FSL_DSPI if !SPL_NO_DSPI
1678 select DM_SPI_FLASH if FSL_DSPI
1679 select GPIO_EXTRA_HEADER
1681 Support for Freescale LS1043ARDB platform.
1683 config TARGET_LS1046AQDS
1684 bool "Support ls1046aqds"
1687 select ARMV8_MULTIENTRY
1688 select ARCH_SUPPORT_TFABOOT
1689 select BOARD_EARLY_INIT_F
1690 select BOARD_LATE_INIT
1691 select DM_SPI_FLASH if DM_SPI
1693 select FSL_DDR_BIST if !SPL
1694 select FSL_DDR_INTERACTIVE if !SPL
1695 select FSL_DDR_INTERACTIVE if !SPL
1696 select GPIO_EXTRA_HEADER
1699 Support for Freescale LS1046AQDS platform.
1700 The LS1046A Development System (QDS) is a high-performance
1701 development platform that supports the QorIQ LS1046A
1702 Layerscape Architecture processor.
1704 config TARGET_LS1046ARDB
1705 bool "Support ls1046ardb"
1708 select ARMV8_MULTIENTRY
1709 select ARCH_SUPPORT_TFABOOT
1710 select BOARD_EARLY_INIT_F
1711 select BOARD_LATE_INIT
1712 select DM_SPI_FLASH if DM_SPI
1713 select POWER_MC34VR500
1716 select FSL_DDR_INTERACTIVE if !SPL
1717 select GPIO_EXTRA_HEADER
1720 Support for Freescale LS1046ARDB platform.
1721 The LS1046A Reference Design Board (RDB) is a high-performance
1722 development platform that supports the QorIQ LS1046A
1723 Layerscape Architecture processor.
1725 config TARGET_LS1046AFRWY
1726 bool "Support ls1046afrwy"
1729 select ARMV8_MULTIENTRY
1730 select ARCH_SUPPORT_TFABOOT
1731 select BOARD_EARLY_INIT_F
1732 select BOARD_LATE_INIT
1733 select DM_SPI_FLASH if DM_SPI
1734 select GPIO_EXTRA_HEADER
1737 Support for Freescale LS1046AFRWY platform.
1738 The LS1046A Freeway Board (FRWY) is a high-performance
1739 development platform that supports the QorIQ LS1046A
1740 Layerscape Architecture processor.
1746 select ARMV8_MULTIENTRY
1762 select GPIO_EXTRA_HEADER
1763 select SPL_DM if SPL
1764 select SPL_DM_SPI if SPL
1765 select SPL_DM_SPI_FLASH if SPL
1766 select SPL_DM_I2C if SPL
1767 select SPL_DM_MMC if SPL
1768 select SPL_DM_SERIAL if SPL
1770 Support for Kontron SMARC-sAL28 board.
1772 config TARGET_COLIBRI_PXA270
1773 bool "Support colibri_pxa270"
1775 select GPIO_EXTRA_HEADER
1777 config ARCH_UNIPHIER
1778 bool "Socionext UniPhier SoCs"
1779 select BOARD_LATE_INIT
1788 select OF_BOARD_SETUP
1792 select SPL_BOARD_INIT if SPL
1793 select SPL_DM if SPL
1794 select SPL_LIBCOMMON_SUPPORT if SPL
1795 select SPL_LIBGENERIC_SUPPORT if SPL
1796 select SPL_OF_CONTROL if SPL
1797 select SPL_PINCTRL if SPL
1800 imply DISTRO_DEFAULTS
1803 Support for UniPhier SoC family developed by Socionext Inc.
1804 (formerly, System LSI Business Division of Panasonic Corporation)
1806 config ARCH_SYNQUACER
1807 bool "Socionext SynQuacer SoCs"
1813 select SYSRESET_PSCI
1816 Support for SynQuacer SoC family developed by Socionext Inc.
1817 This SoC is used on 96boards EE DeveloperBox.
1820 bool "Support STMicroelectronics STM32 MCU with cortex M"
1827 bool "Support STMicrolectronics SoCs"
1836 Support for STMicroelectronics STiH407/10 SoC family.
1837 This SoC is used on Linaro 96Board STiH410-B2260
1840 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1841 select ARCH_MISC_INIT
1842 select ARCH_SUPPORT_TFABOOT
1843 select BOARD_LATE_INIT
1852 select OF_SYSTEM_SETUP
1858 select SYS_THUMB_BUILD
1862 imply OF_LIBFDT_OVERLAY
1863 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1866 Support for STM32MP SoC family developed by STMicroelectronics,
1867 MPUs based on ARM cortex A core
1868 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1869 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1871 SPL is the unsecure FSBL for the basic boot chain.
1873 config ARCH_ROCKCHIP
1874 bool "Support Rockchip SoCs"
1876 select BINMAN if SPL_OPTEE || (SPL && !ARM64)
1886 select ENABLE_ARM_SOC_BOOT0_HOOK
1889 select SPL_DM if SPL
1890 select SPL_DM_SPI if SPL
1891 select SPL_DM_SPI_FLASH if SPL
1893 select SYS_THUMB_BUILD if !ARM64
1896 imply DEBUG_UART_BOARD_INIT
1897 imply DISTRO_DEFAULTS
1899 imply SARADC_ROCKCHIP
1901 imply SPL_SYS_MALLOC_SIMPLE
1904 imply USB_FUNCTION_FASTBOOT
1906 config ARCH_OCTEONTX
1907 bool "Support OcteonTX SoCs"
1910 select GPIO_EXTRA_HEADER
1914 select BOARD_LATE_INIT
1915 select SYS_CACHE_SHIFT_7
1916 select SYS_PCI_64BIT if PCI
1917 imply OF_HAS_PRIOR_STAGE
1919 config ARCH_OCTEONTX2
1920 bool "Support OcteonTX2 SoCs"
1923 select GPIO_EXTRA_HEADER
1927 select BOARD_LATE_INIT
1928 select SYS_CACHE_SHIFT_7
1929 select SYS_PCI_64BIT if PCI
1930 imply OF_HAS_PRIOR_STAGE
1932 config TARGET_THUNDERX_88XX
1933 bool "Support ThunderX 88xx"
1935 select GPIO_EXTRA_HEADER
1938 select SYS_CACHE_SHIFT_7
1941 bool "Support Aspeed SoCs"
1946 config TARGET_DURIAN
1947 bool "Support Phytium Durian Platform"
1949 select GPIO_EXTRA_HEADER
1951 Support for durian platform.
1952 It has 2GB Sdram, uart and pcie.
1954 config TARGET_PRESIDIO_ASIC
1955 bool "Support Cortina Presidio ASIC Platform"
1959 config TARGET_XENGUEST_ARM64
1960 bool "Xen guest ARM64"
1964 select LINUX_KERNEL_IMAGE_HEADER
1967 imply OF_HAS_PRIOR_STAGE
1971 config SUPPORT_PASSING_ATAGS
1972 bool "Support pre-devicetree ATAG-based booting"
1974 imply SETUP_MEMORY_TAGS
1976 Support for booting older Linux kernels, using ATAGs rather than
1977 passing a devicetree. This is option is rarely used, and the
1978 semantics are defined at
1979 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
1981 config SETUP_MEMORY_TAGS
1982 bool "Pass memory size information via ATAG"
1983 depends on SUPPORT_PASSING_ATAGS
1986 bool "Pass Linux kernel cmdline via ATAG"
1987 depends on SUPPORT_PASSING_ATAGS
1990 bool "Pass initrd starting point and size via ATAG"
1991 depends on SUPPORT_PASSING_ATAGS
1994 bool "Pass system revision via ATAG"
1995 depends on SUPPORT_PASSING_ATAGS
1998 bool "Pass system serial number via ATAG"
1999 depends on SUPPORT_PASSING_ATAGS
2001 config STATIC_MACH_TYPE
2002 bool "Statically define the Machine ID number"
2004 When booting via ATAGs, enable this option if we know the correct
2005 machine ID number to use at compile time. Some systems will be
2006 passed the number dynamically by whatever loads U-Boot.
2009 int "Machine ID number"
2010 depends on STATIC_MACH_TYPE
2012 When booting via ATAGs, the machine type must be passed as a number.
2013 For the full list see https://www.arm.linux.org.uk/developer/machines
2015 config ARCH_SUPPORT_TFABOOT
2019 bool "Support for booting from TF-A"
2020 depends on ARCH_SUPPORT_TFABOOT
2022 Some platforms support the setup of secure registers (for instance
2023 for CPU errata handling) or provide secure services like PSCI.
2024 Those services could also be provided by other firmware parts
2025 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
2026 does not need to (and cannot) execute this code.
2027 Enabling this option will make a U-Boot binary that is relying
2028 on other firmware layers to provide secure functionality.
2030 config TI_SECURE_DEVICE
2031 bool "HS Device Type Support"
2032 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2034 If a high secure (HS) device type is being used, this config
2035 must be set. This option impacts various aspects of the
2036 build system (to create signed boot images that can be
2037 authenticated) and the code. See the doc/README.ti-secure
2038 file for further details.
2040 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
2041 config ISW_ENTRY_ADDR
2042 hex "Address in memory or XIP address of bootloader entry point"
2043 default 0x402F4000 if AM43XX
2044 default 0x402F0400 if AM33XX
2045 default 0x40301350 if OMAP54XX
2047 After any reset, the boot ROM searches the boot media for a valid
2048 boot image. For non-XIP devices, the ROM then copies the image into
2049 internal memory. For all boot modes, after the ROM processes the
2050 boot image it eventually computes the entry point address depending
2051 on the device type (secure/non-secure), boot media (xip/non-xip) and
2055 config SYS_KWD_CONFIG
2056 string "kwbimage config file path"
2057 depends on ARCH_KIRKWOOD || ARCH_MVEBU
2058 default "arch/arm/mach-mvebu/kwbimage.cfg"
2060 Path within the source directory to the kwbimage.cfg file to use
2061 when packaging the U-Boot image for use.
2063 source "arch/arm/mach-apple/Kconfig"
2065 source "arch/arm/mach-aspeed/Kconfig"
2067 source "arch/arm/mach-at91/Kconfig"
2069 source "arch/arm/mach-bcm283x/Kconfig"
2071 source "arch/arm/mach-bcmstb/Kconfig"
2073 source "arch/arm/mach-davinci/Kconfig"
2075 source "arch/arm/mach-exynos/Kconfig"
2077 source "arch/arm/mach-highbank/Kconfig"
2079 source "arch/arm/mach-integrator/Kconfig"
2081 source "arch/arm/mach-ipq40xx/Kconfig"
2083 source "arch/arm/mach-k3/Kconfig"
2085 source "arch/arm/mach-keystone/Kconfig"
2087 source "arch/arm/mach-kirkwood/Kconfig"
2089 source "arch/arm/mach-lpc32xx/Kconfig"
2091 source "arch/arm/mach-mvebu/Kconfig"
2093 source "arch/arm/mach-octeontx/Kconfig"
2095 source "arch/arm/mach-octeontx2/Kconfig"
2097 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2099 source "arch/arm/mach-imx/mx3/Kconfig"
2101 source "arch/arm/mach-imx/mx5/Kconfig"
2103 source "arch/arm/mach-imx/mx6/Kconfig"
2105 source "arch/arm/mach-imx/mx7/Kconfig"
2107 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2109 source "arch/arm/mach-imx/imx8/Kconfig"
2111 source "arch/arm/mach-imx/imx8m/Kconfig"
2113 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2115 source "arch/arm/mach-imx/imxrt/Kconfig"
2117 source "arch/arm/mach-imx/mxs/Kconfig"
2119 source "arch/arm/mach-omap2/Kconfig"
2121 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2123 source "arch/arm/mach-orion5x/Kconfig"
2125 source "arch/arm/mach-owl/Kconfig"
2127 source "arch/arm/mach-rmobile/Kconfig"
2129 source "arch/arm/mach-meson/Kconfig"
2131 source "arch/arm/mach-mediatek/Kconfig"
2133 source "arch/arm/mach-qemu/Kconfig"
2135 source "arch/arm/mach-rockchip/Kconfig"
2137 source "arch/arm/mach-s5pc1xx/Kconfig"
2139 source "arch/arm/mach-snapdragon/Kconfig"
2141 source "arch/arm/mach-socfpga/Kconfig"
2143 source "arch/arm/mach-sti/Kconfig"
2145 source "arch/arm/mach-stm32/Kconfig"
2147 source "arch/arm/mach-stm32mp/Kconfig"
2149 source "arch/arm/mach-sunxi/Kconfig"
2151 source "arch/arm/mach-tegra/Kconfig"
2153 source "arch/arm/mach-u8500/Kconfig"
2155 source "arch/arm/mach-uniphier/Kconfig"
2157 source "arch/arm/cpu/armv7/vf610/Kconfig"
2159 source "arch/arm/mach-zynq/Kconfig"
2161 source "arch/arm/mach-zynqmp/Kconfig"
2163 source "arch/arm/mach-versal/Kconfig"
2165 source "arch/arm/mach-zynqmp-r5/Kconfig"
2167 source "arch/arm/cpu/armv7/Kconfig"
2169 source "arch/arm/cpu/armv8/Kconfig"
2171 source "arch/arm/mach-imx/Kconfig"
2173 source "arch/arm/mach-nexell/Kconfig"
2175 source "board/armltd/total_compute/Kconfig"
2177 source "board/bosch/shc/Kconfig"
2178 source "board/bosch/guardian/Kconfig"
2179 source "board/Marvell/octeontx/Kconfig"
2180 source "board/Marvell/octeontx2/Kconfig"
2181 source "board/armltd/vexpress/Kconfig"
2182 source "board/armltd/vexpress64/Kconfig"
2183 source "board/cortina/presidio-asic/Kconfig"
2184 source "board/broadcom/bcm963158/Kconfig"
2185 source "board/broadcom/bcm968360bg/Kconfig"
2186 source "board/broadcom/bcm968580xref/Kconfig"
2187 source "board/broadcom/bcmns3/Kconfig"
2188 source "board/cavium/thunderx/Kconfig"
2189 source "board/eets/pdu001/Kconfig"
2190 source "board/emulation/qemu-arm/Kconfig"
2191 source "board/freescale/ls2080aqds/Kconfig"
2192 source "board/freescale/ls2080ardb/Kconfig"
2193 source "board/freescale/ls1088a/Kconfig"
2194 source "board/freescale/ls1028a/Kconfig"
2195 source "board/freescale/ls1021aqds/Kconfig"
2196 source "board/freescale/ls1043aqds/Kconfig"
2197 source "board/freescale/ls1021atwr/Kconfig"
2198 source "board/freescale/ls1021atsn/Kconfig"
2199 source "board/freescale/ls1021aiot/Kconfig"
2200 source "board/freescale/ls1046aqds/Kconfig"
2201 source "board/freescale/ls1043ardb/Kconfig"
2202 source "board/freescale/ls1046ardb/Kconfig"
2203 source "board/freescale/ls1046afrwy/Kconfig"
2204 source "board/freescale/ls1012aqds/Kconfig"
2205 source "board/freescale/ls1012ardb/Kconfig"
2206 source "board/freescale/ls1012afrdm/Kconfig"
2207 source "board/freescale/lx2160a/Kconfig"
2208 source "board/grinn/chiliboard/Kconfig"
2209 source "board/hisilicon/hikey/Kconfig"
2210 source "board/hisilicon/hikey960/Kconfig"
2211 source "board/hisilicon/poplar/Kconfig"
2212 source "board/isee/igep003x/Kconfig"
2213 source "board/kontron/sl28/Kconfig"
2214 source "board/myir/mys_6ulx/Kconfig"
2215 source "board/seeed/npi_imx6ull/Kconfig"
2216 source "board/socionext/developerbox/Kconfig"
2217 source "board/st/stv0991/Kconfig"
2218 source "board/tcl/sl50/Kconfig"
2219 source "board/toradex/colibri_pxa270/Kconfig"
2220 source "board/variscite/dart_6ul/Kconfig"
2221 source "board/vscom/baltos/Kconfig"
2222 source "board/phytium/durian/Kconfig"
2223 source "board/xen/xenguest_arm64/Kconfig"
2224 source "board/keymile/Kconfig"
2226 source "arch/arm/Kconfig.debug"
2231 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2232 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2233 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64