1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
11 imply SPL_SEPARATE_BSS
14 bool "Enable support for CRC32 instruction"
18 ARMv8 implements dedicated crc32 instruction for crc32 calculation.
19 This is faster than software crc32 calculation. This instruction may
20 not be present on all ARMv8.0, but is always present on ARMv8.1 and
23 config COUNTER_FREQUENCY
24 int "Timer clock frequency"
25 depends on ARM64 || CPU_V7A
26 default 8000000 if IMX8 || MX7 || MX6UL || MX6ULL
27 default 24000000 if ARCH_SUNXI || ARCH_EXYNOS || ROCKCHIP_RK3128 || \
28 ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036
29 default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A
30 default 100000000 if ARCH_ZYNQMP
33 For platforms with ARMv8-A and ARMv7-A which features a system
34 counter, those platforms needs software to program the counter
35 frequency. Setup time clock frequency for certain platform.
36 0 means no need to configure the system counter frequency.
37 For platforms needs the frequency set in U-Boot with a
38 pre-defined value, should have the macro defined as a non-zero value.
40 config POSITION_INDEPENDENT
41 bool "Generate position-independent pre-relocation code"
42 depends on ARM64 || CPU_V7A
44 U-Boot expects to be linked to a specific hard-coded address, and to
45 be loaded to and run from that address. This option lifts that
46 restriction, thus allowing the code to be loaded to and executed from
47 almost any 4K aligned address. This logic relies on the relocation
48 information that is embedded in the binary to support U-Boot
49 relocating itself to the top-of-RAM later during execution.
51 config INIT_SP_RELATIVE
52 bool "Specify the early stack pointer relative to the .bss section"
54 default n if ARCH_QEMU
55 default y if POSITION_INDEPENDENT
57 U-Boot typically uses a hard-coded value for the stack pointer
58 before relocation. Enable this option to instead calculate the
59 initial SP at run-time. This is useful to avoid hard-coding addresses
60 into U-Boot, so that it can be loaded and executed at arbitrary
61 addresses and thus avoid using arbitrary addresses at runtime.
63 If this option is enabled, the early stack pointer is set to
64 &_bss_start with a offset value added. The offset is specified by
65 SYS_INIT_SP_BSS_OFFSET.
67 config SYS_INIT_SP_BSS_OFFSET
68 int "Early stack offset from the .bss base address"
70 depends on INIT_SP_RELATIVE
73 This option's value is the offset added to &_bss_start in order to
74 calculate the stack pointer. This offset should be large enough so
75 that the early malloc region, global data (gd), and early stack usage
76 do not overlap any appended DTB.
78 config SPL_SYS_NO_VECTOR_TABLE
82 config LINUX_KERNEL_IMAGE_HEADER
86 Place a Linux kernel image header at the start of the U-Boot binary.
87 The format of the header is described in the Linux kernel source at
88 Documentation/arm64/booting.txt. This feature is useful since the
89 image header reports the amount of memory (BSS and similar) that
90 U-Boot needs to use, but which isn't part of the binary.
92 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
93 depends on LINUX_KERNEL_IMAGE_HEADER
96 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
97 TEXT_OFFSET value written to the Linux kernel image header.
109 ARM GICV3 Interrupt translation service (ITS).
110 Basic support for programming locality specific peripheral
111 interrupts (LPI) configuration tables and enable LPI tables.
112 LPI configuration table can be used by u-boot or Linux.
113 ARM GICV3 has limitation, once the LPI table is enabled, LPI
114 configuration table can not be re-programmed, unless GICV3 reset.
120 config DMA_ADDR_T_64BIT
130 config GPIO_EXTRA_HEADER
133 # Used for compatibility with asm files copied from the kernel
134 config ARM_ASM_UNIFIED
138 # Used for compatibility with asm files copied from the kernel
142 config SYS_ICACHE_OFF
143 bool "Do not enable icache"
145 Do not enable instruction cache in U-Boot.
147 config SPL_SYS_ICACHE_OFF
148 bool "Do not enable icache in SPL"
150 default SYS_ICACHE_OFF
152 Do not enable instruction cache in SPL.
154 config SYS_DCACHE_OFF
155 bool "Do not enable dcache"
157 Do not enable data cache in U-Boot.
159 config SPL_SYS_DCACHE_OFF
160 bool "Do not enable dcache in SPL"
162 default SYS_DCACHE_OFF
164 Do not enable data cache in SPL.
166 config SYS_ARM_CACHE_CP15
167 bool "CP15 based cache enabling support"
169 Select this if your processor suports enabling caches by using
173 bool "MMU-based Paged Memory Management Support"
174 select SYS_ARM_CACHE_CP15
176 Select if you want MMU-based virtualised addressing space
177 support via paged memory management.
180 bool 'Use the ARM v7 PMSA Compliant MPU'
182 Some ARM systems without an MMU have instead a Memory Protection
183 Unit (MPU) that defines the type and permissions for regions of
185 If your CPU has an MPU then you should choose 'y' here unless you
186 know that you do not want to use the MPU.
188 # If set, the workarounds for these ARM errata are applied early during U-Boot
189 # startup. Note that in general these options force the workarounds to be
190 # applied; no CPU-type/version detection exists, unlike the similar options in
191 # the Linux kernel. Do not set these options unless they apply! Also note that
192 # the following can be machine-specific errata. These do have ability to
193 # provide rudimentary version and machine-specific checks, but expect no
195 # CONFIG_ARM_ERRATA_430973
196 # CONFIG_ARM_ERRATA_454179
197 # CONFIG_ARM_ERRATA_621766
198 # CONFIG_ARM_ERRATA_798870
199 # CONFIG_ARM_ERRATA_801819
200 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
201 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
203 config ARM_ERRATA_430973
206 config ARM_ERRATA_454179
209 config ARM_ERRATA_621766
212 config ARM_ERRATA_716044
215 config ARM_ERRATA_725233
218 config ARM_ERRATA_742230
221 config ARM_ERRATA_743622
224 config ARM_ERRATA_751472
227 config ARM_ERRATA_761320
230 config ARM_ERRATA_773022
233 config ARM_ERRATA_774769
236 config ARM_ERRATA_794072
239 config ARM_ERRATA_798870
242 config ARM_ERRATA_801819
245 config ARM_ERRATA_826974
248 config ARM_ERRATA_828024
251 config ARM_ERRATA_829520
254 config ARM_ERRATA_833069
257 config ARM_ERRATA_833471
260 config ARM_ERRATA_845369
263 config ARM_ERRATA_852421
266 config ARM_ERRATA_852423
269 config ARM_ERRATA_855873
272 config ARM_CORTEX_A8_CVE_2017_5715
275 config ARM_CORTEX_A15_CVE_2017_5715
280 select SYS_CACHE_SHIFT_5
285 select SYS_CACHE_SHIFT_5
290 select SYS_CACHE_SHIFT_5
292 imply SPL_SEPARATE_BSS
296 select SYS_CACHE_SHIFT_5
301 select SYS_CACHE_SHIFT_5
303 imply SPL_SEPARATE_BSS
308 select SYS_CACHE_SHIFT_5
315 select SYS_CACHE_SHIFT_6
322 select SYS_CACHE_SHIFT_5
323 select SYS_THUMB_BUILD
329 select SYS_ARM_CACHE_CP15
331 select SYS_CACHE_SHIFT_6
335 select SYS_CACHE_SHIFT_5
339 default "arm720t" if CPU_ARM720T
340 default "arm920t" if CPU_ARM920T
341 default "arm926ejs" if CPU_ARM926EJS
342 default "arm946es" if CPU_ARM946ES
343 default "arm1136" if CPU_ARM1136
344 default "arm1176" if CPU_ARM1176
345 default "armv7" if CPU_V7A
346 default "armv7" if CPU_V7R
347 default "armv7m" if CPU_V7M
348 default "sa1100" if CPU_SA1100
349 default "armv8" if ARM64
353 default 4 if CPU_ARM720T
354 default 4 if CPU_ARM920T
355 default 5 if CPU_ARM926EJS
356 default 5 if CPU_ARM946ES
357 default 6 if CPU_ARM1136
358 default 6 if CPU_ARM1176
362 default 4 if CPU_SA1100
366 prompt "Select the ARM data write cache policy"
367 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || RZA1
368 default SYS_ARM_CACHE_WRITEBACK
370 config SYS_ARM_CACHE_WRITEBACK
371 bool "Write-back (WB)"
373 A write updates the cache only and marks the cache line as dirty.
374 External memory is updated only when the line is evicted or explicitly
377 config SYS_ARM_CACHE_WRITETHROUGH
378 bool "Write-through (WT)"
380 A write updates both the cache and the external memory system.
381 This does not mark the cache line as dirty.
383 config SYS_ARM_CACHE_WRITEALLOC
384 bool "Write allocation (WA)"
386 A cache line is allocated on a write miss. This means that executing a
387 store instruction on the processor might cause a burst read to occur.
388 There is a linefill to obtain the data for the cache line, before the
392 config ARCH_VERY_EARLY_INIT
395 config SPL_ARCH_VERY_EARLY_INIT
399 bool "Enable ARCH_CPU_INIT"
401 Some architectures require a call to arch_cpu_init().
402 Say Y here to enable it
404 config SYS_ARCH_TIMER
405 bool "ARM Generic Timer support"
406 depends on CPU_V7A || ARM64
409 The ARM Generic Timer (aka arch-timer) provides an architected
410 interface to a timer source on an SoC.
411 It is mandatory for ARMv8 implementation and widely available
415 bool "Support for ARM SMC Calling Convention (SMCCC)"
416 depends on CPU_V7A || ARM64
419 Say Y here if you want to enable ARM SMC Calling Convention.
420 This should be enabled if U-Boot needs to communicate with system
421 firmware (for example, PSCI) according to SMCCC.
424 bool "Support ARM semihosting"
426 Semihosting is a method for a target to communicate with a host
427 debugger. It uses special instructions which the debugger will trap
428 on and interpret. This allows U-Boot to read/write files, print to
429 the console, and execute arbitrary commands on the host system.
431 Enabling this option will add support for reading and writing files
432 on the host system. If you don't have a debugger attached then trying
433 to do this will likely cause U-Boot to hang. Say 'n' if you are unsure.
435 config SEMIHOSTING_FALLBACK
436 bool "Recover gracefully when semihosting fails"
437 depends on SEMIHOSTING && ARM64
440 Normally, if U-Boot makes a semihosting call and no debugger is
441 attached, then it will panic due to a synchronous abort
442 exception. This config adds an exception handler which will allow
443 U-Boot to recover. Say 'y' if unsure.
445 config SPL_SEMIHOSTING
446 bool "Support ARM semihosting in SPL"
449 Semihosting is a method for a target to communicate with a host
450 debugger. It uses special instructions which the debugger will trap
451 on and interpret. This allows U-Boot to read/write files, print to
452 the console, and execute arbitrary commands on the host system.
454 Enabling this option will add support for reading and writing files
455 on the host system. If you don't have a debugger attached then trying
456 to do this will likely cause U-Boot to hang. Say 'n' if you are unsure.
458 config SPL_SEMIHOSTING_FALLBACK
459 bool "Recover gracefully when semihosting fails in SPL"
460 depends on SPL_SEMIHOSTING && ARM64
461 select ARMV8_SPL_EXCEPTION_VECTORS
464 Normally, if U-Boot makes a semihosting call and no debugger is
465 attached, then it will panic due to a synchronous abort
466 exception. This config adds an exception handler which will allow
467 U-Boot to recover. Say 'y' if unsure.
469 config SYS_THUMB_BUILD
470 bool "Build U-Boot using the Thumb instruction set"
473 Use this flag to build U-Boot using the Thumb instruction set for
474 ARM architectures. Thumb instruction set provides better code
475 density. For ARM architectures that support Thumb2 this flag will
476 result in Thumb2 code generated by GCC.
478 config SPL_SYS_THUMB_BUILD
479 bool "Build SPL using the Thumb instruction set"
480 default y if SYS_THUMB_BUILD
481 depends on !ARM64 && SPL
483 Use this flag to build SPL using the Thumb instruction set for
484 ARM architectures. Thumb instruction set provides better code
485 density. For ARM architectures that support Thumb2 this flag will
486 result in Thumb2 code generated by GCC.
488 config TPL_SYS_THUMB_BUILD
489 bool "Build TPL using the Thumb instruction set"
490 default y if SYS_THUMB_BUILD
491 depends on TPL && !ARM64
493 Use this flag to build TPL using the Thumb instruction set for
494 ARM architectures. Thumb instruction set provides better code
495 density. For ARM architectures that support Thumb2 this flag will
496 result in Thumb2 code generated by GCC.
499 config SYS_L2CACHE_OFF
502 If SoC does not support L2CACHE or one does not want to enable
503 L2CACHE, choose this option.
505 config ENABLE_ARM_SOC_BOOT0_HOOK
506 bool "prepare BOOT0 header"
508 If the SoC's BOOT0 requires a header area filled with (magic)
509 values, then choose this option, and create a file included as
510 <asm/arch/boot0.h> which contains the required assembler code.
512 config USE_ARCH_MEMCPY
513 bool "Use an assembly optimized implementation of memcpy"
515 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
517 Enable the generation of an optimized version of memcpy.
518 Such an implementation may be faster under some conditions
519 but may increase the binary size.
521 config SPL_USE_ARCH_MEMCPY
522 bool "Use an assembly optimized implementation of memcpy for SPL"
523 default y if USE_ARCH_MEMCPY
526 Enable the generation of an optimized version of memcpy.
527 Such an implementation may be faster under some conditions
528 but may increase the binary size.
530 config TPL_USE_ARCH_MEMCPY
531 bool "Use an assembly optimized implementation of memcpy for TPL"
532 default y if USE_ARCH_MEMCPY
535 Enable the generation of an optimized version of memcpy.
536 Such an implementation may be faster under some conditions
537 but may increase the binary size.
539 config USE_ARCH_MEMMOVE
540 bool "Use an assembly optimized implementation of memmove" if !ARM64
541 default USE_ARCH_MEMCPY if ARM64
544 Enable the generation of an optimized version of memmove.
545 Such an implementation may be faster under some conditions
546 but may increase the binary size.
548 config SPL_USE_ARCH_MEMMOVE
549 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
550 default SPL_USE_ARCH_MEMCPY if ARM64
551 depends on SPL && ARM64
553 Enable the generation of an optimized version of memmove.
554 Such an implementation may be faster under some conditions
555 but may increase the binary size.
557 config TPL_USE_ARCH_MEMMOVE
558 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
559 default TPL_USE_ARCH_MEMCPY if ARM64
560 depends on TPL && ARM64
562 Enable the generation of an optimized version of memmove.
563 Such an implementation may be faster under some conditions
564 but may increase the binary size.
566 config USE_ARCH_MEMSET
567 bool "Use an assembly optimized implementation of memset"
569 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
571 Enable the generation of an optimized version of memset.
572 Such an implementation may be faster under some conditions
573 but may increase the binary size.
575 config SPL_USE_ARCH_MEMSET
576 bool "Use an assembly optimized implementation of memset for SPL"
577 default y if USE_ARCH_MEMSET
580 Enable the generation of an optimized version of memset.
581 Such an implementation may be faster under some conditions
582 but may increase the binary size.
584 config TPL_USE_ARCH_MEMSET
585 bool "Use an assembly optimized implementation of memset for TPL"
586 default y if USE_ARCH_MEMSET
589 Enable the generation of an optimized version of memset.
590 Such an implementation may be faster under some conditions
591 but may increase the binary size.
593 config ARM64_SUPPORT_AARCH32
594 bool "ARM64 system support AArch32 execution state"
596 default y if !TARGET_THUNDERX_88XX
598 This ARM64 system supports AArch32 execution state.
601 def_bool y if ARCH_EXYNOS || ARCH_S5PC1XX
604 prompt "Target select"
609 select GPIO_EXTRA_HEADER
610 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
611 select SPL_SEPARATE_BSS if SPL
616 select GPIO_EXTRA_HEADER
617 select SPL_DM_SPI if SPL
620 Support for TI's DaVinci platform.
623 bool "Marvell Kirkwood"
624 select ARCH_MISC_INIT
625 select BOARD_EARLY_INIT_F
627 select GPIO_EXTRA_HEADER
630 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
636 select GPIO_EXTRA_HEADER
637 select SPL_DM_SPI if SPL
638 select SPL_DM_SPI_FLASH if SPL
647 select GPIO_EXTRA_HEADER
648 select SPL_SEPARATE_BSS if SPL
650 config TARGET_STV0991
651 bool "Support stv0991"
657 select GPIO_EXTRA_HEADER
664 bool "Broadcom BCM283X family"
668 select GPIO_EXTRA_HEADER
671 select SERIAL_SEARCH_ALL
676 bool "Broadcom BCM63158 family"
682 bool "Broadcom BCM6753 family"
689 bool "Broadcom BCM68360 family"
695 bool "Broadcom BCM6858 family"
701 bool "Broadcom BCM7XXX family"
704 select GPIO_EXTRA_HEADER
707 imply OF_HAS_PRIOR_STAGE
709 This enables support for Broadcom ARM-based set-top box
710 chipsets, including the 7445 family of chips.
713 bool "Broadcom broadband chip family"
717 config TARGET_VEXPRESS_CA9X4
718 bool "Support vexpress_ca9x4"
722 config TARGET_BCMCYGNUS
723 bool "Support bcmcygnus"
725 select GPIO_EXTRA_HEADER
727 imply BCM_SF2_ETH_GMAC
735 bool "Support Broadcom Northstar2"
737 select GPIO_EXTRA_HEADER
739 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
740 ARMv8 Cortex-A57 processors targeting a broad range of networking
744 bool "Support Broadcom NS3"
746 select BOARD_LATE_INIT
748 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
749 ARMv8 Cortex-A72 processors targeting a broad range of networking
753 bool "Samsung EXYNOS"
763 select GPIO_EXTRA_HEADER
764 imply SYS_THUMB_BUILD
769 bool "Samsung S5PC1XX"
775 select GPIO_EXTRA_HEADER
779 bool "Calxeda Highbank"
790 imply OF_HAS_PRIOR_STAGE
792 config ARCH_INTEGRATOR
793 bool "ARM Ltd. Integrator family"
796 select GPIO_EXTRA_HEADER
801 bool "Qualcomm IPQ40xx SoCs"
807 select GPIO_EXTRA_HEADER
820 select GPIO_EXTRA_HEADER
822 select SYS_ARCH_TIMER
823 select SYS_THUMB_BUILD
829 bool "Texas Instruments' K3 Architecture"
834 config ARCH_OMAP2PLUS
837 select GPIO_EXTRA_HEADER
838 select SPL_BOARD_INIT if SPL
839 select SPL_STACK_R if SPL
841 imply TI_SYSC if DM && OF_CONTROL
844 imply SPL_SEPARATE_BSS
848 select GPIO_EXTRA_HEADER
849 imply DISTRO_DEFAULTS
852 Support for the Meson SoC family developed by Amlogic Inc.,
853 targeted at media players and tablet computers. We currently
854 support the S905 (GXBaby) 64-bit SoC.
859 select GPIO_EXTRA_HEADER
862 select SPL_LIBCOMMON_SUPPORT if SPL
863 select SPL_LIBGENERIC_SUPPORT if SPL
864 select SPL_OF_CONTROL if SPL
867 Support for the MediaTek SoCs family developed by MediaTek Inc.
868 Please refer to doc/README.mediatek for more information.
871 bool "NXP LPC32xx platform"
876 select GPIO_EXTRA_HEADER
882 bool "NXP i.MX8 platform"
884 select SYS_FSL_HAS_SEC
885 select SYS_FSL_SEC_COMPAT_4
886 select SYS_FSL_SEC_LE
888 select GPIO_EXTRA_HEADER
891 select ENABLE_ARM_SOC_BOOT0_HOOK
895 bool "NXP i.MX8M platform"
897 select GPIO_EXTRA_HEADER
899 select SYS_FSL_HAS_SEC
900 select SYS_FSL_SEC_COMPAT_4
901 select SYS_FSL_SEC_LE
909 bool "NXP i.MX8ULP platform"
915 select GPIO_EXTRA_HEADER
920 bool "NXP i.MXRT platform"
924 select GPIO_EXTRA_HEADER
930 bool "NXP i.MX23 family"
932 select GPIO_EXTRA_HEADER
938 bool "NXP i.MX28 family"
940 select GPIO_EXTRA_HEADER
946 bool "NXP i.MX31 family"
948 select GPIO_EXTRA_HEADER
953 select BOARD_POSTCLK_INIT
955 select GPIO_EXTRA_HEADER
957 select SYS_FSL_HAS_SEC
958 select SYS_FSL_SEC_COMPAT_4
959 select SYS_FSL_SEC_LE
960 select ROM_UNIFIED_SECTIONS
962 imply SYS_THUMB_BUILD
966 select ARCH_MISC_INIT
968 select GPIO_EXTRA_HEADER
970 select SYS_FSL_HAS_SEC
971 select SYS_FSL_SEC_COMPAT_4
972 select SYS_FSL_SEC_LE
973 imply BOARD_EARLY_INIT_F
975 imply SYS_THUMB_BUILD
979 select BOARD_POSTCLK_INIT
981 select GPIO_EXTRA_HEADER
983 select SYS_FSL_HAS_SEC
984 select SYS_FSL_SEC_COMPAT_4
985 select SYS_FSL_SEC_LE
987 imply SYS_THUMB_BUILD
988 imply SPL_SEPARATE_BSS
992 select BOARD_EARLY_INIT_F
994 select GPIO_EXTRA_HEADER
999 bool "Nexell S5P4418/S5P6818 SoC"
1000 select ENABLE_ARM_SOC_BOOT0_HOOK
1002 select GPIO_EXTRA_HEADER
1005 bool "Support Nuvoton SoCs"
1026 select LINUX_KERNEL_IMAGE_HEADER
1027 select OF_BOARD_SETUP
1030 select POSITION_INDEPENDENT
1036 select SYSRESET_WATCHDOG
1037 select SYSRESET_WATCHDOG_AUTO
1041 imply DISTRO_DEFAULTS
1042 imply OF_HAS_PRIOR_STAGE
1045 bool "Actions Semi OWL SoCs"
1049 select GPIO_EXTRA_HEADER
1054 select SYS_RELOC_GD_ENV_ADDR
1058 bool "QEMU Virtual Platform"
1067 imply OF_HAS_PRIOR_STAGE
1070 bool "Renesas ARM SoCs"
1073 select GPIO_EXTRA_HEADER
1074 imply BOARD_EARLY_INIT_F
1077 imply SYS_THUMB_BUILD
1078 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
1080 config ARCH_SNAPDRAGON
1081 bool "Qualcomm Snapdragon SoCs"
1086 select GPIO_EXTRA_HEADER
1095 bool "Altera SOCFPGA family"
1096 select ARCH_EARLY_INIT_R
1097 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
1098 select ARM64 if TARGET_SOCFPGA_SOC64
1099 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1103 select GPIO_EXTRA_HEADER
1104 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1106 select SPL_DM_RESET if DM_RESET
1107 select SPL_DM_SERIAL
1108 select SPL_LIBCOMMON_SUPPORT
1109 select SPL_LIBGENERIC_SUPPORT
1110 select SPL_OF_CONTROL
1111 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1117 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1119 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1120 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1130 imply SPL_DM_SPI_FLASH
1131 imply SPL_LIBDISK_SUPPORT
1133 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1134 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1135 imply SPL_SPI_FLASH_SUPPORT
1140 bool "Support sunxi (Allwinner) SoCs"
1143 select CMD_MMC if MMC
1144 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1149 select DM_I2C if I2C
1150 select DM_SPI if SPI
1151 select DM_SPI_FLASH if SPI
1153 select DM_MMC if MMC
1154 select DM_SCSI if SCSI
1156 select GPIO_EXTRA_HEADER
1157 select OF_BOARD_SETUP
1161 select SPECIFY_CONSOLE_INDEX
1162 select SPL_SEPARATE_BSS if SPL
1163 select SPL_STACK_R if SPL
1164 select SPL_SYS_MALLOC_SIMPLE if SPL
1165 select SPL_SYS_THUMB_BUILD if !ARM64
1168 select SYS_THUMB_BUILD if !ARM64
1169 select USB if DISTRO_DEFAULTS
1170 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1171 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1172 select SPL_USE_TINY_PRINTF
1174 select SYS_RELOC_GD_ENV_ADDR
1175 imply BOARD_LATE_INIT
1178 imply CMD_UBI if MTD_RAW_NAND
1179 imply DISTRO_DEFAULTS
1182 imply OF_LIBFDT_OVERLAY
1183 imply PRE_CONSOLE_BUFFER
1185 imply SPL_LIBCOMMON_SUPPORT
1186 imply SPL_LIBGENERIC_SUPPORT
1187 imply SPL_MMC if MMC
1191 imply SYSRESET_WATCHDOG
1192 imply SYSRESET_WATCHDOG_AUTO
1197 bool "ST-Ericsson U8500 Series"
1201 select DM_MMC if MMC
1203 select DM_USB_GADGET if DM_USB
1207 imply AB8500_USB_PHY
1208 imply ARM_PL180_MMCI
1213 imply NOMADIK_MTU_TIMER
1218 imply SYS_THUMB_BUILD
1219 imply SYSRESET_SYSCON
1222 bool "Support Xilinx Versal Platform"
1226 select DM_ETH if NET
1227 select DM_MMC if MMC
1232 imply BOARD_LATE_INIT
1233 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1236 bool "Freescale Vybrid"
1238 select GPIO_EXTRA_HEADER
1240 select SYS_FSL_ERRATUM_ESDHC111
1245 bool "Xilinx Zynq based platform"
1249 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1251 select DM_ETH if NET
1252 select DM_MMC if MMC
1258 select SPL_BOARD_INIT if SPL
1259 select SPL_CLK if SPL
1260 select SPL_DM if SPL
1261 select SPL_DM_SPI if SPL
1262 select SPL_DM_SPI_FLASH if SPL
1263 select SPL_OF_CONTROL if SPL
1264 select SPL_SEPARATE_BSS if SPL
1266 imply ARCH_EARLY_INIT_R
1267 imply BOARD_LATE_INIT
1271 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1274 config ARCH_ZYNQMP_R5
1275 bool "Xilinx ZynqMP R5 based platform"
1279 select DM_ETH if NET
1280 select DM_MMC if MMC
1287 bool "Xilinx ZynqMP based platform"
1291 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1292 select DM_ETH if NET
1294 select DM_MMC if MMC
1296 select DM_SPI if SPI
1297 select DM_SPI_FLASH if DM_SPI
1301 select SPL_BOARD_INIT if SPL
1302 select SPL_CLK if SPL
1303 select SPL_DM if SPL
1304 select SPL_DM_SPI if SPI && SPL_DM
1305 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1306 select SPL_DM_MAILBOX if SPL
1307 imply SPL_FIRMWARE if SPL
1308 select SPL_SEPARATE_BSS if SPL
1312 imply BOARD_LATE_INIT
1314 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1318 imply ZYNQMP_GPIO_MODEPIN if DM_GPIO && USB
1322 select GPIO_EXTRA_HEADER
1323 imply DISTRO_DEFAULTS
1326 config ARCH_VEXPRESS64
1327 bool "Support ARMv8 Arm Ltd. VExpress based boards and models"
1335 select MTD_NOR_FLASH if MTD
1336 select FLASH_CFI_DRIVER if MTD
1337 select ENV_IS_IN_FLASH if MTD
1338 imply DISTRO_DEFAULTS
1340 config TARGET_CORSTONE1000
1341 bool "Support Corstone1000 Platform"
1346 config TARGET_TOTAL_COMPUTE
1347 bool "Support Total Compute Platform"
1355 config TARGET_LS2080A_EMU
1356 bool "Support ls2080a_emu"
1359 select ARMV8_MULTIENTRY
1360 select FSL_DDR_SYNC_REFRESH
1361 select GPIO_EXTRA_HEADER
1363 Support for Freescale LS2080A_EMU platform.
1364 The LS2080A Development System (EMULATOR) is a pre-silicon
1365 development platform that supports the QorIQ LS2080A
1366 Layerscape Architecture processor.
1368 config TARGET_LS1088AQDS
1369 bool "Support ls1088aqds"
1372 select ARMV8_MULTIENTRY
1373 select ARCH_SUPPORT_TFABOOT
1374 select BOARD_LATE_INIT
1375 select GPIO_EXTRA_HEADER
1377 select FSL_DDR_INTERACTIVE if !SD_BOOT
1379 Support for NXP LS1088AQDS platform.
1380 The LS1088A Development System (QDS) is a high-performance
1381 development platform that supports the QorIQ LS1088A
1382 Layerscape Architecture processor.
1384 config TARGET_LS2080AQDS
1385 bool "Support ls2080aqds"
1388 select ARMV8_MULTIENTRY
1389 select ARCH_SUPPORT_TFABOOT
1390 select BOARD_LATE_INIT
1391 select GPIO_EXTRA_HEADER
1396 select FSL_DDR_INTERACTIVE if !SPL
1398 Support for Freescale LS2080AQDS platform.
1399 The LS2080A Development System (QDS) is a high-performance
1400 development platform that supports the QorIQ LS2080A
1401 Layerscape Architecture processor.
1403 config TARGET_LS2080ARDB
1404 bool "Support ls2080ardb"
1407 select ARMV8_MULTIENTRY
1408 select ARCH_SUPPORT_TFABOOT
1409 select BOARD_LATE_INIT
1412 select FSL_DDR_INTERACTIVE if !SPL
1413 select GPIO_EXTRA_HEADER
1417 Support for Freescale LS2080ARDB platform.
1418 The LS2080A Reference design board (RDB) is a high-performance
1419 development platform that supports the QorIQ LS2080A
1420 Layerscape Architecture processor.
1422 config TARGET_LS2081ARDB
1423 bool "Support ls2081ardb"
1426 select ARMV8_MULTIENTRY
1427 select BOARD_LATE_INIT
1428 select GPIO_EXTRA_HEADER
1431 Support for Freescale LS2081ARDB platform.
1432 The LS2081A Reference design board (RDB) is a high-performance
1433 development platform that supports the QorIQ LS2081A/LS2041A
1434 Layerscape Architecture processor.
1436 config TARGET_LX2160ARDB
1437 bool "Support lx2160ardb"
1440 select ARMV8_MULTIENTRY
1441 select ARCH_SUPPORT_TFABOOT
1442 select BOARD_LATE_INIT
1443 select GPIO_EXTRA_HEADER
1445 Support for NXP LX2160ARDB platform.
1446 The lx2160ardb (LX2160A Reference design board (RDB)
1447 is a high-performance development platform that supports the
1448 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1450 config TARGET_LX2160AQDS
1451 bool "Support lx2160aqds"
1454 select ARMV8_MULTIENTRY
1455 select ARCH_SUPPORT_TFABOOT
1456 select BOARD_LATE_INIT
1457 select GPIO_EXTRA_HEADER
1459 Support for NXP LX2160AQDS platform.
1460 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1461 is a high-performance development platform that supports the
1462 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1464 config TARGET_LX2162AQDS
1465 bool "Support lx2162aqds"
1467 select ARCH_MISC_INIT
1469 select ARMV8_MULTIENTRY
1470 select ARCH_SUPPORT_TFABOOT
1471 select BOARD_LATE_INIT
1472 select GPIO_EXTRA_HEADER
1474 Support for NXP LX2162AQDS platform.
1475 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1478 bool "Support HiKey 96boards Consumer Edition Platform"
1483 select GPIO_EXTRA_HEADER
1486 select SPECIFY_CONSOLE_INDEX
1489 Support for HiKey 96boards platform. It features a HI6220
1490 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1492 config TARGET_HIKEY960
1493 bool "Support HiKey960 96boards Consumer Edition Platform"
1497 select GPIO_EXTRA_HEADER
1502 Support for HiKey960 96boards platform. It features a HI3660
1503 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1505 config TARGET_POPLAR
1506 bool "Support Poplar 96boards Enterprise Edition Platform"
1510 select GPIO_EXTRA_HEADER
1515 Support for Poplar 96boards EE platform. It features a HI3798cv200
1516 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1517 making it capable of running any commercial set-top solution based on
1520 config TARGET_LS1012AQDS
1521 bool "Support ls1012aqds"
1524 select ARCH_SUPPORT_TFABOOT
1525 select BOARD_LATE_INIT
1526 select GPIO_EXTRA_HEADER
1528 Support for Freescale LS1012AQDS platform.
1529 The LS1012A Development System (QDS) is a high-performance
1530 development platform that supports the QorIQ LS1012A
1531 Layerscape Architecture processor.
1533 config TARGET_LS1012ARDB
1534 bool "Support ls1012ardb"
1537 select ARCH_SUPPORT_TFABOOT
1538 select BOARD_LATE_INIT
1539 select GPIO_EXTRA_HEADER
1543 Support for Freescale LS1012ARDB platform.
1544 The LS1012A Reference design board (RDB) is a high-performance
1545 development platform that supports the QorIQ LS1012A
1546 Layerscape Architecture processor.
1548 config TARGET_LS1012A2G5RDB
1549 bool "Support ls1012a2g5rdb"
1552 select ARCH_SUPPORT_TFABOOT
1553 select BOARD_LATE_INIT
1554 select GPIO_EXTRA_HEADER
1557 Support for Freescale LS1012A2G5RDB platform.
1558 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1559 development platform that supports the QorIQ LS1012A
1560 Layerscape Architecture processor.
1562 config TARGET_LS1012AFRWY
1563 bool "Support ls1012afrwy"
1566 select ARCH_SUPPORT_TFABOOT
1567 select BOARD_LATE_INIT
1568 select GPIO_EXTRA_HEADER
1572 Support for Freescale LS1012AFRWY platform.
1573 The LS1012A FRWY board (FRWY) is a high-performance
1574 development platform that supports the QorIQ LS1012A
1575 Layerscape Architecture processor.
1577 config TARGET_LS1012AFRDM
1578 bool "Support ls1012afrdm"
1581 select ARCH_SUPPORT_TFABOOT
1582 select GPIO_EXTRA_HEADER
1584 Support for Freescale LS1012AFRDM platform.
1585 The LS1012A Freedom board (FRDM) is a high-performance
1586 development platform that supports the QorIQ LS1012A
1587 Layerscape Architecture processor.
1589 config TARGET_LS1028AQDS
1590 bool "Support ls1028aqds"
1593 select ARMV8_MULTIENTRY
1594 select ARCH_SUPPORT_TFABOOT
1595 select BOARD_LATE_INIT
1596 select GPIO_EXTRA_HEADER
1598 Support for Freescale LS1028AQDS platform
1599 The LS1028A Development System (QDS) is a high-performance
1600 development platform that supports the QorIQ LS1028A
1601 Layerscape Architecture processor.
1603 config TARGET_LS1028ARDB
1604 bool "Support ls1028ardb"
1607 select ARMV8_MULTIENTRY
1608 select ARCH_SUPPORT_TFABOOT
1609 select BOARD_LATE_INIT
1610 select GPIO_EXTRA_HEADER
1612 Support for Freescale LS1028ARDB platform
1613 The LS1028A Development System (RDB) is a high-performance
1614 development platform that supports the QorIQ LS1028A
1615 Layerscape Architecture processor.
1617 config TARGET_LS1088ARDB
1618 bool "Support ls1088ardb"
1621 select ARMV8_MULTIENTRY
1622 select ARCH_SUPPORT_TFABOOT
1623 select BOARD_LATE_INIT
1625 select FSL_DDR_INTERACTIVE if !SD_BOOT
1626 select GPIO_EXTRA_HEADER
1628 Support for NXP LS1088ARDB platform.
1629 The LS1088A Reference design board (RDB) is a high-performance
1630 development platform that supports the QorIQ LS1088A
1631 Layerscape Architecture processor.
1633 config TARGET_LS1021AQDS
1634 bool "Support ls1021aqds"
1636 select ARCH_SUPPORT_PSCI
1637 select BOARD_EARLY_INIT_F
1638 select BOARD_LATE_INIT
1640 select CPU_V7_HAS_NONSEC
1641 select CPU_V7_HAS_VIRT
1642 select LS1_DEEP_SLEEP
1645 select FSL_DDR_INTERACTIVE
1646 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1647 select GPIO_EXTRA_HEADER
1648 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1651 config TARGET_LS1021ATWR
1652 bool "Support ls1021atwr"
1654 select ARCH_SUPPORT_PSCI
1655 select BOARD_EARLY_INIT_F
1656 select BOARD_LATE_INIT
1658 select CPU_V7_HAS_NONSEC
1659 select CPU_V7_HAS_VIRT
1660 select LS1_DEEP_SLEEP
1662 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1663 select GPIO_EXTRA_HEADER
1666 config TARGET_PG_WCOM_SELI8
1667 bool "Support Hitachi-Powergrids SELI8 service unit card"
1669 select ARCH_SUPPORT_PSCI
1670 select BOARD_EARLY_INIT_F
1671 select BOARD_LATE_INIT
1673 select CPU_V7_HAS_NONSEC
1674 select CPU_V7_HAS_VIRT
1676 select FSL_DDR_INTERACTIVE
1677 select GPIO_EXTRA_HEADER
1681 Support for Hitachi-Powergrids SELI8 service unit card.
1682 SELI8 is a QorIQ LS1021a based service unit card used
1683 in XMC20 and FOX615 product families.
1685 config TARGET_PG_WCOM_EXPU1
1686 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1688 select ARCH_SUPPORT_PSCI
1689 select BOARD_EARLY_INIT_F
1690 select BOARD_LATE_INIT
1692 select CPU_V7_HAS_NONSEC
1693 select CPU_V7_HAS_VIRT
1695 select FSL_DDR_INTERACTIVE
1699 Support for Hitachi-Powergrids EXPU1 service unit card.
1700 EXPU1 is a QorIQ LS1021a based service unit card used
1701 in XMC20 and FOX615 product families.
1703 config TARGET_LS1021ATSN
1704 bool "Support ls1021atsn"
1706 select ARCH_SUPPORT_PSCI
1707 select BOARD_EARLY_INIT_F
1708 select BOARD_LATE_INIT
1710 select CPU_V7_HAS_NONSEC
1711 select CPU_V7_HAS_VIRT
1712 select LS1_DEEP_SLEEP
1714 select GPIO_EXTRA_HEADER
1717 config TARGET_LS1021AIOT
1718 bool "Support ls1021aiot"
1720 select ARCH_SUPPORT_PSCI
1721 select BOARD_LATE_INIT
1723 select CPU_V7_HAS_NONSEC
1724 select CPU_V7_HAS_VIRT
1726 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1727 select GPIO_EXTRA_HEADER
1730 Support for Freescale LS1021AIOT platform.
1731 The LS1021A Freescale board (IOT) is a high-performance
1732 development platform that supports the QorIQ LS1021A
1733 Layerscape Architecture processor.
1735 config TARGET_LS1043AQDS
1736 bool "Support ls1043aqds"
1739 select ARMV8_MULTIENTRY
1740 select ARCH_SUPPORT_TFABOOT
1741 select BOARD_EARLY_INIT_F
1742 select BOARD_LATE_INIT
1744 select FSL_DDR_INTERACTIVE if !SPL
1745 select FSL_DSPI if !SPL_NO_DSPI
1746 select DM_SPI_FLASH if FSL_DSPI
1747 select GPIO_EXTRA_HEADER
1751 Support for Freescale LS1043AQDS platform.
1753 config TARGET_LS1043ARDB
1754 bool "Support ls1043ardb"
1757 select ARMV8_MULTIENTRY
1758 select ARCH_SUPPORT_TFABOOT
1759 select BOARD_EARLY_INIT_F
1760 select BOARD_LATE_INIT
1762 select FSL_DSPI if !SPL_NO_DSPI
1763 select DM_SPI_FLASH if FSL_DSPI
1764 select GPIO_EXTRA_HEADER
1766 Support for Freescale LS1043ARDB platform.
1768 config TARGET_LS1046AQDS
1769 bool "Support ls1046aqds"
1772 select ARMV8_MULTIENTRY
1773 select ARCH_SUPPORT_TFABOOT
1774 select BOARD_EARLY_INIT_F
1775 select BOARD_LATE_INIT
1776 select DM_SPI_FLASH if DM_SPI
1778 select FSL_DDR_BIST if !SPL
1779 select FSL_DDR_INTERACTIVE if !SPL
1780 select FSL_DDR_INTERACTIVE if !SPL
1781 select GPIO_EXTRA_HEADER
1784 Support for Freescale LS1046AQDS platform.
1785 The LS1046A Development System (QDS) is a high-performance
1786 development platform that supports the QorIQ LS1046A
1787 Layerscape Architecture processor.
1789 config TARGET_LS1046ARDB
1790 bool "Support ls1046ardb"
1793 select ARMV8_MULTIENTRY
1794 select ARCH_SUPPORT_TFABOOT
1795 select BOARD_EARLY_INIT_F
1796 select BOARD_LATE_INIT
1797 select DM_SPI_FLASH if DM_SPI
1798 select POWER_MC34VR500
1801 select FSL_DDR_INTERACTIVE if !SPL
1802 select GPIO_EXTRA_HEADER
1805 Support for Freescale LS1046ARDB platform.
1806 The LS1046A Reference Design Board (RDB) is a high-performance
1807 development platform that supports the QorIQ LS1046A
1808 Layerscape Architecture processor.
1810 config TARGET_LS1046AFRWY
1811 bool "Support ls1046afrwy"
1814 select ARMV8_MULTIENTRY
1815 select ARCH_SUPPORT_TFABOOT
1816 select BOARD_EARLY_INIT_F
1817 select BOARD_LATE_INIT
1818 select DM_SPI_FLASH if DM_SPI
1819 select GPIO_EXTRA_HEADER
1822 Support for Freescale LS1046AFRWY platform.
1823 The LS1046A Freeway Board (FRWY) is a high-performance
1824 development platform that supports the QorIQ LS1046A
1825 Layerscape Architecture processor.
1831 select ARMV8_MULTIENTRY
1847 select GPIO_EXTRA_HEADER
1848 select SPL_DM if SPL
1849 select SPL_DM_SPI if SPL
1850 select SPL_DM_SPI_FLASH if SPL
1851 select SPL_DM_I2C if SPL
1852 select SPL_DM_MMC if SPL
1853 select SPL_DM_SERIAL if SPL
1855 Support for Kontron SMARC-sAL28 board.
1858 bool "Support ten64"
1860 select ARCH_MISC_INIT
1862 select ARMV8_MULTIENTRY
1863 select ARCH_SUPPORT_TFABOOT
1864 select BOARD_LATE_INIT
1866 select FSL_DDR_INTERACTIVE if !SD_BOOT
1867 select GPIO_EXTRA_HEADER
1869 Support for Traverse Technologies Ten64 board, based
1872 config ARCH_UNIPHIER
1873 bool "Socionext UniPhier SoCs"
1874 select BOARD_LATE_INIT
1883 select OF_BOARD_SETUP
1887 select SPL_BOARD_INIT if SPL
1888 select SPL_DM if SPL
1889 select SPL_LIBCOMMON_SUPPORT if SPL
1890 select SPL_LIBGENERIC_SUPPORT if SPL
1891 select SPL_OF_CONTROL if SPL
1892 select SPL_PINCTRL if SPL
1895 imply DISTRO_DEFAULTS
1898 Support for UniPhier SoC family developed by Socionext Inc.
1899 (formerly, System LSI Business Division of Panasonic Corporation)
1901 config ARCH_SYNQUACER
1902 bool "Socionext SynQuacer SoCs"
1908 select SYSRESET_PSCI
1911 Support for SynQuacer SoC family developed by Socionext Inc.
1912 This SoC is used on 96boards EE DeveloperBox.
1915 bool "Support STMicroelectronics STM32 MCU with cortex M"
1922 bool "Support STMicroelectronics SoCs"
1931 Support for STMicroelectronics STiH407/10 SoC family.
1932 This SoC is used on Linaro 96Board STiH410-B2260
1935 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1936 select ARCH_MISC_INIT
1937 select ARCH_SUPPORT_TFABOOT
1938 select BOARD_LATE_INIT
1947 select OF_SYSTEM_SETUP
1952 select SYS_THUMB_BUILD
1956 imply OF_LIBFDT_OVERLAY
1957 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1961 Support for STM32MP SoC family developed by STMicroelectronics,
1962 MPUs based on ARM cortex A core
1963 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1964 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1966 SPL is the unsecure FSBL for the basic boot chain.
1968 config ARCH_ROCKCHIP
1969 bool "Support Rockchip SoCs"
1971 select BINMAN if SPL_OPTEE || (SPL && !ARM64)
1981 select ENABLE_ARM_SOC_BOOT0_HOOK
1984 select SPL_DM if SPL
1985 select SPL_DM_SPI if SPL
1986 select SPL_DM_SPI_FLASH if SPL
1988 select SYS_THUMB_BUILD if !ARM64
1991 imply DEBUG_UART_BOARD_INIT
1992 imply DISTRO_DEFAULTS
1994 imply SARADC_ROCKCHIP
1996 imply SPL_SYS_MALLOC_SIMPLE
1999 imply USB_FUNCTION_FASTBOOT
2001 config ARCH_OCTEONTX
2002 bool "Support OcteonTX SoCs"
2005 select GPIO_EXTRA_HEADER
2009 select BOARD_LATE_INIT
2010 select SYS_CACHE_SHIFT_7
2011 select SYS_PCI_64BIT if PCI
2012 imply OF_HAS_PRIOR_STAGE
2014 config ARCH_OCTEONTX2
2015 bool "Support OcteonTX2 SoCs"
2018 select GPIO_EXTRA_HEADER
2022 select BOARD_LATE_INIT
2023 select SYS_CACHE_SHIFT_7
2024 select SYS_PCI_64BIT if PCI
2025 imply OF_HAS_PRIOR_STAGE
2027 config TARGET_THUNDERX_88XX
2028 bool "Support ThunderX 88xx"
2030 select GPIO_EXTRA_HEADER
2033 select SYS_CACHE_SHIFT_7
2036 bool "Support Aspeed SoCs"
2041 config TARGET_DURIAN
2042 bool "Support Phytium Durian Platform"
2044 select GPIO_EXTRA_HEADER
2046 Support for durian platform.
2047 It has 2GB Sdram, uart and pcie.
2049 config TARGET_POMELO
2050 bool "Support Phytium Pomelo Platform"
2062 select DM_ETH if NET
2065 Support for pomelo platform.
2066 It has 8GB Sdram, uart and pcie.
2068 config TARGET_PRESIDIO_ASIC
2069 bool "Support Cortina Presidio ASIC Platform"
2073 config TARGET_XENGUEST_ARM64
2074 bool "Xen guest ARM64"
2078 select LINUX_KERNEL_IMAGE_HEADER
2081 imply OF_HAS_PRIOR_STAGE
2084 bool "Support HPE GXP SoCs"
2091 config SUPPORT_PASSING_ATAGS
2092 bool "Support pre-devicetree ATAG-based booting"
2094 imply SETUP_MEMORY_TAGS
2096 Support for booting older Linux kernels, using ATAGs rather than
2097 passing a devicetree. This is option is rarely used, and the
2098 semantics are defined at
2099 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
2101 config SETUP_MEMORY_TAGS
2102 bool "Pass memory size information via ATAG"
2103 depends on SUPPORT_PASSING_ATAGS
2106 bool "Pass Linux kernel cmdline via ATAG"
2107 depends on SUPPORT_PASSING_ATAGS
2110 bool "Pass initrd starting point and size via ATAG"
2111 depends on SUPPORT_PASSING_ATAGS
2114 bool "Pass system revision via ATAG"
2115 depends on SUPPORT_PASSING_ATAGS
2118 bool "Pass system serial number via ATAG"
2119 depends on SUPPORT_PASSING_ATAGS
2121 config STATIC_MACH_TYPE
2122 bool "Statically define the Machine ID number"
2124 When booting via ATAGs, enable this option if we know the correct
2125 machine ID number to use at compile time. Some systems will be
2126 passed the number dynamically by whatever loads U-Boot.
2129 int "Machine ID number"
2130 depends on STATIC_MACH_TYPE
2132 When booting via ATAGs, the machine type must be passed as a number.
2133 For the full list see https://www.arm.linux.org.uk/developer/machines
2135 config ARCH_SUPPORT_TFABOOT
2139 bool "Support for booting from TF-A"
2140 depends on ARCH_SUPPORT_TFABOOT
2142 Some platforms support the setup of secure registers (for instance
2143 for CPU errata handling) or provide secure services like PSCI.
2144 Those services could also be provided by other firmware parts
2145 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
2146 does not need to (and cannot) execute this code.
2147 Enabling this option will make a U-Boot binary that is relying
2148 on other firmware layers to provide secure functionality.
2150 config TI_SECURE_DEVICE
2151 bool "HS Device Type Support"
2152 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2154 If a high secure (HS) device type is being used, this config
2155 must be set. This option impacts various aspects of the
2156 build system (to create signed boot images that can be
2157 authenticated) and the code. See the doc/README.ti-secure
2158 file for further details.
2160 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
2161 config ISW_ENTRY_ADDR
2162 hex "Address in memory or XIP address of bootloader entry point"
2163 default 0x402F4000 if AM43XX
2164 default 0x402F0400 if AM33XX
2165 default 0x40301350 if OMAP54XX
2167 After any reset, the boot ROM searches the boot media for a valid
2168 boot image. For non-XIP devices, the ROM then copies the image into
2169 internal memory. For all boot modes, after the ROM processes the
2170 boot image it eventually computes the entry point address depending
2171 on the device type (secure/non-secure), boot media (xip/non-xip) and
2175 config SYS_KWD_CONFIG
2176 string "kwbimage config file path"
2177 depends on ARCH_KIRKWOOD || ARCH_MVEBU
2178 default "arch/arm/mach-mvebu/kwbimage.cfg"
2180 Path within the source directory to the kwbimage.cfg file to use
2181 when packaging the U-Boot image for use.
2183 source "arch/arm/mach-apple/Kconfig"
2185 source "arch/arm/mach-aspeed/Kconfig"
2187 source "arch/arm/mach-at91/Kconfig"
2189 source "arch/arm/mach-bcm283x/Kconfig"
2191 source "arch/arm/mach-bcmbca/Kconfig"
2193 source "arch/arm/mach-bcmstb/Kconfig"
2195 source "arch/arm/mach-davinci/Kconfig"
2197 source "arch/arm/mach-exynos/Kconfig"
2199 source "arch/arm/mach-hpe/gxp/Kconfig"
2201 source "arch/arm/mach-highbank/Kconfig"
2203 source "arch/arm/mach-integrator/Kconfig"
2205 source "arch/arm/mach-ipq40xx/Kconfig"
2207 source "arch/arm/mach-k3/Kconfig"
2209 source "arch/arm/mach-keystone/Kconfig"
2211 source "arch/arm/mach-kirkwood/Kconfig"
2213 source "arch/arm/mach-lpc32xx/Kconfig"
2215 source "arch/arm/mach-mvebu/Kconfig"
2217 source "arch/arm/mach-octeontx/Kconfig"
2219 source "arch/arm/mach-octeontx2/Kconfig"
2221 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2223 source "arch/arm/mach-imx/mx3/Kconfig"
2225 source "arch/arm/mach-imx/mx5/Kconfig"
2227 source "arch/arm/mach-imx/mx6/Kconfig"
2229 source "arch/arm/mach-imx/mx7/Kconfig"
2231 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2233 source "arch/arm/mach-imx/imx8/Kconfig"
2235 source "arch/arm/mach-imx/imx8m/Kconfig"
2237 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2239 source "arch/arm/mach-imx/imxrt/Kconfig"
2241 source "arch/arm/mach-imx/mxs/Kconfig"
2243 source "arch/arm/mach-omap2/Kconfig"
2245 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2247 source "arch/arm/mach-orion5x/Kconfig"
2249 source "arch/arm/mach-owl/Kconfig"
2251 source "arch/arm/mach-rmobile/Kconfig"
2253 source "arch/arm/mach-meson/Kconfig"
2255 source "arch/arm/mach-mediatek/Kconfig"
2257 source "arch/arm/mach-qemu/Kconfig"
2259 source "arch/arm/mach-rockchip/Kconfig"
2261 source "arch/arm/mach-s5pc1xx/Kconfig"
2263 source "arch/arm/mach-snapdragon/Kconfig"
2265 source "arch/arm/mach-socfpga/Kconfig"
2267 source "arch/arm/mach-sti/Kconfig"
2269 source "arch/arm/mach-stm32/Kconfig"
2271 source "arch/arm/mach-stm32mp/Kconfig"
2273 source "arch/arm/mach-sunxi/Kconfig"
2275 source "arch/arm/mach-tegra/Kconfig"
2277 source "arch/arm/mach-u8500/Kconfig"
2279 source "arch/arm/mach-uniphier/Kconfig"
2281 source "arch/arm/cpu/armv7/vf610/Kconfig"
2283 source "arch/arm/mach-zynq/Kconfig"
2285 source "arch/arm/mach-zynqmp/Kconfig"
2287 source "arch/arm/mach-versal/Kconfig"
2289 source "arch/arm/mach-zynqmp-r5/Kconfig"
2291 source "arch/arm/cpu/armv7/Kconfig"
2293 source "arch/arm/cpu/armv8/Kconfig"
2295 source "arch/arm/mach-imx/Kconfig"
2297 source "arch/arm/mach-nexell/Kconfig"
2299 source "arch/arm/mach-npcm/Kconfig"
2301 source "board/armltd/total_compute/Kconfig"
2302 source "board/armltd/corstone1000/Kconfig"
2303 source "board/bosch/shc/Kconfig"
2304 source "board/bosch/guardian/Kconfig"
2305 source "board/Marvell/octeontx/Kconfig"
2306 source "board/Marvell/octeontx2/Kconfig"
2307 source "board/armltd/vexpress/Kconfig"
2308 source "board/armltd/vexpress64/Kconfig"
2309 source "board/cortina/presidio-asic/Kconfig"
2310 source "board/broadcom/bcm963158/Kconfig"
2311 source "board/broadcom/bcm96753ref/Kconfig"
2312 source "board/broadcom/bcm968360bg/Kconfig"
2313 source "board/broadcom/bcm968580xref/Kconfig"
2314 source "board/broadcom/bcmns3/Kconfig"
2315 source "board/cavium/thunderx/Kconfig"
2316 source "board/eets/pdu001/Kconfig"
2317 source "board/emulation/qemu-arm/Kconfig"
2318 source "board/freescale/ls2080aqds/Kconfig"
2319 source "board/freescale/ls2080ardb/Kconfig"
2320 source "board/freescale/ls1088a/Kconfig"
2321 source "board/freescale/ls1028a/Kconfig"
2322 source "board/freescale/ls1021aqds/Kconfig"
2323 source "board/freescale/ls1043aqds/Kconfig"
2324 source "board/freescale/ls1021atwr/Kconfig"
2325 source "board/freescale/ls1021atsn/Kconfig"
2326 source "board/freescale/ls1021aiot/Kconfig"
2327 source "board/freescale/ls1046aqds/Kconfig"
2328 source "board/freescale/ls1043ardb/Kconfig"
2329 source "board/freescale/ls1046ardb/Kconfig"
2330 source "board/freescale/ls1046afrwy/Kconfig"
2331 source "board/freescale/ls1012aqds/Kconfig"
2332 source "board/freescale/ls1012ardb/Kconfig"
2333 source "board/freescale/ls1012afrdm/Kconfig"
2334 source "board/freescale/lx2160a/Kconfig"
2335 source "board/grinn/chiliboard/Kconfig"
2336 source "board/hisilicon/hikey/Kconfig"
2337 source "board/hisilicon/hikey960/Kconfig"
2338 source "board/hisilicon/poplar/Kconfig"
2339 source "board/isee/igep003x/Kconfig"
2340 source "board/kontron/sl28/Kconfig"
2341 source "board/myir/mys_6ulx/Kconfig"
2342 source "board/siemens/common/Kconfig"
2343 source "board/seeed/npi_imx6ull/Kconfig"
2344 source "board/socionext/developerbox/Kconfig"
2345 source "board/st/stv0991/Kconfig"
2346 source "board/tcl/sl50/Kconfig"
2347 source "board/traverse/ten64/Kconfig"
2348 source "board/variscite/dart_6ul/Kconfig"
2349 source "board/vscom/baltos/Kconfig"
2350 source "board/phytium/durian/Kconfig"
2351 source "board/phytium/pomelo/Kconfig"
2352 source "board/xen/xenguest_arm64/Kconfig"
2354 source "arch/arm/Kconfig.debug"