1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed from
19 almost any 4K aligned address. This logic relies on the relocation
20 information that is embedded in the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
25 default n if ARCH_QEMU
26 default y if POSITION_INDEPENDENT
28 U-Boot typically uses a hard-coded value for the stack pointer
29 before relocation. Enable this option to instead calculate the
30 initial SP at run-time. This is useful to avoid hard-coding addresses
31 into U-Boot, so that it can be loaded and executed at arbitrary
32 addresses and thus avoid using arbitrary addresses at runtime.
34 If this option is enabled, the early stack pointer is set to
35 &_bss_start with a offset value added. The offset is specified by
36 SYS_INIT_SP_BSS_OFFSET.
38 config SYS_INIT_SP_BSS_OFFSET
39 int "Early stack offset from the .bss base address"
40 depends on INIT_SP_RELATIVE
43 This option's value is the offset added to &_bss_start in order to
44 calculate the stack pointer. This offset should be large enough so
45 that the early malloc region, global data (gd), and early stack usage
46 do not overlap any appended DTB.
48 config LINUX_KERNEL_IMAGE_HEADER
51 Place a Linux kernel image header at the start of the U-Boot binary.
52 The format of the header is described in the Linux kernel source at
53 Documentation/arm64/booting.txt. This feature is useful since the
54 image header reports the amount of memory (BSS and similar) that
55 U-Boot needs to use, but which isn't part of the binary.
57 if LINUX_KERNEL_IMAGE_HEADER
58 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
61 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
62 TEXT_OFFSET value written to the Linux kernel image header.
78 ARM GICV3 Interrupt translation service (ITS).
79 Basic support for programming locality specific peripheral
80 interrupts (LPI) configuration tables and enable LPI tables.
81 LPI configuration table can be used by u-boot or Linux.
82 ARM GICV3 has limitation, once the LPI table is enabled, LPI
83 configuration table can not be re-programmed, unless GICV3 reset.
89 config DMA_ADDR_T_64BIT
99 config GPIO_EXTRA_HEADER
102 # Used for compatibility with asm files copied from the kernel
103 config ARM_ASM_UNIFIED
107 # Used for compatibility with asm files copied from the kernel
111 config SYS_ICACHE_OFF
112 bool "Do not enable icache"
114 Do not enable instruction cache in U-Boot.
116 config SPL_SYS_ICACHE_OFF
117 bool "Do not enable icache in SPL"
119 default SYS_ICACHE_OFF
121 Do not enable instruction cache in SPL.
123 config SYS_DCACHE_OFF
124 bool "Do not enable dcache"
126 Do not enable data cache in U-Boot.
128 config SPL_SYS_DCACHE_OFF
129 bool "Do not enable dcache in SPL"
131 default SYS_DCACHE_OFF
133 Do not enable data cache in SPL.
135 config SYS_ARM_CACHE_CP15
136 bool "CP15 based cache enabling support"
138 Select this if your processor suports enabling caches by using
142 bool "MMU-based Paged Memory Management Support"
143 select SYS_ARM_CACHE_CP15
145 Select if you want MMU-based virtualised addressing space
146 support via paged memory management.
149 bool 'Use the ARM v7 PMSA Compliant MPU'
151 Some ARM systems without an MMU have instead a Memory Protection
152 Unit (MPU) that defines the type and permissions for regions of
154 If your CPU has an MPU then you should choose 'y' here unless you
155 know that you do not want to use the MPU.
157 # If set, the workarounds for these ARM errata are applied early during U-Boot
158 # startup. Note that in general these options force the workarounds to be
159 # applied; no CPU-type/version detection exists, unlike the similar options in
160 # the Linux kernel. Do not set these options unless they apply! Also note that
161 # the following can be machine-specific errata. These do have ability to
162 # provide rudimentary version and machine-specific checks, but expect no
164 # CONFIG_ARM_ERRATA_430973
165 # CONFIG_ARM_ERRATA_454179
166 # CONFIG_ARM_ERRATA_621766
167 # CONFIG_ARM_ERRATA_798870
168 # CONFIG_ARM_ERRATA_801819
169 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
170 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
172 config ARM_ERRATA_430973
175 config ARM_ERRATA_454179
178 config ARM_ERRATA_621766
181 config ARM_ERRATA_716044
184 config ARM_ERRATA_725233
187 config ARM_ERRATA_742230
190 config ARM_ERRATA_743622
193 config ARM_ERRATA_751472
196 config ARM_ERRATA_761320
199 config ARM_ERRATA_773022
202 config ARM_ERRATA_774769
205 config ARM_ERRATA_794072
208 config ARM_ERRATA_798870
211 config ARM_ERRATA_801819
214 config ARM_ERRATA_826974
217 config ARM_ERRATA_828024
220 config ARM_ERRATA_829520
223 config ARM_ERRATA_833069
226 config ARM_ERRATA_833471
229 config ARM_ERRATA_845369
232 config ARM_ERRATA_852421
235 config ARM_ERRATA_852423
238 config ARM_ERRATA_855873
241 config ARM_CORTEX_A8_CVE_2017_5715
244 config ARM_CORTEX_A15_CVE_2017_5715
249 select SYS_CACHE_SHIFT_5
254 select SYS_CACHE_SHIFT_5
259 select SYS_CACHE_SHIFT_5
264 select SYS_CACHE_SHIFT_5
269 select SYS_CACHE_SHIFT_5
275 select SYS_CACHE_SHIFT_5
282 select SYS_CACHE_SHIFT_6
289 select SYS_CACHE_SHIFT_5
290 select SYS_THUMB_BUILD
296 select SYS_ARM_CACHE_CP15
298 select SYS_CACHE_SHIFT_6
302 select SYS_CACHE_SHIFT_5
307 select SYS_CACHE_SHIFT_5
311 default "arm720t" if CPU_ARM720T
312 default "arm920t" if CPU_ARM920T
313 default "arm926ejs" if CPU_ARM926EJS
314 default "arm946es" if CPU_ARM946ES
315 default "arm1136" if CPU_ARM1136
316 default "arm1176" if CPU_ARM1176
317 default "armv7" if CPU_V7A
318 default "armv7" if CPU_V7R
319 default "armv7m" if CPU_V7M
320 default "pxa" if CPU_PXA
321 default "sa1100" if CPU_SA1100
322 default "armv8" if ARM64
326 default 4 if CPU_ARM720T
327 default 4 if CPU_ARM920T
328 default 5 if CPU_ARM926EJS
329 default 5 if CPU_ARM946ES
330 default 6 if CPU_ARM1136
331 default 6 if CPU_ARM1176
336 default 4 if CPU_SA1100
340 prompt "Select the ARM data write cache policy"
341 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
343 default SYS_ARM_CACHE_WRITEBACK
345 config SYS_ARM_CACHE_WRITEBACK
346 bool "Write-back (WB)"
348 A write updates the cache only and marks the cache line as dirty.
349 External memory is updated only when the line is evicted or explicitly
352 config SYS_ARM_CACHE_WRITETHROUGH
353 bool "Write-through (WT)"
355 A write updates both the cache and the external memory system.
356 This does not mark the cache line as dirty.
358 config SYS_ARM_CACHE_WRITEALLOC
359 bool "Write allocation (WA)"
361 A cache line is allocated on a write miss. This means that executing a
362 store instruction on the processor might cause a burst read to occur.
363 There is a linefill to obtain the data for the cache line, before the
368 bool "Enable ARCH_CPU_INIT"
370 Some architectures require a call to arch_cpu_init().
371 Say Y here to enable it
373 config SYS_ARCH_TIMER
374 bool "ARM Generic Timer support"
375 depends on CPU_V7A || ARM64
378 The ARM Generic Timer (aka arch-timer) provides an architected
379 interface to a timer source on an SoC.
380 It is mandatory for ARMv8 implementation and widely available
384 bool "Support for ARM SMC Calling Convention (SMCCC)"
385 depends on CPU_V7A || ARM64
388 Say Y here if you want to enable ARM SMC Calling Convention.
389 This should be enabled if U-Boot needs to communicate with system
390 firmware (for example, PSCI) according to SMCCC.
393 bool "support boot from semihosting"
395 In emulated environments, semihosting is a way for
396 the hosted environment to call out to the emulator to
397 retrieve files from the host machine.
399 config SYS_THUMB_BUILD
400 bool "Build U-Boot using the Thumb instruction set"
403 Use this flag to build U-Boot using the Thumb instruction set for
404 ARM architectures. Thumb instruction set provides better code
405 density. For ARM architectures that support Thumb2 this flag will
406 result in Thumb2 code generated by GCC.
408 config SPL_SYS_THUMB_BUILD
409 bool "Build SPL using the Thumb instruction set"
410 default y if SYS_THUMB_BUILD
411 depends on !ARM64 && SPL
413 Use this flag to build SPL using the Thumb instruction set for
414 ARM architectures. Thumb instruction set provides better code
415 density. For ARM architectures that support Thumb2 this flag will
416 result in Thumb2 code generated by GCC.
418 config TPL_SYS_THUMB_BUILD
419 bool "Build TPL using the Thumb instruction set"
420 default y if SYS_THUMB_BUILD
421 depends on TPL && !ARM64
423 Use this flag to build TPL using the Thumb instruction set for
424 ARM architectures. Thumb instruction set provides better code
425 density. For ARM architectures that support Thumb2 this flag will
426 result in Thumb2 code generated by GCC.
429 config SYS_L2CACHE_OFF
432 If SoC does not support L2CACHE or one does not want to enable
433 L2CACHE, choose this option.
435 config ENABLE_ARM_SOC_BOOT0_HOOK
436 bool "prepare BOOT0 header"
438 If the SoC's BOOT0 requires a header area filled with (magic)
439 values, then choose this option, and create a file included as
440 <asm/arch/boot0.h> which contains the required assembler code.
442 config ARM_CORTEX_CPU_IS_UP
445 config USE_ARCH_MEMCPY
446 bool "Use an assembly optimized implementation of memcpy"
450 Enable the generation of an optimized version of memcpy.
451 Such an implementation may be faster under some conditions
452 but may increase the binary size.
454 config SPL_USE_ARCH_MEMCPY
455 bool "Use an assembly optimized implementation of memcpy for SPL"
456 default y if USE_ARCH_MEMCPY
457 depends on !ARM64 && SPL
459 Enable the generation of an optimized version of memcpy.
460 Such an implementation may be faster under some conditions
461 but may increase the binary size.
463 config TPL_USE_ARCH_MEMCPY
464 bool "Use an assembly optimized implementation of memcpy for TPL"
465 default y if USE_ARCH_MEMCPY
466 depends on !ARM64 && TPL
468 Enable the generation of an optimized version of memcpy.
469 Such an implementation may be faster under some conditions
470 but may increase the binary size.
472 config USE_ARCH_MEMSET
473 bool "Use an assembly optimized implementation of memset"
477 Enable the generation of an optimized version of memset.
478 Such an implementation may be faster under some conditions
479 but may increase the binary size.
481 config SPL_USE_ARCH_MEMSET
482 bool "Use an assembly optimized implementation of memset for SPL"
483 default y if USE_ARCH_MEMSET
484 depends on !ARM64 && SPL
486 Enable the generation of an optimized version of memset.
487 Such an implementation may be faster under some conditions
488 but may increase the binary size.
490 config TPL_USE_ARCH_MEMSET
491 bool "Use an assembly optimized implementation of memset for TPL"
492 default y if USE_ARCH_MEMSET
493 depends on !ARM64 && TPL
495 Enable the generation of an optimized version of memset.
496 Such an implementation may be faster under some conditions
497 but may increase the binary size.
499 config ARM64_SUPPORT_AARCH32
500 bool "ARM64 system support AArch32 execution state"
502 default y if !TARGET_THUNDERX_88XX
504 This ARM64 system supports AArch32 execution state.
507 prompt "Target select"
512 select GPIO_EXTRA_HEADER
513 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
514 select SPL_SEPARATE_BSS if SPL
516 config TARGET_ASPENITE
517 bool "Support aspenite"
519 select GPIO_EXTRA_HEADER
524 select GPIO_EXTRA_HEADER
525 select SPL_DM_SPI if SPL
528 Support for TI's DaVinci platform.
531 bool "Marvell Kirkwood"
532 select ARCH_MISC_INIT
533 select BOARD_EARLY_INIT_F
535 select GPIO_EXTRA_HEADER
538 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
544 select GPIO_EXTRA_HEADER
545 select SPL_DM_SPI if SPL
546 select SPL_DM_SPI_FLASH if SPL
555 select GPIO_EXTRA_HEADER
557 config TARGET_STV0991
558 bool "Support stv0991"
564 select GPIO_EXTRA_HEADER
573 select GPIO_EXTRA_HEADER
576 bool "Broadcom BCM283X family"
580 select GPIO_EXTRA_HEADER
583 select SERIAL_SEARCH_ALL
588 bool "Broadcom BCM63158 family"
594 bool "Broadcom BCM68360 family"
600 bool "Broadcom BCM6858 family"
606 bool "Broadcom BCM7XXX family"
609 select GPIO_EXTRA_HEADER
611 select OF_PRIOR_STAGE
614 This enables support for Broadcom ARM-based set-top box
615 chipsets, including the 7445 family of chips.
617 config TARGET_BCMCYGNUS
618 bool "Support bcmcygnus"
620 select GPIO_EXTRA_HEADER
622 imply BCM_SF2_ETH_GMAC
630 bool "Support Broadcom Northstar2"
632 select GPIO_EXTRA_HEADER
634 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
635 ARMv8 Cortex-A57 processors targeting a broad range of networking
639 bool "Support Broadcom NS3"
641 select BOARD_LATE_INIT
643 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
644 ARMv8 Cortex-A72 processors targeting a broad range of networking
648 bool "Samsung EXYNOS"
658 select GPIO_EXTRA_HEADER
659 imply SYS_THUMB_BUILD
664 bool "Samsung S5PC1XX"
670 select GPIO_EXTRA_HEADER
674 bool "Calxeda Highbank"
687 config ARCH_INTEGRATOR
688 bool "ARM Ltd. Integrator family"
691 select GPIO_EXTRA_HEADER
696 bool "Qualcomm IPQ40xx SoCs"
702 select GPIO_EXTRA_HEADER
715 select GPIO_EXTRA_HEADER
717 select SYS_ARCH_TIMER
718 select SYS_THUMB_BUILD
724 bool "Texas Instruments' K3 Architecture"
729 config ARCH_OMAP2PLUS
732 select GPIO_EXTRA_HEADER
733 select SPL_BOARD_INIT if SPL
734 select SPL_STACK_R if SPL
736 imply TI_SYSC if DM && OF_CONTROL
741 select GPIO_EXTRA_HEADER
742 imply DISTRO_DEFAULTS
745 Support for the Meson SoC family developed by Amlogic Inc.,
746 targeted at media players and tablet computers. We currently
747 support the S905 (GXBaby) 64-bit SoC.
752 select GPIO_EXTRA_HEADER
755 select SPL_LIBCOMMON_SUPPORT if SPL
756 select SPL_LIBGENERIC_SUPPORT if SPL
757 select SPL_OF_CONTROL if SPL
760 Support for the MediaTek SoCs family developed by MediaTek Inc.
761 Please refer to doc/README.mediatek for more information.
764 bool "NXP LPC32xx platform"
769 select GPIO_EXTRA_HEADER
775 bool "NXP i.MX8 platform"
778 select GPIO_EXTRA_HEADER
781 select ENABLE_ARM_SOC_BOOT0_HOOK
784 bool "NXP i.MX8M platform"
786 select GPIO_EXTRA_HEADER
788 select SYS_FSL_HAS_SEC if IMX_HAB
789 select SYS_FSL_SEC_COMPAT_4
790 select SYS_FSL_SEC_LE
797 bool "NXP i.MX8ULP platform"
803 select GPIO_EXTRA_HEADER
807 bool "NXP i.MXRT platform"
811 select GPIO_EXTRA_HEADER
817 bool "NXP i.MX23 family"
819 select GPIO_EXTRA_HEADER
827 select GPIO_EXTRA_HEADER
832 bool "NXP i.MX28 family"
834 select GPIO_EXTRA_HEADER
840 bool "NXP i.MX31 family"
842 select GPIO_EXTRA_HEADER
848 select GPIO_EXTRA_HEADER
850 select SYS_FSL_HAS_SEC if IMX_HAB
851 select SYS_FSL_SEC_COMPAT_4
852 select SYS_FSL_SEC_LE
853 select ROM_UNIFIED_SECTIONS
855 imply SYS_THUMB_BUILD
859 select ARCH_MISC_INIT
861 select GPIO_EXTRA_HEADER
863 select SYS_FSL_HAS_SEC if IMX_HAB
864 select SYS_FSL_SEC_COMPAT_4
865 select SYS_FSL_SEC_LE
866 imply BOARD_EARLY_INIT_F
868 imply SYS_THUMB_BUILD
873 select GPIO_EXTRA_HEADER
875 select SYS_FSL_HAS_SEC
876 select SYS_FSL_SEC_COMPAT_4
877 select SYS_FSL_SEC_LE
879 imply SYS_THUMB_BUILD
883 default "arch/arm/mach-omap2/u-boot-spl.lds"
888 select BOARD_EARLY_INIT_F
890 select GPIO_EXTRA_HEADER
895 bool "Nexell S5P4418/S5P6818 SoC"
896 select ENABLE_ARM_SOC_BOOT0_HOOK
898 select GPIO_EXTRA_HEADER
901 bool "Actions Semi OWL SoCs"
905 select GPIO_EXTRA_HEADER
910 select SYS_RELOC_GD_ENV_ADDR
914 bool "QEMU Virtual Platform"
925 bool "Renesas ARM SoCs"
928 select GPIO_EXTRA_HEADER
929 imply BOARD_EARLY_INIT_F
932 imply SYS_THUMB_BUILD
933 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
935 config ARCH_SNAPDRAGON
936 bool "Qualcomm Snapdragon SoCs"
941 select GPIO_EXTRA_HEADER
950 bool "Altera SOCFPGA family"
951 select ARCH_EARLY_INIT_R
952 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
953 select ARM64 if TARGET_SOCFPGA_SOC64
954 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
958 select GPIO_EXTRA_HEADER
959 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
961 select SPL_DM_RESET if DM_RESET
963 select SPL_LIBCOMMON_SUPPORT
964 select SPL_LIBGENERIC_SUPPORT
965 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
966 select SPL_OF_CONTROL
967 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
968 select SPL_SERIAL_SUPPORT
973 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
975 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
976 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
986 imply SPL_DM_SPI_FLASH
987 imply SPL_LIBDISK_SUPPORT
988 imply SPL_MMC_SUPPORT
989 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
990 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
991 imply SPL_SPI_FLASH_SUPPORT
992 imply SPL_SPI_SUPPORT
996 bool "Support sunxi (Allwinner) SoCs"
999 select CMD_MMC if MMC
1000 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1006 select DM_MMC if MMC
1007 select DM_SCSI if SCSI
1009 select GPIO_EXTRA_HEADER
1010 select OF_BOARD_SETUP
1013 select SPECIFY_CONSOLE_INDEX
1014 select SPL_STACK_R if SPL
1015 select SPL_SYS_MALLOC_SIMPLE if SPL
1016 select SPL_SYS_THUMB_BUILD if !ARM64
1019 select SYS_THUMB_BUILD if !ARM64
1020 select USB if DISTRO_DEFAULTS
1021 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1022 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1023 select SPL_USE_TINY_PRINTF
1025 select SYS_RELOC_GD_ENV_ADDR
1026 imply BOARD_LATE_INIT
1029 imply CMD_UBI if MTD_RAW_NAND
1030 imply DISTRO_DEFAULTS
1033 imply OF_LIBFDT_OVERLAY
1034 imply PRE_CONSOLE_BUFFER
1036 imply SPL_LIBCOMMON_SUPPORT
1037 imply SPL_LIBGENERIC_SUPPORT
1038 imply SPL_MMC_SUPPORT if MMC
1040 imply SPL_SERIAL_SUPPORT
1044 bool "ST-Ericsson U8500 Series"
1048 select DM_MMC if MMC
1053 imply ARM_PL180_MMCI
1055 imply NOMADIK_MTU_TIMER
1058 imply SYSRESET_SYSCON
1061 bool "Support Xilinx Versal Platform"
1065 select DM_ETH if NET
1066 select DM_MMC if MMC
1069 select GPIO_EXTRA_HEADER
1072 imply BOARD_LATE_INIT
1073 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1076 bool "Freescale Vybrid"
1078 select GPIO_EXTRA_HEADER
1080 select SYS_FSL_ERRATUM_ESDHC111
1085 bool "Xilinx Zynq based platform"
1090 select DM_ETH if NET
1091 select DM_MMC if MMC
1095 select GPIO_EXTRA_HEADER
1098 select SPL_BOARD_INIT if SPL
1099 select SPL_CLK if SPL
1100 select SPL_DM if SPL
1101 select SPL_DM_SPI if SPL
1102 select SPL_DM_SPI_FLASH if SPL
1103 select SPL_OF_CONTROL if SPL
1104 select SPL_SEPARATE_BSS if SPL
1106 imply ARCH_EARLY_INIT_R
1107 imply BOARD_LATE_INIT
1111 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1114 config ARCH_ZYNQMP_R5
1115 bool "Xilinx ZynqMP R5 based platform"
1119 select DM_ETH if NET
1120 select DM_MMC if MMC
1122 select GPIO_EXTRA_HEADER
1128 bool "Xilinx ZynqMP based platform"
1132 select DM_ETH if NET
1134 select DM_MMC if MMC
1136 select DM_SPI if SPI
1137 select DM_SPI_FLASH if DM_SPI
1140 select GPIO_EXTRA_HEADER
1142 select SPL_BOARD_INIT if SPL
1143 select SPL_CLK if SPL
1144 select SPL_DM if SPL
1145 select SPL_DM_SPI if SPI && SPL_DM
1146 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1147 select SPL_DM_MAILBOX if SPL
1148 select SPL_FIRMWARE if SPL
1149 select SPL_SEPARATE_BSS if SPL
1153 imply BOARD_LATE_INIT
1155 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1162 select GPIO_EXTRA_HEADER
1163 imply DISTRO_DEFAULTS
1166 config TARGET_VEXPRESS64_AEMV8A
1167 bool "Support vexpress_aemv8a"
1169 select GPIO_EXTRA_HEADER
1172 config TARGET_VEXPRESS64_BASE_FVP
1173 bool "Support Versatile Express ARMv8a FVP BASE model"
1175 select GPIO_EXTRA_HEADER
1179 config TARGET_VEXPRESS64_JUNO
1180 bool "Support Versatile Express Juno Development Platform"
1182 select GPIO_EXTRA_HEADER
1195 config TARGET_TOTAL_COMPUTE
1196 bool "Support Total Compute Platform"
1204 config TARGET_LS2080A_EMU
1205 bool "Support ls2080a_emu"
1208 select ARMV8_MULTIENTRY
1209 select FSL_DDR_SYNC_REFRESH
1210 select GPIO_EXTRA_HEADER
1212 Support for Freescale LS2080A_EMU platform.
1213 The LS2080A Development System (EMULATOR) is a pre-silicon
1214 development platform that supports the QorIQ LS2080A
1215 Layerscape Architecture processor.
1217 config TARGET_LS1088AQDS
1218 bool "Support ls1088aqds"
1221 select ARMV8_MULTIENTRY
1222 select ARCH_SUPPORT_TFABOOT
1223 select BOARD_LATE_INIT
1224 select GPIO_EXTRA_HEADER
1226 select FSL_DDR_INTERACTIVE if !SD_BOOT
1228 Support for NXP LS1088AQDS platform.
1229 The LS1088A Development System (QDS) is a high-performance
1230 development platform that supports the QorIQ LS1088A
1231 Layerscape Architecture processor.
1233 config TARGET_LS2080AQDS
1234 bool "Support ls2080aqds"
1237 select ARMV8_MULTIENTRY
1238 select ARCH_SUPPORT_TFABOOT
1239 select BOARD_LATE_INIT
1240 select GPIO_EXTRA_HEADER
1245 select FSL_DDR_INTERACTIVE if !SPL
1247 Support for Freescale LS2080AQDS platform.
1248 The LS2080A Development System (QDS) is a high-performance
1249 development platform that supports the QorIQ LS2080A
1250 Layerscape Architecture processor.
1252 config TARGET_LS2080ARDB
1253 bool "Support ls2080ardb"
1256 select ARMV8_MULTIENTRY
1257 select ARCH_SUPPORT_TFABOOT
1258 select BOARD_LATE_INIT
1261 select FSL_DDR_INTERACTIVE if !SPL
1262 select GPIO_EXTRA_HEADER
1266 Support for Freescale LS2080ARDB platform.
1267 The LS2080A Reference design board (RDB) is a high-performance
1268 development platform that supports the QorIQ LS2080A
1269 Layerscape Architecture processor.
1271 config TARGET_LS2081ARDB
1272 bool "Support ls2081ardb"
1275 select ARMV8_MULTIENTRY
1276 select BOARD_LATE_INIT
1277 select GPIO_EXTRA_HEADER
1280 Support for Freescale LS2081ARDB platform.
1281 The LS2081A Reference design board (RDB) is a high-performance
1282 development platform that supports the QorIQ LS2081A/LS2041A
1283 Layerscape Architecture processor.
1285 config TARGET_LX2160ARDB
1286 bool "Support lx2160ardb"
1289 select ARMV8_MULTIENTRY
1290 select ARCH_SUPPORT_TFABOOT
1291 select BOARD_LATE_INIT
1292 select GPIO_EXTRA_HEADER
1294 Support for NXP LX2160ARDB platform.
1295 The lx2160ardb (LX2160A Reference design board (RDB)
1296 is a high-performance development platform that supports the
1297 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1299 config TARGET_LX2160AQDS
1300 bool "Support lx2160aqds"
1303 select ARMV8_MULTIENTRY
1304 select ARCH_SUPPORT_TFABOOT
1305 select BOARD_LATE_INIT
1306 select GPIO_EXTRA_HEADER
1308 Support for NXP LX2160AQDS platform.
1309 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1310 is a high-performance development platform that supports the
1311 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1313 config TARGET_LX2162AQDS
1314 bool "Support lx2162aqds"
1316 select ARCH_MISC_INIT
1318 select ARMV8_MULTIENTRY
1319 select ARCH_SUPPORT_TFABOOT
1320 select BOARD_LATE_INIT
1321 select GPIO_EXTRA_HEADER
1323 Support for NXP LX2162AQDS platform.
1324 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1327 bool "Support HiKey 96boards Consumer Edition Platform"
1332 select GPIO_EXTRA_HEADER
1335 select SPECIFY_CONSOLE_INDEX
1338 Support for HiKey 96boards platform. It features a HI6220
1339 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1341 config TARGET_HIKEY960
1342 bool "Support HiKey960 96boards Consumer Edition Platform"
1346 select GPIO_EXTRA_HEADER
1351 Support for HiKey960 96boards platform. It features a HI3660
1352 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1354 config TARGET_POPLAR
1355 bool "Support Poplar 96boards Enterprise Edition Platform"
1359 select GPIO_EXTRA_HEADER
1364 Support for Poplar 96boards EE platform. It features a HI3798cv200
1365 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1366 making it capable of running any commercial set-top solution based on
1369 config TARGET_LS1012AQDS
1370 bool "Support ls1012aqds"
1373 select ARCH_SUPPORT_TFABOOT
1374 select BOARD_LATE_INIT
1375 select GPIO_EXTRA_HEADER
1377 Support for Freescale LS1012AQDS platform.
1378 The LS1012A Development System (QDS) is a high-performance
1379 development platform that supports the QorIQ LS1012A
1380 Layerscape Architecture processor.
1382 config TARGET_LS1012ARDB
1383 bool "Support ls1012ardb"
1386 select ARCH_SUPPORT_TFABOOT
1387 select BOARD_LATE_INIT
1388 select GPIO_EXTRA_HEADER
1392 Support for Freescale LS1012ARDB platform.
1393 The LS1012A Reference design board (RDB) is a high-performance
1394 development platform that supports the QorIQ LS1012A
1395 Layerscape Architecture processor.
1397 config TARGET_LS1012A2G5RDB
1398 bool "Support ls1012a2g5rdb"
1401 select ARCH_SUPPORT_TFABOOT
1402 select BOARD_LATE_INIT
1403 select GPIO_EXTRA_HEADER
1406 Support for Freescale LS1012A2G5RDB platform.
1407 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1408 development platform that supports the QorIQ LS1012A
1409 Layerscape Architecture processor.
1411 config TARGET_LS1012AFRWY
1412 bool "Support ls1012afrwy"
1415 select ARCH_SUPPORT_TFABOOT
1416 select BOARD_LATE_INIT
1417 select GPIO_EXTRA_HEADER
1421 Support for Freescale LS1012AFRWY platform.
1422 The LS1012A FRWY board (FRWY) is a high-performance
1423 development platform that supports the QorIQ LS1012A
1424 Layerscape Architecture processor.
1426 config TARGET_LS1012AFRDM
1427 bool "Support ls1012afrdm"
1430 select ARCH_SUPPORT_TFABOOT
1431 select GPIO_EXTRA_HEADER
1433 Support for Freescale LS1012AFRDM platform.
1434 The LS1012A Freedom board (FRDM) is a high-performance
1435 development platform that supports the QorIQ LS1012A
1436 Layerscape Architecture processor.
1438 config TARGET_LS1028AQDS
1439 bool "Support ls1028aqds"
1442 select ARMV8_MULTIENTRY
1443 select ARCH_SUPPORT_TFABOOT
1444 select BOARD_LATE_INIT
1445 select GPIO_EXTRA_HEADER
1447 Support for Freescale LS1028AQDS platform
1448 The LS1028A Development System (QDS) is a high-performance
1449 development platform that supports the QorIQ LS1028A
1450 Layerscape Architecture processor.
1452 config TARGET_LS1028ARDB
1453 bool "Support ls1028ardb"
1456 select ARMV8_MULTIENTRY
1457 select ARCH_SUPPORT_TFABOOT
1458 select BOARD_LATE_INIT
1459 select GPIO_EXTRA_HEADER
1461 Support for Freescale LS1028ARDB platform
1462 The LS1028A Development System (RDB) is a high-performance
1463 development platform that supports the QorIQ LS1028A
1464 Layerscape Architecture processor.
1466 config TARGET_LS1088ARDB
1467 bool "Support ls1088ardb"
1470 select ARMV8_MULTIENTRY
1471 select ARCH_SUPPORT_TFABOOT
1472 select BOARD_LATE_INIT
1474 select FSL_DDR_INTERACTIVE if !SD_BOOT
1475 select GPIO_EXTRA_HEADER
1477 Support for NXP LS1088ARDB platform.
1478 The LS1088A Reference design board (RDB) is a high-performance
1479 development platform that supports the QorIQ LS1088A
1480 Layerscape Architecture processor.
1482 config TARGET_LS1021AQDS
1483 bool "Support ls1021aqds"
1485 select ARCH_SUPPORT_PSCI
1486 select BOARD_EARLY_INIT_F
1487 select BOARD_LATE_INIT
1489 select CPU_V7_HAS_NONSEC
1490 select CPU_V7_HAS_VIRT
1491 select LS1_DEEP_SLEEP
1494 select FSL_DDR_INTERACTIVE
1495 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1496 select GPIO_EXTRA_HEADER
1497 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1500 config TARGET_LS1021ATWR
1501 bool "Support ls1021atwr"
1503 select ARCH_SUPPORT_PSCI
1504 select BOARD_EARLY_INIT_F
1505 select BOARD_LATE_INIT
1507 select CPU_V7_HAS_NONSEC
1508 select CPU_V7_HAS_VIRT
1509 select LS1_DEEP_SLEEP
1511 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1512 select GPIO_EXTRA_HEADER
1515 config TARGET_PG_WCOM_SELI8
1516 bool "Support Hitachi-Powergrids SELI8 service unit card"
1518 select ARCH_SUPPORT_PSCI
1519 select BOARD_EARLY_INIT_F
1520 select BOARD_LATE_INIT
1522 select CPU_V7_HAS_NONSEC
1523 select CPU_V7_HAS_VIRT
1525 select FSL_DDR_INTERACTIVE
1526 select GPIO_EXTRA_HEADER
1530 Support for Hitachi-Powergrids SELI8 service unit card.
1531 SELI8 is a QorIQ LS1021a based service unit card used
1532 in XMC20 and FOX615 product families.
1534 config TARGET_PG_WCOM_EXPU1
1535 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1537 select ARCH_SUPPORT_PSCI
1538 select BOARD_EARLY_INIT_F
1539 select BOARD_LATE_INIT
1541 select CPU_V7_HAS_NONSEC
1542 select CPU_V7_HAS_VIRT
1544 select FSL_DDR_INTERACTIVE
1548 Support for Hitachi-Powergrids EXPU1 service unit card.
1549 EXPU1 is a QorIQ LS1021a based service unit card used
1550 in XMC20 and FOX615 product families.
1552 config TARGET_LS1021ATSN
1553 bool "Support ls1021atsn"
1555 select ARCH_SUPPORT_PSCI
1556 select BOARD_EARLY_INIT_F
1557 select BOARD_LATE_INIT
1559 select CPU_V7_HAS_NONSEC
1560 select CPU_V7_HAS_VIRT
1561 select LS1_DEEP_SLEEP
1563 select GPIO_EXTRA_HEADER
1566 config TARGET_LS1021AIOT
1567 bool "Support ls1021aiot"
1569 select ARCH_SUPPORT_PSCI
1570 select BOARD_LATE_INIT
1572 select CPU_V7_HAS_NONSEC
1573 select CPU_V7_HAS_VIRT
1575 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1576 select GPIO_EXTRA_HEADER
1579 Support for Freescale LS1021AIOT platform.
1580 The LS1021A Freescale board (IOT) is a high-performance
1581 development platform that supports the QorIQ LS1021A
1582 Layerscape Architecture processor.
1584 config TARGET_LS1043AQDS
1585 bool "Support ls1043aqds"
1588 select ARMV8_MULTIENTRY
1589 select ARCH_SUPPORT_TFABOOT
1590 select BOARD_EARLY_INIT_F
1591 select BOARD_LATE_INIT
1593 select FSL_DDR_INTERACTIVE if !SPL
1594 select FSL_DSPI if !SPL_NO_DSPI
1595 select DM_SPI_FLASH if FSL_DSPI
1596 select GPIO_EXTRA_HEADER
1600 Support for Freescale LS1043AQDS platform.
1602 config TARGET_LS1043ARDB
1603 bool "Support ls1043ardb"
1606 select ARMV8_MULTIENTRY
1607 select ARCH_SUPPORT_TFABOOT
1608 select BOARD_EARLY_INIT_F
1609 select BOARD_LATE_INIT
1611 select FSL_DSPI if !SPL_NO_DSPI
1612 select DM_SPI_FLASH if FSL_DSPI
1613 select GPIO_EXTRA_HEADER
1615 Support for Freescale LS1043ARDB platform.
1617 config TARGET_LS1046AQDS
1618 bool "Support ls1046aqds"
1621 select ARMV8_MULTIENTRY
1622 select ARCH_SUPPORT_TFABOOT
1623 select BOARD_EARLY_INIT_F
1624 select BOARD_LATE_INIT
1625 select DM_SPI_FLASH if DM_SPI
1627 select FSL_DDR_BIST if !SPL
1628 select FSL_DDR_INTERACTIVE if !SPL
1629 select FSL_DDR_INTERACTIVE if !SPL
1630 select GPIO_EXTRA_HEADER
1633 Support for Freescale LS1046AQDS platform.
1634 The LS1046A Development System (QDS) is a high-performance
1635 development platform that supports the QorIQ LS1046A
1636 Layerscape Architecture processor.
1638 config TARGET_LS1046ARDB
1639 bool "Support ls1046ardb"
1642 select ARMV8_MULTIENTRY
1643 select ARCH_SUPPORT_TFABOOT
1644 select BOARD_EARLY_INIT_F
1645 select BOARD_LATE_INIT
1646 select DM_SPI_FLASH if DM_SPI
1647 select POWER_MC34VR500
1650 select FSL_DDR_INTERACTIVE if !SPL
1651 select GPIO_EXTRA_HEADER
1654 Support for Freescale LS1046ARDB platform.
1655 The LS1046A Reference Design Board (RDB) is a high-performance
1656 development platform that supports the QorIQ LS1046A
1657 Layerscape Architecture processor.
1659 config TARGET_LS1046AFRWY
1660 bool "Support ls1046afrwy"
1663 select ARMV8_MULTIENTRY
1664 select ARCH_SUPPORT_TFABOOT
1665 select BOARD_EARLY_INIT_F
1666 select BOARD_LATE_INIT
1667 select DM_SPI_FLASH if DM_SPI
1668 select GPIO_EXTRA_HEADER
1671 Support for Freescale LS1046AFRWY platform.
1672 The LS1046A Freeway Board (FRWY) is a high-performance
1673 development platform that supports the QorIQ LS1046A
1674 Layerscape Architecture processor.
1680 select ARMV8_MULTIENTRY
1696 select GPIO_EXTRA_HEADER
1697 select SPL_DM if SPL
1698 select SPL_DM_SPI if SPL
1699 select SPL_DM_SPI_FLASH if SPL
1700 select SPL_DM_I2C if SPL
1701 select SPL_DM_MMC if SPL
1702 select SPL_DM_SERIAL if SPL
1704 Support for Kontron SMARC-sAL28 board.
1706 config TARGET_COLIBRI_PXA270
1707 bool "Support colibri_pxa270"
1709 select GPIO_EXTRA_HEADER
1711 config ARCH_UNIPHIER
1712 bool "Socionext UniPhier SoCs"
1713 select BOARD_LATE_INIT
1722 select OF_BOARD_SETUP
1726 select SPL_BOARD_INIT if SPL
1727 select SPL_DM if SPL
1728 select SPL_LIBCOMMON_SUPPORT if SPL
1729 select SPL_LIBGENERIC_SUPPORT if SPL
1730 select SPL_OF_CONTROL if SPL
1731 select SPL_PINCTRL if SPL
1734 imply DISTRO_DEFAULTS
1737 Support for UniPhier SoC family developed by Socionext Inc.
1738 (formerly, System LSI Business Division of Panasonic Corporation)
1740 config ARCH_SYNQUACER
1741 bool "Socionext SynQuacer SoCs"
1747 select SYSRESET_PSCI
1750 Support for SynQuacer SoC family developed by Socionext Inc.
1751 This SoC is used on 96boards EE DeveloperBox.
1754 bool "Support STMicroelectronics STM32 MCU with cortex M"
1758 select GPIO_EXTRA_HEADER
1762 bool "Support STMicrolectronics SoCs"
1771 Support for STMicroelectronics STiH407/10 SoC family.
1772 This SoC is used on Linaro 96Board STiH410-B2260
1775 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1776 select ARCH_MISC_INIT
1777 select ARCH_SUPPORT_TFABOOT
1778 select BOARD_LATE_INIT
1784 select GPIO_EXTRA_HEADER
1788 select OF_SYSTEM_SETUP
1794 select SYS_THUMB_BUILD
1798 imply OF_LIBFDT_OVERLAY
1799 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1802 Support for STM32MP SoC family developed by STMicroelectronics,
1803 MPUs based on ARM cortex A core
1804 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1805 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1807 SPL is the unsecure FSBL for the basic boot chain.
1809 config ARCH_ROCKCHIP
1810 bool "Support Rockchip SoCs"
1812 select BINMAN if SPL_OPTEE || (SPL && !ARM64)
1822 select ENABLE_ARM_SOC_BOOT0_HOOK
1825 select SPL_DM if SPL
1826 select SPL_DM_SPI if SPL
1827 select SPL_DM_SPI_FLASH if SPL
1829 select SYS_THUMB_BUILD if !ARM64
1832 imply DEBUG_UART_BOARD_INIT
1833 imply DISTRO_DEFAULTS
1835 imply SARADC_ROCKCHIP
1837 imply SPL_SYS_MALLOC_SIMPLE
1840 imply USB_FUNCTION_FASTBOOT
1842 config ARCH_OCTEONTX
1843 bool "Support OcteonTX SoCs"
1846 select GPIO_EXTRA_HEADER
1850 select BOARD_LATE_INIT
1851 select SYS_CACHE_SHIFT_7
1853 config ARCH_OCTEONTX2
1854 bool "Support OcteonTX2 SoCs"
1857 select GPIO_EXTRA_HEADER
1861 select BOARD_LATE_INIT
1862 select SYS_CACHE_SHIFT_7
1864 config TARGET_THUNDERX_88XX
1865 bool "Support ThunderX 88xx"
1867 select GPIO_EXTRA_HEADER
1870 select SYS_CACHE_SHIFT_7
1873 bool "Support Aspeed SoCs"
1878 config TARGET_DURIAN
1879 bool "Support Phytium Durian Platform"
1881 select GPIO_EXTRA_HEADER
1883 Support for durian platform.
1884 It has 2GB Sdram, uart and pcie.
1886 config TARGET_PRESIDIO_ASIC
1887 bool "Support Cortina Presidio ASIC Platform"
1891 config TARGET_XENGUEST_ARM64
1892 bool "Xen guest ARM64"
1896 select LINUX_KERNEL_IMAGE_HEADER
1901 config ARCH_SUPPORT_TFABOOT
1905 bool "Support for booting from TF-A"
1906 depends on ARCH_SUPPORT_TFABOOT
1908 Some platforms support the setup of secure registers (for instance
1909 for CPU errata handling) or provide secure services like PSCI.
1910 Those services could also be provided by other firmware parts
1911 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
1912 does not need to (and cannot) execute this code.
1913 Enabling this option will make a U-Boot binary that is relying
1914 on other firmware layers to provide secure functionality.
1916 config TI_SECURE_DEVICE
1917 bool "HS Device Type Support"
1918 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1920 If a high secure (HS) device type is being used, this config
1921 must be set. This option impacts various aspects of the
1922 build system (to create signed boot images that can be
1923 authenticated) and the code. See the doc/README.ti-secure
1924 file for further details.
1926 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1927 config ISW_ENTRY_ADDR
1928 hex "Address in memory or XIP address of bootloader entry point"
1929 default 0x402F4000 if AM43XX
1930 default 0x402F0400 if AM33XX
1931 default 0x40301350 if OMAP54XX
1933 After any reset, the boot ROM searches the boot media for a valid
1934 boot image. For non-XIP devices, the ROM then copies the image into
1935 internal memory. For all boot modes, after the ROM processes the
1936 boot image it eventually computes the entry point address depending
1937 on the device type (secure/non-secure), boot media (xip/non-xip) and
1941 source "arch/arm/mach-aspeed/Kconfig"
1943 source "arch/arm/mach-at91/Kconfig"
1945 source "arch/arm/mach-bcm283x/Kconfig"
1947 source "arch/arm/mach-bcmstb/Kconfig"
1949 source "arch/arm/mach-davinci/Kconfig"
1951 source "arch/arm/mach-exynos/Kconfig"
1953 source "arch/arm/mach-highbank/Kconfig"
1955 source "arch/arm/mach-integrator/Kconfig"
1957 source "arch/arm/mach-ipq40xx/Kconfig"
1959 source "arch/arm/mach-k3/Kconfig"
1961 source "arch/arm/mach-keystone/Kconfig"
1963 source "arch/arm/mach-kirkwood/Kconfig"
1965 source "arch/arm/mach-lpc32xx/Kconfig"
1967 source "arch/arm/mach-mvebu/Kconfig"
1969 source "arch/arm/mach-octeontx/Kconfig"
1971 source "arch/arm/mach-octeontx2/Kconfig"
1973 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1975 source "arch/arm/mach-imx/mx2/Kconfig"
1977 source "arch/arm/mach-imx/mx3/Kconfig"
1979 source "arch/arm/mach-imx/mx5/Kconfig"
1981 source "arch/arm/mach-imx/mx6/Kconfig"
1983 source "arch/arm/mach-imx/mx7/Kconfig"
1985 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1987 source "arch/arm/mach-imx/imx8/Kconfig"
1989 source "arch/arm/mach-imx/imx8m/Kconfig"
1991 source "arch/arm/mach-imx/imx8ulp/Kconfig"
1993 source "arch/arm/mach-imx/imxrt/Kconfig"
1995 source "arch/arm/mach-imx/mxs/Kconfig"
1997 source "arch/arm/mach-omap2/Kconfig"
1999 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2001 source "arch/arm/mach-orion5x/Kconfig"
2003 source "arch/arm/mach-owl/Kconfig"
2005 source "arch/arm/mach-rmobile/Kconfig"
2007 source "arch/arm/mach-meson/Kconfig"
2009 source "arch/arm/mach-mediatek/Kconfig"
2011 source "arch/arm/mach-qemu/Kconfig"
2013 source "arch/arm/mach-rockchip/Kconfig"
2015 source "arch/arm/mach-s5pc1xx/Kconfig"
2017 source "arch/arm/mach-snapdragon/Kconfig"
2019 source "arch/arm/mach-socfpga/Kconfig"
2021 source "arch/arm/mach-sti/Kconfig"
2023 source "arch/arm/mach-stm32/Kconfig"
2025 source "arch/arm/mach-stm32mp/Kconfig"
2027 source "arch/arm/mach-sunxi/Kconfig"
2029 source "arch/arm/mach-tegra/Kconfig"
2031 source "arch/arm/mach-u8500/Kconfig"
2033 source "arch/arm/mach-uniphier/Kconfig"
2035 source "arch/arm/cpu/armv7/vf610/Kconfig"
2037 source "arch/arm/mach-zynq/Kconfig"
2039 source "arch/arm/mach-zynqmp/Kconfig"
2041 source "arch/arm/mach-versal/Kconfig"
2043 source "arch/arm/mach-zynqmp-r5/Kconfig"
2045 source "arch/arm/cpu/armv7/Kconfig"
2047 source "arch/arm/cpu/armv8/Kconfig"
2049 source "arch/arm/mach-imx/Kconfig"
2051 source "arch/arm/mach-nexell/Kconfig"
2053 source "board/armltd/total_compute/Kconfig"
2055 source "board/bosch/shc/Kconfig"
2056 source "board/bosch/guardian/Kconfig"
2057 source "board/CarMediaLab/flea3/Kconfig"
2058 source "board/Marvell/aspenite/Kconfig"
2059 source "board/Marvell/octeontx/Kconfig"
2060 source "board/Marvell/octeontx2/Kconfig"
2061 source "board/armltd/vexpress64/Kconfig"
2062 source "board/cortina/presidio-asic/Kconfig"
2063 source "board/broadcom/bcm963158/Kconfig"
2064 source "board/broadcom/bcm968360bg/Kconfig"
2065 source "board/broadcom/bcm968580xref/Kconfig"
2066 source "board/broadcom/bcmns3/Kconfig"
2067 source "board/cavium/thunderx/Kconfig"
2068 source "board/eets/pdu001/Kconfig"
2069 source "board/emulation/qemu-arm/Kconfig"
2070 source "board/freescale/ls2080aqds/Kconfig"
2071 source "board/freescale/ls2080ardb/Kconfig"
2072 source "board/freescale/ls1088a/Kconfig"
2073 source "board/freescale/ls1028a/Kconfig"
2074 source "board/freescale/ls1021aqds/Kconfig"
2075 source "board/freescale/ls1043aqds/Kconfig"
2076 source "board/freescale/ls1021atwr/Kconfig"
2077 source "board/freescale/ls1021atsn/Kconfig"
2078 source "board/freescale/ls1021aiot/Kconfig"
2079 source "board/freescale/ls1046aqds/Kconfig"
2080 source "board/freescale/ls1043ardb/Kconfig"
2081 source "board/freescale/ls1046ardb/Kconfig"
2082 source "board/freescale/ls1046afrwy/Kconfig"
2083 source "board/freescale/ls1012aqds/Kconfig"
2084 source "board/freescale/ls1012ardb/Kconfig"
2085 source "board/freescale/ls1012afrdm/Kconfig"
2086 source "board/freescale/lx2160a/Kconfig"
2087 source "board/grinn/chiliboard/Kconfig"
2088 source "board/hisilicon/hikey/Kconfig"
2089 source "board/hisilicon/hikey960/Kconfig"
2090 source "board/hisilicon/poplar/Kconfig"
2091 source "board/isee/igep003x/Kconfig"
2092 source "board/kontron/sl28/Kconfig"
2093 source "board/myir/mys_6ulx/Kconfig"
2094 source "board/seeed/npi_imx6ull/Kconfig"
2095 source "board/socionext/developerbox/Kconfig"
2096 source "board/st/stv0991/Kconfig"
2097 source "board/tcl/sl50/Kconfig"
2098 source "board/toradex/colibri_pxa270/Kconfig"
2099 source "board/variscite/dart_6ul/Kconfig"
2100 source "board/vscom/baltos/Kconfig"
2101 source "board/phytium/durian/Kconfig"
2102 source "board/xen/xenguest_arm64/Kconfig"
2103 source "board/keymile/Kconfig"
2105 source "arch/arm/Kconfig.debug"
2110 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2111 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2112 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64