1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed from
19 almost any 4K aligned address. This logic relies on the relocation
20 information that is embedded in the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
25 default n if ARCH_QEMU
26 default y if POSITION_INDEPENDENT
28 U-Boot typically uses a hard-coded value for the stack pointer
29 before relocation. Enable this option to instead calculate the
30 initial SP at run-time. This is useful to avoid hard-coding addresses
31 into U-Boot, so that it can be loaded and executed at arbitrary
32 addresses and thus avoid using arbitrary addresses at runtime.
34 If this option is enabled, the early stack pointer is set to
35 &_bss_start with a offset value added. The offset is specified by
36 SYS_INIT_SP_BSS_OFFSET.
38 config SYS_INIT_SP_BSS_OFFSET
39 int "Early stack offset from the .bss base address"
40 depends on INIT_SP_RELATIVE
43 This option's value is the offset added to &_bss_start in order to
44 calculate the stack pointer. This offset should be large enough so
45 that the early malloc region, global data (gd), and early stack usage
46 do not overlap any appended DTB.
48 config LINUX_KERNEL_IMAGE_HEADER
51 Place a Linux kernel image header at the start of the U-Boot binary.
52 The format of the header is described in the Linux kernel source at
53 Documentation/arm64/booting.txt. This feature is useful since the
54 image header reports the amount of memory (BSS and similar) that
55 U-Boot needs to use, but which isn't part of the binary.
57 if LINUX_KERNEL_IMAGE_HEADER
58 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
61 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
62 TEXT_OFFSET value written to the Linux kernel image header.
72 ARM GICV3 Interrupt translation service (ITS).
73 Basic support for programming locality specific peripheral
74 interrupts (LPI) configuration tables and enable LPI tables.
75 LPI configuration table can be used by u-boot or Linux.
76 ARM GICV3 has limitation, once the LPI table is enabled, LPI
77 configuration table can not be re-programmed, unless GICV3 reset.
83 config DMA_ADDR_T_64BIT
93 # Used for compatibility with asm files copied from the kernel
94 config ARM_ASM_UNIFIED
98 # Used for compatibility with asm files copied from the kernel
102 config SYS_ICACHE_OFF
103 bool "Do not enable icache"
106 Do not enable instruction cache in U-Boot.
108 config SPL_SYS_ICACHE_OFF
109 bool "Do not enable icache in SPL"
111 default SYS_ICACHE_OFF
113 Do not enable instruction cache in SPL.
115 config SYS_DCACHE_OFF
116 bool "Do not enable dcache"
119 Do not enable data cache in U-Boot.
121 config SPL_SYS_DCACHE_OFF
122 bool "Do not enable dcache in SPL"
124 default SYS_DCACHE_OFF
126 Do not enable data cache in SPL.
128 config SYS_ARM_CACHE_CP15
129 bool "CP15 based cache enabling support"
131 Select this if your processor suports enabling caches by using
135 bool "MMU-based Paged Memory Management Support"
136 select SYS_ARM_CACHE_CP15
138 Select if you want MMU-based virtualised addressing space
139 support via paged memory management.
142 bool 'Use the ARM v7 PMSA Compliant MPU'
144 Some ARM systems without an MMU have instead a Memory Protection
145 Unit (MPU) that defines the type and permissions for regions of
147 If your CPU has an MPU then you should choose 'y' here unless you
148 know that you do not want to use the MPU.
150 # If set, the workarounds for these ARM errata are applied early during U-Boot
151 # startup. Note that in general these options force the workarounds to be
152 # applied; no CPU-type/version detection exists, unlike the similar options in
153 # the Linux kernel. Do not set these options unless they apply! Also note that
154 # the following can be machine-specific errata. These do have ability to
155 # provide rudimentary version and machine-specific checks, but expect no
157 # CONFIG_ARM_ERRATA_430973
158 # CONFIG_ARM_ERRATA_454179
159 # CONFIG_ARM_ERRATA_621766
160 # CONFIG_ARM_ERRATA_798870
161 # CONFIG_ARM_ERRATA_801819
162 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
163 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
165 config ARM_ERRATA_430973
168 config ARM_ERRATA_454179
171 config ARM_ERRATA_621766
174 config ARM_ERRATA_716044
177 config ARM_ERRATA_725233
180 config ARM_ERRATA_742230
183 config ARM_ERRATA_743622
186 config ARM_ERRATA_751472
189 config ARM_ERRATA_761320
192 config ARM_ERRATA_773022
195 config ARM_ERRATA_774769
198 config ARM_ERRATA_794072
201 config ARM_ERRATA_798870
204 config ARM_ERRATA_801819
207 config ARM_ERRATA_826974
210 config ARM_ERRATA_828024
213 config ARM_ERRATA_829520
216 config ARM_ERRATA_833069
219 config ARM_ERRATA_833471
222 config ARM_ERRATA_845369
225 config ARM_ERRATA_852421
228 config ARM_ERRATA_852423
231 config ARM_ERRATA_855873
234 config ARM_CORTEX_A8_CVE_2017_5715
237 config ARM_CORTEX_A15_CVE_2017_5715
242 select SYS_CACHE_SHIFT_5
247 select SYS_CACHE_SHIFT_5
252 select SYS_CACHE_SHIFT_5
257 select SYS_CACHE_SHIFT_5
262 select SYS_CACHE_SHIFT_5
268 select SYS_CACHE_SHIFT_5
275 select SYS_CACHE_SHIFT_6
282 select SYS_CACHE_SHIFT_5
283 select SYS_THUMB_BUILD
289 select SYS_ARM_CACHE_CP15
291 select SYS_CACHE_SHIFT_6
295 select SYS_CACHE_SHIFT_5
300 select SYS_CACHE_SHIFT_5
304 default "arm720t" if CPU_ARM720T
305 default "arm920t" if CPU_ARM920T
306 default "arm926ejs" if CPU_ARM926EJS
307 default "arm946es" if CPU_ARM946ES
308 default "arm1136" if CPU_ARM1136
309 default "arm1176" if CPU_ARM1176
310 default "armv7" if CPU_V7A
311 default "armv7" if CPU_V7R
312 default "armv7m" if CPU_V7M
313 default "pxa" if CPU_PXA
314 default "sa1100" if CPU_SA1100
315 default "armv8" if ARM64
319 default 4 if CPU_ARM720T
320 default 4 if CPU_ARM920T
321 default 5 if CPU_ARM926EJS
322 default 5 if CPU_ARM946ES
323 default 6 if CPU_ARM1136
324 default 6 if CPU_ARM1176
329 default 4 if CPU_SA1100
332 config SYS_CACHE_SHIFT_5
335 config SYS_CACHE_SHIFT_6
338 config SYS_CACHE_SHIFT_7
341 config SYS_CACHELINE_SIZE
343 default 128 if SYS_CACHE_SHIFT_7
344 default 64 if SYS_CACHE_SHIFT_6
345 default 32 if SYS_CACHE_SHIFT_5
348 prompt "Select the ARM data write cache policy"
349 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
351 default SYS_ARM_CACHE_WRITEBACK
353 config SYS_ARM_CACHE_WRITEBACK
354 bool "Write-back (WB)"
356 A write updates the cache only and marks the cache line as dirty.
357 External memory is updated only when the line is evicted or explicitly
360 config SYS_ARM_CACHE_WRITETHROUGH
361 bool "Write-through (WT)"
363 A write updates both the cache and the external memory system.
364 This does not mark the cache line as dirty.
366 config SYS_ARM_CACHE_WRITEALLOC
367 bool "Write allocation (WA)"
369 A cache line is allocated on a write miss. This means that executing a
370 store instruction on the processor might cause a burst read to occur.
371 There is a linefill to obtain the data for the cache line, before the
376 bool "Enable ARCH_CPU_INIT"
378 Some architectures require a call to arch_cpu_init().
379 Say Y here to enable it
381 config SYS_ARCH_TIMER
382 bool "ARM Generic Timer support"
383 depends on CPU_V7A || ARM64
386 The ARM Generic Timer (aka arch-timer) provides an architected
387 interface to a timer source on an SoC.
388 It is mandatory for ARMv8 implementation and widely available
392 bool "Support for ARM SMC Calling Convention (SMCCC)"
393 depends on CPU_V7A || ARM64
396 Say Y here if you want to enable ARM SMC Calling Convention.
397 This should be enabled if U-Boot needs to communicate with system
398 firmware (for example, PSCI) according to SMCCC.
401 bool "support boot from semihosting"
403 In emulated environments, semihosting is a way for
404 the hosted environment to call out to the emulator to
405 retrieve files from the host machine.
407 config SYS_THUMB_BUILD
408 bool "Build U-Boot using the Thumb instruction set"
411 Use this flag to build U-Boot using the Thumb instruction set for
412 ARM architectures. Thumb instruction set provides better code
413 density. For ARM architectures that support Thumb2 this flag will
414 result in Thumb2 code generated by GCC.
416 config SPL_SYS_THUMB_BUILD
417 bool "Build SPL using the Thumb instruction set"
418 default y if SYS_THUMB_BUILD
419 depends on !ARM64 && SPL
421 Use this flag to build SPL using the Thumb instruction set for
422 ARM architectures. Thumb instruction set provides better code
423 density. For ARM architectures that support Thumb2 this flag will
424 result in Thumb2 code generated by GCC.
426 config TPL_SYS_THUMB_BUILD
427 bool "Build TPL using the Thumb instruction set"
428 default y if SYS_THUMB_BUILD
429 depends on TPL && !ARM64
431 Use this flag to build TPL using the Thumb instruction set for
432 ARM architectures. Thumb instruction set provides better code
433 density. For ARM architectures that support Thumb2 this flag will
434 result in Thumb2 code generated by GCC.
437 config SYS_L2CACHE_OFF
440 If SoC does not support L2CACHE or one does not want to enable
441 L2CACHE, choose this option.
443 config ENABLE_ARM_SOC_BOOT0_HOOK
444 bool "prepare BOOT0 header"
446 If the SoC's BOOT0 requires a header area filled with (magic)
447 values, then choose this option, and create a file included as
448 <asm/arch/boot0.h> which contains the required assembler code.
450 config ARM_CORTEX_CPU_IS_UP
454 config USE_ARCH_MEMCPY
455 bool "Use an assembly optimized implementation of memcpy"
459 Enable the generation of an optimized version of memcpy.
460 Such an implementation may be faster under some conditions
461 but may increase the binary size.
463 config SPL_USE_ARCH_MEMCPY
464 bool "Use an assembly optimized implementation of memcpy for SPL"
465 default y if USE_ARCH_MEMCPY
466 depends on !ARM64 && SPL
468 Enable the generation of an optimized version of memcpy.
469 Such an implementation may be faster under some conditions
470 but may increase the binary size.
472 config TPL_USE_ARCH_MEMCPY
473 bool "Use an assembly optimized implementation of memcpy for TPL"
474 default y if USE_ARCH_MEMCPY
475 depends on !ARM64 && TPL
477 Enable the generation of an optimized version of memcpy.
478 Such an implementation may be faster under some conditions
479 but may increase the binary size.
481 config USE_ARCH_MEMSET
482 bool "Use an assembly optimized implementation of memset"
486 Enable the generation of an optimized version of memset.
487 Such an implementation may be faster under some conditions
488 but may increase the binary size.
490 config SPL_USE_ARCH_MEMSET
491 bool "Use an assembly optimized implementation of memset for SPL"
492 default y if USE_ARCH_MEMSET
493 depends on !ARM64 && SPL
495 Enable the generation of an optimized version of memset.
496 Such an implementation may be faster under some conditions
497 but may increase the binary size.
499 config TPL_USE_ARCH_MEMSET
500 bool "Use an assembly optimized implementation of memset for TPL"
501 default y if USE_ARCH_MEMSET
502 depends on !ARM64 && TPL
504 Enable the generation of an optimized version of memset.
505 Such an implementation may be faster under some conditions
506 but may increase the binary size.
508 config ARM64_SUPPORT_AARCH32
509 bool "ARM64 system support AArch32 execution state"
511 default y if !TARGET_THUNDERX_88XX
513 This ARM64 system supports AArch32 execution state.
516 prompt "Target select"
521 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
522 select SPL_SEPARATE_BSS if SPL
524 config TARGET_EDB93XX
525 bool "Support edb93xx"
529 config TARGET_ASPENITE
530 bool "Support aspenite"
534 bool "Support gplugd"
540 select SPL_DM_SPI if SPL
543 Support for TI's DaVinci platform.
546 bool "Marvell Kirkwood"
547 select ARCH_MISC_INIT
548 select BOARD_EARLY_INIT_F
552 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
558 select SPL_DM_SPI if SPL
559 select SPL_DM_SPI_FLASH if SPL
569 config TARGET_SPEAR300
570 bool "Support spear300"
571 select BOARD_EARLY_INIT_F
576 config TARGET_SPEAR310
577 bool "Support spear310"
578 select BOARD_EARLY_INIT_F
583 config TARGET_SPEAR320
584 bool "Support spear320"
585 select BOARD_EARLY_INIT_F
590 config TARGET_SPEAR600
591 bool "Support spear600"
592 select BOARD_EARLY_INIT_F
597 config TARGET_STV0991
598 bool "Support stv0991"
611 select BOARD_LATE_INIT
621 bool "Broadcom BCM283X family"
627 select SERIAL_SEARCH_ALL
632 bool "Broadcom BCM63158 family"
638 bool "Broadcom BCM68360 family"
644 bool "Broadcom BCM6858 family"
650 bool "Broadcom BCM7XXX family"
654 select OF_PRIOR_STAGE
657 This enables support for Broadcom ARM-based set-top box
658 chipsets, including the 7445 family of chips.
660 config TARGET_BCMCYGNUS
661 bool "Support bcmcygnus"
664 imply BCM_SF2_ETH_GMAC
672 bool "Support Broadcom Northstar2"
675 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
676 ARMv8 Cortex-A57 processors targeting a broad range of networking
680 bool "Support Broadcom NS3"
682 select BOARD_LATE_INIT
684 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
685 ARMv8 Cortex-A72 processors targeting a broad range of networking
689 bool "Samsung EXYNOS"
698 imply SYS_THUMB_BUILD
703 bool "Samsung S5PC1XX"
712 bool "Calxeda Highbank"
724 config ARCH_INTEGRATOR
725 bool "ARM Ltd. Integrator family"
732 bool "Qualcomm IPQ40xx SoCs"
750 select SYS_ARCH_TIMER
751 select SYS_THUMB_BUILD
757 bool "Texas Instruments' K3 Architecture"
762 config ARCH_OMAP2PLUS
765 select SPL_BOARD_INIT if SPL
766 select SPL_STACK_R if SPL
768 imply TI_SYSC if DM && OF_CONTROL
773 imply DISTRO_DEFAULTS
776 Support for the Meson SoC family developed by Amlogic Inc.,
777 targeted at media players and tablet computers. We currently
778 support the S905 (GXBaby) 64-bit SoC.
785 select SPL_LIBCOMMON_SUPPORT if SPL
786 select SPL_LIBGENERIC_SUPPORT if SPL
787 select SPL_OF_CONTROL if SPL
790 Support for the MediaTek SoCs family developed by MediaTek Inc.
791 Please refer to doc/README.mediatek for more information.
794 bool "NXP LPC32xx platform"
804 bool "NXP i.MX8 platform"
808 select ENABLE_ARM_SOC_BOOT0_HOOK
811 bool "NXP i.MX8M platform"
813 select SYS_FSL_HAS_SEC if IMX_HAB
814 select SYS_FSL_SEC_COMPAT_4
815 select SYS_FSL_SEC_LE
821 bool "NXP i.MXRT platform"
829 bool "NXP i.MX23 family"
840 bool "NXP i.MX28 family"
846 bool "NXP i.MX31 family"
852 select SYS_FSL_HAS_SEC if IMX_HAB
853 select SYS_FSL_SEC_COMPAT_4
854 select SYS_FSL_SEC_LE
855 select ROM_UNIFIED_SECTIONS
857 imply SYS_THUMB_BUILD
861 select ARCH_MISC_INIT
863 select SYS_FSL_HAS_SEC if IMX_HAB
864 select SYS_FSL_SEC_COMPAT_4
865 select SYS_FSL_SEC_LE
866 imply BOARD_EARLY_INIT_F
868 imply SYS_THUMB_BUILD
873 select SYS_FSL_HAS_SEC
874 select SYS_FSL_SEC_COMPAT_4
875 select SYS_FSL_SEC_LE
877 imply SYS_THUMB_BUILD
881 default "arch/arm/mach-omap2/u-boot-spl.lds"
886 select BOARD_EARLY_INIT_F
891 bool "Nexell S5P4418/S5P6818 SoC"
892 select ENABLE_ARM_SOC_BOOT0_HOOK
896 bool "Actions Semi OWL SoCs"
904 select SYS_RELOC_GD_ENV_ADDR
908 bool "QEMU Virtual Platform"
919 bool "Renesas ARM SoCs"
922 imply BOARD_EARLY_INIT_F
925 imply SYS_THUMB_BUILD
926 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
928 config ARCH_SNAPDRAGON
929 bool "Qualcomm Snapdragon SoCs"
942 bool "Altera SOCFPGA family"
943 select ARCH_EARLY_INIT_R
944 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
945 select ARM64 if TARGET_SOCFPGA_SOC64
946 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
949 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
951 select SPL_DM_RESET if DM_RESET
953 select SPL_LIBCOMMON_SUPPORT
954 select SPL_LIBGENERIC_SUPPORT
955 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
956 select SPL_OF_CONTROL
957 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
958 select SPL_SERIAL_SUPPORT
960 select SPL_WATCHDOG_SUPPORT
963 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
965 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
966 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
976 imply SPL_DM_SPI_FLASH
977 imply SPL_LIBDISK_SUPPORT
978 imply SPL_MMC_SUPPORT
979 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
980 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
981 imply SPL_SPI_FLASH_SUPPORT
982 imply SPL_SPI_SUPPORT
986 bool "Support sunxi (Allwinner) SoCs"
989 select CMD_MMC if MMC
990 select CMD_USB if DISTRO_DEFAULTS
997 select DM_SCSI if SCSI
999 select DM_USB if DISTRO_DEFAULTS
1000 select OF_BOARD_SETUP
1003 select SPECIFY_CONSOLE_INDEX
1004 select SPL_STACK_R if SPL
1005 select SPL_SYS_MALLOC_SIMPLE if SPL
1006 select SPL_SYS_THUMB_BUILD if !ARM64
1009 select SYS_THUMB_BUILD if !ARM64
1010 select USB if DISTRO_DEFAULTS
1011 select USB_KEYBOARD if DISTRO_DEFAULTS
1012 select USB_STORAGE if DISTRO_DEFAULTS
1013 select SPL_USE_TINY_PRINTF
1015 select SYS_RELOC_GD_ENV_ADDR
1016 imply BOARD_LATE_INIT
1019 imply CMD_UBI if MTD_RAW_NAND
1020 imply DISTRO_DEFAULTS
1023 imply OF_LIBFDT_OVERLAY
1024 imply PRE_CONSOLE_BUFFER
1025 imply SPL_GPIO_SUPPORT
1026 imply SPL_LIBCOMMON_SUPPORT
1027 imply SPL_LIBGENERIC_SUPPORT
1028 imply SPL_MMC_SUPPORT if MMC
1029 imply SPL_POWER_SUPPORT
1030 imply SPL_SERIAL_SUPPORT
1034 bool "ST-Ericsson U8500 Series"
1038 select DM_MMC if MMC
1040 select DM_USB if USB
1044 imply ARM_PL180_MMCI
1046 imply NOMADIK_MTU_TIMER
1049 imply SYSRESET_SYSCON
1052 bool "Support Xilinx Versal Platform"
1056 select DM_ETH if NET
1057 select DM_MMC if MMC
1060 imply BOARD_LATE_INIT
1061 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1064 bool "Freescale Vybrid"
1066 select SYS_FSL_ERRATUM_ESDHC111
1071 bool "Xilinx Zynq based platform"
1076 select DM_ETH if NET
1077 select DM_MMC if MMC
1081 select DM_USB if USB
1084 select SPL_BOARD_INIT if SPL
1085 select SPL_CLK if SPL
1086 select SPL_DM if SPL
1087 select SPL_DM_SPI if SPL
1088 select SPL_DM_SPI_FLASH if SPL
1089 select SPL_OF_CONTROL if SPL
1090 select SPL_SEPARATE_BSS if SPL
1092 imply ARCH_EARLY_INIT_R
1093 imply BOARD_LATE_INIT
1097 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1100 config ARCH_ZYNQMP_R5
1101 bool "Xilinx ZynqMP R5 based platform"
1105 select DM_ETH if NET
1106 select DM_MMC if MMC
1113 bool "Xilinx ZynqMP based platform"
1117 select DM_ETH if NET
1119 select DM_MMC if MMC
1121 select DM_SPI if SPI
1122 select DM_SPI_FLASH if DM_SPI
1123 select DM_USB if USB
1126 select SPL_BOARD_INIT if SPL
1127 select SPL_CLK if SPL
1128 select SPL_DM if SPL
1129 select SPL_DM_SPI if SPI && SPL_DM
1130 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1131 select SPL_DM_MAILBOX if SPL
1132 select SPL_FIRMWARE if SPL
1133 select SPL_SEPARATE_BSS if SPL
1136 imply BOARD_LATE_INIT
1138 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1145 imply DISTRO_DEFAULTS
1148 config TARGET_VEXPRESS64_AEMV8A
1149 bool "Support vexpress_aemv8a"
1153 config TARGET_VEXPRESS64_BASE_FVP
1154 bool "Support Versatile Express ARMv8a FVP BASE model"
1159 config TARGET_VEXPRESS64_JUNO
1160 bool "Support Versatile Express Juno Development Platform"
1175 config TARGET_TOTAL_COMPUTE
1176 bool "Support Total Compute Platform"
1184 config TARGET_LS2080A_EMU
1185 bool "Support ls2080a_emu"
1188 select ARMV8_MULTIENTRY
1189 select FSL_DDR_SYNC_REFRESH
1191 Support for Freescale LS2080A_EMU platform.
1192 The LS2080A Development System (EMULATOR) is a pre-silicon
1193 development platform that supports the QorIQ LS2080A
1194 Layerscape Architecture processor.
1196 config TARGET_LS1088AQDS
1197 bool "Support ls1088aqds"
1200 select ARMV8_MULTIENTRY
1201 select ARCH_SUPPORT_TFABOOT
1202 select BOARD_LATE_INIT
1204 select FSL_DDR_INTERACTIVE if !SD_BOOT
1206 Support for NXP LS1088AQDS platform.
1207 The LS1088A Development System (QDS) is a high-performance
1208 development platform that supports the QorIQ LS1088A
1209 Layerscape Architecture processor.
1211 config TARGET_LS2080AQDS
1212 bool "Support ls2080aqds"
1215 select ARMV8_MULTIENTRY
1216 select ARCH_SUPPORT_TFABOOT
1217 select BOARD_LATE_INIT
1222 select FSL_DDR_INTERACTIVE if !SPL
1224 Support for Freescale LS2080AQDS platform.
1225 The LS2080A Development System (QDS) is a high-performance
1226 development platform that supports the QorIQ LS2080A
1227 Layerscape Architecture processor.
1229 config TARGET_LS2080ARDB
1230 bool "Support ls2080ardb"
1233 select ARMV8_MULTIENTRY
1234 select ARCH_SUPPORT_TFABOOT
1235 select BOARD_LATE_INIT
1238 select FSL_DDR_INTERACTIVE if !SPL
1242 Support for Freescale LS2080ARDB platform.
1243 The LS2080A Reference design board (RDB) is a high-performance
1244 development platform that supports the QorIQ LS2080A
1245 Layerscape Architecture processor.
1247 config TARGET_LS2081ARDB
1248 bool "Support ls2081ardb"
1251 select ARMV8_MULTIENTRY
1252 select BOARD_LATE_INIT
1255 Support for Freescale LS2081ARDB platform.
1256 The LS2081A Reference design board (RDB) is a high-performance
1257 development platform that supports the QorIQ LS2081A/LS2041A
1258 Layerscape Architecture processor.
1260 config TARGET_LX2160ARDB
1261 bool "Support lx2160ardb"
1264 select ARMV8_MULTIENTRY
1265 select ARCH_SUPPORT_TFABOOT
1266 select BOARD_LATE_INIT
1268 Support for NXP LX2160ARDB platform.
1269 The lx2160ardb (LX2160A Reference design board (RDB)
1270 is a high-performance development platform that supports the
1271 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1273 config TARGET_LX2160AQDS
1274 bool "Support lx2160aqds"
1277 select ARMV8_MULTIENTRY
1278 select ARCH_SUPPORT_TFABOOT
1279 select BOARD_LATE_INIT
1281 Support for NXP LX2160AQDS platform.
1282 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1283 is a high-performance development platform that supports the
1284 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1286 config TARGET_LX2162AQDS
1287 bool "Support lx2162aqds"
1289 select ARCH_MISC_INIT
1291 select ARMV8_MULTIENTRY
1292 select ARCH_SUPPORT_TFABOOT
1293 select BOARD_LATE_INIT
1295 Support for NXP LX2162AQDS platform.
1296 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1299 bool "Support HiKey 96boards Consumer Edition Platform"
1306 select SPECIFY_CONSOLE_INDEX
1309 Support for HiKey 96boards platform. It features a HI6220
1310 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1312 config TARGET_HIKEY960
1313 bool "Support HiKey960 96boards Consumer Edition Platform"
1321 Support for HiKey960 96boards platform. It features a HI3660
1322 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1324 config TARGET_POPLAR
1325 bool "Support Poplar 96boards Enterprise Edition Platform"
1334 Support for Poplar 96boards EE platform. It features a HI3798cv200
1335 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1336 making it capable of running any commercial set-top solution based on
1339 config TARGET_LS1012AQDS
1340 bool "Support ls1012aqds"
1343 select ARCH_SUPPORT_TFABOOT
1344 select BOARD_LATE_INIT
1346 Support for Freescale LS1012AQDS platform.
1347 The LS1012A Development System (QDS) is a high-performance
1348 development platform that supports the QorIQ LS1012A
1349 Layerscape Architecture processor.
1351 config TARGET_LS1012ARDB
1352 bool "Support ls1012ardb"
1355 select ARCH_SUPPORT_TFABOOT
1356 select BOARD_LATE_INIT
1360 Support for Freescale LS1012ARDB platform.
1361 The LS1012A Reference design board (RDB) is a high-performance
1362 development platform that supports the QorIQ LS1012A
1363 Layerscape Architecture processor.
1365 config TARGET_LS1012A2G5RDB
1366 bool "Support ls1012a2g5rdb"
1369 select ARCH_SUPPORT_TFABOOT
1370 select BOARD_LATE_INIT
1373 Support for Freescale LS1012A2G5RDB platform.
1374 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1375 development platform that supports the QorIQ LS1012A
1376 Layerscape Architecture processor.
1378 config TARGET_LS1012AFRWY
1379 bool "Support ls1012afrwy"
1382 select ARCH_SUPPORT_TFABOOT
1383 select BOARD_LATE_INIT
1387 Support for Freescale LS1012AFRWY platform.
1388 The LS1012A FRWY board (FRWY) is a high-performance
1389 development platform that supports the QorIQ LS1012A
1390 Layerscape Architecture processor.
1392 config TARGET_LS1012AFRDM
1393 bool "Support ls1012afrdm"
1396 select ARCH_SUPPORT_TFABOOT
1398 Support for Freescale LS1012AFRDM platform.
1399 The LS1012A Freedom board (FRDM) is a high-performance
1400 development platform that supports the QorIQ LS1012A
1401 Layerscape Architecture processor.
1403 config TARGET_LS1028AQDS
1404 bool "Support ls1028aqds"
1407 select ARMV8_MULTIENTRY
1408 select ARCH_SUPPORT_TFABOOT
1409 select BOARD_LATE_INIT
1411 Support for Freescale LS1028AQDS platform
1412 The LS1028A Development System (QDS) is a high-performance
1413 development platform that supports the QorIQ LS1028A
1414 Layerscape Architecture processor.
1416 config TARGET_LS1028ARDB
1417 bool "Support ls1028ardb"
1420 select ARMV8_MULTIENTRY
1421 select ARCH_SUPPORT_TFABOOT
1422 select BOARD_LATE_INIT
1424 Support for Freescale LS1028ARDB platform
1425 The LS1028A Development System (RDB) is a high-performance
1426 development platform that supports the QorIQ LS1028A
1427 Layerscape Architecture processor.
1429 config TARGET_LS1088ARDB
1430 bool "Support ls1088ardb"
1433 select ARMV8_MULTIENTRY
1434 select ARCH_SUPPORT_TFABOOT
1435 select BOARD_LATE_INIT
1437 select FSL_DDR_INTERACTIVE if !SD_BOOT
1439 Support for NXP LS1088ARDB platform.
1440 The LS1088A Reference design board (RDB) is a high-performance
1441 development platform that supports the QorIQ LS1088A
1442 Layerscape Architecture processor.
1444 config TARGET_LS1021AQDS
1445 bool "Support ls1021aqds"
1447 select ARCH_SUPPORT_PSCI
1448 select BOARD_EARLY_INIT_F
1449 select BOARD_LATE_INIT
1451 select CPU_V7_HAS_NONSEC
1452 select CPU_V7_HAS_VIRT
1453 select LS1_DEEP_SLEEP
1456 select FSL_DDR_INTERACTIVE
1457 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1458 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1461 config TARGET_LS1021ATWR
1462 bool "Support ls1021atwr"
1464 select ARCH_SUPPORT_PSCI
1465 select BOARD_EARLY_INIT_F
1466 select BOARD_LATE_INIT
1468 select CPU_V7_HAS_NONSEC
1469 select CPU_V7_HAS_VIRT
1470 select LS1_DEEP_SLEEP
1472 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1475 config TARGET_PG_WCOM_SELI8
1476 bool "Support Hitachi-Powergrids SELI8 service unit card"
1478 select ARCH_SUPPORT_PSCI
1479 select BOARD_EARLY_INIT_F
1480 select BOARD_LATE_INIT
1482 select CPU_V7_HAS_NONSEC
1483 select CPU_V7_HAS_VIRT
1485 select FSL_DDR_INTERACTIVE
1489 Support for Hitachi-Powergrids SELI8 service unit card.
1490 SELI8 is a QorIQ LS1021a based service unit card used
1491 in XMC20 and FOX615 product families.
1493 config TARGET_LS1021ATSN
1494 bool "Support ls1021atsn"
1496 select ARCH_SUPPORT_PSCI
1497 select BOARD_EARLY_INIT_F
1498 select BOARD_LATE_INIT
1500 select CPU_V7_HAS_NONSEC
1501 select CPU_V7_HAS_VIRT
1502 select LS1_DEEP_SLEEP
1506 config TARGET_LS1021AIOT
1507 bool "Support ls1021aiot"
1509 select ARCH_SUPPORT_PSCI
1510 select BOARD_LATE_INIT
1512 select CPU_V7_HAS_NONSEC
1513 select CPU_V7_HAS_VIRT
1515 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1518 Support for Freescale LS1021AIOT platform.
1519 The LS1021A Freescale board (IOT) is a high-performance
1520 development platform that supports the QorIQ LS1021A
1521 Layerscape Architecture processor.
1523 config TARGET_LS1043AQDS
1524 bool "Support ls1043aqds"
1527 select ARMV8_MULTIENTRY
1528 select ARCH_SUPPORT_TFABOOT
1529 select BOARD_EARLY_INIT_F
1530 select BOARD_LATE_INIT
1532 select FSL_DDR_INTERACTIVE if !SPL
1533 select FSL_DSPI if !SPL_NO_DSPI
1534 select DM_SPI_FLASH if FSL_DSPI
1538 Support for Freescale LS1043AQDS platform.
1540 config TARGET_LS1043ARDB
1541 bool "Support ls1043ardb"
1544 select ARMV8_MULTIENTRY
1545 select ARCH_SUPPORT_TFABOOT
1546 select BOARD_EARLY_INIT_F
1547 select BOARD_LATE_INIT
1549 select FSL_DSPI if !SPL_NO_DSPI
1550 select DM_SPI_FLASH if FSL_DSPI
1552 Support for Freescale LS1043ARDB platform.
1554 config TARGET_LS1046AQDS
1555 bool "Support ls1046aqds"
1558 select ARMV8_MULTIENTRY
1559 select ARCH_SUPPORT_TFABOOT
1560 select BOARD_EARLY_INIT_F
1561 select BOARD_LATE_INIT
1562 select DM_SPI_FLASH if DM_SPI
1564 select FSL_DDR_BIST if !SPL
1565 select FSL_DDR_INTERACTIVE if !SPL
1566 select FSL_DDR_INTERACTIVE if !SPL
1569 Support for Freescale LS1046AQDS platform.
1570 The LS1046A Development System (QDS) is a high-performance
1571 development platform that supports the QorIQ LS1046A
1572 Layerscape Architecture processor.
1574 config TARGET_LS1046ARDB
1575 bool "Support ls1046ardb"
1578 select ARMV8_MULTIENTRY
1579 select ARCH_SUPPORT_TFABOOT
1580 select BOARD_EARLY_INIT_F
1581 select BOARD_LATE_INIT
1582 select DM_SPI_FLASH if DM_SPI
1583 select POWER_MC34VR500
1586 select FSL_DDR_INTERACTIVE if !SPL
1589 Support for Freescale LS1046ARDB platform.
1590 The LS1046A Reference Design Board (RDB) is a high-performance
1591 development platform that supports the QorIQ LS1046A
1592 Layerscape Architecture processor.
1594 config TARGET_LS1046AFRWY
1595 bool "Support ls1046afrwy"
1598 select ARMV8_MULTIENTRY
1599 select ARCH_SUPPORT_TFABOOT
1600 select BOARD_EARLY_INIT_F
1601 select BOARD_LATE_INIT
1602 select DM_SPI_FLASH if DM_SPI
1605 Support for Freescale LS1046AFRWY platform.
1606 The LS1046A Freeway Board (FRWY) is a high-performance
1607 development platform that supports the QorIQ LS1046A
1608 Layerscape Architecture processor.
1614 select ARMV8_MULTIENTRY
1631 select SPL_DM if SPL
1632 select SPL_DM_SPI if SPL
1633 select SPL_DM_SPI_FLASH if SPL
1634 select SPL_DM_I2C if SPL
1635 select SPL_DM_MMC if SPL
1636 select SPL_DM_SERIAL if SPL
1638 Support for Kontron SMARC-sAL28 board.
1640 config TARGET_COLIBRI_PXA270
1641 bool "Support colibri_pxa270"
1644 config ARCH_UNIPHIER
1645 bool "Socionext UniPhier SoCs"
1646 select BOARD_LATE_INIT
1656 select OF_BOARD_SETUP
1660 select SPL_BOARD_INIT if SPL
1661 select SPL_DM if SPL
1662 select SPL_LIBCOMMON_SUPPORT if SPL
1663 select SPL_LIBGENERIC_SUPPORT if SPL
1664 select SPL_OF_CONTROL if SPL
1665 select SPL_PINCTRL if SPL
1668 imply DISTRO_DEFAULTS
1671 Support for UniPhier SoC family developed by Socionext Inc.
1672 (formerly, System LSI Business Division of Panasonic Corporation)
1675 bool "Support STMicroelectronics STM32 MCU with cortex M"
1682 bool "Support STMicrolectronics SoCs"
1691 Support for STMicroelectronics STiH407/10 SoC family.
1692 This SoC is used on Linaro 96Board STiH410-B2260
1695 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1696 select ARCH_MISC_INIT
1697 select ARCH_SUPPORT_TFABOOT
1698 select BOARD_LATE_INIT
1707 select OF_SYSTEM_SETUP
1713 select SYS_THUMB_BUILD
1717 imply OF_LIBFDT_OVERLAY
1718 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1721 Support for STM32MP SoC family developed by STMicroelectronics,
1722 MPUs based on ARM cortex A core
1723 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1724 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1726 SPL is the unsecure FSBL for the basic boot chain.
1728 config ARCH_ROCKCHIP
1729 bool "Support Rockchip SoCs"
1731 select BINMAN if SPL_OPTEE
1741 select DM_USB if USB
1742 select ENABLE_ARM_SOC_BOOT0_HOOK
1745 select SPL_DM if SPL
1746 select SPL_DM_SPI if SPL
1747 select SPL_DM_SPI_FLASH if SPL
1749 select SYS_THUMB_BUILD if !ARM64
1752 imply DEBUG_UART_BOARD_INIT
1753 imply DISTRO_DEFAULTS
1755 imply SARADC_ROCKCHIP
1757 imply SPL_SYS_MALLOC_SIMPLE
1760 imply USB_FUNCTION_FASTBOOT
1762 config ARCH_OCTEONTX
1763 bool "Support OcteonTX SoCs"
1769 select BOARD_LATE_INIT
1770 select SYS_CACHE_SHIFT_7
1772 config ARCH_OCTEONTX2
1773 bool "Support OcteonTX2 SoCs"
1779 select BOARD_LATE_INIT
1780 select SYS_CACHE_SHIFT_7
1782 config TARGET_THUNDERX_88XX
1783 bool "Support ThunderX 88xx"
1787 select SYS_CACHE_SHIFT_7
1790 bool "Support Aspeed SoCs"
1795 config TARGET_DURIAN
1796 bool "Support Phytium Durian Platform"
1799 Support for durian platform.
1800 It has 2GB Sdram, uart and pcie.
1802 config TARGET_PRESIDIO_ASIC
1803 bool "Support Cortina Presidio ASIC Platform"
1806 config TARGET_XENGUEST_ARM64
1807 bool "Xen guest ARM64"
1811 select LINUX_KERNEL_IMAGE_HEADER
1816 config ARCH_SUPPORT_TFABOOT
1820 bool "Support for booting from TF-A"
1821 depends on ARCH_SUPPORT_TFABOOT
1824 Some platforms support the setup of secure registers (for instance
1825 for CPU errata handling) or provide secure services like PSCI.
1826 Those services could also be provided by other firmware parts
1827 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
1828 does not need to (and cannot) execute this code.
1829 Enabling this option will make a U-Boot binary that is relying
1830 on other firmware layers to provide secure functionality.
1832 config TI_SECURE_DEVICE
1833 bool "HS Device Type Support"
1834 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1836 If a high secure (HS) device type is being used, this config
1837 must be set. This option impacts various aspects of the
1838 build system (to create signed boot images that can be
1839 authenticated) and the code. See the doc/README.ti-secure
1840 file for further details.
1842 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1843 config ISW_ENTRY_ADDR
1844 hex "Address in memory or XIP address of bootloader entry point"
1845 default 0x402F4000 if AM43XX
1846 default 0x402F0400 if AM33XX
1847 default 0x40301350 if OMAP54XX
1849 After any reset, the boot ROM searches the boot media for a valid
1850 boot image. For non-XIP devices, the ROM then copies the image into
1851 internal memory. For all boot modes, after the ROM processes the
1852 boot image it eventually computes the entry point address depending
1853 on the device type (secure/non-secure), boot media (xip/non-xip) and
1857 source "arch/arm/mach-aspeed/Kconfig"
1859 source "arch/arm/mach-at91/Kconfig"
1861 source "arch/arm/mach-bcm283x/Kconfig"
1863 source "arch/arm/mach-bcmstb/Kconfig"
1865 source "arch/arm/mach-davinci/Kconfig"
1867 source "arch/arm/mach-exynos/Kconfig"
1869 source "arch/arm/mach-highbank/Kconfig"
1871 source "arch/arm/mach-integrator/Kconfig"
1873 source "arch/arm/mach-ipq40xx/Kconfig"
1875 source "arch/arm/mach-k3/Kconfig"
1877 source "arch/arm/mach-keystone/Kconfig"
1879 source "arch/arm/mach-kirkwood/Kconfig"
1881 source "arch/arm/mach-lpc32xx/Kconfig"
1883 source "arch/arm/mach-mvebu/Kconfig"
1885 source "arch/arm/mach-octeontx/Kconfig"
1887 source "arch/arm/mach-octeontx2/Kconfig"
1889 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1891 source "arch/arm/mach-imx/mx2/Kconfig"
1893 source "arch/arm/mach-imx/mx3/Kconfig"
1895 source "arch/arm/mach-imx/mx5/Kconfig"
1897 source "arch/arm/mach-imx/mx6/Kconfig"
1899 source "arch/arm/mach-imx/mx7/Kconfig"
1901 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1903 source "arch/arm/mach-imx/imx8/Kconfig"
1905 source "arch/arm/mach-imx/imx8m/Kconfig"
1907 source "arch/arm/mach-imx/imxrt/Kconfig"
1909 source "arch/arm/mach-imx/mxs/Kconfig"
1911 source "arch/arm/mach-omap2/Kconfig"
1913 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1915 source "arch/arm/mach-orion5x/Kconfig"
1917 source "arch/arm/mach-owl/Kconfig"
1919 source "arch/arm/mach-rmobile/Kconfig"
1921 source "arch/arm/mach-meson/Kconfig"
1923 source "arch/arm/mach-mediatek/Kconfig"
1925 source "arch/arm/mach-qemu/Kconfig"
1927 source "arch/arm/mach-rockchip/Kconfig"
1929 source "arch/arm/mach-s5pc1xx/Kconfig"
1931 source "arch/arm/mach-snapdragon/Kconfig"
1933 source "arch/arm/mach-socfpga/Kconfig"
1935 source "arch/arm/mach-sti/Kconfig"
1937 source "arch/arm/mach-stm32/Kconfig"
1939 source "arch/arm/mach-stm32mp/Kconfig"
1941 source "arch/arm/mach-sunxi/Kconfig"
1943 source "arch/arm/mach-tegra/Kconfig"
1945 source "arch/arm/mach-u8500/Kconfig"
1947 source "arch/arm/mach-uniphier/Kconfig"
1949 source "arch/arm/cpu/armv7/vf610/Kconfig"
1951 source "arch/arm/mach-zynq/Kconfig"
1953 source "arch/arm/mach-zynqmp/Kconfig"
1955 source "arch/arm/mach-versal/Kconfig"
1957 source "arch/arm/mach-zynqmp-r5/Kconfig"
1959 source "arch/arm/cpu/armv7/Kconfig"
1961 source "arch/arm/cpu/armv8/Kconfig"
1963 source "arch/arm/mach-imx/Kconfig"
1965 source "arch/arm/mach-nexell/Kconfig"
1967 source "board/armltd/total_compute/Kconfig"
1969 source "board/bosch/shc/Kconfig"
1970 source "board/bosch/guardian/Kconfig"
1971 source "board/CarMediaLab/flea3/Kconfig"
1972 source "board/Marvell/aspenite/Kconfig"
1973 source "board/Marvell/gplugd/Kconfig"
1974 source "board/Marvell/octeontx/Kconfig"
1975 source "board/Marvell/octeontx2/Kconfig"
1976 source "board/armltd/vexpress64/Kconfig"
1977 source "board/cortina/presidio-asic/Kconfig"
1978 source "board/broadcom/bcm963158/Kconfig"
1979 source "board/broadcom/bcm968360bg/Kconfig"
1980 source "board/broadcom/bcm968580xref/Kconfig"
1981 source "board/broadcom/bcmns3/Kconfig"
1982 source "board/cavium/thunderx/Kconfig"
1983 source "board/cirrus/edb93xx/Kconfig"
1984 source "board/eets/pdu001/Kconfig"
1985 source "board/emulation/qemu-arm/Kconfig"
1986 source "board/freescale/ls2080aqds/Kconfig"
1987 source "board/freescale/ls2080ardb/Kconfig"
1988 source "board/freescale/ls1088a/Kconfig"
1989 source "board/freescale/ls1028a/Kconfig"
1990 source "board/freescale/ls1021aqds/Kconfig"
1991 source "board/freescale/ls1043aqds/Kconfig"
1992 source "board/freescale/ls1021atwr/Kconfig"
1993 source "board/freescale/ls1021atsn/Kconfig"
1994 source "board/freescale/ls1021aiot/Kconfig"
1995 source "board/freescale/ls1046aqds/Kconfig"
1996 source "board/freescale/ls1043ardb/Kconfig"
1997 source "board/freescale/ls1046ardb/Kconfig"
1998 source "board/freescale/ls1046afrwy/Kconfig"
1999 source "board/freescale/ls1012aqds/Kconfig"
2000 source "board/freescale/ls1012ardb/Kconfig"
2001 source "board/freescale/ls1012afrdm/Kconfig"
2002 source "board/freescale/lx2160a/Kconfig"
2003 source "board/grinn/chiliboard/Kconfig"
2004 source "board/hisilicon/hikey/Kconfig"
2005 source "board/hisilicon/hikey960/Kconfig"
2006 source "board/hisilicon/poplar/Kconfig"
2007 source "board/isee/igep003x/Kconfig"
2008 source "board/kontron/sl28/Kconfig"
2009 source "board/myir/mys_6ulx/Kconfig"
2010 source "board/spear/spear300/Kconfig"
2011 source "board/spear/spear310/Kconfig"
2012 source "board/spear/spear320/Kconfig"
2013 source "board/spear/spear600/Kconfig"
2014 source "board/spear/x600/Kconfig"
2015 source "board/st/stv0991/Kconfig"
2016 source "board/tcl/sl50/Kconfig"
2017 source "board/toradex/colibri_pxa270/Kconfig"
2018 source "board/variscite/dart_6ul/Kconfig"
2019 source "board/vscom/baltos/Kconfig"
2020 source "board/phytium/durian/Kconfig"
2021 source "board/xen/xenguest_arm64/Kconfig"
2022 source "board/keymile/Kconfig"
2024 source "arch/arm/Kconfig.debug"
2029 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2030 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2031 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64