1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed from
19 almost any 4K aligned address. This logic relies on the relocation
20 information that is embedded in the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
25 default n if ARCH_QEMU
26 default y if POSITION_INDEPENDENT
28 U-Boot typically uses a hard-coded value for the stack pointer
29 before relocation. Enable this option to instead calculate the
30 initial SP at run-time. This is useful to avoid hard-coding addresses
31 into U-Boot, so that it can be loaded and executed at arbitrary
32 addresses and thus avoid using arbitrary addresses at runtime.
34 If this option is enabled, the early stack pointer is set to
35 &_bss_start with a offset value added. The offset is specified by
36 SYS_INIT_SP_BSS_OFFSET.
38 config SYS_INIT_SP_BSS_OFFSET
39 int "Early stack offset from the .bss base address"
40 depends on INIT_SP_RELATIVE
43 This option's value is the offset added to &_bss_start in order to
44 calculate the stack pointer. This offset should be large enough so
45 that the early malloc region, global data (gd), and early stack usage
46 do not overlap any appended DTB.
48 config LINUX_KERNEL_IMAGE_HEADER
51 Place a Linux kernel image header at the start of the U-Boot binary.
52 The format of the header is described in the Linux kernel source at
53 Documentation/arm64/booting.txt. This feature is useful since the
54 image header reports the amount of memory (BSS and similar) that
55 U-Boot needs to use, but which isn't part of the binary.
57 if LINUX_KERNEL_IMAGE_HEADER
58 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
61 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
62 TEXT_OFFSET value written to the Linux kernel image header.
72 ARM GICV3 Interrupt translation service (ITS).
73 Basic support for programming locality specific peripheral
74 interrupts (LPI) configuration tables and enable LPI tables.
75 LPI configuration table can be used by u-boot or Linux.
76 ARM GICV3 has limitation, once the LPI table is enabled, LPI
77 configuration table can not be re-programmed, unless GICV3 reset.
83 config DMA_ADDR_T_64BIT
93 config GPIO_EXTRA_HEADER
96 # Used for compatibility with asm files copied from the kernel
97 config ARM_ASM_UNIFIED
101 # Used for compatibility with asm files copied from the kernel
105 config SYS_ICACHE_OFF
106 bool "Do not enable icache"
109 Do not enable instruction cache in U-Boot.
111 config SPL_SYS_ICACHE_OFF
112 bool "Do not enable icache in SPL"
114 default SYS_ICACHE_OFF
116 Do not enable instruction cache in SPL.
118 config SYS_DCACHE_OFF
119 bool "Do not enable dcache"
122 Do not enable data cache in U-Boot.
124 config SPL_SYS_DCACHE_OFF
125 bool "Do not enable dcache in SPL"
127 default SYS_DCACHE_OFF
129 Do not enable data cache in SPL.
131 config SYS_ARM_CACHE_CP15
132 bool "CP15 based cache enabling support"
134 Select this if your processor suports enabling caches by using
138 bool "MMU-based Paged Memory Management Support"
139 select SYS_ARM_CACHE_CP15
141 Select if you want MMU-based virtualised addressing space
142 support via paged memory management.
145 bool 'Use the ARM v7 PMSA Compliant MPU'
147 Some ARM systems without an MMU have instead a Memory Protection
148 Unit (MPU) that defines the type and permissions for regions of
150 If your CPU has an MPU then you should choose 'y' here unless you
151 know that you do not want to use the MPU.
153 # If set, the workarounds for these ARM errata are applied early during U-Boot
154 # startup. Note that in general these options force the workarounds to be
155 # applied; no CPU-type/version detection exists, unlike the similar options in
156 # the Linux kernel. Do not set these options unless they apply! Also note that
157 # the following can be machine-specific errata. These do have ability to
158 # provide rudimentary version and machine-specific checks, but expect no
160 # CONFIG_ARM_ERRATA_430973
161 # CONFIG_ARM_ERRATA_454179
162 # CONFIG_ARM_ERRATA_621766
163 # CONFIG_ARM_ERRATA_798870
164 # CONFIG_ARM_ERRATA_801819
165 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
166 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
168 config ARM_ERRATA_430973
171 config ARM_ERRATA_454179
174 config ARM_ERRATA_621766
177 config ARM_ERRATA_716044
180 config ARM_ERRATA_725233
183 config ARM_ERRATA_742230
186 config ARM_ERRATA_743622
189 config ARM_ERRATA_751472
192 config ARM_ERRATA_761320
195 config ARM_ERRATA_773022
198 config ARM_ERRATA_774769
201 config ARM_ERRATA_794072
204 config ARM_ERRATA_798870
207 config ARM_ERRATA_801819
210 config ARM_ERRATA_826974
213 config ARM_ERRATA_828024
216 config ARM_ERRATA_829520
219 config ARM_ERRATA_833069
222 config ARM_ERRATA_833471
225 config ARM_ERRATA_845369
228 config ARM_ERRATA_852421
231 config ARM_ERRATA_852423
234 config ARM_ERRATA_855873
237 config ARM_CORTEX_A8_CVE_2017_5715
240 config ARM_CORTEX_A15_CVE_2017_5715
245 select SYS_CACHE_SHIFT_5
250 select SYS_CACHE_SHIFT_5
255 select SYS_CACHE_SHIFT_5
260 select SYS_CACHE_SHIFT_5
265 select SYS_CACHE_SHIFT_5
271 select SYS_CACHE_SHIFT_5
278 select SYS_CACHE_SHIFT_6
285 select SYS_CACHE_SHIFT_5
286 select SYS_THUMB_BUILD
292 select SYS_ARM_CACHE_CP15
294 select SYS_CACHE_SHIFT_6
298 select SYS_CACHE_SHIFT_5
303 select SYS_CACHE_SHIFT_5
307 default "arm720t" if CPU_ARM720T
308 default "arm920t" if CPU_ARM920T
309 default "arm926ejs" if CPU_ARM926EJS
310 default "arm946es" if CPU_ARM946ES
311 default "arm1136" if CPU_ARM1136
312 default "arm1176" if CPU_ARM1176
313 default "armv7" if CPU_V7A
314 default "armv7" if CPU_V7R
315 default "armv7m" if CPU_V7M
316 default "pxa" if CPU_PXA
317 default "sa1100" if CPU_SA1100
318 default "armv8" if ARM64
322 default 4 if CPU_ARM720T
323 default 4 if CPU_ARM920T
324 default 5 if CPU_ARM926EJS
325 default 5 if CPU_ARM946ES
326 default 6 if CPU_ARM1136
327 default 6 if CPU_ARM1176
332 default 4 if CPU_SA1100
335 config SYS_CACHE_SHIFT_5
338 config SYS_CACHE_SHIFT_6
341 config SYS_CACHE_SHIFT_7
344 config SYS_CACHELINE_SIZE
346 default 128 if SYS_CACHE_SHIFT_7
347 default 64 if SYS_CACHE_SHIFT_6
348 default 32 if SYS_CACHE_SHIFT_5
351 prompt "Select the ARM data write cache policy"
352 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
354 default SYS_ARM_CACHE_WRITEBACK
356 config SYS_ARM_CACHE_WRITEBACK
357 bool "Write-back (WB)"
359 A write updates the cache only and marks the cache line as dirty.
360 External memory is updated only when the line is evicted or explicitly
363 config SYS_ARM_CACHE_WRITETHROUGH
364 bool "Write-through (WT)"
366 A write updates both the cache and the external memory system.
367 This does not mark the cache line as dirty.
369 config SYS_ARM_CACHE_WRITEALLOC
370 bool "Write allocation (WA)"
372 A cache line is allocated on a write miss. This means that executing a
373 store instruction on the processor might cause a burst read to occur.
374 There is a linefill to obtain the data for the cache line, before the
379 bool "Enable ARCH_CPU_INIT"
381 Some architectures require a call to arch_cpu_init().
382 Say Y here to enable it
384 config SYS_ARCH_TIMER
385 bool "ARM Generic Timer support"
386 depends on CPU_V7A || ARM64
389 The ARM Generic Timer (aka arch-timer) provides an architected
390 interface to a timer source on an SoC.
391 It is mandatory for ARMv8 implementation and widely available
395 bool "Support for ARM SMC Calling Convention (SMCCC)"
396 depends on CPU_V7A || ARM64
399 Say Y here if you want to enable ARM SMC Calling Convention.
400 This should be enabled if U-Boot needs to communicate with system
401 firmware (for example, PSCI) according to SMCCC.
404 bool "support boot from semihosting"
406 In emulated environments, semihosting is a way for
407 the hosted environment to call out to the emulator to
408 retrieve files from the host machine.
410 config SYS_THUMB_BUILD
411 bool "Build U-Boot using the Thumb instruction set"
414 Use this flag to build U-Boot using the Thumb instruction set for
415 ARM architectures. Thumb instruction set provides better code
416 density. For ARM architectures that support Thumb2 this flag will
417 result in Thumb2 code generated by GCC.
419 config SPL_SYS_THUMB_BUILD
420 bool "Build SPL using the Thumb instruction set"
421 default y if SYS_THUMB_BUILD
422 depends on !ARM64 && SPL
424 Use this flag to build SPL using the Thumb instruction set for
425 ARM architectures. Thumb instruction set provides better code
426 density. For ARM architectures that support Thumb2 this flag will
427 result in Thumb2 code generated by GCC.
429 config TPL_SYS_THUMB_BUILD
430 bool "Build TPL using the Thumb instruction set"
431 default y if SYS_THUMB_BUILD
432 depends on TPL && !ARM64
434 Use this flag to build TPL using the Thumb instruction set for
435 ARM architectures. Thumb instruction set provides better code
436 density. For ARM architectures that support Thumb2 this flag will
437 result in Thumb2 code generated by GCC.
440 config SYS_L2CACHE_OFF
443 If SoC does not support L2CACHE or one does not want to enable
444 L2CACHE, choose this option.
446 config ENABLE_ARM_SOC_BOOT0_HOOK
447 bool "prepare BOOT0 header"
449 If the SoC's BOOT0 requires a header area filled with (magic)
450 values, then choose this option, and create a file included as
451 <asm/arch/boot0.h> which contains the required assembler code.
453 config ARM_CORTEX_CPU_IS_UP
457 config USE_ARCH_MEMCPY
458 bool "Use an assembly optimized implementation of memcpy"
462 Enable the generation of an optimized version of memcpy.
463 Such an implementation may be faster under some conditions
464 but may increase the binary size.
466 config SPL_USE_ARCH_MEMCPY
467 bool "Use an assembly optimized implementation of memcpy for SPL"
468 default y if USE_ARCH_MEMCPY
469 depends on !ARM64 && SPL
471 Enable the generation of an optimized version of memcpy.
472 Such an implementation may be faster under some conditions
473 but may increase the binary size.
475 config TPL_USE_ARCH_MEMCPY
476 bool "Use an assembly optimized implementation of memcpy for TPL"
477 default y if USE_ARCH_MEMCPY
478 depends on !ARM64 && TPL
480 Enable the generation of an optimized version of memcpy.
481 Such an implementation may be faster under some conditions
482 but may increase the binary size.
484 config USE_ARCH_MEMSET
485 bool "Use an assembly optimized implementation of memset"
489 Enable the generation of an optimized version of memset.
490 Such an implementation may be faster under some conditions
491 but may increase the binary size.
493 config SPL_USE_ARCH_MEMSET
494 bool "Use an assembly optimized implementation of memset for SPL"
495 default y if USE_ARCH_MEMSET
496 depends on !ARM64 && SPL
498 Enable the generation of an optimized version of memset.
499 Such an implementation may be faster under some conditions
500 but may increase the binary size.
502 config TPL_USE_ARCH_MEMSET
503 bool "Use an assembly optimized implementation of memset for TPL"
504 default y if USE_ARCH_MEMSET
505 depends on !ARM64 && TPL
507 Enable the generation of an optimized version of memset.
508 Such an implementation may be faster under some conditions
509 but may increase the binary size.
511 config ARM64_SUPPORT_AARCH32
512 bool "ARM64 system support AArch32 execution state"
514 default y if !TARGET_THUNDERX_88XX
516 This ARM64 system supports AArch32 execution state.
519 prompt "Target select"
524 select GPIO_EXTRA_HEADER
525 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
526 select SPL_SEPARATE_BSS if SPL
528 config TARGET_ASPENITE
529 bool "Support aspenite"
531 select GPIO_EXTRA_HEADER
536 select GPIO_EXTRA_HEADER
537 select SPL_DM_SPI if SPL
540 Support for TI's DaVinci platform.
543 bool "Marvell Kirkwood"
544 select ARCH_MISC_INIT
545 select BOARD_EARLY_INIT_F
547 select GPIO_EXTRA_HEADER
550 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
556 select GPIO_EXTRA_HEADER
557 select SPL_DM_SPI if SPL
558 select SPL_DM_SPI_FLASH if SPL
567 select GPIO_EXTRA_HEADER
569 config TARGET_STV0991
570 bool "Support stv0991"
576 select GPIO_EXTRA_HEADER
585 select GPIO_EXTRA_HEADER
588 bool "Broadcom BCM283X family"
592 select GPIO_EXTRA_HEADER
595 select SERIAL_SEARCH_ALL
600 bool "Broadcom BCM63158 family"
606 bool "Broadcom BCM68360 family"
612 bool "Broadcom BCM6858 family"
618 bool "Broadcom BCM7XXX family"
621 select GPIO_EXTRA_HEADER
623 select OF_PRIOR_STAGE
626 This enables support for Broadcom ARM-based set-top box
627 chipsets, including the 7445 family of chips.
629 config TARGET_BCMCYGNUS
630 bool "Support bcmcygnus"
632 select GPIO_EXTRA_HEADER
634 imply BCM_SF2_ETH_GMAC
642 bool "Support Broadcom Northstar2"
644 select GPIO_EXTRA_HEADER
646 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
647 ARMv8 Cortex-A57 processors targeting a broad range of networking
651 bool "Support Broadcom NS3"
653 select BOARD_LATE_INIT
655 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
656 ARMv8 Cortex-A72 processors targeting a broad range of networking
660 bool "Samsung EXYNOS"
669 select GPIO_EXTRA_HEADER
670 imply SYS_THUMB_BUILD
675 bool "Samsung S5PC1XX"
681 select GPIO_EXTRA_HEADER
685 bool "Calxeda Highbank"
698 config ARCH_INTEGRATOR
699 bool "ARM Ltd. Integrator family"
702 select GPIO_EXTRA_HEADER
707 bool "Qualcomm IPQ40xx SoCs"
713 select GPIO_EXTRA_HEADER
725 select GPIO_EXTRA_HEADER
727 select SYS_ARCH_TIMER
728 select SYS_THUMB_BUILD
734 bool "Texas Instruments' K3 Architecture"
739 config ARCH_OMAP2PLUS
742 select GPIO_EXTRA_HEADER
743 select SPL_BOARD_INIT if SPL
744 select SPL_STACK_R if SPL
746 imply TI_SYSC if DM && OF_CONTROL
751 select GPIO_EXTRA_HEADER
752 imply DISTRO_DEFAULTS
755 Support for the Meson SoC family developed by Amlogic Inc.,
756 targeted at media players and tablet computers. We currently
757 support the S905 (GXBaby) 64-bit SoC.
762 select GPIO_EXTRA_HEADER
765 select SPL_LIBCOMMON_SUPPORT if SPL
766 select SPL_LIBGENERIC_SUPPORT if SPL
767 select SPL_OF_CONTROL if SPL
770 Support for the MediaTek SoCs family developed by MediaTek Inc.
771 Please refer to doc/README.mediatek for more information.
774 bool "NXP LPC32xx platform"
779 select GPIO_EXTRA_HEADER
785 bool "NXP i.MX8 platform"
788 select GPIO_EXTRA_HEADER
790 select ENABLE_ARM_SOC_BOOT0_HOOK
793 bool "NXP i.MX8M platform"
795 select GPIO_EXTRA_HEADER
796 select SYS_FSL_HAS_SEC if IMX_HAB
797 select SYS_FSL_SEC_COMPAT_4
798 select SYS_FSL_SEC_LE
804 bool "NXP i.MXRT platform"
808 select GPIO_EXTRA_HEADER
813 bool "NXP i.MX23 family"
815 select GPIO_EXTRA_HEADER
822 select GPIO_EXTRA_HEADER
826 bool "NXP i.MX28 family"
828 select GPIO_EXTRA_HEADER
833 bool "NXP i.MX31 family"
835 select GPIO_EXTRA_HEADER
840 select GPIO_EXTRA_HEADER
841 select SYS_FSL_HAS_SEC if IMX_HAB
842 select SYS_FSL_SEC_COMPAT_4
843 select SYS_FSL_SEC_LE
844 select ROM_UNIFIED_SECTIONS
846 imply SYS_THUMB_BUILD
850 select ARCH_MISC_INIT
852 select GPIO_EXTRA_HEADER
853 select SYS_FSL_HAS_SEC if IMX_HAB
854 select SYS_FSL_SEC_COMPAT_4
855 select SYS_FSL_SEC_LE
856 imply BOARD_EARLY_INIT_F
858 imply SYS_THUMB_BUILD
863 select GPIO_EXTRA_HEADER
864 select SYS_FSL_HAS_SEC
865 select SYS_FSL_SEC_COMPAT_4
866 select SYS_FSL_SEC_LE
868 imply SYS_THUMB_BUILD
872 default "arch/arm/mach-omap2/u-boot-spl.lds"
877 select BOARD_EARLY_INIT_F
879 select GPIO_EXTRA_HEADER
883 bool "Nexell S5P4418/S5P6818 SoC"
884 select ENABLE_ARM_SOC_BOOT0_HOOK
886 select GPIO_EXTRA_HEADER
889 bool "Actions Semi OWL SoCs"
893 select GPIO_EXTRA_HEADER
898 select SYS_RELOC_GD_ENV_ADDR
902 bool "QEMU Virtual Platform"
913 bool "Renesas ARM SoCs"
916 select GPIO_EXTRA_HEADER
917 imply BOARD_EARLY_INIT_F
920 imply SYS_THUMB_BUILD
921 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
923 config ARCH_SNAPDRAGON
924 bool "Qualcomm Snapdragon SoCs"
929 select GPIO_EXTRA_HEADER
938 bool "Altera SOCFPGA family"
939 select ARCH_EARLY_INIT_R
940 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
941 select ARM64 if TARGET_SOCFPGA_SOC64
942 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
945 select GPIO_EXTRA_HEADER
946 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
948 select SPL_DM_RESET if DM_RESET
950 select SPL_LIBCOMMON_SUPPORT
951 select SPL_LIBGENERIC_SUPPORT
952 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
953 select SPL_OF_CONTROL
954 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
955 select SPL_SERIAL_SUPPORT
957 select SPL_WATCHDOG_SUPPORT
960 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
962 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
963 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
973 imply SPL_DM_SPI_FLASH
974 imply SPL_LIBDISK_SUPPORT
975 imply SPL_MMC_SUPPORT
976 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
977 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
978 imply SPL_SPI_FLASH_SUPPORT
979 imply SPL_SPI_SUPPORT
983 bool "Support sunxi (Allwinner) SoCs"
986 select CMD_MMC if MMC
987 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
994 select DM_SCSI if SCSI
996 select GPIO_EXTRA_HEADER
997 select OF_BOARD_SETUP
1000 select SPECIFY_CONSOLE_INDEX
1001 select SPL_STACK_R if SPL
1002 select SPL_SYS_MALLOC_SIMPLE if SPL
1003 select SPL_SYS_THUMB_BUILD if !ARM64
1006 select SYS_THUMB_BUILD if !ARM64
1007 select USB if DISTRO_DEFAULTS
1008 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1009 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1010 select SPL_USE_TINY_PRINTF
1012 select SYS_RELOC_GD_ENV_ADDR
1013 imply BOARD_LATE_INIT
1016 imply CMD_UBI if MTD_RAW_NAND
1017 imply DISTRO_DEFAULTS
1020 imply OF_LIBFDT_OVERLAY
1021 imply PRE_CONSOLE_BUFFER
1022 imply SPL_GPIO_SUPPORT
1023 imply SPL_LIBCOMMON_SUPPORT
1024 imply SPL_LIBGENERIC_SUPPORT
1025 imply SPL_MMC_SUPPORT if MMC
1026 imply SPL_POWER_SUPPORT
1027 imply SPL_SERIAL_SUPPORT
1031 bool "ST-Ericsson U8500 Series"
1035 select DM_MMC if MMC
1040 imply ARM_PL180_MMCI
1042 imply NOMADIK_MTU_TIMER
1045 imply SYSRESET_SYSCON
1048 bool "Support Xilinx Versal Platform"
1052 select DM_ETH if NET
1053 select DM_MMC if MMC
1055 select GPIO_EXTRA_HEADER
1057 imply BOARD_LATE_INIT
1058 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1061 bool "Freescale Vybrid"
1063 select GPIO_EXTRA_HEADER
1064 select SYS_FSL_ERRATUM_ESDHC111
1069 bool "Xilinx Zynq based platform"
1074 select DM_ETH if NET
1075 select DM_MMC if MMC
1079 select GPIO_EXTRA_HEADER
1082 select SPL_BOARD_INIT if SPL
1083 select SPL_CLK if SPL
1084 select SPL_DM if SPL
1085 select SPL_DM_SPI if SPL
1086 select SPL_DM_SPI_FLASH if SPL
1087 select SPL_OF_CONTROL if SPL
1088 select SPL_SEPARATE_BSS if SPL
1090 imply ARCH_EARLY_INIT_R
1091 imply BOARD_LATE_INIT
1095 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1098 config ARCH_ZYNQMP_R5
1099 bool "Xilinx ZynqMP R5 based platform"
1103 select DM_ETH if NET
1104 select DM_MMC if MMC
1106 select GPIO_EXTRA_HEADER
1112 bool "Xilinx ZynqMP based platform"
1116 select DM_ETH if NET
1118 select DM_MMC if MMC
1120 select DM_SPI if SPI
1121 select DM_SPI_FLASH if DM_SPI
1123 select GPIO_EXTRA_HEADER
1125 select SPL_BOARD_INIT if SPL
1126 select SPL_CLK if SPL
1127 select SPL_DM if SPL
1128 select SPL_DM_SPI if SPI && SPL_DM
1129 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1130 select SPL_DM_MAILBOX if SPL
1131 select SPL_FIRMWARE if SPL
1132 select SPL_SEPARATE_BSS if SPL
1135 imply BOARD_LATE_INIT
1137 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1144 select GPIO_EXTRA_HEADER
1145 imply DISTRO_DEFAULTS
1148 config TARGET_VEXPRESS64_AEMV8A
1149 bool "Support vexpress_aemv8a"
1151 select GPIO_EXTRA_HEADER
1154 config TARGET_VEXPRESS64_BASE_FVP
1155 bool "Support Versatile Express ARMv8a FVP BASE model"
1157 select GPIO_EXTRA_HEADER
1161 config TARGET_VEXPRESS64_JUNO
1162 bool "Support Versatile Express Juno Development Platform"
1164 select GPIO_EXTRA_HEADER
1177 config TARGET_TOTAL_COMPUTE
1178 bool "Support Total Compute Platform"
1186 config TARGET_LS2080A_EMU
1187 bool "Support ls2080a_emu"
1190 select ARMV8_MULTIENTRY
1191 select FSL_DDR_SYNC_REFRESH
1192 select GPIO_EXTRA_HEADER
1194 Support for Freescale LS2080A_EMU platform.
1195 The LS2080A Development System (EMULATOR) is a pre-silicon
1196 development platform that supports the QorIQ LS2080A
1197 Layerscape Architecture processor.
1199 config TARGET_LS1088AQDS
1200 bool "Support ls1088aqds"
1203 select ARMV8_MULTIENTRY
1204 select ARCH_SUPPORT_TFABOOT
1205 select BOARD_LATE_INIT
1206 select GPIO_EXTRA_HEADER
1208 select FSL_DDR_INTERACTIVE if !SD_BOOT
1210 Support for NXP LS1088AQDS platform.
1211 The LS1088A Development System (QDS) is a high-performance
1212 development platform that supports the QorIQ LS1088A
1213 Layerscape Architecture processor.
1215 config TARGET_LS2080AQDS
1216 bool "Support ls2080aqds"
1219 select ARMV8_MULTIENTRY
1220 select ARCH_SUPPORT_TFABOOT
1221 select BOARD_LATE_INIT
1222 select GPIO_EXTRA_HEADER
1227 select FSL_DDR_INTERACTIVE if !SPL
1229 Support for Freescale LS2080AQDS platform.
1230 The LS2080A Development System (QDS) is a high-performance
1231 development platform that supports the QorIQ LS2080A
1232 Layerscape Architecture processor.
1234 config TARGET_LS2080ARDB
1235 bool "Support ls2080ardb"
1238 select ARMV8_MULTIENTRY
1239 select ARCH_SUPPORT_TFABOOT
1240 select BOARD_LATE_INIT
1243 select FSL_DDR_INTERACTIVE if !SPL
1244 select GPIO_EXTRA_HEADER
1248 Support for Freescale LS2080ARDB platform.
1249 The LS2080A Reference design board (RDB) is a high-performance
1250 development platform that supports the QorIQ LS2080A
1251 Layerscape Architecture processor.
1253 config TARGET_LS2081ARDB
1254 bool "Support ls2081ardb"
1257 select ARMV8_MULTIENTRY
1258 select BOARD_LATE_INIT
1259 select GPIO_EXTRA_HEADER
1262 Support for Freescale LS2081ARDB platform.
1263 The LS2081A Reference design board (RDB) is a high-performance
1264 development platform that supports the QorIQ LS2081A/LS2041A
1265 Layerscape Architecture processor.
1267 config TARGET_LX2160ARDB
1268 bool "Support lx2160ardb"
1271 select ARMV8_MULTIENTRY
1272 select ARCH_SUPPORT_TFABOOT
1273 select BOARD_LATE_INIT
1274 select GPIO_EXTRA_HEADER
1276 Support for NXP LX2160ARDB platform.
1277 The lx2160ardb (LX2160A Reference design board (RDB)
1278 is a high-performance development platform that supports the
1279 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1281 config TARGET_LX2160AQDS
1282 bool "Support lx2160aqds"
1285 select ARMV8_MULTIENTRY
1286 select ARCH_SUPPORT_TFABOOT
1287 select BOARD_LATE_INIT
1288 select GPIO_EXTRA_HEADER
1290 Support for NXP LX2160AQDS platform.
1291 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1292 is a high-performance development platform that supports the
1293 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1295 config TARGET_LX2162AQDS
1296 bool "Support lx2162aqds"
1298 select ARCH_MISC_INIT
1300 select ARMV8_MULTIENTRY
1301 select ARCH_SUPPORT_TFABOOT
1302 select BOARD_LATE_INIT
1303 select GPIO_EXTRA_HEADER
1305 Support for NXP LX2162AQDS platform.
1306 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1309 bool "Support HiKey 96boards Consumer Edition Platform"
1314 select GPIO_EXTRA_HEADER
1317 select SPECIFY_CONSOLE_INDEX
1320 Support for HiKey 96boards platform. It features a HI6220
1321 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1323 config TARGET_HIKEY960
1324 bool "Support HiKey960 96boards Consumer Edition Platform"
1328 select GPIO_EXTRA_HEADER
1333 Support for HiKey960 96boards platform. It features a HI3660
1334 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1336 config TARGET_POPLAR
1337 bool "Support Poplar 96boards Enterprise Edition Platform"
1341 select GPIO_EXTRA_HEADER
1346 Support for Poplar 96boards EE platform. It features a HI3798cv200
1347 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1348 making it capable of running any commercial set-top solution based on
1351 config TARGET_LS1012AQDS
1352 bool "Support ls1012aqds"
1355 select ARCH_SUPPORT_TFABOOT
1356 select BOARD_LATE_INIT
1357 select GPIO_EXTRA_HEADER
1359 Support for Freescale LS1012AQDS platform.
1360 The LS1012A Development System (QDS) is a high-performance
1361 development platform that supports the QorIQ LS1012A
1362 Layerscape Architecture processor.
1364 config TARGET_LS1012ARDB
1365 bool "Support ls1012ardb"
1368 select ARCH_SUPPORT_TFABOOT
1369 select BOARD_LATE_INIT
1370 select GPIO_EXTRA_HEADER
1374 Support for Freescale LS1012ARDB platform.
1375 The LS1012A Reference design board (RDB) is a high-performance
1376 development platform that supports the QorIQ LS1012A
1377 Layerscape Architecture processor.
1379 config TARGET_LS1012A2G5RDB
1380 bool "Support ls1012a2g5rdb"
1383 select ARCH_SUPPORT_TFABOOT
1384 select BOARD_LATE_INIT
1385 select GPIO_EXTRA_HEADER
1388 Support for Freescale LS1012A2G5RDB platform.
1389 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1390 development platform that supports the QorIQ LS1012A
1391 Layerscape Architecture processor.
1393 config TARGET_LS1012AFRWY
1394 bool "Support ls1012afrwy"
1397 select ARCH_SUPPORT_TFABOOT
1398 select BOARD_LATE_INIT
1399 select GPIO_EXTRA_HEADER
1403 Support for Freescale LS1012AFRWY platform.
1404 The LS1012A FRWY board (FRWY) is a high-performance
1405 development platform that supports the QorIQ LS1012A
1406 Layerscape Architecture processor.
1408 config TARGET_LS1012AFRDM
1409 bool "Support ls1012afrdm"
1412 select ARCH_SUPPORT_TFABOOT
1413 select GPIO_EXTRA_HEADER
1415 Support for Freescale LS1012AFRDM platform.
1416 The LS1012A Freedom board (FRDM) is a high-performance
1417 development platform that supports the QorIQ LS1012A
1418 Layerscape Architecture processor.
1420 config TARGET_LS1028AQDS
1421 bool "Support ls1028aqds"
1424 select ARMV8_MULTIENTRY
1425 select ARCH_SUPPORT_TFABOOT
1426 select BOARD_LATE_INIT
1427 select GPIO_EXTRA_HEADER
1429 Support for Freescale LS1028AQDS platform
1430 The LS1028A Development System (QDS) is a high-performance
1431 development platform that supports the QorIQ LS1028A
1432 Layerscape Architecture processor.
1434 config TARGET_LS1028ARDB
1435 bool "Support ls1028ardb"
1438 select ARMV8_MULTIENTRY
1439 select ARCH_SUPPORT_TFABOOT
1440 select BOARD_LATE_INIT
1441 select GPIO_EXTRA_HEADER
1443 Support for Freescale LS1028ARDB platform
1444 The LS1028A Development System (RDB) is a high-performance
1445 development platform that supports the QorIQ LS1028A
1446 Layerscape Architecture processor.
1448 config TARGET_LS1088ARDB
1449 bool "Support ls1088ardb"
1452 select ARMV8_MULTIENTRY
1453 select ARCH_SUPPORT_TFABOOT
1454 select BOARD_LATE_INIT
1456 select FSL_DDR_INTERACTIVE if !SD_BOOT
1457 select GPIO_EXTRA_HEADER
1459 Support for NXP LS1088ARDB platform.
1460 The LS1088A Reference design board (RDB) is a high-performance
1461 development platform that supports the QorIQ LS1088A
1462 Layerscape Architecture processor.
1464 config TARGET_LS1021AQDS
1465 bool "Support ls1021aqds"
1467 select ARCH_SUPPORT_PSCI
1468 select BOARD_EARLY_INIT_F
1469 select BOARD_LATE_INIT
1471 select CPU_V7_HAS_NONSEC
1472 select CPU_V7_HAS_VIRT
1473 select LS1_DEEP_SLEEP
1476 select FSL_DDR_INTERACTIVE
1477 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1478 select GPIO_EXTRA_HEADER
1479 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1482 config TARGET_LS1021ATWR
1483 bool "Support ls1021atwr"
1485 select ARCH_SUPPORT_PSCI
1486 select BOARD_EARLY_INIT_F
1487 select BOARD_LATE_INIT
1489 select CPU_V7_HAS_NONSEC
1490 select CPU_V7_HAS_VIRT
1491 select LS1_DEEP_SLEEP
1493 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1494 select GPIO_EXTRA_HEADER
1497 config TARGET_PG_WCOM_SELI8
1498 bool "Support Hitachi-Powergrids SELI8 service unit card"
1500 select ARCH_SUPPORT_PSCI
1501 select BOARD_EARLY_INIT_F
1502 select BOARD_LATE_INIT
1504 select CPU_V7_HAS_NONSEC
1505 select CPU_V7_HAS_VIRT
1507 select FSL_DDR_INTERACTIVE
1508 select GPIO_EXTRA_HEADER
1512 Support for Hitachi-Powergrids SELI8 service unit card.
1513 SELI8 is a QorIQ LS1021a based service unit card used
1514 in XMC20 and FOX615 product families.
1516 config TARGET_PG_WCOM_EXPU1
1517 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1519 select ARCH_SUPPORT_PSCI
1520 select BOARD_EARLY_INIT_F
1521 select BOARD_LATE_INIT
1523 select CPU_V7_HAS_NONSEC
1524 select CPU_V7_HAS_VIRT
1526 select FSL_DDR_INTERACTIVE
1530 Support for Hitachi-Powergrids EXPU1 service unit card.
1531 EXPU1 is a QorIQ LS1021a based service unit card used
1532 in XMC20 and FOX615 product families.
1534 config TARGET_LS1021ATSN
1535 bool "Support ls1021atsn"
1537 select ARCH_SUPPORT_PSCI
1538 select BOARD_EARLY_INIT_F
1539 select BOARD_LATE_INIT
1541 select CPU_V7_HAS_NONSEC
1542 select CPU_V7_HAS_VIRT
1543 select LS1_DEEP_SLEEP
1545 select GPIO_EXTRA_HEADER
1548 config TARGET_LS1021AIOT
1549 bool "Support ls1021aiot"
1551 select ARCH_SUPPORT_PSCI
1552 select BOARD_LATE_INIT
1554 select CPU_V7_HAS_NONSEC
1555 select CPU_V7_HAS_VIRT
1557 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1558 select GPIO_EXTRA_HEADER
1561 Support for Freescale LS1021AIOT platform.
1562 The LS1021A Freescale board (IOT) is a high-performance
1563 development platform that supports the QorIQ LS1021A
1564 Layerscape Architecture processor.
1566 config TARGET_LS1043AQDS
1567 bool "Support ls1043aqds"
1570 select ARMV8_MULTIENTRY
1571 select ARCH_SUPPORT_TFABOOT
1572 select BOARD_EARLY_INIT_F
1573 select BOARD_LATE_INIT
1575 select FSL_DDR_INTERACTIVE if !SPL
1576 select FSL_DSPI if !SPL_NO_DSPI
1577 select DM_SPI_FLASH if FSL_DSPI
1578 select GPIO_EXTRA_HEADER
1582 Support for Freescale LS1043AQDS platform.
1584 config TARGET_LS1043ARDB
1585 bool "Support ls1043ardb"
1588 select ARMV8_MULTIENTRY
1589 select ARCH_SUPPORT_TFABOOT
1590 select BOARD_EARLY_INIT_F
1591 select BOARD_LATE_INIT
1593 select FSL_DSPI if !SPL_NO_DSPI
1594 select DM_SPI_FLASH if FSL_DSPI
1595 select GPIO_EXTRA_HEADER
1597 Support for Freescale LS1043ARDB platform.
1599 config TARGET_LS1046AQDS
1600 bool "Support ls1046aqds"
1603 select ARMV8_MULTIENTRY
1604 select ARCH_SUPPORT_TFABOOT
1605 select BOARD_EARLY_INIT_F
1606 select BOARD_LATE_INIT
1607 select DM_SPI_FLASH if DM_SPI
1609 select FSL_DDR_BIST if !SPL
1610 select FSL_DDR_INTERACTIVE if !SPL
1611 select FSL_DDR_INTERACTIVE if !SPL
1612 select GPIO_EXTRA_HEADER
1615 Support for Freescale LS1046AQDS platform.
1616 The LS1046A Development System (QDS) is a high-performance
1617 development platform that supports the QorIQ LS1046A
1618 Layerscape Architecture processor.
1620 config TARGET_LS1046ARDB
1621 bool "Support ls1046ardb"
1624 select ARMV8_MULTIENTRY
1625 select ARCH_SUPPORT_TFABOOT
1626 select BOARD_EARLY_INIT_F
1627 select BOARD_LATE_INIT
1628 select DM_SPI_FLASH if DM_SPI
1629 select POWER_MC34VR500
1632 select FSL_DDR_INTERACTIVE if !SPL
1633 select GPIO_EXTRA_HEADER
1636 Support for Freescale LS1046ARDB platform.
1637 The LS1046A Reference Design Board (RDB) is a high-performance
1638 development platform that supports the QorIQ LS1046A
1639 Layerscape Architecture processor.
1641 config TARGET_LS1046AFRWY
1642 bool "Support ls1046afrwy"
1645 select ARMV8_MULTIENTRY
1646 select ARCH_SUPPORT_TFABOOT
1647 select BOARD_EARLY_INIT_F
1648 select BOARD_LATE_INIT
1649 select DM_SPI_FLASH if DM_SPI
1650 select GPIO_EXTRA_HEADER
1653 Support for Freescale LS1046AFRWY platform.
1654 The LS1046A Freeway Board (FRWY) is a high-performance
1655 development platform that supports the QorIQ LS1046A
1656 Layerscape Architecture processor.
1662 select ARMV8_MULTIENTRY
1678 select GPIO_EXTRA_HEADER
1679 select SPL_DM if SPL
1680 select SPL_DM_SPI if SPL
1681 select SPL_DM_SPI_FLASH if SPL
1682 select SPL_DM_I2C if SPL
1683 select SPL_DM_MMC if SPL
1684 select SPL_DM_SERIAL if SPL
1686 Support for Kontron SMARC-sAL28 board.
1688 config TARGET_COLIBRI_PXA270
1689 bool "Support colibri_pxa270"
1691 select GPIO_EXTRA_HEADER
1693 config ARCH_UNIPHIER
1694 bool "Socionext UniPhier SoCs"
1695 select BOARD_LATE_INIT
1704 select OF_BOARD_SETUP
1708 select SPL_BOARD_INIT if SPL
1709 select SPL_DM if SPL
1710 select SPL_LIBCOMMON_SUPPORT if SPL
1711 select SPL_LIBGENERIC_SUPPORT if SPL
1712 select SPL_OF_CONTROL if SPL
1713 select SPL_PINCTRL if SPL
1716 imply DISTRO_DEFAULTS
1719 Support for UniPhier SoC family developed by Socionext Inc.
1720 (formerly, System LSI Business Division of Panasonic Corporation)
1722 config ARCH_SYNQUACER
1723 bool "Socionext SynQuacer SoCs"
1729 select SYSRESET_PSCI
1732 Support for SynQuacer SoC family developed by Socionext Inc.
1733 This SoC is used on 96boards EE DeveloperBox.
1736 bool "Support STMicroelectronics STM32 MCU with cortex M"
1740 select GPIO_EXTRA_HEADER
1744 bool "Support STMicrolectronics SoCs"
1753 Support for STMicroelectronics STiH407/10 SoC family.
1754 This SoC is used on Linaro 96Board STiH410-B2260
1757 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1758 select ARCH_MISC_INIT
1759 select ARCH_SUPPORT_TFABOOT
1760 select BOARD_LATE_INIT
1766 select GPIO_EXTRA_HEADER
1770 select OF_SYSTEM_SETUP
1776 select SYS_THUMB_BUILD
1780 imply OF_LIBFDT_OVERLAY
1781 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1784 Support for STM32MP SoC family developed by STMicroelectronics,
1785 MPUs based on ARM cortex A core
1786 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1787 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1789 SPL is the unsecure FSBL for the basic boot chain.
1791 config ARCH_ROCKCHIP
1792 bool "Support Rockchip SoCs"
1794 select BINMAN if SPL_OPTEE
1804 select ENABLE_ARM_SOC_BOOT0_HOOK
1807 select SPL_DM if SPL
1808 select SPL_DM_SPI if SPL
1809 select SPL_DM_SPI_FLASH if SPL
1811 select SYS_THUMB_BUILD if !ARM64
1814 imply DEBUG_UART_BOARD_INIT
1815 imply DISTRO_DEFAULTS
1817 imply SARADC_ROCKCHIP
1819 imply SPL_SYS_MALLOC_SIMPLE
1822 imply USB_FUNCTION_FASTBOOT
1824 config ARCH_OCTEONTX
1825 bool "Support OcteonTX SoCs"
1828 select GPIO_EXTRA_HEADER
1832 select BOARD_LATE_INIT
1833 select SYS_CACHE_SHIFT_7
1835 config ARCH_OCTEONTX2
1836 bool "Support OcteonTX2 SoCs"
1839 select GPIO_EXTRA_HEADER
1843 select BOARD_LATE_INIT
1844 select SYS_CACHE_SHIFT_7
1846 config TARGET_THUNDERX_88XX
1847 bool "Support ThunderX 88xx"
1849 select GPIO_EXTRA_HEADER
1852 select SYS_CACHE_SHIFT_7
1855 bool "Support Aspeed SoCs"
1860 config TARGET_DURIAN
1861 bool "Support Phytium Durian Platform"
1863 select GPIO_EXTRA_HEADER
1865 Support for durian platform.
1866 It has 2GB Sdram, uart and pcie.
1868 config TARGET_PRESIDIO_ASIC
1869 bool "Support Cortina Presidio ASIC Platform"
1872 config TARGET_XENGUEST_ARM64
1873 bool "Xen guest ARM64"
1877 select LINUX_KERNEL_IMAGE_HEADER
1882 config ARCH_SUPPORT_TFABOOT
1886 bool "Support for booting from TF-A"
1887 depends on ARCH_SUPPORT_TFABOOT
1890 Some platforms support the setup of secure registers (for instance
1891 for CPU errata handling) or provide secure services like PSCI.
1892 Those services could also be provided by other firmware parts
1893 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
1894 does not need to (and cannot) execute this code.
1895 Enabling this option will make a U-Boot binary that is relying
1896 on other firmware layers to provide secure functionality.
1898 config TI_SECURE_DEVICE
1899 bool "HS Device Type Support"
1900 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1902 If a high secure (HS) device type is being used, this config
1903 must be set. This option impacts various aspects of the
1904 build system (to create signed boot images that can be
1905 authenticated) and the code. See the doc/README.ti-secure
1906 file for further details.
1908 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1909 config ISW_ENTRY_ADDR
1910 hex "Address in memory or XIP address of bootloader entry point"
1911 default 0x402F4000 if AM43XX
1912 default 0x402F0400 if AM33XX
1913 default 0x40301350 if OMAP54XX
1915 After any reset, the boot ROM searches the boot media for a valid
1916 boot image. For non-XIP devices, the ROM then copies the image into
1917 internal memory. For all boot modes, after the ROM processes the
1918 boot image it eventually computes the entry point address depending
1919 on the device type (secure/non-secure), boot media (xip/non-xip) and
1923 source "arch/arm/mach-aspeed/Kconfig"
1925 source "arch/arm/mach-at91/Kconfig"
1927 source "arch/arm/mach-bcm283x/Kconfig"
1929 source "arch/arm/mach-bcmstb/Kconfig"
1931 source "arch/arm/mach-davinci/Kconfig"
1933 source "arch/arm/mach-exynos/Kconfig"
1935 source "arch/arm/mach-highbank/Kconfig"
1937 source "arch/arm/mach-integrator/Kconfig"
1939 source "arch/arm/mach-ipq40xx/Kconfig"
1941 source "arch/arm/mach-k3/Kconfig"
1943 source "arch/arm/mach-keystone/Kconfig"
1945 source "arch/arm/mach-kirkwood/Kconfig"
1947 source "arch/arm/mach-lpc32xx/Kconfig"
1949 source "arch/arm/mach-mvebu/Kconfig"
1951 source "arch/arm/mach-octeontx/Kconfig"
1953 source "arch/arm/mach-octeontx2/Kconfig"
1955 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1957 source "arch/arm/mach-imx/mx2/Kconfig"
1959 source "arch/arm/mach-imx/mx3/Kconfig"
1961 source "arch/arm/mach-imx/mx5/Kconfig"
1963 source "arch/arm/mach-imx/mx6/Kconfig"
1965 source "arch/arm/mach-imx/mx7/Kconfig"
1967 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1969 source "arch/arm/mach-imx/imx8/Kconfig"
1971 source "arch/arm/mach-imx/imx8m/Kconfig"
1973 source "arch/arm/mach-imx/imxrt/Kconfig"
1975 source "arch/arm/mach-imx/mxs/Kconfig"
1977 source "arch/arm/mach-omap2/Kconfig"
1979 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1981 source "arch/arm/mach-orion5x/Kconfig"
1983 source "arch/arm/mach-owl/Kconfig"
1985 source "arch/arm/mach-rmobile/Kconfig"
1987 source "arch/arm/mach-meson/Kconfig"
1989 source "arch/arm/mach-mediatek/Kconfig"
1991 source "arch/arm/mach-qemu/Kconfig"
1993 source "arch/arm/mach-rockchip/Kconfig"
1995 source "arch/arm/mach-s5pc1xx/Kconfig"
1997 source "arch/arm/mach-snapdragon/Kconfig"
1999 source "arch/arm/mach-socfpga/Kconfig"
2001 source "arch/arm/mach-sti/Kconfig"
2003 source "arch/arm/mach-stm32/Kconfig"
2005 source "arch/arm/mach-stm32mp/Kconfig"
2007 source "arch/arm/mach-sunxi/Kconfig"
2009 source "arch/arm/mach-tegra/Kconfig"
2011 source "arch/arm/mach-u8500/Kconfig"
2013 source "arch/arm/mach-uniphier/Kconfig"
2015 source "arch/arm/cpu/armv7/vf610/Kconfig"
2017 source "arch/arm/mach-zynq/Kconfig"
2019 source "arch/arm/mach-zynqmp/Kconfig"
2021 source "arch/arm/mach-versal/Kconfig"
2023 source "arch/arm/mach-zynqmp-r5/Kconfig"
2025 source "arch/arm/cpu/armv7/Kconfig"
2027 source "arch/arm/cpu/armv8/Kconfig"
2029 source "arch/arm/mach-imx/Kconfig"
2031 source "arch/arm/mach-nexell/Kconfig"
2033 source "board/armltd/total_compute/Kconfig"
2035 source "board/bosch/shc/Kconfig"
2036 source "board/bosch/guardian/Kconfig"
2037 source "board/CarMediaLab/flea3/Kconfig"
2038 source "board/Marvell/aspenite/Kconfig"
2039 source "board/Marvell/octeontx/Kconfig"
2040 source "board/Marvell/octeontx2/Kconfig"
2041 source "board/armltd/vexpress64/Kconfig"
2042 source "board/cortina/presidio-asic/Kconfig"
2043 source "board/broadcom/bcm963158/Kconfig"
2044 source "board/broadcom/bcm968360bg/Kconfig"
2045 source "board/broadcom/bcm968580xref/Kconfig"
2046 source "board/broadcom/bcmns3/Kconfig"
2047 source "board/cavium/thunderx/Kconfig"
2048 source "board/eets/pdu001/Kconfig"
2049 source "board/emulation/qemu-arm/Kconfig"
2050 source "board/freescale/ls2080aqds/Kconfig"
2051 source "board/freescale/ls2080ardb/Kconfig"
2052 source "board/freescale/ls1088a/Kconfig"
2053 source "board/freescale/ls1028a/Kconfig"
2054 source "board/freescale/ls1021aqds/Kconfig"
2055 source "board/freescale/ls1043aqds/Kconfig"
2056 source "board/freescale/ls1021atwr/Kconfig"
2057 source "board/freescale/ls1021atsn/Kconfig"
2058 source "board/freescale/ls1021aiot/Kconfig"
2059 source "board/freescale/ls1046aqds/Kconfig"
2060 source "board/freescale/ls1043ardb/Kconfig"
2061 source "board/freescale/ls1046ardb/Kconfig"
2062 source "board/freescale/ls1046afrwy/Kconfig"
2063 source "board/freescale/ls1012aqds/Kconfig"
2064 source "board/freescale/ls1012ardb/Kconfig"
2065 source "board/freescale/ls1012afrdm/Kconfig"
2066 source "board/freescale/lx2160a/Kconfig"
2067 source "board/grinn/chiliboard/Kconfig"
2068 source "board/hisilicon/hikey/Kconfig"
2069 source "board/hisilicon/hikey960/Kconfig"
2070 source "board/hisilicon/poplar/Kconfig"
2071 source "board/isee/igep003x/Kconfig"
2072 source "board/kontron/sl28/Kconfig"
2073 source "board/myir/mys_6ulx/Kconfig"
2074 source "board/seeed/npi_imx6ull/Kconfig"
2075 source "board/socionext/developerbox/Kconfig"
2076 source "board/st/stv0991/Kconfig"
2077 source "board/tcl/sl50/Kconfig"
2078 source "board/toradex/colibri_pxa270/Kconfig"
2079 source "board/variscite/dart_6ul/Kconfig"
2080 source "board/vscom/baltos/Kconfig"
2081 source "board/phytium/durian/Kconfig"
2082 source "board/xen/xenguest_arm64/Kconfig"
2083 source "board/keymile/Kconfig"
2085 source "arch/arm/Kconfig.debug"
2090 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2091 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2092 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64