1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed from
19 almost any 4K aligned address. This logic relies on the relocation
20 information that is embedded in the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
25 default n if ARCH_QEMU
26 default y if POSITION_INDEPENDENT
28 U-Boot typically uses a hard-coded value for the stack pointer
29 before relocation. Enable this option to instead calculate the
30 initial SP at run-time. This is useful to avoid hard-coding addresses
31 into U-Boot, so that it can be loaded and executed at arbitrary
32 addresses and thus avoid using arbitrary addresses at runtime.
34 If this option is enabled, the early stack pointer is set to
35 &_bss_start with a offset value added. The offset is specified by
36 SYS_INIT_SP_BSS_OFFSET.
38 config SYS_INIT_SP_BSS_OFFSET
39 int "Early stack offset from the .bss base address"
40 depends on INIT_SP_RELATIVE
43 This option's value is the offset added to &_bss_start in order to
44 calculate the stack pointer. This offset should be large enough so
45 that the early malloc region, global data (gd), and early stack usage
46 do not overlap any appended DTB.
48 config LINUX_KERNEL_IMAGE_HEADER
51 Place a Linux kernel image header at the start of the U-Boot binary.
52 The format of the header is described in the Linux kernel source at
53 Documentation/arm64/booting.txt. This feature is useful since the
54 image header reports the amount of memory (BSS and similar) that
55 U-Boot needs to use, but which isn't part of the binary.
57 if LINUX_KERNEL_IMAGE_HEADER
58 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
61 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
62 TEXT_OFFSET value written to the Linux kernel image header.
71 ARM GICV3 Interrupt translation service (ITS).
72 Basic support for programming locality specific peripheral
73 interrupts (LPI) configuration tables and enable LPI tables.
74 LPI configuration table can be used by u-boot or Linux.
75 ARM GICV3 has limitation, once the LPI table is enabled, LPI
76 configuration table can not be re-programmed, unless GICV3 reset.
82 config DMA_ADDR_T_64BIT
92 # Used for compatibility with asm files copied from the kernel
93 config ARM_ASM_UNIFIED
97 # Used for compatibility with asm files copied from the kernel
101 config SYS_ICACHE_OFF
102 bool "Do not enable icache"
105 Do not enable instruction cache in U-Boot.
107 config SPL_SYS_ICACHE_OFF
108 bool "Do not enable icache in SPL"
110 default SYS_ICACHE_OFF
112 Do not enable instruction cache in SPL.
114 config SYS_DCACHE_OFF
115 bool "Do not enable dcache"
118 Do not enable data cache in U-Boot.
120 config SPL_SYS_DCACHE_OFF
121 bool "Do not enable dcache in SPL"
123 default SYS_DCACHE_OFF
125 Do not enable data cache in SPL.
127 config SYS_ARM_CACHE_CP15
128 bool "CP15 based cache enabling support"
130 Select this if your processor suports enabling caches by using
134 bool "MMU-based Paged Memory Management Support"
135 select SYS_ARM_CACHE_CP15
137 Select if you want MMU-based virtualised addressing space
138 support via paged memory management.
141 bool 'Use the ARM v7 PMSA Compliant MPU'
143 Some ARM systems without an MMU have instead a Memory Protection
144 Unit (MPU) that defines the type and permissions for regions of
146 If your CPU has an MPU then you should choose 'y' here unless you
147 know that you do not want to use the MPU.
149 # If set, the workarounds for these ARM errata are applied early during U-Boot
150 # startup. Note that in general these options force the workarounds to be
151 # applied; no CPU-type/version detection exists, unlike the similar options in
152 # the Linux kernel. Do not set these options unless they apply! Also note that
153 # the following can be machine-specific errata. These do have ability to
154 # provide rudimentary version and machine-specific checks, but expect no
156 # CONFIG_ARM_ERRATA_430973
157 # CONFIG_ARM_ERRATA_454179
158 # CONFIG_ARM_ERRATA_621766
159 # CONFIG_ARM_ERRATA_798870
160 # CONFIG_ARM_ERRATA_801819
161 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
162 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
164 config ARM_ERRATA_430973
167 config ARM_ERRATA_454179
170 config ARM_ERRATA_621766
173 config ARM_ERRATA_716044
176 config ARM_ERRATA_725233
179 config ARM_ERRATA_742230
182 config ARM_ERRATA_743622
185 config ARM_ERRATA_751472
188 config ARM_ERRATA_761320
191 config ARM_ERRATA_773022
194 config ARM_ERRATA_774769
197 config ARM_ERRATA_794072
200 config ARM_ERRATA_798870
203 config ARM_ERRATA_801819
206 config ARM_ERRATA_826974
209 config ARM_ERRATA_828024
212 config ARM_ERRATA_829520
215 config ARM_ERRATA_833069
218 config ARM_ERRATA_833471
221 config ARM_ERRATA_845369
224 config ARM_ERRATA_852421
227 config ARM_ERRATA_852423
230 config ARM_ERRATA_855873
233 config ARM_CORTEX_A8_CVE_2017_5715
236 config ARM_CORTEX_A15_CVE_2017_5715
241 select SYS_CACHE_SHIFT_5
246 select SYS_CACHE_SHIFT_5
251 select SYS_CACHE_SHIFT_5
256 select SYS_CACHE_SHIFT_5
261 select SYS_CACHE_SHIFT_5
267 select SYS_CACHE_SHIFT_5
274 select SYS_CACHE_SHIFT_6
281 select SYS_CACHE_SHIFT_5
282 select SYS_THUMB_BUILD
288 select SYS_ARM_CACHE_CP15
290 select SYS_CACHE_SHIFT_6
294 select SYS_CACHE_SHIFT_5
299 select SYS_CACHE_SHIFT_5
303 default "arm720t" if CPU_ARM720T
304 default "arm920t" if CPU_ARM920T
305 default "arm926ejs" if CPU_ARM926EJS
306 default "arm946es" if CPU_ARM946ES
307 default "arm1136" if CPU_ARM1136
308 default "arm1176" if CPU_ARM1176
309 default "armv7" if CPU_V7A
310 default "armv7" if CPU_V7R
311 default "armv7m" if CPU_V7M
312 default "pxa" if CPU_PXA
313 default "sa1100" if CPU_SA1100
314 default "armv8" if ARM64
318 default 4 if CPU_ARM720T
319 default 4 if CPU_ARM920T
320 default 5 if CPU_ARM926EJS
321 default 5 if CPU_ARM946ES
322 default 6 if CPU_ARM1136
323 default 6 if CPU_ARM1176
328 default 4 if CPU_SA1100
331 config SYS_CACHE_SHIFT_5
334 config SYS_CACHE_SHIFT_6
337 config SYS_CACHE_SHIFT_7
340 config SYS_CACHELINE_SIZE
342 default 128 if SYS_CACHE_SHIFT_7
343 default 64 if SYS_CACHE_SHIFT_6
344 default 32 if SYS_CACHE_SHIFT_5
347 prompt "Select the ARM data write cache policy"
348 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
349 TARGET_BCMNSP || CPU_PXA || RZA1
350 default SYS_ARM_CACHE_WRITEBACK
352 config SYS_ARM_CACHE_WRITEBACK
353 bool "Write-back (WB)"
355 A write updates the cache only and marks the cache line as dirty.
356 External memory is updated only when the line is evicted or explicitly
359 config SYS_ARM_CACHE_WRITETHROUGH
360 bool "Write-through (WT)"
362 A write updates both the cache and the external memory system.
363 This does not mark the cache line as dirty.
365 config SYS_ARM_CACHE_WRITEALLOC
366 bool "Write allocation (WA)"
368 A cache line is allocated on a write miss. This means that executing a
369 store instruction on the processor might cause a burst read to occur.
370 There is a linefill to obtain the data for the cache line, before the
375 bool "Enable ARCH_CPU_INIT"
377 Some architectures require a call to arch_cpu_init().
378 Say Y here to enable it
380 config SYS_ARCH_TIMER
381 bool "ARM Generic Timer support"
382 depends on CPU_V7A || ARM64
385 The ARM Generic Timer (aka arch-timer) provides an architected
386 interface to a timer source on an SoC.
387 It is mandatory for ARMv8 implementation and widely available
391 bool "Support for ARM SMC Calling Convention (SMCCC)"
392 depends on CPU_V7A || ARM64
395 Say Y here if you want to enable ARM SMC Calling Convention.
396 This should be enabled if U-Boot needs to communicate with system
397 firmware (for example, PSCI) according to SMCCC.
400 bool "support boot from semihosting"
402 In emulated environments, semihosting is a way for
403 the hosted environment to call out to the emulator to
404 retrieve files from the host machine.
406 config SYS_THUMB_BUILD
407 bool "Build U-Boot using the Thumb instruction set"
410 Use this flag to build U-Boot using the Thumb instruction set for
411 ARM architectures. Thumb instruction set provides better code
412 density. For ARM architectures that support Thumb2 this flag will
413 result in Thumb2 code generated by GCC.
415 config SPL_SYS_THUMB_BUILD
416 bool "Build SPL using the Thumb instruction set"
417 default y if SYS_THUMB_BUILD
418 depends on !ARM64 && SPL
420 Use this flag to build SPL using the Thumb instruction set for
421 ARM architectures. Thumb instruction set provides better code
422 density. For ARM architectures that support Thumb2 this flag will
423 result in Thumb2 code generated by GCC.
425 config TPL_SYS_THUMB_BUILD
426 bool "Build TPL using the Thumb instruction set"
427 default y if SYS_THUMB_BUILD
428 depends on TPL && !ARM64
430 Use this flag to build TPL using the Thumb instruction set for
431 ARM architectures. Thumb instruction set provides better code
432 density. For ARM architectures that support Thumb2 this flag will
433 result in Thumb2 code generated by GCC.
436 config SYS_L2CACHE_OFF
439 If SoC does not support L2CACHE or one does not want to enable
440 L2CACHE, choose this option.
442 config ENABLE_ARM_SOC_BOOT0_HOOK
443 bool "prepare BOOT0 header"
445 If the SoC's BOOT0 requires a header area filled with (magic)
446 values, then choose this option, and create a file included as
447 <asm/arch/boot0.h> which contains the required assembler code.
449 config ARM_CORTEX_CPU_IS_UP
453 config USE_ARCH_MEMCPY
454 bool "Use an assembly optimized implementation of memcpy"
458 Enable the generation of an optimized version of memcpy.
459 Such an implementation may be faster under some conditions
460 but may increase the binary size.
462 config SPL_USE_ARCH_MEMCPY
463 bool "Use an assembly optimized implementation of memcpy for SPL"
464 default y if USE_ARCH_MEMCPY
465 depends on !ARM64 && SPL
467 Enable the generation of an optimized version of memcpy.
468 Such an implementation may be faster under some conditions
469 but may increase the binary size.
471 config TPL_USE_ARCH_MEMCPY
472 bool "Use an assembly optimized implementation of memcpy for TPL"
473 default y if USE_ARCH_MEMCPY
474 depends on !ARM64 && TPL
476 Enable the generation of an optimized version of memcpy.
477 Such an implementation may be faster under some conditions
478 but may increase the binary size.
480 config USE_ARCH_MEMSET
481 bool "Use an assembly optimized implementation of memset"
485 Enable the generation of an optimized version of memset.
486 Such an implementation may be faster under some conditions
487 but may increase the binary size.
489 config SPL_USE_ARCH_MEMSET
490 bool "Use an assembly optimized implementation of memset for SPL"
491 default y if USE_ARCH_MEMSET
492 depends on !ARM64 && SPL
494 Enable the generation of an optimized version of memset.
495 Such an implementation may be faster under some conditions
496 but may increase the binary size.
498 config TPL_USE_ARCH_MEMSET
499 bool "Use an assembly optimized implementation of memset for TPL"
500 default y if USE_ARCH_MEMSET
501 depends on !ARM64 && TPL
503 Enable the generation of an optimized version of memset.
504 Such an implementation may be faster under some conditions
505 but may increase the binary size.
507 config ARM64_SUPPORT_AARCH32
508 bool "ARM64 system support AArch32 execution state"
510 default y if !TARGET_THUNDERX_88XX
512 This ARM64 system supports AArch32 execution state.
515 prompt "Target select"
520 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
521 select SPL_SEPARATE_BSS if SPL
523 config TARGET_EDB93XX
524 bool "Support edb93xx"
528 config TARGET_ASPENITE
529 bool "Support aspenite"
533 bool "Support gplugd"
539 select SPL_DM_SPI if SPL
542 Support for TI's DaVinci platform.
545 bool "Marvell Kirkwood"
546 select ARCH_MISC_INIT
547 select BOARD_EARLY_INIT_F
551 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
557 select SPL_DM_SPI if SPL
558 select SPL_DM_SPI_FLASH if SPL
568 config TARGET_SPEAR300
569 bool "Support spear300"
570 select BOARD_EARLY_INIT_F
575 config TARGET_SPEAR310
576 bool "Support spear310"
577 select BOARD_EARLY_INIT_F
582 config TARGET_SPEAR320
583 bool "Support spear320"
584 select BOARD_EARLY_INIT_F
589 config TARGET_SPEAR600
590 bool "Support spear600"
591 select BOARD_EARLY_INIT_F
596 config TARGET_STV0991
597 bool "Support stv0991"
610 select BOARD_LATE_INIT
620 bool "Broadcom BCM283X family"
626 select SERIAL_SEARCH_ALL
631 bool "Broadcom BCM63158 family"
637 bool "Broadcom BCM68360 family"
643 bool "Broadcom BCM6858 family"
649 bool "Broadcom BCM7XXX family"
653 select OF_PRIOR_STAGE
656 This enables support for Broadcom ARM-based set-top box
657 chipsets, including the 7445 family of chips.
659 config TARGET_BCM23550_W1D
660 bool "Support bcm23550_w1d"
665 config TARGET_BCM28155_AP
666 bool "Support bcm28155_ap"
671 config TARGET_BCMCYGNUS
672 bool "Support bcmcygnus"
675 imply BCM_SF2_ETH_GMAC
683 bool "Support bcmnsp"
687 bool "Support Broadcom Northstar2"
690 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
691 ARMv8 Cortex-A57 processors targeting a broad range of networking
695 bool "Support Broadcom NS3"
697 select BOARD_LATE_INIT
699 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
700 ARMv8 Cortex-A72 processors targeting a broad range of networking
704 bool "Samsung EXYNOS"
713 imply SYS_THUMB_BUILD
718 bool "Samsung S5PC1XX"
727 bool "Calxeda Highbank"
731 config ARCH_INTEGRATOR
732 bool "ARM Ltd. Integrator family"
739 bool "Qualcomm IPQ40xx SoCs"
757 select SYS_ARCH_TIMER
758 select SYS_THUMB_BUILD
764 bool "Texas Instruments' K3 Architecture"
769 config ARCH_OMAP2PLUS
772 select SPL_BOARD_INIT if SPL
773 select SPL_STACK_R if SPL
775 imply TI_SYSC if DM && OF_CONTROL
780 imply DISTRO_DEFAULTS
783 Support for the Meson SoC family developed by Amlogic Inc.,
784 targeted at media players and tablet computers. We currently
785 support the S905 (GXBaby) 64-bit SoC.
792 select SPL_LIBCOMMON_SUPPORT if SPL
793 select SPL_LIBGENERIC_SUPPORT if SPL
794 select SPL_OF_CONTROL if SPL
797 Support for the MediaTek SoCs family developed by MediaTek Inc.
798 Please refer to doc/README.mediatek for more information.
801 bool "NXP LPC32xx platform"
811 bool "NXP i.MX8 platform"
815 select ENABLE_ARM_SOC_BOOT0_HOOK
818 bool "NXP i.MX8M platform"
820 select SYS_FSL_HAS_SEC if IMX_HAB
821 select SYS_FSL_SEC_COMPAT_4
822 select SYS_FSL_SEC_LE
828 bool "NXP i.MXRT platform"
836 bool "NXP i.MX23 family"
847 bool "NXP i.MX28 family"
853 bool "NXP i.MX31 family"
859 select SYS_FSL_HAS_SEC if IMX_HAB
860 select SYS_FSL_SEC_COMPAT_4
861 select SYS_FSL_SEC_LE
862 select ROM_UNIFIED_SECTIONS
864 imply SYS_THUMB_BUILD
868 select ARCH_MISC_INIT
870 select SYS_FSL_HAS_SEC if IMX_HAB
871 select SYS_FSL_SEC_COMPAT_4
872 select SYS_FSL_SEC_LE
873 imply BOARD_EARLY_INIT_F
875 imply SYS_THUMB_BUILD
880 select SYS_FSL_HAS_SEC
881 select SYS_FSL_SEC_COMPAT_4
882 select SYS_FSL_SEC_LE
884 imply SYS_THUMB_BUILD
888 default "arch/arm/mach-omap2/u-boot-spl.lds"
893 select BOARD_EARLY_INIT_F
898 bool "Nexell S5P4418/S5P6818 SoC"
899 select ENABLE_ARM_SOC_BOOT0_HOOK
903 bool "Actions Semi OWL SoCs"
911 select SYS_RELOC_GD_ENV_ADDR
915 bool "QEMU Virtual Platform"
926 bool "Renesas ARM SoCs"
929 imply BOARD_EARLY_INIT_F
932 imply SYS_THUMB_BUILD
933 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
935 config TARGET_S32V234EVB
936 bool "Support s32v234evb"
938 select SYS_FSL_ERRATUM_ESDHC111
940 config ARCH_SNAPDRAGON
941 bool "Qualcomm Snapdragon SoCs"
954 bool "Altera SOCFPGA family"
955 select ARCH_EARLY_INIT_R
956 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
957 select ARM64 if TARGET_SOCFPGA_SOC64
958 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
961 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
963 select SPL_DM_RESET if DM_RESET
965 select SPL_LIBCOMMON_SUPPORT
966 select SPL_LIBGENERIC_SUPPORT
967 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
968 select SPL_OF_CONTROL
969 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
970 select SPL_SERIAL_SUPPORT
972 select SPL_WATCHDOG_SUPPORT
975 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
977 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
978 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
988 imply SPL_DM_SPI_FLASH
989 imply SPL_LIBDISK_SUPPORT
990 imply SPL_MMC_SUPPORT
991 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
992 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
993 imply SPL_SPI_FLASH_SUPPORT
994 imply SPL_SPI_SUPPORT
998 bool "Support sunxi (Allwinner) SoCs"
1001 select CMD_MMC if MMC
1002 select CMD_USB if DISTRO_DEFAULTS
1008 select DM_MMC if MMC
1009 select DM_SCSI if SCSI
1011 select DM_USB if DISTRO_DEFAULTS
1012 select OF_BOARD_SETUP
1015 select SPECIFY_CONSOLE_INDEX
1016 select SPL_STACK_R if SPL
1017 select SPL_SYS_MALLOC_SIMPLE if SPL
1018 select SPL_SYS_THUMB_BUILD if !ARM64
1021 select SYS_THUMB_BUILD if !ARM64
1022 select USB if DISTRO_DEFAULTS
1023 select USB_KEYBOARD if DISTRO_DEFAULTS
1024 select USB_STORAGE if DISTRO_DEFAULTS
1025 select SPL_USE_TINY_PRINTF
1027 select SYS_RELOC_GD_ENV_ADDR
1028 imply BOARD_LATE_INIT
1031 imply CMD_UBI if MTD_RAW_NAND
1032 imply DISTRO_DEFAULTS
1035 imply OF_LIBFDT_OVERLAY
1036 imply PRE_CONSOLE_BUFFER
1037 imply SPL_GPIO_SUPPORT
1038 imply SPL_LIBCOMMON_SUPPORT
1039 imply SPL_LIBGENERIC_SUPPORT
1040 imply SPL_MMC_SUPPORT if MMC
1041 imply SPL_POWER_SUPPORT
1042 imply SPL_SERIAL_SUPPORT
1046 bool "ST-Ericsson U8500 Series"
1050 select DM_MMC if MMC
1052 select DM_USB if USB
1056 imply ARM_PL180_MMCI
1058 imply NOMADIK_MTU_TIMER
1061 imply SYSRESET_SYSCON
1064 bool "Support Xilinx Versal Platform"
1068 select DM_ETH if NET
1069 select DM_MMC if MMC
1072 imply BOARD_LATE_INIT
1073 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1076 bool "Freescale Vybrid"
1078 select SYS_FSL_ERRATUM_ESDHC111
1083 bool "Xilinx Zynq based platform"
1088 select DM_ETH if NET
1089 select DM_MMC if MMC
1093 select DM_USB if USB
1096 select SPL_BOARD_INIT if SPL
1097 select SPL_CLK if SPL
1098 select SPL_DM if SPL
1099 select SPL_DM_SPI if SPL
1100 select SPL_DM_SPI_FLASH if SPL
1101 select SPL_OF_CONTROL if SPL
1102 select SPL_SEPARATE_BSS if SPL
1104 imply ARCH_EARLY_INIT_R
1105 imply BOARD_LATE_INIT
1109 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1112 config ARCH_ZYNQMP_R5
1113 bool "Xilinx ZynqMP R5 based platform"
1117 select DM_ETH if NET
1118 select DM_MMC if MMC
1125 bool "Xilinx ZynqMP based platform"
1129 select DM_ETH if NET
1131 select DM_MMC if MMC
1133 select DM_SPI if SPI
1134 select DM_SPI_FLASH if DM_SPI
1135 select DM_USB if USB
1138 select SPL_BOARD_INIT if SPL
1139 select SPL_CLK if SPL
1140 select SPL_DM if SPL
1141 select SPL_DM_SPI if SPI && SPL_DM
1142 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1143 select SPL_DM_MAILBOX if SPL
1144 select SPL_FIRMWARE if SPL
1145 select SPL_SEPARATE_BSS if SPL
1148 imply BOARD_LATE_INIT
1150 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1157 imply DISTRO_DEFAULTS
1160 config TARGET_VEXPRESS64_AEMV8A
1161 bool "Support vexpress_aemv8a"
1165 config TARGET_VEXPRESS64_BASE_FVP
1166 bool "Support Versatile Express ARMv8a FVP BASE model"
1171 config TARGET_VEXPRESS64_JUNO
1172 bool "Support Versatile Express Juno Development Platform"
1187 config TARGET_TOTAL_COMPUTE
1188 bool "Support Total Compute Platform"
1196 config TARGET_LS2080A_EMU
1197 bool "Support ls2080a_emu"
1200 select ARMV8_MULTIENTRY
1201 select FSL_DDR_SYNC_REFRESH
1203 Support for Freescale LS2080A_EMU platform.
1204 The LS2080A Development System (EMULATOR) is a pre-silicon
1205 development platform that supports the QorIQ LS2080A
1206 Layerscape Architecture processor.
1208 config TARGET_LS1088AQDS
1209 bool "Support ls1088aqds"
1212 select ARMV8_MULTIENTRY
1213 select ARCH_SUPPORT_TFABOOT
1214 select BOARD_LATE_INIT
1216 select FSL_DDR_INTERACTIVE if !SD_BOOT
1218 Support for NXP LS1088AQDS platform.
1219 The LS1088A Development System (QDS) is a high-performance
1220 development platform that supports the QorIQ LS1088A
1221 Layerscape Architecture processor.
1223 config TARGET_LS2080AQDS
1224 bool "Support ls2080aqds"
1227 select ARMV8_MULTIENTRY
1228 select ARCH_SUPPORT_TFABOOT
1229 select BOARD_LATE_INIT
1234 select FSL_DDR_INTERACTIVE if !SPL
1236 Support for Freescale LS2080AQDS platform.
1237 The LS2080A Development System (QDS) is a high-performance
1238 development platform that supports the QorIQ LS2080A
1239 Layerscape Architecture processor.
1241 config TARGET_LS2080ARDB
1242 bool "Support ls2080ardb"
1245 select ARMV8_MULTIENTRY
1246 select ARCH_SUPPORT_TFABOOT
1247 select BOARD_LATE_INIT
1250 select FSL_DDR_INTERACTIVE if !SPL
1254 Support for Freescale LS2080ARDB platform.
1255 The LS2080A Reference design board (RDB) is a high-performance
1256 development platform that supports the QorIQ LS2080A
1257 Layerscape Architecture processor.
1259 config TARGET_LS2081ARDB
1260 bool "Support ls2081ardb"
1263 select ARMV8_MULTIENTRY
1264 select BOARD_LATE_INIT
1267 Support for Freescale LS2081ARDB platform.
1268 The LS2081A Reference design board (RDB) is a high-performance
1269 development platform that supports the QorIQ LS2081A/LS2041A
1270 Layerscape Architecture processor.
1272 config TARGET_LX2160ARDB
1273 bool "Support lx2160ardb"
1276 select ARMV8_MULTIENTRY
1277 select ARCH_SUPPORT_TFABOOT
1278 select BOARD_LATE_INIT
1280 Support for NXP LX2160ARDB platform.
1281 The lx2160ardb (LX2160A Reference design board (RDB)
1282 is a high-performance development platform that supports the
1283 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1285 config TARGET_LX2160AQDS
1286 bool "Support lx2160aqds"
1289 select ARMV8_MULTIENTRY
1290 select ARCH_SUPPORT_TFABOOT
1291 select BOARD_LATE_INIT
1293 Support for NXP LX2160AQDS platform.
1294 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1295 is a high-performance development platform that supports the
1296 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1298 config TARGET_LX2162AQDS
1299 bool "Support lx2162aqds"
1301 select ARCH_MISC_INIT
1303 select ARMV8_MULTIENTRY
1304 select ARCH_SUPPORT_TFABOOT
1305 select BOARD_LATE_INIT
1307 Support for NXP LX2162AQDS platform.
1308 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1311 bool "Support HiKey 96boards Consumer Edition Platform"
1318 select SPECIFY_CONSOLE_INDEX
1321 Support for HiKey 96boards platform. It features a HI6220
1322 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1324 config TARGET_HIKEY960
1325 bool "Support HiKey960 96boards Consumer Edition Platform"
1333 Support for HiKey960 96boards platform. It features a HI3660
1334 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1336 config TARGET_POPLAR
1337 bool "Support Poplar 96boards Enterprise Edition Platform"
1346 Support for Poplar 96boards EE platform. It features a HI3798cv200
1347 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1348 making it capable of running any commercial set-top solution based on
1351 config TARGET_LS1012AQDS
1352 bool "Support ls1012aqds"
1355 select ARCH_SUPPORT_TFABOOT
1356 select BOARD_LATE_INIT
1358 Support for Freescale LS1012AQDS platform.
1359 The LS1012A Development System (QDS) is a high-performance
1360 development platform that supports the QorIQ LS1012A
1361 Layerscape Architecture processor.
1363 config TARGET_LS1012ARDB
1364 bool "Support ls1012ardb"
1367 select ARCH_SUPPORT_TFABOOT
1368 select BOARD_LATE_INIT
1372 Support for Freescale LS1012ARDB platform.
1373 The LS1012A Reference design board (RDB) is a high-performance
1374 development platform that supports the QorIQ LS1012A
1375 Layerscape Architecture processor.
1377 config TARGET_LS1012A2G5RDB
1378 bool "Support ls1012a2g5rdb"
1381 select ARCH_SUPPORT_TFABOOT
1382 select BOARD_LATE_INIT
1385 Support for Freescale LS1012A2G5RDB platform.
1386 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1387 development platform that supports the QorIQ LS1012A
1388 Layerscape Architecture processor.
1390 config TARGET_LS1012AFRWY
1391 bool "Support ls1012afrwy"
1394 select ARCH_SUPPORT_TFABOOT
1395 select BOARD_LATE_INIT
1399 Support for Freescale LS1012AFRWY platform.
1400 The LS1012A FRWY board (FRWY) is a high-performance
1401 development platform that supports the QorIQ LS1012A
1402 Layerscape Architecture processor.
1404 config TARGET_LS1012AFRDM
1405 bool "Support ls1012afrdm"
1408 select ARCH_SUPPORT_TFABOOT
1410 Support for Freescale LS1012AFRDM platform.
1411 The LS1012A Freedom board (FRDM) is a high-performance
1412 development platform that supports the QorIQ LS1012A
1413 Layerscape Architecture processor.
1415 config TARGET_LS1028AQDS
1416 bool "Support ls1028aqds"
1419 select ARMV8_MULTIENTRY
1420 select ARCH_SUPPORT_TFABOOT
1421 select BOARD_LATE_INIT
1423 Support for Freescale LS1028AQDS platform
1424 The LS1028A Development System (QDS) is a high-performance
1425 development platform that supports the QorIQ LS1028A
1426 Layerscape Architecture processor.
1428 config TARGET_LS1028ARDB
1429 bool "Support ls1028ardb"
1432 select ARMV8_MULTIENTRY
1433 select ARCH_SUPPORT_TFABOOT
1434 select BOARD_LATE_INIT
1436 Support for Freescale LS1028ARDB platform
1437 The LS1028A Development System (RDB) is a high-performance
1438 development platform that supports the QorIQ LS1028A
1439 Layerscape Architecture processor.
1441 config TARGET_LS1088ARDB
1442 bool "Support ls1088ardb"
1445 select ARMV8_MULTIENTRY
1446 select ARCH_SUPPORT_TFABOOT
1447 select BOARD_LATE_INIT
1449 select FSL_DDR_INTERACTIVE if !SD_BOOT
1451 Support for NXP LS1088ARDB platform.
1452 The LS1088A Reference design board (RDB) is a high-performance
1453 development platform that supports the QorIQ LS1088A
1454 Layerscape Architecture processor.
1456 config TARGET_LS1021AQDS
1457 bool "Support ls1021aqds"
1459 select ARCH_SUPPORT_PSCI
1460 select BOARD_EARLY_INIT_F
1461 select BOARD_LATE_INIT
1463 select CPU_V7_HAS_NONSEC
1464 select CPU_V7_HAS_VIRT
1465 select LS1_DEEP_SLEEP
1468 select FSL_DDR_INTERACTIVE
1469 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1470 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1473 config TARGET_LS1021ATWR
1474 bool "Support ls1021atwr"
1476 select ARCH_SUPPORT_PSCI
1477 select BOARD_EARLY_INIT_F
1478 select BOARD_LATE_INIT
1480 select CPU_V7_HAS_NONSEC
1481 select CPU_V7_HAS_VIRT
1482 select LS1_DEEP_SLEEP
1484 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1487 config TARGET_LS1021ATSN
1488 bool "Support ls1021atsn"
1490 select ARCH_SUPPORT_PSCI
1491 select BOARD_EARLY_INIT_F
1492 select BOARD_LATE_INIT
1494 select CPU_V7_HAS_NONSEC
1495 select CPU_V7_HAS_VIRT
1496 select LS1_DEEP_SLEEP
1500 config TARGET_LS1021AIOT
1501 bool "Support ls1021aiot"
1503 select ARCH_SUPPORT_PSCI
1504 select BOARD_LATE_INIT
1506 select CPU_V7_HAS_NONSEC
1507 select CPU_V7_HAS_VIRT
1509 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1512 Support for Freescale LS1021AIOT platform.
1513 The LS1021A Freescale board (IOT) is a high-performance
1514 development platform that supports the QorIQ LS1021A
1515 Layerscape Architecture processor.
1517 config TARGET_LS1043AQDS
1518 bool "Support ls1043aqds"
1521 select ARMV8_MULTIENTRY
1522 select ARCH_SUPPORT_TFABOOT
1523 select BOARD_EARLY_INIT_F
1524 select BOARD_LATE_INIT
1526 select FSL_DDR_INTERACTIVE if !SPL
1527 select FSL_DSPI if !SPL_NO_DSPI
1528 select DM_SPI_FLASH if FSL_DSPI
1532 Support for Freescale LS1043AQDS platform.
1534 config TARGET_LS1043ARDB
1535 bool "Support ls1043ardb"
1538 select ARMV8_MULTIENTRY
1539 select ARCH_SUPPORT_TFABOOT
1540 select BOARD_EARLY_INIT_F
1541 select BOARD_LATE_INIT
1543 select FSL_DSPI if !SPL_NO_DSPI
1544 select DM_SPI_FLASH if FSL_DSPI
1546 Support for Freescale LS1043ARDB platform.
1548 config TARGET_LS1046AQDS
1549 bool "Support ls1046aqds"
1552 select ARMV8_MULTIENTRY
1553 select ARCH_SUPPORT_TFABOOT
1554 select BOARD_EARLY_INIT_F
1555 select BOARD_LATE_INIT
1556 select DM_SPI_FLASH if DM_SPI
1558 select FSL_DDR_BIST if !SPL
1559 select FSL_DDR_INTERACTIVE if !SPL
1560 select FSL_DDR_INTERACTIVE if !SPL
1563 Support for Freescale LS1046AQDS platform.
1564 The LS1046A Development System (QDS) is a high-performance
1565 development platform that supports the QorIQ LS1046A
1566 Layerscape Architecture processor.
1568 config TARGET_LS1046ARDB
1569 bool "Support ls1046ardb"
1572 select ARMV8_MULTIENTRY
1573 select ARCH_SUPPORT_TFABOOT
1574 select BOARD_EARLY_INIT_F
1575 select BOARD_LATE_INIT
1576 select DM_SPI_FLASH if DM_SPI
1577 select POWER_MC34VR500
1580 select FSL_DDR_INTERACTIVE if !SPL
1583 Support for Freescale LS1046ARDB platform.
1584 The LS1046A Reference Design Board (RDB) is a high-performance
1585 development platform that supports the QorIQ LS1046A
1586 Layerscape Architecture processor.
1588 config TARGET_LS1046AFRWY
1589 bool "Support ls1046afrwy"
1592 select ARMV8_MULTIENTRY
1593 select ARCH_SUPPORT_TFABOOT
1594 select BOARD_EARLY_INIT_F
1595 select BOARD_LATE_INIT
1596 select DM_SPI_FLASH if DM_SPI
1599 Support for Freescale LS1046AFRWY platform.
1600 The LS1046A Freeway Board (FRWY) is a high-performance
1601 development platform that supports the QorIQ LS1046A
1602 Layerscape Architecture processor.
1608 select ARMV8_MULTIENTRY
1612 Support for Kontron SMARC-sAL28 board.
1614 config TARGET_COLIBRI_PXA270
1615 bool "Support colibri_pxa270"
1618 config ARCH_UNIPHIER
1619 bool "Socionext UniPhier SoCs"
1620 select BOARD_LATE_INIT
1630 select OF_BOARD_SETUP
1634 select SPL_BOARD_INIT if SPL
1635 select SPL_DM if SPL
1636 select SPL_LIBCOMMON_SUPPORT if SPL
1637 select SPL_LIBGENERIC_SUPPORT if SPL
1638 select SPL_OF_CONTROL if SPL
1639 select SPL_PINCTRL if SPL
1642 imply DISTRO_DEFAULTS
1645 Support for UniPhier SoC family developed by Socionext Inc.
1646 (formerly, System LSI Business Division of Panasonic Corporation)
1649 bool "Support STMicroelectronics STM32 MCU with cortex M"
1656 bool "Support STMicrolectronics SoCs"
1665 Support for STMicroelectronics STiH407/10 SoC family.
1666 This SoC is used on Linaro 96Board STiH410-B2260
1669 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1670 select ARCH_MISC_INIT
1671 select ARCH_SUPPORT_TFABOOT
1672 select BOARD_LATE_INIT
1681 select OF_SYSTEM_SETUP
1687 select SYS_THUMB_BUILD
1691 imply OF_LIBFDT_OVERLAY
1692 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1695 Support for STM32MP SoC family developed by STMicroelectronics,
1696 MPUs based on ARM cortex A core
1697 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1698 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1700 SPL is the unsecure FSBL for the basic boot chain.
1702 config ARCH_ROCKCHIP
1703 bool "Support Rockchip SoCs"
1705 select BINMAN if SPL_OPTEE
1715 select DM_USB if USB
1716 select ENABLE_ARM_SOC_BOOT0_HOOK
1719 select SPL_DM if SPL
1720 select SPL_DM_SPI if SPL
1721 select SPL_DM_SPI_FLASH if SPL
1723 select SYS_THUMB_BUILD if !ARM64
1726 imply DEBUG_UART_BOARD_INIT
1727 imply DISTRO_DEFAULTS
1729 imply SARADC_ROCKCHIP
1731 imply SPL_SYS_MALLOC_SIMPLE
1734 imply USB_FUNCTION_FASTBOOT
1736 config ARCH_OCTEONTX
1737 bool "Support OcteonTX SoCs"
1743 select BOARD_LATE_INIT
1744 select SYS_CACHE_SHIFT_7
1746 config ARCH_OCTEONTX2
1747 bool "Support OcteonTX2 SoCs"
1753 select BOARD_LATE_INIT
1754 select SYS_CACHE_SHIFT_7
1756 config TARGET_THUNDERX_88XX
1757 bool "Support ThunderX 88xx"
1761 select SYS_CACHE_SHIFT_7
1764 bool "Support Aspeed SoCs"
1769 config TARGET_DURIAN
1770 bool "Support Phytium Durian Platform"
1773 Support for durian platform.
1774 It has 2GB Sdram, uart and pcie.
1776 config TARGET_PRESIDIO_ASIC
1777 bool "Support Cortina Presidio ASIC Platform"
1780 config TARGET_XENGUEST_ARM64
1781 bool "Xen guest ARM64"
1785 select LINUX_KERNEL_IMAGE_HEADER
1790 config ARCH_SUPPORT_TFABOOT
1794 bool "Support for booting from TF-A"
1795 depends on ARCH_SUPPORT_TFABOOT
1798 Some platforms support the setup of secure registers (for instance
1799 for CPU errata handling) or provide secure services like PSCI.
1800 Those services could also be provided by other firmware parts
1801 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
1802 does not need to (and cannot) execute this code.
1803 Enabling this option will make a U-Boot binary that is relying
1804 on other firmware layers to provide secure functionality.
1806 config TI_SECURE_DEVICE
1807 bool "HS Device Type Support"
1808 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1810 If a high secure (HS) device type is being used, this config
1811 must be set. This option impacts various aspects of the
1812 build system (to create signed boot images that can be
1813 authenticated) and the code. See the doc/README.ti-secure
1814 file for further details.
1816 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1817 config ISW_ENTRY_ADDR
1818 hex "Address in memory or XIP address of bootloader entry point"
1819 default 0x402F4000 if AM43XX
1820 default 0x402F0400 if AM33XX
1821 default 0x40301350 if OMAP54XX
1823 After any reset, the boot ROM searches the boot media for a valid
1824 boot image. For non-XIP devices, the ROM then copies the image into
1825 internal memory. For all boot modes, after the ROM processes the
1826 boot image it eventually computes the entry point address depending
1827 on the device type (secure/non-secure), boot media (xip/non-xip) and
1831 source "arch/arm/mach-aspeed/Kconfig"
1833 source "arch/arm/mach-at91/Kconfig"
1835 source "arch/arm/mach-bcm283x/Kconfig"
1837 source "arch/arm/mach-bcmstb/Kconfig"
1839 source "arch/arm/mach-davinci/Kconfig"
1841 source "arch/arm/mach-exynos/Kconfig"
1843 source "arch/arm/mach-highbank/Kconfig"
1845 source "arch/arm/mach-integrator/Kconfig"
1847 source "arch/arm/mach-ipq40xx/Kconfig"
1849 source "arch/arm/mach-k3/Kconfig"
1851 source "arch/arm/mach-keystone/Kconfig"
1853 source "arch/arm/mach-kirkwood/Kconfig"
1855 source "arch/arm/mach-lpc32xx/Kconfig"
1857 source "arch/arm/mach-mvebu/Kconfig"
1859 source "arch/arm/mach-octeontx/Kconfig"
1861 source "arch/arm/mach-octeontx2/Kconfig"
1863 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1865 source "arch/arm/mach-imx/mx2/Kconfig"
1867 source "arch/arm/mach-imx/mx3/Kconfig"
1869 source "arch/arm/mach-imx/mx5/Kconfig"
1871 source "arch/arm/mach-imx/mx6/Kconfig"
1873 source "arch/arm/mach-imx/mx7/Kconfig"
1875 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1877 source "arch/arm/mach-imx/imx8/Kconfig"
1879 source "arch/arm/mach-imx/imx8m/Kconfig"
1881 source "arch/arm/mach-imx/imxrt/Kconfig"
1883 source "arch/arm/mach-imx/mxs/Kconfig"
1885 source "arch/arm/mach-omap2/Kconfig"
1887 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1889 source "arch/arm/mach-orion5x/Kconfig"
1891 source "arch/arm/mach-owl/Kconfig"
1893 source "arch/arm/mach-rmobile/Kconfig"
1895 source "arch/arm/mach-meson/Kconfig"
1897 source "arch/arm/mach-mediatek/Kconfig"
1899 source "arch/arm/mach-qemu/Kconfig"
1901 source "arch/arm/mach-rockchip/Kconfig"
1903 source "arch/arm/mach-s5pc1xx/Kconfig"
1905 source "arch/arm/mach-snapdragon/Kconfig"
1907 source "arch/arm/mach-socfpga/Kconfig"
1909 source "arch/arm/mach-sti/Kconfig"
1911 source "arch/arm/mach-stm32/Kconfig"
1913 source "arch/arm/mach-stm32mp/Kconfig"
1915 source "arch/arm/mach-sunxi/Kconfig"
1917 source "arch/arm/mach-tegra/Kconfig"
1919 source "arch/arm/mach-u8500/Kconfig"
1921 source "arch/arm/mach-uniphier/Kconfig"
1923 source "arch/arm/cpu/armv7/vf610/Kconfig"
1925 source "arch/arm/mach-zynq/Kconfig"
1927 source "arch/arm/mach-zynqmp/Kconfig"
1929 source "arch/arm/mach-versal/Kconfig"
1931 source "arch/arm/mach-zynqmp-r5/Kconfig"
1933 source "arch/arm/cpu/armv7/Kconfig"
1935 source "arch/arm/cpu/armv8/Kconfig"
1937 source "arch/arm/mach-imx/Kconfig"
1939 source "arch/arm/mach-nexell/Kconfig"
1941 source "board/armltd/total_compute/Kconfig"
1943 source "board/bosch/shc/Kconfig"
1944 source "board/bosch/guardian/Kconfig"
1945 source "board/CarMediaLab/flea3/Kconfig"
1946 source "board/Marvell/aspenite/Kconfig"
1947 source "board/Marvell/gplugd/Kconfig"
1948 source "board/Marvell/octeontx/Kconfig"
1949 source "board/Marvell/octeontx2/Kconfig"
1950 source "board/armltd/vexpress64/Kconfig"
1951 source "board/cortina/presidio-asic/Kconfig"
1952 source "board/broadcom/bcm23550_w1d/Kconfig"
1953 source "board/broadcom/bcm28155_ap/Kconfig"
1954 source "board/broadcom/bcm963158/Kconfig"
1955 source "board/broadcom/bcm968360bg/Kconfig"
1956 source "board/broadcom/bcm968580xref/Kconfig"
1957 source "board/broadcom/bcmcygnus/Kconfig"
1958 source "board/broadcom/bcmnsp/Kconfig"
1959 source "board/broadcom/bcmns2/Kconfig"
1960 source "board/broadcom/bcmns3/Kconfig"
1961 source "board/cavium/thunderx/Kconfig"
1962 source "board/cirrus/edb93xx/Kconfig"
1963 source "board/eets/pdu001/Kconfig"
1964 source "board/emulation/qemu-arm/Kconfig"
1965 source "board/freescale/ls2080aqds/Kconfig"
1966 source "board/freescale/ls2080ardb/Kconfig"
1967 source "board/freescale/ls1088a/Kconfig"
1968 source "board/freescale/ls1028a/Kconfig"
1969 source "board/freescale/ls1021aqds/Kconfig"
1970 source "board/freescale/ls1043aqds/Kconfig"
1971 source "board/freescale/ls1021atwr/Kconfig"
1972 source "board/freescale/ls1021atsn/Kconfig"
1973 source "board/freescale/ls1021aiot/Kconfig"
1974 source "board/freescale/ls1046aqds/Kconfig"
1975 source "board/freescale/ls1043ardb/Kconfig"
1976 source "board/freescale/ls1046ardb/Kconfig"
1977 source "board/freescale/ls1046afrwy/Kconfig"
1978 source "board/freescale/ls1012aqds/Kconfig"
1979 source "board/freescale/ls1012ardb/Kconfig"
1980 source "board/freescale/ls1012afrdm/Kconfig"
1981 source "board/freescale/lx2160a/Kconfig"
1982 source "board/freescale/s32v234evb/Kconfig"
1983 source "board/grinn/chiliboard/Kconfig"
1984 source "board/hisilicon/hikey/Kconfig"
1985 source "board/hisilicon/hikey960/Kconfig"
1986 source "board/hisilicon/poplar/Kconfig"
1987 source "board/isee/igep003x/Kconfig"
1988 source "board/kontron/sl28/Kconfig"
1989 source "board/myir/mys_6ulx/Kconfig"
1990 source "board/spear/spear300/Kconfig"
1991 source "board/spear/spear310/Kconfig"
1992 source "board/spear/spear320/Kconfig"
1993 source "board/spear/spear600/Kconfig"
1994 source "board/spear/x600/Kconfig"
1995 source "board/st/stv0991/Kconfig"
1996 source "board/tcl/sl50/Kconfig"
1997 source "board/toradex/colibri_pxa270/Kconfig"
1998 source "board/variscite/dart_6ul/Kconfig"
1999 source "board/vscom/baltos/Kconfig"
2000 source "board/phytium/durian/Kconfig"
2001 source "board/xen/xenguest_arm64/Kconfig"
2003 source "arch/arm/Kconfig.debug"
2008 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2009 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2010 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64