1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed
19 from almost any address. This logic relies on the relocation
20 information that is embedded in the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
26 U-Boot typically uses a hard-coded value for the stack pointer
27 before relocation. Enable this option to instead calculate the
28 initial SP at run-time. This is useful to avoid hard-coding addresses
29 into U-Boot, so that it can be loaded and executed at arbitrary
30 addresses and thus avoid using arbitrary addresses at runtime.
32 If this option is enabled, the early stack pointer is set to
33 &_bss_start with a offset value added. The offset is specified by
34 SYS_INIT_SP_BSS_OFFSET.
36 config SYS_INIT_SP_BSS_OFFSET
37 int "Early stack offset from the .bss base address"
38 depends on INIT_SP_RELATIVE
41 This option's value is the offset added to &_bss_start in order to
42 calculate the stack pointer. This offset should be large enough so
43 that the early malloc region, global data (gd), and early stack usage
44 do not overlap any appended DTB.
46 config LINUX_KERNEL_IMAGE_HEADER
49 Place a Linux kernel image header at the start of the U-Boot binary.
50 The format of the header is described in the Linux kernel source at
51 Documentation/arm64/booting.txt. This feature is useful since the
52 image header reports the amount of memory (BSS and similar) that
53 U-Boot needs to use, but which isn't part of the binary.
55 if LINUX_KERNEL_IMAGE_HEADER
56 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
59 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
60 TEXT_OFFSET value written to the Linux kernel image header.
66 default y if ARM64 && !POSITION_INDEPENDENT
68 config DMA_ADDR_T_64BIT
78 # Used for compatibility with asm files copied from the kernel
79 config ARM_ASM_UNIFIED
83 # Used for compatibility with asm files copied from the kernel
88 bool "Do not enable icache"
91 Do not enable instruction cache in U-Boot.
93 config SPL_SYS_ICACHE_OFF
94 bool "Do not enable icache in SPL"
96 default SYS_ICACHE_OFF
98 Do not enable instruction cache in SPL.
100 config SYS_DCACHE_OFF
101 bool "Do not enable dcache"
104 Do not enable data cache in U-Boot.
106 config SPL_SYS_DCACHE_OFF
107 bool "Do not enable dcache in SPL"
109 default SYS_DCACHE_OFF
111 Do not enable data cache in SPL.
113 config SYS_ARM_CACHE_CP15
114 bool "CP15 based cache enabling support"
116 Select this if your processor suports enabling caches by using
120 bool "MMU-based Paged Memory Management Support"
121 select SYS_ARM_CACHE_CP15
123 Select if you want MMU-based virtualised addressing space
124 support via paged memory management.
127 bool 'Use the ARM v7 PMSA Compliant MPU'
129 Some ARM systems without an MMU have instead a Memory Protection
130 Unit (MPU) that defines the type and permissions for regions of
132 If your CPU has an MPU then you should choose 'y' here unless you
133 know that you do not want to use the MPU.
135 # If set, the workarounds for these ARM errata are applied early during U-Boot
136 # startup. Note that in general these options force the workarounds to be
137 # applied; no CPU-type/version detection exists, unlike the similar options in
138 # the Linux kernel. Do not set these options unless they apply! Also note that
139 # the following can be machine-specific errata. These do have ability to
140 # provide rudimentary version and machine-specific checks, but expect no
142 # CONFIG_ARM_ERRATA_430973
143 # CONFIG_ARM_ERRATA_454179
144 # CONFIG_ARM_ERRATA_621766
145 # CONFIG_ARM_ERRATA_798870
146 # CONFIG_ARM_ERRATA_801819
147 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
148 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
150 config ARM_ERRATA_430973
153 config ARM_ERRATA_454179
156 config ARM_ERRATA_621766
159 config ARM_ERRATA_716044
162 config ARM_ERRATA_725233
165 config ARM_ERRATA_742230
168 config ARM_ERRATA_743622
171 config ARM_ERRATA_751472
174 config ARM_ERRATA_761320
177 config ARM_ERRATA_773022
180 config ARM_ERRATA_774769
183 config ARM_ERRATA_794072
186 config ARM_ERRATA_798870
189 config ARM_ERRATA_801819
192 config ARM_ERRATA_826974
195 config ARM_ERRATA_828024
198 config ARM_ERRATA_829520
201 config ARM_ERRATA_833069
204 config ARM_ERRATA_833471
207 config ARM_ERRATA_845369
210 config ARM_ERRATA_852421
213 config ARM_ERRATA_852423
216 config ARM_ERRATA_855873
219 config ARM_CORTEX_A8_CVE_2017_5715
222 config ARM_CORTEX_A15_CVE_2017_5715
227 select SYS_CACHE_SHIFT_5
232 select SYS_CACHE_SHIFT_5
237 select SYS_CACHE_SHIFT_5
242 select SYS_CACHE_SHIFT_5
247 select SYS_CACHE_SHIFT_5
253 select SYS_CACHE_SHIFT_5
260 select SYS_CACHE_SHIFT_6
267 select SYS_CACHE_SHIFT_5
268 select SYS_THUMB_BUILD
274 select SYS_ARM_CACHE_CP15
276 select SYS_CACHE_SHIFT_6
280 select SYS_CACHE_SHIFT_5
285 select SYS_CACHE_SHIFT_5
289 default "arm720t" if CPU_ARM720T
290 default "arm920t" if CPU_ARM920T
291 default "arm926ejs" if CPU_ARM926EJS
292 default "arm946es" if CPU_ARM946ES
293 default "arm1136" if CPU_ARM1136
294 default "arm1176" if CPU_ARM1176
295 default "armv7" if CPU_V7A
296 default "armv7" if CPU_V7R
297 default "armv7m" if CPU_V7M
298 default "pxa" if CPU_PXA
299 default "sa1100" if CPU_SA1100
300 default "armv8" if ARM64
304 default 4 if CPU_ARM720T
305 default 4 if CPU_ARM920T
306 default 5 if CPU_ARM926EJS
307 default 5 if CPU_ARM946ES
308 default 6 if CPU_ARM1136
309 default 6 if CPU_ARM1176
314 default 4 if CPU_SA1100
317 config SYS_CACHE_SHIFT_5
320 config SYS_CACHE_SHIFT_6
323 config SYS_CACHE_SHIFT_7
326 config SYS_CACHELINE_SIZE
328 default 128 if SYS_CACHE_SHIFT_7
329 default 64 if SYS_CACHE_SHIFT_6
330 default 32 if SYS_CACHE_SHIFT_5
333 bool "Enable ARCH_CPU_INIT"
335 Some architectures require a call to arch_cpu_init().
336 Say Y here to enable it
338 config SYS_ARCH_TIMER
339 bool "ARM Generic Timer support"
340 depends on CPU_V7A || ARM64
343 The ARM Generic Timer (aka arch-timer) provides an architected
344 interface to a timer source on an SoC.
345 It is mandatory for ARMv8 implementation and widely available
349 bool "Support for ARM SMC Calling Convention (SMCCC)"
350 depends on CPU_V7A || ARM64
353 Say Y here if you want to enable ARM SMC Calling Convention.
354 This should be enabled if U-Boot needs to communicate with system
355 firmware (for example, PSCI) according to SMCCC.
358 bool "support boot from semihosting"
360 In emulated environments, semihosting is a way for
361 the hosted environment to call out to the emulator to
362 retrieve files from the host machine.
364 config SYS_THUMB_BUILD
365 bool "Build U-Boot using the Thumb instruction set"
368 Use this flag to build U-Boot using the Thumb instruction set for
369 ARM architectures. Thumb instruction set provides better code
370 density. For ARM architectures that support Thumb2 this flag will
371 result in Thumb2 code generated by GCC.
373 config SPL_SYS_THUMB_BUILD
374 bool "Build SPL using the Thumb instruction set"
375 default y if SYS_THUMB_BUILD
376 depends on !ARM64 && SPL
378 Use this flag to build SPL using the Thumb instruction set for
379 ARM architectures. Thumb instruction set provides better code
380 density. For ARM architectures that support Thumb2 this flag will
381 result in Thumb2 code generated by GCC.
383 config TPL_SYS_THUMB_BUILD
384 bool "Build TPL using the Thumb instruction set"
385 default y if SYS_THUMB_BUILD
386 depends on TPL && !ARM64
388 Use this flag to build TPL using the Thumb instruction set for
389 ARM architectures. Thumb instruction set provides better code
390 density. For ARM architectures that support Thumb2 this flag will
391 result in Thumb2 code generated by GCC.
394 config SYS_L2CACHE_OFF
397 If SoC does not support L2CACHE or one does not want to enable
398 L2CACHE, choose this option.
400 config ENABLE_ARM_SOC_BOOT0_HOOK
401 bool "prepare BOOT0 header"
403 If the SoC's BOOT0 requires a header area filled with (magic)
404 values, then choose this option, and create a file included as
405 <asm/arch/boot0.h> which contains the required assembler code.
407 config ARM_CORTEX_CPU_IS_UP
411 config USE_ARCH_MEMCPY
412 bool "Use an assembly optimized implementation of memcpy"
416 Enable the generation of an optimized version of memcpy.
417 Such an implementation may be faster under some conditions
418 but may increase the binary size.
420 config SPL_USE_ARCH_MEMCPY
421 bool "Use an assembly optimized implementation of memcpy for SPL"
422 default y if USE_ARCH_MEMCPY
423 depends on !ARM64 && SPL
425 Enable the generation of an optimized version of memcpy.
426 Such an implementation may be faster under some conditions
427 but may increase the binary size.
429 config TPL_USE_ARCH_MEMCPY
430 bool "Use an assembly optimized implementation of memcpy for TPL"
431 default y if USE_ARCH_MEMCPY
432 depends on !ARM64 && TPL
434 Enable the generation of an optimized version of memcpy.
435 Such an implementation may be faster under some conditions
436 but may increase the binary size.
438 config USE_ARCH_MEMSET
439 bool "Use an assembly optimized implementation of memset"
443 Enable the generation of an optimized version of memset.
444 Such an implementation may be faster under some conditions
445 but may increase the binary size.
447 config SPL_USE_ARCH_MEMSET
448 bool "Use an assembly optimized implementation of memset for SPL"
449 default y if USE_ARCH_MEMSET
450 depends on !ARM64 && SPL
452 Enable the generation of an optimized version of memset.
453 Such an implementation may be faster under some conditions
454 but may increase the binary size.
456 config TPL_USE_ARCH_MEMSET
457 bool "Use an assembly optimized implementation of memset for TPL"
458 default y if USE_ARCH_MEMSET
459 depends on !ARM64 && TPL
461 Enable the generation of an optimized version of memset.
462 Such an implementation may be faster under some conditions
463 but may increase the binary size.
465 config SET_STACK_SIZE
466 bool "Enable an option to set max stack size that can be used"
467 default y if ARCH_VERSAL || ARCH_ZYNQMP
469 This will enable an option to set max stack size that can be
473 hex "Define max stack size that can be used by U-Boot"
474 depends on SET_STACK_SIZE
475 default 0x4000000 if ARCH_VERSAL || ARCH_ZYNQMP
477 Define Max stack size that can be used by U-Boot so that the
478 initrd_high will be calculated as base stack pointer minus this
481 config ARM64_SUPPORT_AARCH32
482 bool "ARM64 system support AArch32 execution state"
484 default y if !TARGET_THUNDERX_88XX
486 This ARM64 system supports AArch32 execution state.
489 prompt "Target select"
494 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
496 config TARGET_EDB93XX
497 bool "Support edb93xx"
501 config TARGET_ASPENITE
502 bool "Support aspenite"
506 bool "Support gplugd"
514 Support for TI's DaVinci platform.
517 bool "Marvell Kirkwood"
518 select ARCH_MISC_INIT
519 select BOARD_EARLY_INIT_F
523 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
543 config TARGET_SPEAR300
544 bool "Support spear300"
545 select BOARD_EARLY_INIT_F
550 config TARGET_SPEAR310
551 bool "Support spear310"
552 select BOARD_EARLY_INIT_F
557 config TARGET_SPEAR320
558 bool "Support spear320"
559 select BOARD_EARLY_INIT_F
564 config TARGET_SPEAR600
565 bool "Support spear600"
566 select BOARD_EARLY_INIT_F
571 config TARGET_STV0991
572 bool "Support stv0991"
585 select BOARD_LATE_INIT
590 config TARGET_WOODBURN
591 bool "Support woodburn"
594 config TARGET_WOODBURN_SD
595 bool "Support woodburn_sd"
603 config TARGET_MX35PDK
604 bool "Support mx35pdk"
605 select BOARD_LATE_INIT
609 bool "Broadcom BCM283X family"
615 select SERIAL_SEARCH_ALL
620 bool "Broadcom BCM63158 family"
626 bool "Broadcom BCM6858 family"
631 config TARGET_VEXPRESS_CA15_TC2
632 bool "Support vexpress_ca15_tc2"
634 select CPU_V7_HAS_NONSEC
635 select CPU_V7_HAS_VIRT
639 bool "Broadcom BCM7XXX family"
643 select OF_PRIOR_STAGE
646 This enables support for Broadcom ARM-based set-top box
647 chipsets, including the 7445 family of chips.
649 config TARGET_VEXPRESS_CA5X2
650 bool "Support vexpress_ca5x2"
654 config TARGET_VEXPRESS_CA9X4
655 bool "Support vexpress_ca9x4"
659 config TARGET_BCM23550_W1D
660 bool "Support bcm23550_w1d"
665 config TARGET_BCM28155_AP
666 bool "Support bcm28155_ap"
671 config TARGET_BCMCYGNUS
672 bool "Support bcmcygnus"
675 imply BCM_SF2_ETH_GMAC
683 bool "Support bcmnsp"
687 bool "Support Broadcom Northstar2"
690 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
691 ARMv8 Cortex-A57 processors targeting a broad range of networking
695 bool "Samsung EXYNOS"
704 imply SYS_THUMB_BUILD
709 bool "Samsung S5PC1XX"
718 bool "Calxeda Highbank"
722 config ARCH_INTEGRATOR
723 bool "ARM Ltd. Integrator family"
734 select SYS_ARCH_TIMER
735 select SYS_THUMB_BUILD
741 bool "Texas Instruments' K3 Architecture"
746 config ARCH_OMAP2PLUS
749 select SPL_BOARD_INIT if SPL
750 select SPL_STACK_R if SPL
756 imply DISTRO_DEFAULTS
758 Support for the Meson SoC family developed by Amlogic Inc.,
759 targeted at media players and tablet computers. We currently
760 support the S905 (GXBaby) 64-bit SoC.
768 select SPL_LIBCOMMON_SUPPORT if SPL
769 select SPL_LIBGENERIC_SUPPORT if SPL
770 select SPL_OF_CONTROL if SPL
773 Support for the MediaTek SoCs family developed by MediaTek Inc.
774 Please refer to doc/README.mediatek for more information.
777 bool "NXP LPC32xx platform"
787 bool "NXP i.MX8 platform"
791 select ENABLE_ARM_SOC_BOOT0_HOOK
794 bool "NXP i.MX8M platform"
801 bool "NXP i.MX23 family"
812 bool "NXP i.MX28 family"
818 bool "NXP i.MX31 family"
824 select ROM_UNIFIED_SECTIONS
826 imply SYS_THUMB_BUILD
830 select ARCH_MISC_INIT
831 select BOARD_EARLY_INIT_F
833 select SYS_FSL_HAS_SEC if IMX_HAB
834 select SYS_FSL_SEC_COMPAT_4
835 select SYS_FSL_SEC_LE
837 imply SYS_THUMB_BUILD
842 select SYS_FSL_HAS_SEC if IMX_HAB
843 select SYS_FSL_SEC_COMPAT_4
844 select SYS_FSL_SEC_LE
846 imply SYS_THUMB_BUILD
850 default "arch/arm/mach-omap2/u-boot-spl.lds"
855 select BOARD_EARLY_INIT_F
860 bool "Actions Semi OWL SoCs"
868 bool "QEMU Virtual Platform"
869 select ARCH_SUPPORT_TFABOOT
879 bool "Renesas ARM SoCs"
880 select BOARD_EARLY_INIT_F if !RZA1
885 imply SYS_THUMB_BUILD
886 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
888 config TARGET_S32V234EVB
889 bool "Support s32v234evb"
891 select SYS_FSL_ERRATUM_ESDHC111
893 config ARCH_SNAPDRAGON
894 bool "Qualcomm Snapdragon SoCs"
907 bool "Altera SOCFPGA family"
908 select ARCH_EARLY_INIT_R
909 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
910 select ARM64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
911 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
914 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
916 select SPL_DM_RESET if DM_RESET
918 select SPL_LIBCOMMON_SUPPORT
919 select SPL_LIBGENERIC_SUPPORT
920 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
921 select SPL_OF_CONTROL
922 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
923 select SPL_SERIAL_SUPPORT
925 select SPL_WATCHDOG_SUPPORT
928 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
930 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
931 select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
940 imply SPL_LIBDISK_SUPPORT
941 imply SPL_MMC_SUPPORT
942 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
943 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
944 imply SPL_SPI_FLASH_SUPPORT
945 imply SPL_SPI_SUPPORT
949 bool "Support sunxi (Allwinner) SoCs"
952 select CMD_MMC if MMC
953 select CMD_USB if DISTRO_DEFAULTS
960 select DM_SCSI if SCSI
962 select DM_USB if DISTRO_DEFAULTS
963 select OF_BOARD_SETUP
966 select SPECIFY_CONSOLE_INDEX
967 select SPL_STACK_R if SPL
968 select SPL_SYS_MALLOC_SIMPLE if SPL
969 select SPL_SYS_THUMB_BUILD if !ARM64
972 select SYS_THUMB_BUILD if !ARM64
973 select USB if DISTRO_DEFAULTS
974 select USB_KEYBOARD if DISTRO_DEFAULTS
975 select USB_STORAGE if DISTRO_DEFAULTS
976 select SPL_USE_TINY_PRINTF
979 imply CMD_UBI if MTD_RAW_NAND
980 imply DISTRO_DEFAULTS
983 imply OF_LIBFDT_OVERLAY
984 imply PRE_CONSOLE_BUFFER
985 imply SPL_GPIO_SUPPORT
986 imply SPL_LIBCOMMON_SUPPORT
987 imply SPL_LIBGENERIC_SUPPORT
988 imply SPL_MMC_SUPPORT if MMC
989 imply SPL_POWER_SUPPORT
990 imply SPL_SERIAL_SUPPORT
994 bool "Support Xilinx Versal Platform"
1002 imply BOARD_LATE_INIT
1005 bool "Freescale Vybrid"
1007 select SYS_FSL_ERRATUM_ESDHC111
1012 bool "Xilinx Zynq based platform"
1017 select DM_ETH if NET
1018 select DM_MMC if MMC
1022 select DM_USB if USB
1025 select SPL_BOARD_INIT if SPL
1026 select SPL_CLK if SPL
1027 select SPL_DM if SPL
1028 select SPL_OF_CONTROL if SPL
1029 select SPL_SEPARATE_BSS if SPL
1031 imply ARCH_EARLY_INIT_R
1032 imply BOARD_LATE_INIT
1038 config ARCH_ZYNQMP_R5
1039 bool "Xilinx ZynqMP R5 based platform"
1043 select DM_ETH if NET
1044 select DM_MMC if MMC
1051 bool "Xilinx ZynqMP based platform"
1055 select DM_ETH if NET
1057 select DM_MMC if MMC
1059 select DM_SPI if SPI
1060 select DM_SPI_FLASH if DM_SPI
1061 select DM_USB if USB
1064 select SPL_BOARD_INIT if SPL
1065 select SPL_CLK if SPL
1066 select SPL_DM_MAILBOX if SPL
1067 select SPL_FIRMWARE if SPL
1068 select SPL_SEPARATE_BSS if SPL
1071 imply BOARD_LATE_INIT
1079 imply DISTRO_DEFAULTS
1082 config TARGET_VEXPRESS64_AEMV8A
1083 bool "Support vexpress_aemv8a"
1087 config TARGET_VEXPRESS64_BASE_FVP
1088 bool "Support Versatile Express ARMv8a FVP BASE model"
1093 config TARGET_VEXPRESS64_JUNO
1094 bool "Support Versatile Express Juno Development Platform"
1098 config TARGET_LS2080A_EMU
1099 bool "Support ls2080a_emu"
1101 select ARCH_MISC_INIT
1103 select ARMV8_MULTIENTRY
1104 select FSL_DDR_SYNC_REFRESH
1106 Support for Freescale LS2080A_EMU platform.
1107 The LS2080A Development System (EMULATOR) is a pre-silicon
1108 development platform that supports the QorIQ LS2080A
1109 Layerscape Architecture processor.
1111 config TARGET_LS2080A_SIMU
1112 bool "Support ls2080a_simu"
1114 select ARCH_MISC_INIT
1116 select ARMV8_MULTIENTRY
1117 select BOARD_LATE_INIT
1119 Support for Freescale LS2080A_SIMU platform.
1120 The LS2080A Development System (QDS) is a pre silicon
1121 development platform that supports the QorIQ LS2080A
1122 Layerscape Architecture processor.
1124 config TARGET_LS1088AQDS
1125 bool "Support ls1088aqds"
1127 select ARCH_MISC_INIT
1129 select ARMV8_MULTIENTRY
1130 select ARCH_SUPPORT_TFABOOT
1131 select BOARD_LATE_INIT
1133 select FSL_DDR_INTERACTIVE if !SD_BOOT
1135 Support for NXP LS1088AQDS platform.
1136 The LS1088A Development System (QDS) is a high-performance
1137 development platform that supports the QorIQ LS1088A
1138 Layerscape Architecture processor.
1140 config TARGET_LS2080AQDS
1141 bool "Support ls2080aqds"
1143 select ARCH_MISC_INIT
1145 select ARMV8_MULTIENTRY
1146 select ARCH_SUPPORT_TFABOOT
1147 select BOARD_LATE_INIT
1152 select FSL_DDR_INTERACTIVE if !SPL
1154 Support for Freescale LS2080AQDS platform.
1155 The LS2080A Development System (QDS) is a high-performance
1156 development platform that supports the QorIQ LS2080A
1157 Layerscape Architecture processor.
1159 config TARGET_LS2080ARDB
1160 bool "Support ls2080ardb"
1162 select ARCH_MISC_INIT
1164 select ARMV8_MULTIENTRY
1165 select ARCH_SUPPORT_TFABOOT
1166 select BOARD_LATE_INIT
1169 select FSL_DDR_INTERACTIVE if !SPL
1173 Support for Freescale LS2080ARDB platform.
1174 The LS2080A Reference design board (RDB) is a high-performance
1175 development platform that supports the QorIQ LS2080A
1176 Layerscape Architecture processor.
1178 config TARGET_LS2081ARDB
1179 bool "Support ls2081ardb"
1181 select ARCH_MISC_INIT
1183 select ARMV8_MULTIENTRY
1184 select BOARD_LATE_INIT
1187 Support for Freescale LS2081ARDB platform.
1188 The LS2081A Reference design board (RDB) is a high-performance
1189 development platform that supports the QorIQ LS2081A/LS2041A
1190 Layerscape Architecture processor.
1192 config TARGET_LX2160ARDB
1193 bool "Support lx2160ardb"
1195 select ARCH_MISC_INIT
1197 select ARMV8_MULTIENTRY
1198 select ARCH_SUPPORT_TFABOOT
1199 select BOARD_LATE_INIT
1201 Support for NXP LX2160ARDB platform.
1202 The lx2160ardb (LX2160A Reference design board (RDB)
1203 is a high-performance development platform that supports the
1204 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1206 config TARGET_LX2160AQDS
1207 bool "Support lx2160aqds"
1209 select ARCH_MISC_INIT
1211 select ARMV8_MULTIENTRY
1212 select ARCH_SUPPORT_TFABOOT
1213 select BOARD_LATE_INIT
1215 Support for NXP LX2160AQDS platform.
1216 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1217 is a high-performance development platform that supports the
1218 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1221 bool "Support HiKey 96boards Consumer Edition Platform"
1228 select SPECIFY_CONSOLE_INDEX
1231 Support for HiKey 96boards platform. It features a HI6220
1232 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1234 config TARGET_HIKEY960
1235 bool "Support HiKey960 96boards Consumer Edition Platform"
1243 Support for HiKey960 96boards platform. It features a HI3660
1244 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1246 config TARGET_POPLAR
1247 bool "Support Poplar 96boards Enterprise Edition Platform"
1256 Support for Poplar 96boards EE platform. It features a HI3798cv200
1257 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1258 making it capable of running any commercial set-top solution based on
1261 config TARGET_LS1012AQDS
1262 bool "Support ls1012aqds"
1265 select ARCH_SUPPORT_TFABOOT
1266 select BOARD_LATE_INIT
1268 Support for Freescale LS1012AQDS platform.
1269 The LS1012A Development System (QDS) is a high-performance
1270 development platform that supports the QorIQ LS1012A
1271 Layerscape Architecture processor.
1273 config TARGET_LS1012ARDB
1274 bool "Support ls1012ardb"
1277 select ARCH_SUPPORT_TFABOOT
1278 select BOARD_LATE_INIT
1282 Support for Freescale LS1012ARDB platform.
1283 The LS1012A Reference design board (RDB) is a high-performance
1284 development platform that supports the QorIQ LS1012A
1285 Layerscape Architecture processor.
1287 config TARGET_LS1012A2G5RDB
1288 bool "Support ls1012a2g5rdb"
1291 select ARCH_SUPPORT_TFABOOT
1292 select BOARD_LATE_INIT
1295 Support for Freescale LS1012A2G5RDB platform.
1296 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1297 development platform that supports the QorIQ LS1012A
1298 Layerscape Architecture processor.
1300 config TARGET_LS1012AFRWY
1301 bool "Support ls1012afrwy"
1304 select ARCH_SUPPORT_TFABOOT
1305 select BOARD_LATE_INIT
1309 Support for Freescale LS1012AFRWY platform.
1310 The LS1012A FRWY board (FRWY) is a high-performance
1311 development platform that supports the QorIQ LS1012A
1312 Layerscape Architecture processor.
1314 config TARGET_LS1012AFRDM
1315 bool "Support ls1012afrdm"
1318 select ARCH_SUPPORT_TFABOOT
1320 Support for Freescale LS1012AFRDM platform.
1321 The LS1012A Freedom board (FRDM) is a high-performance
1322 development platform that supports the QorIQ LS1012A
1323 Layerscape Architecture processor.
1325 config TARGET_LS1028AQDS
1326 bool "Support ls1028aqds"
1329 select ARMV8_MULTIENTRY
1330 select ARCH_SUPPORT_TFABOOT
1331 select BOARD_LATE_INIT
1332 select ARCH_MISC_INIT
1334 Support for Freescale LS1028AQDS platform
1335 The LS1028A Development System (QDS) is a high-performance
1336 development platform that supports the QorIQ LS1028A
1337 Layerscape Architecture processor.
1339 config TARGET_LS1028ARDB
1340 bool "Support ls1028ardb"
1343 select ARMV8_MULTIENTRY
1344 select ARCH_SUPPORT_TFABOOT
1346 Support for Freescale LS1028ARDB platform
1347 The LS1028A Development System (RDB) is a high-performance
1348 development platform that supports the QorIQ LS1028A
1349 Layerscape Architecture processor.
1351 config TARGET_LS1088ARDB
1352 bool "Support ls1088ardb"
1354 select ARCH_MISC_INIT
1356 select ARMV8_MULTIENTRY
1357 select ARCH_SUPPORT_TFABOOT
1358 select BOARD_LATE_INIT
1360 select FSL_DDR_INTERACTIVE if !SD_BOOT
1362 Support for NXP LS1088ARDB platform.
1363 The LS1088A Reference design board (RDB) is a high-performance
1364 development platform that supports the QorIQ LS1088A
1365 Layerscape Architecture processor.
1367 config TARGET_LS1021AQDS
1368 bool "Support ls1021aqds"
1370 select ARCH_SUPPORT_PSCI
1371 select BOARD_EARLY_INIT_F
1372 select BOARD_LATE_INIT
1374 select CPU_V7_HAS_NONSEC
1375 select CPU_V7_HAS_VIRT
1376 select LS1_DEEP_SLEEP
1379 select FSL_DDR_INTERACTIVE
1382 config TARGET_LS1021ATWR
1383 bool "Support ls1021atwr"
1385 select ARCH_SUPPORT_PSCI
1386 select BOARD_EARLY_INIT_F
1387 select BOARD_LATE_INIT
1389 select CPU_V7_HAS_NONSEC
1390 select CPU_V7_HAS_VIRT
1391 select LS1_DEEP_SLEEP
1395 config TARGET_LS1021ATSN
1396 bool "Support ls1021atsn"
1398 select ARCH_SUPPORT_PSCI
1399 select BOARD_EARLY_INIT_F
1400 select BOARD_LATE_INIT
1402 select CPU_V7_HAS_NONSEC
1403 select CPU_V7_HAS_VIRT
1404 select LS1_DEEP_SLEEP
1408 config TARGET_LS1021AIOT
1409 bool "Support ls1021aiot"
1411 select ARCH_SUPPORT_PSCI
1412 select BOARD_LATE_INIT
1414 select CPU_V7_HAS_NONSEC
1415 select CPU_V7_HAS_VIRT
1419 Support for Freescale LS1021AIOT platform.
1420 The LS1021A Freescale board (IOT) is a high-performance
1421 development platform that supports the QorIQ LS1021A
1422 Layerscape Architecture processor.
1424 config TARGET_LS1043AQDS
1425 bool "Support ls1043aqds"
1428 select ARMV8_MULTIENTRY
1429 select ARCH_SUPPORT_TFABOOT
1430 select BOARD_EARLY_INIT_F
1431 select BOARD_LATE_INIT
1433 select FSL_DDR_INTERACTIVE if !SPL
1437 Support for Freescale LS1043AQDS platform.
1439 config TARGET_LS1043ARDB
1440 bool "Support ls1043ardb"
1443 select ARMV8_MULTIENTRY
1444 select ARCH_SUPPORT_TFABOOT
1445 select BOARD_EARLY_INIT_F
1446 select BOARD_LATE_INIT
1449 Support for Freescale LS1043ARDB platform.
1451 config TARGET_LS1046AQDS
1452 bool "Support ls1046aqds"
1455 select ARMV8_MULTIENTRY
1456 select ARCH_SUPPORT_TFABOOT
1457 select BOARD_EARLY_INIT_F
1458 select BOARD_LATE_INIT
1459 select DM_SPI_FLASH if DM_SPI
1461 select FSL_DDR_BIST if !SPL
1462 select FSL_DDR_INTERACTIVE if !SPL
1463 select FSL_DDR_INTERACTIVE if !SPL
1466 Support for Freescale LS1046AQDS platform.
1467 The LS1046A Development System (QDS) is a high-performance
1468 development platform that supports the QorIQ LS1046A
1469 Layerscape Architecture processor.
1471 config TARGET_LS1046ARDB
1472 bool "Support ls1046ardb"
1475 select ARMV8_MULTIENTRY
1476 select ARCH_SUPPORT_TFABOOT
1477 select BOARD_EARLY_INIT_F
1478 select BOARD_LATE_INIT
1479 select DM_SPI_FLASH if DM_SPI
1480 select POWER_MC34VR500
1483 select FSL_DDR_INTERACTIVE if !SPL
1486 Support for Freescale LS1046ARDB platform.
1487 The LS1046A Reference Design Board (RDB) is a high-performance
1488 development platform that supports the QorIQ LS1046A
1489 Layerscape Architecture processor.
1491 config TARGET_LS1046AFRWY
1492 bool "Support ls1046afrwy"
1495 select ARMV8_MULTIENTRY
1496 select ARCH_SUPPORT_TFABOOT
1497 select BOARD_EARLY_INIT_F
1498 select BOARD_LATE_INIT
1499 select DM_SPI_FLASH if DM_SPI
1502 Support for Freescale LS1046AFRWY platform.
1503 The LS1046A Freeway Board (FRWY) is a high-performance
1504 development platform that supports the QorIQ LS1046A
1505 Layerscape Architecture processor.
1507 config TARGET_COLIBRI_PXA270
1508 bool "Support colibri_pxa270"
1511 config ARCH_UNIPHIER
1512 bool "Socionext UniPhier SoCs"
1513 select BOARD_LATE_INIT
1521 select OF_BOARD_SETUP
1525 select SPL_BOARD_INIT if SPL
1526 select SPL_DM if SPL
1527 select SPL_LIBCOMMON_SUPPORT if SPL
1528 select SPL_LIBGENERIC_SUPPORT if SPL
1529 select SPL_OF_CONTROL if SPL
1530 select SPL_PINCTRL if SPL
1533 imply DISTRO_DEFAULTS
1536 Support for UniPhier SoC family developed by Socionext Inc.
1537 (formerly, System LSI Business Division of Panasonic Corporation)
1540 bool "Support STMicroelectronics STM32 MCU with cortex M"
1547 bool "Support STMicrolectronics SoCs"
1556 Support for STMicroelectronics STiH407/10 SoC family.
1557 This SoC is used on Linaro 96Board STiH410-B2260
1560 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1561 select ARCH_MISC_INIT
1562 select BOARD_LATE_INIT
1571 select OF_SYSTEM_SETUP
1577 select SYS_THUMB_BUILD
1581 imply OF_LIBFDT_OVERLAY
1582 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1585 Support for STM32MP SoC family developed by STMicroelectronics,
1586 MPUs based on ARM cortex A core
1587 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1588 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1590 SPL is the unsecure FSBL for the basic boot chain.
1592 config ARCH_ROCKCHIP
1593 bool "Support Rockchip SoCs"
1604 select DM_USB if USB
1605 select ENABLE_ARM_SOC_BOOT0_HOOK
1608 select SPL_DM if SPL
1610 select SYS_THUMB_BUILD if !ARM64
1613 imply DEBUG_UART_BOARD_INIT
1614 imply DISTRO_DEFAULTS
1616 imply SARADC_ROCKCHIP
1618 imply SPL_SYS_MALLOC_SIMPLE
1621 imply USB_FUNCTION_FASTBOOT
1623 config TARGET_THUNDERX_88XX
1624 bool "Support ThunderX 88xx"
1628 select SYS_CACHE_SHIFT_7
1631 bool "Support Aspeed SoCs"
1636 config TARGET_DURIAN
1637 bool "Support Phytium Durian Platform"
1640 Support for durian platform.
1641 It has 2GB Sdram, uart and pcie.
1645 config ARCH_SUPPORT_TFABOOT
1649 bool "Support for booting from TF-A"
1650 depends on ARCH_SUPPORT_TFABOOT
1653 Enabling this will make a U-Boot binary that is capable of being
1654 booted via TF-A (Trusted Firmware for Cortex-A).
1656 config TI_SECURE_DEVICE
1657 bool "HS Device Type Support"
1658 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1660 If a high secure (HS) device type is being used, this config
1661 must be set. This option impacts various aspects of the
1662 build system (to create signed boot images that can be
1663 authenticated) and the code. See the doc/README.ti-secure
1664 file for further details.
1666 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1667 config ISW_ENTRY_ADDR
1668 hex "Address in memory or XIP address of bootloader entry point"
1669 default 0x402F4000 if AM43XX
1670 default 0x402F0400 if AM33XX
1671 default 0x40301350 if OMAP54XX
1673 After any reset, the boot ROM searches the boot media for a valid
1674 boot image. For non-XIP devices, the ROM then copies the image into
1675 internal memory. For all boot modes, after the ROM processes the
1676 boot image it eventually computes the entry point address depending
1677 on the device type (secure/non-secure), boot media (xip/non-xip) and
1681 source "arch/arm/mach-aspeed/Kconfig"
1683 source "arch/arm/mach-at91/Kconfig"
1685 source "arch/arm/mach-bcm283x/Kconfig"
1687 source "arch/arm/mach-bcmstb/Kconfig"
1689 source "arch/arm/mach-davinci/Kconfig"
1691 source "arch/arm/mach-exynos/Kconfig"
1693 source "arch/arm/mach-highbank/Kconfig"
1695 source "arch/arm/mach-integrator/Kconfig"
1697 source "arch/arm/mach-k3/Kconfig"
1699 source "arch/arm/mach-keystone/Kconfig"
1701 source "arch/arm/mach-kirkwood/Kconfig"
1703 source "arch/arm/cpu/arm926ejs/lpc32xx/Kconfig"
1705 source "arch/arm/mach-mvebu/Kconfig"
1707 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1709 source "arch/arm/mach-imx/mx2/Kconfig"
1711 source "arch/arm/mach-imx/mx3/Kconfig"
1713 source "arch/arm/mach-imx/mx5/Kconfig"
1715 source "arch/arm/mach-imx/mx6/Kconfig"
1717 source "arch/arm/mach-imx/mx7/Kconfig"
1719 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1721 source "arch/arm/mach-imx/imx8/Kconfig"
1723 source "arch/arm/mach-imx/imx8m/Kconfig"
1725 source "arch/arm/mach-imx/mxs/Kconfig"
1727 source "arch/arm/mach-omap2/Kconfig"
1729 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1731 source "arch/arm/mach-orion5x/Kconfig"
1733 source "arch/arm/mach-owl/Kconfig"
1735 source "arch/arm/mach-rmobile/Kconfig"
1737 source "arch/arm/mach-meson/Kconfig"
1739 source "arch/arm/mach-mediatek/Kconfig"
1741 source "arch/arm/mach-qemu/Kconfig"
1743 source "arch/arm/mach-rockchip/Kconfig"
1745 source "arch/arm/mach-s5pc1xx/Kconfig"
1747 source "arch/arm/mach-snapdragon/Kconfig"
1749 source "arch/arm/mach-socfpga/Kconfig"
1751 source "arch/arm/mach-sti/Kconfig"
1753 source "arch/arm/mach-stm32/Kconfig"
1755 source "arch/arm/mach-stm32mp/Kconfig"
1757 source "arch/arm/mach-sunxi/Kconfig"
1759 source "arch/arm/mach-tegra/Kconfig"
1761 source "arch/arm/mach-uniphier/Kconfig"
1763 source "arch/arm/cpu/armv7/vf610/Kconfig"
1765 source "arch/arm/mach-zynq/Kconfig"
1767 source "arch/arm/mach-zynqmp/Kconfig"
1769 source "arch/arm/mach-versal/Kconfig"
1771 source "arch/arm/mach-zynqmp-r5/Kconfig"
1773 source "arch/arm/cpu/armv7/Kconfig"
1775 source "arch/arm/cpu/armv8/Kconfig"
1777 source "arch/arm/mach-imx/Kconfig"
1779 source "board/bosch/shc/Kconfig"
1780 source "board/bosch/guardian/Kconfig"
1781 source "board/CarMediaLab/flea3/Kconfig"
1782 source "board/Marvell/aspenite/Kconfig"
1783 source "board/Marvell/gplugd/Kconfig"
1784 source "board/armadeus/apf27/Kconfig"
1785 source "board/armltd/vexpress/Kconfig"
1786 source "board/armltd/vexpress64/Kconfig"
1787 source "board/broadcom/bcm23550_w1d/Kconfig"
1788 source "board/broadcom/bcm28155_ap/Kconfig"
1789 source "board/broadcom/bcm963158/Kconfig"
1790 source "board/broadcom/bcm968580xref/Kconfig"
1791 source "board/broadcom/bcmcygnus/Kconfig"
1792 source "board/broadcom/bcmnsp/Kconfig"
1793 source "board/broadcom/bcmns2/Kconfig"
1794 source "board/cavium/thunderx/Kconfig"
1795 source "board/cirrus/edb93xx/Kconfig"
1796 source "board/eets/pdu001/Kconfig"
1797 source "board/emulation/qemu-arm/Kconfig"
1798 source "board/freescale/ls2080a/Kconfig"
1799 source "board/freescale/ls2080aqds/Kconfig"
1800 source "board/freescale/ls2080ardb/Kconfig"
1801 source "board/freescale/ls1088a/Kconfig"
1802 source "board/freescale/ls1028a/Kconfig"
1803 source "board/freescale/ls1021aqds/Kconfig"
1804 source "board/freescale/ls1043aqds/Kconfig"
1805 source "board/freescale/ls1021atwr/Kconfig"
1806 source "board/freescale/ls1021atsn/Kconfig"
1807 source "board/freescale/ls1021aiot/Kconfig"
1808 source "board/freescale/ls1046aqds/Kconfig"
1809 source "board/freescale/ls1043ardb/Kconfig"
1810 source "board/freescale/ls1046ardb/Kconfig"
1811 source "board/freescale/ls1046afrwy/Kconfig"
1812 source "board/freescale/ls1012aqds/Kconfig"
1813 source "board/freescale/ls1012ardb/Kconfig"
1814 source "board/freescale/ls1012afrdm/Kconfig"
1815 source "board/freescale/lx2160a/Kconfig"
1816 source "board/freescale/mx35pdk/Kconfig"
1817 source "board/freescale/s32v234evb/Kconfig"
1818 source "board/grinn/chiliboard/Kconfig"
1819 source "board/gumstix/pepper/Kconfig"
1820 source "board/hisilicon/hikey/Kconfig"
1821 source "board/hisilicon/hikey960/Kconfig"
1822 source "board/hisilicon/poplar/Kconfig"
1823 source "board/isee/igep003x/Kconfig"
1824 source "board/phytec/pcm051/Kconfig"
1825 source "board/silica/pengwyn/Kconfig"
1826 source "board/spear/spear300/Kconfig"
1827 source "board/spear/spear310/Kconfig"
1828 source "board/spear/spear320/Kconfig"
1829 source "board/spear/spear600/Kconfig"
1830 source "board/spear/x600/Kconfig"
1831 source "board/st/stv0991/Kconfig"
1832 source "board/tcl/sl50/Kconfig"
1833 source "board/ucRobotics/bubblegum_96/Kconfig"
1834 source "board/birdland/bav335x/Kconfig"
1835 source "board/toradex/colibri_pxa270/Kconfig"
1836 source "board/variscite/dart_6ul/Kconfig"
1837 source "board/vscom/baltos/Kconfig"
1838 source "board/woodburn/Kconfig"
1839 source "board/xilinx/Kconfig"
1840 source "board/xilinx/zynq/Kconfig"
1841 source "board/xilinx/zynqmp/Kconfig"
1842 source "board/phytium/durian/Kconfig"
1844 source "arch/arm/Kconfig.debug"
1849 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
1850 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
1851 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64