1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed
19 from almost any address. This logic relies on the relocation
20 information that is embedded into the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
26 U-Boot typically uses a hard-coded value for the stack pointer
27 before relocation. Enable this option to instead calculate the
28 initial SP at run-time. This is useful to avoid hard-coding addresses
29 into U-Boot, so that can be loaded and executed at arbitrary
30 addresses and thus avoid using arbitrary addresses at runtime.
32 If this option is enabled, the early stack pointer is set to
33 &_bss_start with a offset value added. The offset is specified by
34 SYS_INIT_SP_BSS_OFFSET.
36 config SYS_INIT_SP_BSS_OFFSET
37 int "Early stack offset from the .bss base address"
38 depends on INIT_SP_RELATIVE
41 This option's value is the offset added to &_bss_start in order to
42 calculate the stack pointer. This offset should be large enough so
43 that the early malloc region, global data (gd), and early stack usage
44 do not overlap any appended DTB.
46 config LINUX_KERNEL_IMAGE_HEADER
49 Place a Linux kernel image header at the start of the U-Boot binary.
50 The format of the header is described in the Linux kernel source at
51 Documentation/arm64/booting.txt. This feature is useful since the
52 image header reports the amount of memory (BSS and similar) that
53 U-Boot needs to use, but which isn't part of the binary.
55 if LINUX_KERNEL_IMAGE_HEADER
56 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
59 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
60 TEXT_OFFSET value written in to the Linux kernel image header.
66 default y if ARM64 && !POSITION_INDEPENDENT
68 config DMA_ADDR_T_64BIT
78 # Used for compatibility with asm files copied from the kernel
79 config ARM_ASM_UNIFIED
83 # Used for compatibility with asm files copied from the kernel
88 bool "Do not enable icache"
91 Do not enable instruction cache in U-Boot.
93 config SPL_SYS_ICACHE_OFF
94 bool "Do not enable icache in SPL"
96 default SYS_ICACHE_OFF
98 Do not enable instruction cache in SPL.
100 config SYS_DCACHE_OFF
101 bool "Do not enable dcache"
104 Do not enable data cache in U-Boot.
106 config SPL_SYS_DCACHE_OFF
107 bool "Do not enable dcache in SPL"
109 default SYS_DCACHE_OFF
111 Do not enable data cache in SPL.
113 config SYS_ARM_CACHE_CP15
114 bool "CP15 based cache enabling support"
116 Select this if your processor suports enabling caches by using
120 bool "MMU-based Paged Memory Management Support"
121 select SYS_ARM_CACHE_CP15
123 Select if you want MMU-based virtualised addressing space
124 support by paged memory management.
127 bool 'Use the ARM v7 PMSA Compliant MPU'
129 Some ARM systems without an MMU have instead a Memory Protection
130 Unit (MPU) that defines the type and permissions for regions of
132 If your CPU has an MPU then you should choose 'y' here unless you
133 know that you do not want to use the MPU.
135 # If set, the workarounds for these ARM errata are applied early during U-Boot
136 # startup. Note that in general these options force the workarounds to be
137 # applied; no CPU-type/version detection exists, unlike the similar options in
138 # the Linux kernel. Do not set these options unless they apply! Also note that
139 # the following can be machine specific errata. These do have ability to
140 # provide rudimentary version and machine specific checks, but expect no
142 # CONFIG_ARM_ERRATA_430973
143 # CONFIG_ARM_ERRATA_454179
144 # CONFIG_ARM_ERRATA_621766
145 # CONFIG_ARM_ERRATA_798870
146 # CONFIG_ARM_ERRATA_801819
147 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
148 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
150 config ARM_ERRATA_430973
153 config ARM_ERRATA_454179
156 config ARM_ERRATA_621766
159 config ARM_ERRATA_716044
162 config ARM_ERRATA_725233
165 config ARM_ERRATA_742230
168 config ARM_ERRATA_743622
171 config ARM_ERRATA_751472
174 config ARM_ERRATA_761320
177 config ARM_ERRATA_773022
180 config ARM_ERRATA_774769
183 config ARM_ERRATA_794072
186 config ARM_ERRATA_798870
189 config ARM_ERRATA_801819
192 config ARM_ERRATA_826974
195 config ARM_ERRATA_828024
198 config ARM_ERRATA_829520
201 config ARM_ERRATA_833069
204 config ARM_ERRATA_833471
207 config ARM_ERRATA_845369
210 config ARM_ERRATA_852421
213 config ARM_ERRATA_852423
216 config ARM_ERRATA_855873
219 config ARM_CORTEX_A8_CVE_2017_5715
222 config ARM_CORTEX_A15_CVE_2017_5715
227 select SYS_CACHE_SHIFT_5
232 select SYS_CACHE_SHIFT_5
237 select SYS_CACHE_SHIFT_5
242 select SYS_CACHE_SHIFT_5
247 select SYS_CACHE_SHIFT_5
253 select SYS_CACHE_SHIFT_5
260 select SYS_CACHE_SHIFT_6
267 select SYS_CACHE_SHIFT_5
268 select SYS_THUMB_BUILD
274 select SYS_ARM_CACHE_CP15
276 select SYS_CACHE_SHIFT_6
280 select SYS_CACHE_SHIFT_5
285 select SYS_CACHE_SHIFT_5
289 default "arm720t" if CPU_ARM720T
290 default "arm920t" if CPU_ARM920T
291 default "arm926ejs" if CPU_ARM926EJS
292 default "arm946es" if CPU_ARM946ES
293 default "arm1136" if CPU_ARM1136
294 default "arm1176" if CPU_ARM1176
295 default "armv7" if CPU_V7A
296 default "armv7" if CPU_V7R
297 default "armv7m" if CPU_V7M
298 default "pxa" if CPU_PXA
299 default "sa1100" if CPU_SA1100
300 default "armv8" if ARM64
304 default 4 if CPU_ARM720T
305 default 4 if CPU_ARM920T
306 default 5 if CPU_ARM926EJS
307 default 5 if CPU_ARM946ES
308 default 6 if CPU_ARM1136
309 default 6 if CPU_ARM1176
314 default 4 if CPU_SA1100
317 config SYS_CACHE_SHIFT_5
320 config SYS_CACHE_SHIFT_6
323 config SYS_CACHE_SHIFT_7
326 config SYS_CACHELINE_SIZE
328 default 128 if SYS_CACHE_SHIFT_7
329 default 64 if SYS_CACHE_SHIFT_6
330 default 32 if SYS_CACHE_SHIFT_5
333 bool "Enable ARCH_CPU_INIT"
335 Some architectures require a call to arch_cpu_init()
336 Say Y here to enable it
338 config SYS_ARCH_TIMER
339 bool "ARM Generic Timer support"
340 depends on CPU_V7A || ARM64
343 The ARM Generic Timer (aka arch-timer) provides an architected
344 interface to a timer source on an SoC.
345 It is mandantory for ARMv8 implementation and widely available
349 bool "Support for ARM SMC Calling Convention (SMCCC)"
350 depends on CPU_V7A || ARM64
353 Say Y here if you want to enable ARM SMC Calling Convention.
354 This should be enabled if U-Boot needs to communicate with system
355 firmware (for example, PSCI) according to SMCCC.
358 bool "support boot from semihosting"
360 In emulated environments, semihosting is a way for
361 the hosted environment to call out to the emulator to
362 retrieve files from the host machine.
364 config SYS_THUMB_BUILD
365 bool "Build U-Boot using the Thumb instruction set"
368 Use this flag to build U-Boot using the Thumb instruction set for
369 ARM architectures. Thumb instruction set provides better code
370 density. For ARM architectures that support Thumb2 this flag will
371 result in Thumb2 code generated by GCC.
373 config SPL_SYS_THUMB_BUILD
374 bool "Build SPL using the Thumb instruction set"
375 default y if SYS_THUMB_BUILD
376 depends on !ARM64 && SPL
378 Use this flag to build SPL using the Thumb instruction set for
379 ARM architectures. Thumb instruction set provides better code
380 density. For ARM architectures that support Thumb2 this flag will
381 result in Thumb2 code generated by GCC.
383 config TPL_SYS_THUMB_BUILD
384 bool "Build TPL using the Thumb instruction set"
385 default y if SYS_THUMB_BUILD
386 depends on TPL && !ARM64
388 Use this flag to build SPL using the Thumb instruction set for
389 ARM architectures. Thumb instruction set provides better code
390 density. For ARM architectures that support Thumb2 this flag will
391 result in Thumb2 code generated by GCC.
394 config SYS_L2CACHE_OFF
397 If SoC does not support L2CACHE or one do not want to enable
398 L2CACHE, choose this option.
400 config ENABLE_ARM_SOC_BOOT0_HOOK
401 bool "prepare BOOT0 header"
403 If the SoC's BOOT0 requires a header area filled with (magic)
404 values, then choose this option, and create a file included as
405 <asm/arch/boot0.h> which contains the required assembler code.
407 config ARM_CORTEX_CPU_IS_UP
411 config USE_ARCH_MEMCPY
412 bool "Use an assembly optimized implementation of memcpy"
416 Enable the generation of an optimized version of memcpy.
417 Such implementation may be faster under some conditions
418 but may increase the binary size.
420 config SPL_USE_ARCH_MEMCPY
421 bool "Use an assembly optimized implementation of memcpy for SPL"
422 default y if USE_ARCH_MEMCPY
423 depends on !ARM64 && SPL
425 Enable the generation of an optimized version of memcpy.
426 Such implementation may be faster under some conditions
427 but may increase the binary size.
429 config TPL_USE_ARCH_MEMCPY
430 bool "Use an assembly optimized implementation of memcpy for TPL"
431 default y if USE_ARCH_MEMCPY
432 depends on !ARM64 && TPL
434 Enable the generation of an optimized version of memcpy.
435 Such implementation may be faster under some conditions
436 but may increase the binary size.
438 config USE_ARCH_MEMSET
439 bool "Use an assembly optimized implementation of memset"
443 Enable the generation of an optimized version of memset.
444 Such implementation may be faster under some conditions
445 but may increase the binary size.
447 config SPL_USE_ARCH_MEMSET
448 bool "Use an assembly optimized implementation of memset for SPL"
449 default y if USE_ARCH_MEMSET
450 depends on !ARM64 && SPL
452 Enable the generation of an optimized version of memset.
453 Such implementation may be faster under some conditions
454 but may increase the binary size.
456 config TPL_USE_ARCH_MEMSET
457 bool "Use an assembly optimized implementation of memset for TPL"
458 default y if USE_ARCH_MEMSET
459 depends on !ARM64 && TPL
461 Enable the generation of an optimized version of memset.
462 Such implementation may be faster under some conditions
463 but may increase the binary size.
465 config ARM64_SUPPORT_AARCH32
466 bool "ARM64 system support AArch32 execution state"
468 default y if !TARGET_THUNDERX_88XX
470 This ARM64 system supports AArch32 execution state.
473 prompt "Target select"
478 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
480 config TARGET_EDB93XX
481 bool "Support edb93xx"
485 config TARGET_ASPENITE
486 bool "Support aspenite"
490 bool "Support gplugd"
498 Support for TI's DaVinci platform.
501 bool "Marvell Kirkwood"
502 select ARCH_MISC_INIT
503 select BOARD_EARLY_INIT_F
507 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
527 config TARGET_SPEAR300
528 bool "Support spear300"
529 select BOARD_EARLY_INIT_F
534 config TARGET_SPEAR310
535 bool "Support spear310"
536 select BOARD_EARLY_INIT_F
541 config TARGET_SPEAR320
542 bool "Support spear320"
543 select BOARD_EARLY_INIT_F
548 config TARGET_SPEAR600
549 bool "Support spear600"
550 select BOARD_EARLY_INIT_F
555 config TARGET_STV0991
556 bool "Support stv0991"
569 select BOARD_LATE_INIT
574 config TARGET_WOODBURN
575 bool "Support woodburn"
578 config TARGET_WOODBURN_SD
579 bool "Support woodburn_sd"
587 config TARGET_MX35PDK
588 bool "Support mx35pdk"
589 select BOARD_LATE_INIT
593 bool "Broadcom BCM283X family"
599 select SERIAL_SEARCH_ALL
604 bool "Broadcom BCM63158 family"
610 bool "Broadcom BCM6858 family"
615 config TARGET_VEXPRESS_CA15_TC2
616 bool "Support vexpress_ca15_tc2"
618 select CPU_V7_HAS_NONSEC
619 select CPU_V7_HAS_VIRT
623 bool "Broadcom BCM7XXX family"
627 select OF_PRIOR_STAGE
630 This enables support for Broadcom ARM-based set-top box
631 chipsets, including the 7445 family of chips.
633 config TARGET_VEXPRESS_CA5X2
634 bool "Support vexpress_ca5x2"
638 config TARGET_VEXPRESS_CA9X4
639 bool "Support vexpress_ca9x4"
643 config TARGET_BCM23550_W1D
644 bool "Support bcm23550_w1d"
649 config TARGET_BCM28155_AP
650 bool "Support bcm28155_ap"
655 config TARGET_BCMCYGNUS
656 bool "Support bcmcygnus"
659 imply BCM_SF2_ETH_GMAC
667 bool "Support bcmnsp"
671 bool "Support Broadcom Northstar2"
674 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
675 ARMv8 Cortex-A57 processors targeting a broad range of networking
679 bool "Samsung EXYNOS"
688 imply SYS_THUMB_BUILD
693 bool "Samsung S5PC1XX"
702 bool "Calxeda Highbank"
706 config ARCH_INTEGRATOR
707 bool "ARM Ltd. Integrator family"
718 select SYS_ARCH_TIMER
719 select SYS_THUMB_BUILD
725 bool "Texas Instruments' K3 Architecture"
730 config ARCH_OMAP2PLUS
733 select SPL_BOARD_INIT if SPL
734 select SPL_STACK_R if SPL
740 imply DISTRO_DEFAULTS
742 Support for the Meson SoC family developed by Amlogic Inc.,
743 targeted at media players and tablet computers. We currently
744 support the S905 (GXBaby) 64-bit SoC.
752 select SPL_LIBCOMMON_SUPPORT if SPL
753 select SPL_LIBGENERIC_SUPPORT if SPL
754 select SPL_OF_CONTROL if SPL
757 Support for the MediaTek SoCs family developed by MediaTek Inc.
758 Please refer to doc/README.mediatek for more information.
761 bool "NXP LPC32xx platform"
771 bool "NXP i.MX8 platform"
777 bool "NXP i.MX8M platform"
784 bool "NXP i.MX23 family"
795 bool "NXP i.MX28 family"
801 bool "NXP i.MX31 family"
807 select ROM_UNIFIED_SECTIONS
812 select ARCH_MISC_INIT
813 select BOARD_EARLY_INIT_F
815 select SYS_FSL_HAS_SEC if SECURE_BOOT
816 select SYS_FSL_SEC_COMPAT_4
817 select SYS_FSL_SEC_LE
823 select SYS_FSL_HAS_SEC if SECURE_BOOT
824 select SYS_FSL_SEC_COMPAT_4
825 select SYS_FSL_SEC_LE
826 select SYS_THUMB_BUILD if SPL
831 default "arch/arm/mach-omap2/u-boot-spl.lds"
836 select BOARD_EARLY_INIT_F
841 bool "Actions Semi OWL SoCs"
849 bool "QEMU Virtual Platform"
850 select ARCH_SUPPORT_TFABOOT
860 bool "Renesas ARM SoCs"
861 select BOARD_EARLY_INIT_F if !RZA1
866 imply SYS_THUMB_BUILD
867 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
869 config TARGET_S32V234EVB
870 bool "Support s32v234evb"
872 select SYS_FSL_ERRATUM_ESDHC111
874 config ARCH_SNAPDRAGON
875 bool "Qualcomm Snapdragon SoCs"
888 bool "Altera SOCFPGA family"
889 select ARCH_EARLY_INIT_R
890 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
891 select ARM64 if TARGET_SOCFPGA_STRATIX10
892 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
895 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
897 select SPL_DM_RESET if DM_RESET
899 select SPL_LIBCOMMON_SUPPORT
900 select SPL_LIBGENERIC_SUPPORT
901 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
902 select SPL_OF_CONTROL
903 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10
904 select SPL_SERIAL_SUPPORT
906 select SPL_WATCHDOG_SUPPORT
909 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
911 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
912 select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
921 imply SPL_LIBDISK_SUPPORT
922 imply SPL_MMC_SUPPORT
923 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
924 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
925 imply SPL_SPI_FLASH_SUPPORT
926 imply SPL_SPI_SUPPORT
930 bool "Support sunxi (Allwinner) SoCs"
933 select CMD_MMC if MMC
934 select CMD_USB if DISTRO_DEFAULTS
941 select DM_SCSI if SCSI
943 select DM_USB if DISTRO_DEFAULTS
944 select OF_BOARD_SETUP
947 select SPECIFY_CONSOLE_INDEX
948 select SPL_STACK_R if SPL
949 select SPL_SYS_MALLOC_SIMPLE if SPL
950 select SPL_SYS_THUMB_BUILD if !ARM64
953 select SYS_THUMB_BUILD if !ARM64
954 select USB if DISTRO_DEFAULTS
955 select USB_KEYBOARD if DISTRO_DEFAULTS
956 select USB_STORAGE if DISTRO_DEFAULTS
957 select USE_TINY_PRINTF
960 imply CMD_UBI if NAND
961 imply DISTRO_DEFAULTS
964 imply OF_LIBFDT_OVERLAY
965 imply PRE_CONSOLE_BUFFER
966 imply SPL_GPIO_SUPPORT
967 imply SPL_LIBCOMMON_SUPPORT
968 imply SPL_LIBGENERIC_SUPPORT
969 imply SPL_MMC_SUPPORT if MMC
970 imply SPL_POWER_SUPPORT
971 imply SPL_SERIAL_SUPPORT
975 bool "Support Xilinx Versal Platform"
983 imply BOARD_LATE_INIT
986 bool "Freescale Vybrid"
988 select SYS_FSL_ERRATUM_ESDHC111
993 bool "Xilinx Zynq based platform"
994 select BOARD_EARLY_INIT_F if WDT
1000 select DM_MMC if MMC
1004 select DM_USB if USB
1007 select SPL_BOARD_INIT if SPL
1008 select SPL_CLK if SPL
1009 select SPL_DM if SPL
1010 select SPL_OF_CONTROL if SPL
1011 select SPL_SEPARATE_BSS if SPL
1013 imply ARCH_EARLY_INIT_R
1014 imply BOARD_LATE_INIT
1020 config ARCH_ZYNQMP_R5
1021 bool "Xilinx ZynqMP R5 based platform"
1025 select DM_ETH if NET
1026 select DM_MMC if MMC
1033 bool "Xilinx ZynqMP based platform"
1037 select DM_ETH if NET
1038 select DM_MMC if MMC
1040 select DM_SPI if SPI
1041 select DM_SPI_FLASH if DM_SPI
1042 select DM_USB if USB
1044 select SPL_BOARD_INIT if SPL
1045 select SPL_CLK if SPL
1046 select SPL_SEPARATE_BSS if SPL
1048 imply BOARD_LATE_INIT
1056 imply DISTRO_DEFAULTS
1059 config TARGET_VEXPRESS64_AEMV8A
1060 bool "Support vexpress_aemv8a"
1064 config TARGET_VEXPRESS64_BASE_FVP
1065 bool "Support Versatile Express ARMv8a FVP BASE model"
1070 config TARGET_VEXPRESS64_JUNO
1071 bool "Support Versatile Express Juno Development Platform"
1075 config TARGET_LS2080A_EMU
1076 bool "Support ls2080a_emu"
1078 select ARCH_MISC_INIT
1080 select ARMV8_MULTIENTRY
1081 select FSL_DDR_SYNC_REFRESH
1083 Support for Freescale LS2080A_EMU platform
1084 The LS2080A Development System (EMULATOR) is a pre silicon
1085 development platform that supports the QorIQ LS2080A
1086 Layerscape Architecture processor.
1088 config TARGET_LS2080A_SIMU
1089 bool "Support ls2080a_simu"
1091 select ARCH_MISC_INIT
1093 select ARMV8_MULTIENTRY
1094 select BOARD_LATE_INIT
1096 Support for Freescale LS2080A_SIMU platform
1097 The LS2080A Development System (QDS) is a pre silicon
1098 development platform that supports the QorIQ LS2080A
1099 Layerscape Architecture processor.
1101 config TARGET_LS1088AQDS
1102 bool "Support ls1088aqds"
1104 select ARCH_MISC_INIT
1106 select ARMV8_MULTIENTRY
1107 select ARCH_SUPPORT_TFABOOT
1108 select BOARD_LATE_INIT
1110 select FSL_DDR_INTERACTIVE if !SD_BOOT
1112 Support for NXP LS1088AQDS platform
1113 The LS1088A Development System (QDS) is a high-performance
1114 development platform that supports the QorIQ LS1088A
1115 Layerscape Architecture processor.
1117 config TARGET_LS2080AQDS
1118 bool "Support ls2080aqds"
1120 select ARCH_MISC_INIT
1122 select ARMV8_MULTIENTRY
1123 select ARCH_SUPPORT_TFABOOT
1124 select BOARD_LATE_INIT
1129 select FSL_DDR_INTERACTIVE if !SPL
1131 Support for Freescale LS2080AQDS platform
1132 The LS2080A Development System (QDS) is a high-performance
1133 development platform that supports the QorIQ LS2080A
1134 Layerscape Architecture processor.
1136 config TARGET_LS2080ARDB
1137 bool "Support ls2080ardb"
1139 select ARCH_MISC_INIT
1141 select ARMV8_MULTIENTRY
1142 select ARCH_SUPPORT_TFABOOT
1143 select BOARD_LATE_INIT
1146 select FSL_DDR_INTERACTIVE if !SPL
1150 Support for Freescale LS2080ARDB platform.
1151 The LS2080A Reference design board (RDB) is a high-performance
1152 development platform that supports the QorIQ LS2080A
1153 Layerscape Architecture processor.
1155 config TARGET_LS2081ARDB
1156 bool "Support ls2081ardb"
1158 select ARCH_MISC_INIT
1160 select ARMV8_MULTIENTRY
1161 select BOARD_LATE_INIT
1164 Support for Freescale LS2081ARDB platform.
1165 The LS2081A Reference design board (RDB) is a high-performance
1166 development platform that supports the QorIQ LS2081A/LS2041A
1167 Layerscape Architecture processor.
1169 config TARGET_LX2160ARDB
1170 bool "Support lx2160ardb"
1172 select ARCH_MISC_INIT
1174 select ARMV8_MULTIENTRY
1175 select ARCH_SUPPORT_TFABOOT
1176 select BOARD_LATE_INIT
1178 Support for NXP LX2160ARDB platform.
1179 The lx2160ardb (LX2160A Reference design board (RDB)
1180 is a high-performance development platform that supports the
1181 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1183 config TARGET_LX2160AQDS
1184 bool "Support lx2160aqds"
1186 select ARCH_MISC_INIT
1188 select ARMV8_MULTIENTRY
1189 select ARCH_SUPPORT_TFABOOT
1190 select BOARD_LATE_INIT
1192 Support for NXP LX2160AQDS platform.
1193 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1194 is a high-performance development platform that supports the
1195 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1198 bool "Support HiKey 96boards Consumer Edition Platform"
1205 select SPECIFY_CONSOLE_INDEX
1208 Support for HiKey 96boards platform. It features a HI6220
1209 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1211 config TARGET_HIKEY960
1212 bool "Support HiKey960 96boards Consumer Edition Platform"
1220 Support for HiKey960 96boards platform. It features a HI3660
1221 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1223 config TARGET_POPLAR
1224 bool "Support Poplar 96boards Enterprise Edition Platform"
1233 Support for Poplar 96boards EE platform. It features a HI3798cv200
1234 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1235 making it capable of running any commercial set-top solution based on
1238 config TARGET_LS1012AQDS
1239 bool "Support ls1012aqds"
1242 select ARCH_SUPPORT_TFABOOT
1243 select BOARD_LATE_INIT
1245 Support for Freescale LS1012AQDS platform.
1246 The LS1012A Development System (QDS) is a high-performance
1247 development platform that supports the QorIQ LS1012A
1248 Layerscape Architecture processor.
1250 config TARGET_LS1012ARDB
1251 bool "Support ls1012ardb"
1254 select ARCH_SUPPORT_TFABOOT
1255 select BOARD_LATE_INIT
1259 Support for Freescale LS1012ARDB platform.
1260 The LS1012A Reference design board (RDB) is a high-performance
1261 development platform that supports the QorIQ LS1012A
1262 Layerscape Architecture processor.
1264 config TARGET_LS1012A2G5RDB
1265 bool "Support ls1012a2g5rdb"
1268 select ARCH_SUPPORT_TFABOOT
1269 select BOARD_LATE_INIT
1272 Support for Freescale LS1012A2G5RDB platform.
1273 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1274 development platform that supports the QorIQ LS1012A
1275 Layerscape Architecture processor.
1277 config TARGET_LS1012AFRWY
1278 bool "Support ls1012afrwy"
1281 select ARCH_SUPPORT_TFABOOT
1282 select BOARD_LATE_INIT
1286 Support for Freescale LS1012AFRWY platform.
1287 The LS1012A FRWY board (FRWY) is a high-performance
1288 development platform that supports the QorIQ LS1012A
1289 Layerscape Architecture processor.
1291 config TARGET_LS1012AFRDM
1292 bool "Support ls1012afrdm"
1295 select ARCH_SUPPORT_TFABOOT
1297 Support for Freescale LS1012AFRDM platform.
1298 The LS1012A Freedom board (FRDM) is a high-performance
1299 development platform that supports the QorIQ LS1012A
1300 Layerscape Architecture processor.
1302 config TARGET_LS1028AQDS
1303 bool "Support ls1028aqds"
1306 select ARMV8_MULTIENTRY
1307 select ARCH_SUPPORT_TFABOOT
1308 select BOARD_LATE_INIT
1309 select ARCH_MISC_INIT
1311 Support for Freescale LS1028AQDS platform
1312 The LS1028A Development System (QDS) is a high-performance
1313 development platform that supports the QorIQ LS1028A
1314 Layerscape Architecture processor.
1316 config TARGET_LS1028ARDB
1317 bool "Support ls1028ardb"
1320 select ARMV8_MULTIENTRY
1321 select ARCH_SUPPORT_TFABOOT
1323 Support for Freescale LS1028ARDB platform
1324 The LS1028A Development System (RDB) is a high-performance
1325 development platform that supports the QorIQ LS1028A
1326 Layerscape Architecture processor.
1328 config TARGET_LS1088ARDB
1329 bool "Support ls1088ardb"
1331 select ARCH_MISC_INIT
1333 select ARMV8_MULTIENTRY
1334 select ARCH_SUPPORT_TFABOOT
1335 select BOARD_LATE_INIT
1337 select FSL_DDR_INTERACTIVE if !SD_BOOT
1339 Support for NXP LS1088ARDB platform.
1340 The LS1088A Reference design board (RDB) is a high-performance
1341 development platform that supports the QorIQ LS1088A
1342 Layerscape Architecture processor.
1344 config TARGET_LS1021AQDS
1345 bool "Support ls1021aqds"
1347 select ARCH_SUPPORT_PSCI
1348 select BOARD_EARLY_INIT_F
1349 select BOARD_LATE_INIT
1351 select CPU_V7_HAS_NONSEC
1352 select CPU_V7_HAS_VIRT
1353 select LS1_DEEP_SLEEP
1356 select FSL_DDR_INTERACTIVE
1359 config TARGET_LS1021ATWR
1360 bool "Support ls1021atwr"
1362 select ARCH_SUPPORT_PSCI
1363 select BOARD_EARLY_INIT_F
1364 select BOARD_LATE_INIT
1366 select CPU_V7_HAS_NONSEC
1367 select CPU_V7_HAS_VIRT
1368 select LS1_DEEP_SLEEP
1372 config TARGET_LS1021ATSN
1373 bool "Support ls1021atsn"
1375 select ARCH_SUPPORT_PSCI
1376 select BOARD_EARLY_INIT_F
1377 select BOARD_LATE_INIT
1379 select CPU_V7_HAS_NONSEC
1380 select CPU_V7_HAS_VIRT
1381 select LS1_DEEP_SLEEP
1385 config TARGET_LS1021AIOT
1386 bool "Support ls1021aiot"
1388 select ARCH_SUPPORT_PSCI
1389 select BOARD_LATE_INIT
1391 select CPU_V7_HAS_NONSEC
1392 select CPU_V7_HAS_VIRT
1396 Support for Freescale LS1021AIOT platform.
1397 The LS1021A Freescale board (IOT) is a high-performance
1398 development platform that supports the QorIQ LS1021A
1399 Layerscape Architecture processor.
1401 config TARGET_LS1043AQDS
1402 bool "Support ls1043aqds"
1405 select ARMV8_MULTIENTRY
1406 select ARCH_SUPPORT_TFABOOT
1407 select BOARD_EARLY_INIT_F
1408 select BOARD_LATE_INIT
1410 select FSL_DDR_INTERACTIVE if !SPL
1414 Support for Freescale LS1043AQDS platform.
1416 config TARGET_LS1043ARDB
1417 bool "Support ls1043ardb"
1420 select ARMV8_MULTIENTRY
1421 select ARCH_SUPPORT_TFABOOT
1422 select BOARD_EARLY_INIT_F
1423 select BOARD_LATE_INIT
1426 Support for Freescale LS1043ARDB platform.
1428 config TARGET_LS1046AQDS
1429 bool "Support ls1046aqds"
1432 select ARMV8_MULTIENTRY
1433 select ARCH_SUPPORT_TFABOOT
1434 select BOARD_EARLY_INIT_F
1435 select BOARD_LATE_INIT
1436 select DM_SPI_FLASH if DM_SPI
1438 select FSL_DDR_BIST if !SPL
1439 select FSL_DDR_INTERACTIVE if !SPL
1440 select FSL_DDR_INTERACTIVE if !SPL
1443 Support for Freescale LS1046AQDS platform.
1444 The LS1046A Development System (QDS) is a high-performance
1445 development platform that supports the QorIQ LS1046A
1446 Layerscape Architecture processor.
1448 config TARGET_LS1046ARDB
1449 bool "Support ls1046ardb"
1452 select ARMV8_MULTIENTRY
1453 select ARCH_SUPPORT_TFABOOT
1454 select BOARD_EARLY_INIT_F
1455 select BOARD_LATE_INIT
1456 select DM_SPI_FLASH if DM_SPI
1457 select POWER_MC34VR500
1460 select FSL_DDR_INTERACTIVE if !SPL
1463 Support for Freescale LS1046ARDB platform.
1464 The LS1046A Reference Design Board (RDB) is a high-performance
1465 development platform that supports the QorIQ LS1046A
1466 Layerscape Architecture processor.
1468 config TARGET_LS1046AFRWY
1469 bool "Support ls1046afrwy"
1472 select ARMV8_MULTIENTRY
1473 select ARCH_SUPPORT_TFABOOT
1474 select BOARD_EARLY_INIT_F
1475 select BOARD_LATE_INIT
1476 select DM_SPI_FLASH if DM_SPI
1479 Support for Freescale LS1046AFRWY platform.
1480 The LS1046A Freeway Board (FRWY) is a high-performance
1481 development platform that supports the QorIQ LS1046A
1482 Layerscape Architecture processor.
1484 bool "Support h2200"
1487 config TARGET_COLIBRI_PXA270
1488 bool "Support colibri_pxa270"
1491 config ARCH_UNIPHIER
1492 bool "Socionext UniPhier SoCs"
1493 select BOARD_LATE_INIT
1501 select OF_BOARD_SETUP
1505 select SPL_BOARD_INIT if SPL
1506 select SPL_DM if SPL
1507 select SPL_LIBCOMMON_SUPPORT if SPL
1508 select SPL_LIBGENERIC_SUPPORT if SPL
1509 select SPL_OF_CONTROL if SPL
1510 select SPL_PINCTRL if SPL
1513 imply DISTRO_DEFAULTS
1516 Support for UniPhier SoC family developed by Socionext Inc.
1517 (formerly, System LSI Business Division of Panasonic Corporation)
1520 bool "Support STMicroelectronics STM32 MCU with cortex M"
1527 bool "Support STMicrolectronics SoCs"
1536 Support for STMicroelectronics STiH407/10 SoC family.
1537 This SoC is used on Linaro 96Board STiH410-B2260
1540 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1541 select ARCH_MISC_INIT
1542 select BOARD_LATE_INIT
1551 select OF_SYSTEM_SETUP
1557 select SYS_THUMB_BUILD
1561 imply OF_LIBFDT_OVERLAY
1562 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1565 Support for STM32MP SoC family developed by STMicroelectronics,
1566 MPUs based on ARM cortex A core
1567 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1568 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1570 SPL is the unsecure FSBL for the basic boot chain.
1572 config ARCH_ROCKCHIP
1573 bool "Support Rockchip SoCs"
1584 select DM_USB if USB
1585 select ENABLE_ARM_SOC_BOOT0_HOOK
1588 select SPL_DM if SPL
1589 select SPL_SYS_MALLOC_SIMPLE if SPL
1591 select SYS_THUMB_BUILD if !ARM64
1594 imply DEBUG_UART_BOARD_INIT
1595 imply DISTRO_DEFAULTS
1597 imply SARADC_ROCKCHIP
1601 imply USB_FUNCTION_FASTBOOT
1603 config TARGET_THUNDERX_88XX
1604 bool "Support ThunderX 88xx"
1608 select SYS_CACHE_SHIFT_7
1611 bool "Support Aspeed SoCs"
1618 config ARCH_SUPPORT_TFABOOT
1622 bool "Support for booting from TF-A"
1623 depends on ARCH_SUPPORT_TFABOOT
1626 Enabling this will make a U-Boot binary that is capable of being
1629 config TI_SECURE_DEVICE
1630 bool "HS Device Type Support"
1631 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1633 If a high secure (HS) device type is being used, this config
1634 must be set. This option impacts various aspects of the
1635 build system (to create signed boot images that can be
1636 authenticated) and the code. See the doc/README.ti-secure
1637 file for further details.
1639 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1640 config ISW_ENTRY_ADDR
1641 hex "Address in memory or XIP address of bootloader entry point"
1642 default 0x402F4000 if AM43XX
1643 default 0x402F0400 if AM33XX
1644 default 0x40301350 if OMAP54XX
1646 After any reset, the boot ROM searches the boot media for a valid
1647 boot image. For non-XIP devices, the ROM then copies the image into
1648 internal memory. For all boot modes, after the ROM processes the
1649 boot image it eventually computes the entry point address depending
1650 on the device type (secure/non-secure), boot media (xip/non-xip) and
1654 source "arch/arm/mach-aspeed/Kconfig"
1656 source "arch/arm/mach-at91/Kconfig"
1658 source "arch/arm/mach-bcm283x/Kconfig"
1660 source "arch/arm/mach-bcmstb/Kconfig"
1662 source "arch/arm/mach-davinci/Kconfig"
1664 source "arch/arm/mach-exynos/Kconfig"
1666 source "arch/arm/mach-highbank/Kconfig"
1668 source "arch/arm/mach-integrator/Kconfig"
1670 source "arch/arm/mach-k3/Kconfig"
1672 source "arch/arm/mach-keystone/Kconfig"
1674 source "arch/arm/mach-kirkwood/Kconfig"
1676 source "arch/arm/cpu/arm926ejs/lpc32xx/Kconfig"
1678 source "arch/arm/mach-mvebu/Kconfig"
1680 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1682 source "arch/arm/mach-imx/mx2/Kconfig"
1684 source "arch/arm/mach-imx/mx3/Kconfig"
1686 source "arch/arm/mach-imx/mx5/Kconfig"
1688 source "arch/arm/mach-imx/mx6/Kconfig"
1690 source "arch/arm/mach-imx/mx7/Kconfig"
1692 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1694 source "arch/arm/mach-imx/imx8/Kconfig"
1696 source "arch/arm/mach-imx/imx8m/Kconfig"
1698 source "arch/arm/mach-imx/mxs/Kconfig"
1700 source "arch/arm/mach-omap2/Kconfig"
1702 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1704 source "arch/arm/mach-orion5x/Kconfig"
1706 source "arch/arm/mach-owl/Kconfig"
1708 source "arch/arm/mach-rmobile/Kconfig"
1710 source "arch/arm/mach-meson/Kconfig"
1712 source "arch/arm/mach-mediatek/Kconfig"
1714 source "arch/arm/mach-qemu/Kconfig"
1716 source "arch/arm/mach-rockchip/Kconfig"
1718 source "arch/arm/mach-s5pc1xx/Kconfig"
1720 source "arch/arm/mach-snapdragon/Kconfig"
1722 source "arch/arm/mach-socfpga/Kconfig"
1724 source "arch/arm/mach-sti/Kconfig"
1726 source "arch/arm/mach-stm32/Kconfig"
1728 source "arch/arm/mach-stm32mp/Kconfig"
1730 source "arch/arm/mach-sunxi/Kconfig"
1732 source "arch/arm/mach-tegra/Kconfig"
1734 source "arch/arm/mach-uniphier/Kconfig"
1736 source "arch/arm/cpu/armv7/vf610/Kconfig"
1738 source "arch/arm/mach-zynq/Kconfig"
1740 source "arch/arm/mach-zynqmp/Kconfig"
1742 source "arch/arm/mach-versal/Kconfig"
1744 source "arch/arm/mach-zynqmp-r5/Kconfig"
1746 source "arch/arm/cpu/armv7/Kconfig"
1748 source "arch/arm/cpu/armv8/Kconfig"
1750 source "arch/arm/mach-imx/Kconfig"
1752 source "board/bosch/shc/Kconfig"
1753 source "board/bosch/guardian/Kconfig"
1754 source "board/CarMediaLab/flea3/Kconfig"
1755 source "board/Marvell/aspenite/Kconfig"
1756 source "board/Marvell/gplugd/Kconfig"
1757 source "board/armadeus/apf27/Kconfig"
1758 source "board/armltd/vexpress/Kconfig"
1759 source "board/armltd/vexpress64/Kconfig"
1760 source "board/broadcom/bcm23550_w1d/Kconfig"
1761 source "board/broadcom/bcm28155_ap/Kconfig"
1762 source "board/broadcom/bcm963158/Kconfig"
1763 source "board/broadcom/bcm968580xref/Kconfig"
1764 source "board/broadcom/bcmcygnus/Kconfig"
1765 source "board/broadcom/bcmnsp/Kconfig"
1766 source "board/broadcom/bcmns2/Kconfig"
1767 source "board/cavium/thunderx/Kconfig"
1768 source "board/cirrus/edb93xx/Kconfig"
1769 source "board/eets/pdu001/Kconfig"
1770 source "board/emulation/qemu-arm/Kconfig"
1771 source "board/freescale/ls2080a/Kconfig"
1772 source "board/freescale/ls2080aqds/Kconfig"
1773 source "board/freescale/ls2080ardb/Kconfig"
1774 source "board/freescale/ls1088a/Kconfig"
1775 source "board/freescale/ls1028a/Kconfig"
1776 source "board/freescale/ls1021aqds/Kconfig"
1777 source "board/freescale/ls1043aqds/Kconfig"
1778 source "board/freescale/ls1021atwr/Kconfig"
1779 source "board/freescale/ls1021atsn/Kconfig"
1780 source "board/freescale/ls1021aiot/Kconfig"
1781 source "board/freescale/ls1046aqds/Kconfig"
1782 source "board/freescale/ls1043ardb/Kconfig"
1783 source "board/freescale/ls1046ardb/Kconfig"
1784 source "board/freescale/ls1046afrwy/Kconfig"
1785 source "board/freescale/ls1012aqds/Kconfig"
1786 source "board/freescale/ls1012ardb/Kconfig"
1787 source "board/freescale/ls1012afrdm/Kconfig"
1788 source "board/freescale/lx2160a/Kconfig"
1789 source "board/freescale/mx35pdk/Kconfig"
1790 source "board/freescale/s32v234evb/Kconfig"
1791 source "board/grinn/chiliboard/Kconfig"
1792 source "board/gumstix/pepper/Kconfig"
1793 source "board/h2200/Kconfig"
1794 source "board/hisilicon/hikey/Kconfig"
1795 source "board/hisilicon/hikey960/Kconfig"
1796 source "board/hisilicon/poplar/Kconfig"
1797 source "board/isee/igep003x/Kconfig"
1798 source "board/phytec/pcm051/Kconfig"
1799 source "board/silica/pengwyn/Kconfig"
1800 source "board/spear/spear300/Kconfig"
1801 source "board/spear/spear310/Kconfig"
1802 source "board/spear/spear320/Kconfig"
1803 source "board/spear/spear600/Kconfig"
1804 source "board/spear/x600/Kconfig"
1805 source "board/st/stv0991/Kconfig"
1806 source "board/tcl/sl50/Kconfig"
1807 source "board/ucRobotics/bubblegum_96/Kconfig"
1808 source "board/birdland/bav335x/Kconfig"
1809 source "board/toradex/colibri_pxa270/Kconfig"
1810 source "board/variscite/dart_6ul/Kconfig"
1811 source "board/vscom/baltos/Kconfig"
1812 source "board/woodburn/Kconfig"
1813 source "board/xilinx/Kconfig"
1814 source "board/xilinx/zynq/Kconfig"
1815 source "board/xilinx/zynqmp/Kconfig"
1817 source "arch/arm/Kconfig.debug"
1822 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
1823 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
1824 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64