1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed from
19 almost any 4K aligned address. This logic relies on the relocation
20 information that is embedded in the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
25 default n if ARCH_QEMU
26 default y if POSITION_INDEPENDENT
28 U-Boot typically uses a hard-coded value for the stack pointer
29 before relocation. Enable this option to instead calculate the
30 initial SP at run-time. This is useful to avoid hard-coding addresses
31 into U-Boot, so that it can be loaded and executed at arbitrary
32 addresses and thus avoid using arbitrary addresses at runtime.
34 If this option is enabled, the early stack pointer is set to
35 &_bss_start with a offset value added. The offset is specified by
36 SYS_INIT_SP_BSS_OFFSET.
38 config SYS_INIT_SP_BSS_OFFSET
39 int "Early stack offset from the .bss base address"
40 depends on INIT_SP_RELATIVE
43 This option's value is the offset added to &_bss_start in order to
44 calculate the stack pointer. This offset should be large enough so
45 that the early malloc region, global data (gd), and early stack usage
46 do not overlap any appended DTB.
48 config LINUX_KERNEL_IMAGE_HEADER
51 Place a Linux kernel image header at the start of the U-Boot binary.
52 The format of the header is described in the Linux kernel source at
53 Documentation/arm64/booting.txt. This feature is useful since the
54 image header reports the amount of memory (BSS and similar) that
55 U-Boot needs to use, but which isn't part of the binary.
57 if LINUX_KERNEL_IMAGE_HEADER
58 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
61 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
62 TEXT_OFFSET value written to the Linux kernel image header.
72 ARM GICV3 Interrupt translation service (ITS).
73 Basic support for programming locality specific peripheral
74 interrupts (LPI) configuration tables and enable LPI tables.
75 LPI configuration table can be used by u-boot or Linux.
76 ARM GICV3 has limitation, once the LPI table is enabled, LPI
77 configuration table can not be re-programmed, unless GICV3 reset.
83 config DMA_ADDR_T_64BIT
93 config GPIO_EXTRA_HEADER
96 # Used for compatibility with asm files copied from the kernel
97 config ARM_ASM_UNIFIED
101 # Used for compatibility with asm files copied from the kernel
105 config SYS_ICACHE_OFF
106 bool "Do not enable icache"
109 Do not enable instruction cache in U-Boot.
111 config SPL_SYS_ICACHE_OFF
112 bool "Do not enable icache in SPL"
114 default SYS_ICACHE_OFF
116 Do not enable instruction cache in SPL.
118 config SYS_DCACHE_OFF
119 bool "Do not enable dcache"
122 Do not enable data cache in U-Boot.
124 config SPL_SYS_DCACHE_OFF
125 bool "Do not enable dcache in SPL"
127 default SYS_DCACHE_OFF
129 Do not enable data cache in SPL.
131 config SYS_ARM_CACHE_CP15
132 bool "CP15 based cache enabling support"
134 Select this if your processor suports enabling caches by using
138 bool "MMU-based Paged Memory Management Support"
139 select SYS_ARM_CACHE_CP15
141 Select if you want MMU-based virtualised addressing space
142 support via paged memory management.
145 bool 'Use the ARM v7 PMSA Compliant MPU'
147 Some ARM systems without an MMU have instead a Memory Protection
148 Unit (MPU) that defines the type and permissions for regions of
150 If your CPU has an MPU then you should choose 'y' here unless you
151 know that you do not want to use the MPU.
153 # If set, the workarounds for these ARM errata are applied early during U-Boot
154 # startup. Note that in general these options force the workarounds to be
155 # applied; no CPU-type/version detection exists, unlike the similar options in
156 # the Linux kernel. Do not set these options unless they apply! Also note that
157 # the following can be machine-specific errata. These do have ability to
158 # provide rudimentary version and machine-specific checks, but expect no
160 # CONFIG_ARM_ERRATA_430973
161 # CONFIG_ARM_ERRATA_454179
162 # CONFIG_ARM_ERRATA_621766
163 # CONFIG_ARM_ERRATA_798870
164 # CONFIG_ARM_ERRATA_801819
165 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
166 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
168 config ARM_ERRATA_430973
171 config ARM_ERRATA_454179
174 config ARM_ERRATA_621766
177 config ARM_ERRATA_716044
180 config ARM_ERRATA_725233
183 config ARM_ERRATA_742230
186 config ARM_ERRATA_743622
189 config ARM_ERRATA_751472
192 config ARM_ERRATA_761320
195 config ARM_ERRATA_773022
198 config ARM_ERRATA_774769
201 config ARM_ERRATA_794072
204 config ARM_ERRATA_798870
207 config ARM_ERRATA_801819
210 config ARM_ERRATA_826974
213 config ARM_ERRATA_828024
216 config ARM_ERRATA_829520
219 config ARM_ERRATA_833069
222 config ARM_ERRATA_833471
225 config ARM_ERRATA_845369
228 config ARM_ERRATA_852421
231 config ARM_ERRATA_852423
234 config ARM_ERRATA_855873
237 config ARM_CORTEX_A8_CVE_2017_5715
240 config ARM_CORTEX_A15_CVE_2017_5715
245 select SYS_CACHE_SHIFT_5
250 select SYS_CACHE_SHIFT_5
255 select SYS_CACHE_SHIFT_5
260 select SYS_CACHE_SHIFT_5
265 select SYS_CACHE_SHIFT_5
271 select SYS_CACHE_SHIFT_5
278 select SYS_CACHE_SHIFT_6
285 select SYS_CACHE_SHIFT_5
286 select SYS_THUMB_BUILD
292 select SYS_ARM_CACHE_CP15
294 select SYS_CACHE_SHIFT_6
298 select SYS_CACHE_SHIFT_5
303 select SYS_CACHE_SHIFT_5
307 default "arm720t" if CPU_ARM720T
308 default "arm920t" if CPU_ARM920T
309 default "arm926ejs" if CPU_ARM926EJS
310 default "arm946es" if CPU_ARM946ES
311 default "arm1136" if CPU_ARM1136
312 default "arm1176" if CPU_ARM1176
313 default "armv7" if CPU_V7A
314 default "armv7" if CPU_V7R
315 default "armv7m" if CPU_V7M
316 default "pxa" if CPU_PXA
317 default "sa1100" if CPU_SA1100
318 default "armv8" if ARM64
322 default 4 if CPU_ARM720T
323 default 4 if CPU_ARM920T
324 default 5 if CPU_ARM926EJS
325 default 5 if CPU_ARM946ES
326 default 6 if CPU_ARM1136
327 default 6 if CPU_ARM1176
332 default 4 if CPU_SA1100
335 config SYS_CACHE_SHIFT_5
338 config SYS_CACHE_SHIFT_6
341 config SYS_CACHE_SHIFT_7
344 config SYS_CACHELINE_SIZE
346 default 128 if SYS_CACHE_SHIFT_7
347 default 64 if SYS_CACHE_SHIFT_6
348 default 32 if SYS_CACHE_SHIFT_5
351 prompt "Select the ARM data write cache policy"
352 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
354 default SYS_ARM_CACHE_WRITEBACK
356 config SYS_ARM_CACHE_WRITEBACK
357 bool "Write-back (WB)"
359 A write updates the cache only and marks the cache line as dirty.
360 External memory is updated only when the line is evicted or explicitly
363 config SYS_ARM_CACHE_WRITETHROUGH
364 bool "Write-through (WT)"
366 A write updates both the cache and the external memory system.
367 This does not mark the cache line as dirty.
369 config SYS_ARM_CACHE_WRITEALLOC
370 bool "Write allocation (WA)"
372 A cache line is allocated on a write miss. This means that executing a
373 store instruction on the processor might cause a burst read to occur.
374 There is a linefill to obtain the data for the cache line, before the
379 bool "Enable ARCH_CPU_INIT"
381 Some architectures require a call to arch_cpu_init().
382 Say Y here to enable it
384 config SYS_ARCH_TIMER
385 bool "ARM Generic Timer support"
386 depends on CPU_V7A || ARM64
389 The ARM Generic Timer (aka arch-timer) provides an architected
390 interface to a timer source on an SoC.
391 It is mandatory for ARMv8 implementation and widely available
395 bool "Support for ARM SMC Calling Convention (SMCCC)"
396 depends on CPU_V7A || ARM64
399 Say Y here if you want to enable ARM SMC Calling Convention.
400 This should be enabled if U-Boot needs to communicate with system
401 firmware (for example, PSCI) according to SMCCC.
404 bool "support boot from semihosting"
406 In emulated environments, semihosting is a way for
407 the hosted environment to call out to the emulator to
408 retrieve files from the host machine.
410 config SYS_THUMB_BUILD
411 bool "Build U-Boot using the Thumb instruction set"
414 Use this flag to build U-Boot using the Thumb instruction set for
415 ARM architectures. Thumb instruction set provides better code
416 density. For ARM architectures that support Thumb2 this flag will
417 result in Thumb2 code generated by GCC.
419 config SPL_SYS_THUMB_BUILD
420 bool "Build SPL using the Thumb instruction set"
421 default y if SYS_THUMB_BUILD
422 depends on !ARM64 && SPL
424 Use this flag to build SPL using the Thumb instruction set for
425 ARM architectures. Thumb instruction set provides better code
426 density. For ARM architectures that support Thumb2 this flag will
427 result in Thumb2 code generated by GCC.
429 config TPL_SYS_THUMB_BUILD
430 bool "Build TPL using the Thumb instruction set"
431 default y if SYS_THUMB_BUILD
432 depends on TPL && !ARM64
434 Use this flag to build TPL using the Thumb instruction set for
435 ARM architectures. Thumb instruction set provides better code
436 density. For ARM architectures that support Thumb2 this flag will
437 result in Thumb2 code generated by GCC.
440 config SYS_L2CACHE_OFF
443 If SoC does not support L2CACHE or one does not want to enable
444 L2CACHE, choose this option.
446 config ENABLE_ARM_SOC_BOOT0_HOOK
447 bool "prepare BOOT0 header"
449 If the SoC's BOOT0 requires a header area filled with (magic)
450 values, then choose this option, and create a file included as
451 <asm/arch/boot0.h> which contains the required assembler code.
453 config ARM_CORTEX_CPU_IS_UP
457 config USE_ARCH_MEMCPY
458 bool "Use an assembly optimized implementation of memcpy"
462 Enable the generation of an optimized version of memcpy.
463 Such an implementation may be faster under some conditions
464 but may increase the binary size.
466 config SPL_USE_ARCH_MEMCPY
467 bool "Use an assembly optimized implementation of memcpy for SPL"
468 default y if USE_ARCH_MEMCPY
469 depends on !ARM64 && SPL
471 Enable the generation of an optimized version of memcpy.
472 Such an implementation may be faster under some conditions
473 but may increase the binary size.
475 config TPL_USE_ARCH_MEMCPY
476 bool "Use an assembly optimized implementation of memcpy for TPL"
477 default y if USE_ARCH_MEMCPY
478 depends on !ARM64 && TPL
480 Enable the generation of an optimized version of memcpy.
481 Such an implementation may be faster under some conditions
482 but may increase the binary size.
484 config USE_ARCH_MEMSET
485 bool "Use an assembly optimized implementation of memset"
489 Enable the generation of an optimized version of memset.
490 Such an implementation may be faster under some conditions
491 but may increase the binary size.
493 config SPL_USE_ARCH_MEMSET
494 bool "Use an assembly optimized implementation of memset for SPL"
495 default y if USE_ARCH_MEMSET
496 depends on !ARM64 && SPL
498 Enable the generation of an optimized version of memset.
499 Such an implementation may be faster under some conditions
500 but may increase the binary size.
502 config TPL_USE_ARCH_MEMSET
503 bool "Use an assembly optimized implementation of memset for TPL"
504 default y if USE_ARCH_MEMSET
505 depends on !ARM64 && TPL
507 Enable the generation of an optimized version of memset.
508 Such an implementation may be faster under some conditions
509 but may increase the binary size.
511 config ARM64_SUPPORT_AARCH32
512 bool "ARM64 system support AArch32 execution state"
514 default y if !TARGET_THUNDERX_88XX
516 This ARM64 system supports AArch32 execution state.
519 prompt "Target select"
524 select GPIO_EXTRA_HEADER
525 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
526 select SPL_SEPARATE_BSS if SPL
528 config TARGET_ASPENITE
529 bool "Support aspenite"
531 select GPIO_EXTRA_HEADER
534 bool "Support gplugd"
536 select GPIO_EXTRA_HEADER
541 select GPIO_EXTRA_HEADER
542 select SPL_DM_SPI if SPL
545 Support for TI's DaVinci platform.
548 bool "Marvell Kirkwood"
549 select ARCH_MISC_INIT
550 select BOARD_EARLY_INIT_F
552 select GPIO_EXTRA_HEADER
555 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
561 select GPIO_EXTRA_HEADER
562 select SPL_DM_SPI if SPL
563 select SPL_DM_SPI_FLASH if SPL
572 select GPIO_EXTRA_HEADER
574 config TARGET_SPEAR300
575 bool "Support spear300"
576 select BOARD_EARLY_INIT_F
578 select GPIO_EXTRA_HEADER
582 config TARGET_SPEAR310
583 bool "Support spear310"
584 select BOARD_EARLY_INIT_F
586 select GPIO_EXTRA_HEADER
590 config TARGET_SPEAR320
591 bool "Support spear320"
592 select BOARD_EARLY_INIT_F
594 select GPIO_EXTRA_HEADER
598 config TARGET_SPEAR600
599 bool "Support spear600"
600 select BOARD_EARLY_INIT_F
602 select GPIO_EXTRA_HEADER
606 config TARGET_STV0991
607 bool "Support stv0991"
613 select GPIO_EXTRA_HEADER
621 select BOARD_LATE_INIT
623 select GPIO_EXTRA_HEADER
630 select GPIO_EXTRA_HEADER
633 bool "Broadcom BCM283X family"
637 select GPIO_EXTRA_HEADER
640 select SERIAL_SEARCH_ALL
645 bool "Broadcom BCM63158 family"
651 bool "Broadcom BCM68360 family"
657 bool "Broadcom BCM6858 family"
663 bool "Broadcom BCM7XXX family"
666 select GPIO_EXTRA_HEADER
668 select OF_PRIOR_STAGE
671 This enables support for Broadcom ARM-based set-top box
672 chipsets, including the 7445 family of chips.
674 config TARGET_BCMCYGNUS
675 bool "Support bcmcygnus"
677 select GPIO_EXTRA_HEADER
679 imply BCM_SF2_ETH_GMAC
687 bool "Support Broadcom Northstar2"
689 select GPIO_EXTRA_HEADER
691 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
692 ARMv8 Cortex-A57 processors targeting a broad range of networking
696 bool "Support Broadcom NS3"
698 select BOARD_LATE_INIT
700 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
701 ARMv8 Cortex-A72 processors targeting a broad range of networking
705 bool "Samsung EXYNOS"
714 select GPIO_EXTRA_HEADER
715 imply SYS_THUMB_BUILD
720 bool "Samsung S5PC1XX"
726 select GPIO_EXTRA_HEADER
730 bool "Calxeda Highbank"
743 config ARCH_INTEGRATOR
744 bool "ARM Ltd. Integrator family"
747 select GPIO_EXTRA_HEADER
752 bool "Qualcomm IPQ40xx SoCs"
758 select GPIO_EXTRA_HEADER
770 select GPIO_EXTRA_HEADER
772 select SYS_ARCH_TIMER
773 select SYS_THUMB_BUILD
779 bool "Texas Instruments' K3 Architecture"
784 config ARCH_OMAP2PLUS
787 select GPIO_EXTRA_HEADER
788 select SPL_BOARD_INIT if SPL
789 select SPL_STACK_R if SPL
791 imply TI_SYSC if DM && OF_CONTROL
796 select GPIO_EXTRA_HEADER
797 imply DISTRO_DEFAULTS
800 Support for the Meson SoC family developed by Amlogic Inc.,
801 targeted at media players and tablet computers. We currently
802 support the S905 (GXBaby) 64-bit SoC.
807 select GPIO_EXTRA_HEADER
810 select SPL_LIBCOMMON_SUPPORT if SPL
811 select SPL_LIBGENERIC_SUPPORT if SPL
812 select SPL_OF_CONTROL if SPL
815 Support for the MediaTek SoCs family developed by MediaTek Inc.
816 Please refer to doc/README.mediatek for more information.
819 bool "NXP LPC32xx platform"
824 select GPIO_EXTRA_HEADER
830 bool "NXP i.MX8 platform"
833 select GPIO_EXTRA_HEADER
835 select ENABLE_ARM_SOC_BOOT0_HOOK
838 bool "NXP i.MX8M platform"
840 select GPIO_EXTRA_HEADER
841 select SYS_FSL_HAS_SEC if IMX_HAB
842 select SYS_FSL_SEC_COMPAT_4
843 select SYS_FSL_SEC_LE
849 bool "NXP i.MXRT platform"
853 select GPIO_EXTRA_HEADER
858 bool "NXP i.MX23 family"
860 select GPIO_EXTRA_HEADER
867 select GPIO_EXTRA_HEADER
871 bool "NXP i.MX28 family"
873 select GPIO_EXTRA_HEADER
878 bool "NXP i.MX31 family"
880 select GPIO_EXTRA_HEADER
885 select GPIO_EXTRA_HEADER
886 select SYS_FSL_HAS_SEC if IMX_HAB
887 select SYS_FSL_SEC_COMPAT_4
888 select SYS_FSL_SEC_LE
889 select ROM_UNIFIED_SECTIONS
891 imply SYS_THUMB_BUILD
895 select ARCH_MISC_INIT
897 select GPIO_EXTRA_HEADER
898 select SYS_FSL_HAS_SEC if IMX_HAB
899 select SYS_FSL_SEC_COMPAT_4
900 select SYS_FSL_SEC_LE
901 imply BOARD_EARLY_INIT_F
903 imply SYS_THUMB_BUILD
908 select GPIO_EXTRA_HEADER
909 select SYS_FSL_HAS_SEC
910 select SYS_FSL_SEC_COMPAT_4
911 select SYS_FSL_SEC_LE
913 imply SYS_THUMB_BUILD
917 default "arch/arm/mach-omap2/u-boot-spl.lds"
922 select BOARD_EARLY_INIT_F
924 select GPIO_EXTRA_HEADER
928 bool "Nexell S5P4418/S5P6818 SoC"
929 select ENABLE_ARM_SOC_BOOT0_HOOK
931 select GPIO_EXTRA_HEADER
934 bool "Actions Semi OWL SoCs"
938 select GPIO_EXTRA_HEADER
943 select SYS_RELOC_GD_ENV_ADDR
947 bool "QEMU Virtual Platform"
958 bool "Renesas ARM SoCs"
961 select GPIO_EXTRA_HEADER
962 imply BOARD_EARLY_INIT_F
965 imply SYS_THUMB_BUILD
966 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
968 config ARCH_SNAPDRAGON
969 bool "Qualcomm Snapdragon SoCs"
974 select GPIO_EXTRA_HEADER
983 bool "Altera SOCFPGA family"
984 select ARCH_EARLY_INIT_R
985 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
986 select ARM64 if TARGET_SOCFPGA_SOC64
987 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
990 select GPIO_EXTRA_HEADER
991 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
993 select SPL_DM_RESET if DM_RESET
995 select SPL_LIBCOMMON_SUPPORT
996 select SPL_LIBGENERIC_SUPPORT
997 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
998 select SPL_OF_CONTROL
999 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1000 select SPL_SERIAL_SUPPORT
1002 select SPL_WATCHDOG_SUPPORT
1005 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1007 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1008 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1018 imply SPL_DM_SPI_FLASH
1019 imply SPL_LIBDISK_SUPPORT
1020 imply SPL_MMC_SUPPORT
1021 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1022 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1023 imply SPL_SPI_FLASH_SUPPORT
1024 imply SPL_SPI_SUPPORT
1028 bool "Support sunxi (Allwinner) SoCs"
1031 select CMD_MMC if MMC
1032 select CMD_USB if DISTRO_DEFAULTS
1038 select DM_MMC if MMC
1039 select DM_SCSI if SCSI
1041 select DM_USB if DISTRO_DEFAULTS
1042 select GPIO_EXTRA_HEADER
1043 select OF_BOARD_SETUP
1046 select SPECIFY_CONSOLE_INDEX
1047 select SPL_STACK_R if SPL
1048 select SPL_SYS_MALLOC_SIMPLE if SPL
1049 select SPL_SYS_THUMB_BUILD if !ARM64
1052 select SYS_THUMB_BUILD if !ARM64
1053 select USB if DISTRO_DEFAULTS
1054 select USB_KEYBOARD if DISTRO_DEFAULTS
1055 select USB_STORAGE if DISTRO_DEFAULTS
1056 select SPL_USE_TINY_PRINTF
1058 select SYS_RELOC_GD_ENV_ADDR
1059 imply BOARD_LATE_INIT
1062 imply CMD_UBI if MTD_RAW_NAND
1063 imply DISTRO_DEFAULTS
1066 imply OF_LIBFDT_OVERLAY
1067 imply PRE_CONSOLE_BUFFER
1068 imply SPL_GPIO_SUPPORT
1069 imply SPL_LIBCOMMON_SUPPORT
1070 imply SPL_LIBGENERIC_SUPPORT
1071 imply SPL_MMC_SUPPORT if MMC
1072 imply SPL_POWER_SUPPORT
1073 imply SPL_SERIAL_SUPPORT
1077 bool "ST-Ericsson U8500 Series"
1081 select DM_MMC if MMC
1083 select DM_USB if USB
1087 imply ARM_PL180_MMCI
1089 imply NOMADIK_MTU_TIMER
1092 imply SYSRESET_SYSCON
1095 bool "Support Xilinx Versal Platform"
1099 select DM_ETH if NET
1100 select DM_MMC if MMC
1102 select GPIO_EXTRA_HEADER
1104 imply BOARD_LATE_INIT
1105 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1108 bool "Freescale Vybrid"
1110 select GPIO_EXTRA_HEADER
1111 select SYS_FSL_ERRATUM_ESDHC111
1116 bool "Xilinx Zynq based platform"
1121 select DM_ETH if NET
1122 select DM_MMC if MMC
1126 select DM_USB if USB
1127 select GPIO_EXTRA_HEADER
1130 select SPL_BOARD_INIT if SPL
1131 select SPL_CLK if SPL
1132 select SPL_DM if SPL
1133 select SPL_DM_SPI if SPL
1134 select SPL_DM_SPI_FLASH if SPL
1135 select SPL_OF_CONTROL if SPL
1136 select SPL_SEPARATE_BSS if SPL
1138 imply ARCH_EARLY_INIT_R
1139 imply BOARD_LATE_INIT
1143 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1146 config ARCH_ZYNQMP_R5
1147 bool "Xilinx ZynqMP R5 based platform"
1151 select DM_ETH if NET
1152 select DM_MMC if MMC
1154 select GPIO_EXTRA_HEADER
1160 bool "Xilinx ZynqMP based platform"
1164 select DM_ETH if NET
1166 select DM_MMC if MMC
1168 select DM_SPI if SPI
1169 select DM_SPI_FLASH if DM_SPI
1170 select DM_USB if USB
1172 select GPIO_EXTRA_HEADER
1174 select SPL_BOARD_INIT if SPL
1175 select SPL_CLK if SPL
1176 select SPL_DM if SPL
1177 select SPL_DM_SPI if SPI && SPL_DM
1178 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1179 select SPL_DM_MAILBOX if SPL
1180 select SPL_FIRMWARE if SPL
1181 select SPL_SEPARATE_BSS if SPL
1184 imply BOARD_LATE_INIT
1186 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1193 select GPIO_EXTRA_HEADER
1194 imply DISTRO_DEFAULTS
1197 config TARGET_VEXPRESS64_AEMV8A
1198 bool "Support vexpress_aemv8a"
1200 select GPIO_EXTRA_HEADER
1203 config TARGET_VEXPRESS64_BASE_FVP
1204 bool "Support Versatile Express ARMv8a FVP BASE model"
1206 select GPIO_EXTRA_HEADER
1210 config TARGET_VEXPRESS64_JUNO
1211 bool "Support Versatile Express Juno Development Platform"
1213 select GPIO_EXTRA_HEADER
1227 config TARGET_TOTAL_COMPUTE
1228 bool "Support Total Compute Platform"
1236 config TARGET_LS2080A_EMU
1237 bool "Support ls2080a_emu"
1240 select ARMV8_MULTIENTRY
1241 select FSL_DDR_SYNC_REFRESH
1242 select GPIO_EXTRA_HEADER
1244 Support for Freescale LS2080A_EMU platform.
1245 The LS2080A Development System (EMULATOR) is a pre-silicon
1246 development platform that supports the QorIQ LS2080A
1247 Layerscape Architecture processor.
1249 config TARGET_LS1088AQDS
1250 bool "Support ls1088aqds"
1253 select ARMV8_MULTIENTRY
1254 select ARCH_SUPPORT_TFABOOT
1255 select BOARD_LATE_INIT
1256 select GPIO_EXTRA_HEADER
1258 select FSL_DDR_INTERACTIVE if !SD_BOOT
1260 Support for NXP LS1088AQDS platform.
1261 The LS1088A Development System (QDS) is a high-performance
1262 development platform that supports the QorIQ LS1088A
1263 Layerscape Architecture processor.
1265 config TARGET_LS2080AQDS
1266 bool "Support ls2080aqds"
1269 select ARMV8_MULTIENTRY
1270 select ARCH_SUPPORT_TFABOOT
1271 select BOARD_LATE_INIT
1272 select GPIO_EXTRA_HEADER
1277 select FSL_DDR_INTERACTIVE if !SPL
1279 Support for Freescale LS2080AQDS platform.
1280 The LS2080A Development System (QDS) is a high-performance
1281 development platform that supports the QorIQ LS2080A
1282 Layerscape Architecture processor.
1284 config TARGET_LS2080ARDB
1285 bool "Support ls2080ardb"
1288 select ARMV8_MULTIENTRY
1289 select ARCH_SUPPORT_TFABOOT
1290 select BOARD_LATE_INIT
1293 select FSL_DDR_INTERACTIVE if !SPL
1294 select GPIO_EXTRA_HEADER
1298 Support for Freescale LS2080ARDB platform.
1299 The LS2080A Reference design board (RDB) is a high-performance
1300 development platform that supports the QorIQ LS2080A
1301 Layerscape Architecture processor.
1303 config TARGET_LS2081ARDB
1304 bool "Support ls2081ardb"
1307 select ARMV8_MULTIENTRY
1308 select BOARD_LATE_INIT
1309 select GPIO_EXTRA_HEADER
1312 Support for Freescale LS2081ARDB platform.
1313 The LS2081A Reference design board (RDB) is a high-performance
1314 development platform that supports the QorIQ LS2081A/LS2041A
1315 Layerscape Architecture processor.
1317 config TARGET_LX2160ARDB
1318 bool "Support lx2160ardb"
1321 select ARMV8_MULTIENTRY
1322 select ARCH_SUPPORT_TFABOOT
1323 select BOARD_LATE_INIT
1324 select GPIO_EXTRA_HEADER
1326 Support for NXP LX2160ARDB platform.
1327 The lx2160ardb (LX2160A Reference design board (RDB)
1328 is a high-performance development platform that supports the
1329 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1331 config TARGET_LX2160AQDS
1332 bool "Support lx2160aqds"
1335 select ARMV8_MULTIENTRY
1336 select ARCH_SUPPORT_TFABOOT
1337 select BOARD_LATE_INIT
1338 select GPIO_EXTRA_HEADER
1340 Support for NXP LX2160AQDS platform.
1341 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1342 is a high-performance development platform that supports the
1343 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1345 config TARGET_LX2162AQDS
1346 bool "Support lx2162aqds"
1348 select ARCH_MISC_INIT
1350 select ARMV8_MULTIENTRY
1351 select ARCH_SUPPORT_TFABOOT
1352 select BOARD_LATE_INIT
1353 select GPIO_EXTRA_HEADER
1355 Support for NXP LX2162AQDS platform.
1356 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1359 bool "Support HiKey 96boards Consumer Edition Platform"
1364 select GPIO_EXTRA_HEADER
1367 select SPECIFY_CONSOLE_INDEX
1370 Support for HiKey 96boards platform. It features a HI6220
1371 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1373 config TARGET_HIKEY960
1374 bool "Support HiKey960 96boards Consumer Edition Platform"
1378 select GPIO_EXTRA_HEADER
1383 Support for HiKey960 96boards platform. It features a HI3660
1384 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1386 config TARGET_POPLAR
1387 bool "Support Poplar 96boards Enterprise Edition Platform"
1392 select GPIO_EXTRA_HEADER
1397 Support for Poplar 96boards EE platform. It features a HI3798cv200
1398 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1399 making it capable of running any commercial set-top solution based on
1402 config TARGET_LS1012AQDS
1403 bool "Support ls1012aqds"
1406 select ARCH_SUPPORT_TFABOOT
1407 select BOARD_LATE_INIT
1408 select GPIO_EXTRA_HEADER
1410 Support for Freescale LS1012AQDS platform.
1411 The LS1012A Development System (QDS) is a high-performance
1412 development platform that supports the QorIQ LS1012A
1413 Layerscape Architecture processor.
1415 config TARGET_LS1012ARDB
1416 bool "Support ls1012ardb"
1419 select ARCH_SUPPORT_TFABOOT
1420 select BOARD_LATE_INIT
1421 select GPIO_EXTRA_HEADER
1425 Support for Freescale LS1012ARDB platform.
1426 The LS1012A Reference design board (RDB) is a high-performance
1427 development platform that supports the QorIQ LS1012A
1428 Layerscape Architecture processor.
1430 config TARGET_LS1012A2G5RDB
1431 bool "Support ls1012a2g5rdb"
1434 select ARCH_SUPPORT_TFABOOT
1435 select BOARD_LATE_INIT
1436 select GPIO_EXTRA_HEADER
1439 Support for Freescale LS1012A2G5RDB platform.
1440 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1441 development platform that supports the QorIQ LS1012A
1442 Layerscape Architecture processor.
1444 config TARGET_LS1012AFRWY
1445 bool "Support ls1012afrwy"
1448 select ARCH_SUPPORT_TFABOOT
1449 select BOARD_LATE_INIT
1450 select GPIO_EXTRA_HEADER
1454 Support for Freescale LS1012AFRWY platform.
1455 The LS1012A FRWY board (FRWY) is a high-performance
1456 development platform that supports the QorIQ LS1012A
1457 Layerscape Architecture processor.
1459 config TARGET_LS1012AFRDM
1460 bool "Support ls1012afrdm"
1463 select ARCH_SUPPORT_TFABOOT
1464 select GPIO_EXTRA_HEADER
1466 Support for Freescale LS1012AFRDM platform.
1467 The LS1012A Freedom board (FRDM) is a high-performance
1468 development platform that supports the QorIQ LS1012A
1469 Layerscape Architecture processor.
1471 config TARGET_LS1028AQDS
1472 bool "Support ls1028aqds"
1475 select ARMV8_MULTIENTRY
1476 select ARCH_SUPPORT_TFABOOT
1477 select BOARD_LATE_INIT
1478 select GPIO_EXTRA_HEADER
1480 Support for Freescale LS1028AQDS platform
1481 The LS1028A Development System (QDS) is a high-performance
1482 development platform that supports the QorIQ LS1028A
1483 Layerscape Architecture processor.
1485 config TARGET_LS1028ARDB
1486 bool "Support ls1028ardb"
1489 select ARMV8_MULTIENTRY
1490 select ARCH_SUPPORT_TFABOOT
1491 select BOARD_LATE_INIT
1492 select GPIO_EXTRA_HEADER
1494 Support for Freescale LS1028ARDB platform
1495 The LS1028A Development System (RDB) is a high-performance
1496 development platform that supports the QorIQ LS1028A
1497 Layerscape Architecture processor.
1499 config TARGET_LS1088ARDB
1500 bool "Support ls1088ardb"
1503 select ARMV8_MULTIENTRY
1504 select ARCH_SUPPORT_TFABOOT
1505 select BOARD_LATE_INIT
1507 select FSL_DDR_INTERACTIVE if !SD_BOOT
1508 select GPIO_EXTRA_HEADER
1510 Support for NXP LS1088ARDB platform.
1511 The LS1088A Reference design board (RDB) is a high-performance
1512 development platform that supports the QorIQ LS1088A
1513 Layerscape Architecture processor.
1515 config TARGET_LS1021AQDS
1516 bool "Support ls1021aqds"
1518 select ARCH_SUPPORT_PSCI
1519 select BOARD_EARLY_INIT_F
1520 select BOARD_LATE_INIT
1522 select CPU_V7_HAS_NONSEC
1523 select CPU_V7_HAS_VIRT
1524 select LS1_DEEP_SLEEP
1527 select FSL_DDR_INTERACTIVE
1528 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1529 select GPIO_EXTRA_HEADER
1530 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1533 config TARGET_LS1021ATWR
1534 bool "Support ls1021atwr"
1536 select ARCH_SUPPORT_PSCI
1537 select BOARD_EARLY_INIT_F
1538 select BOARD_LATE_INIT
1540 select CPU_V7_HAS_NONSEC
1541 select CPU_V7_HAS_VIRT
1542 select LS1_DEEP_SLEEP
1544 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1545 select GPIO_EXTRA_HEADER
1548 config TARGET_PG_WCOM_SELI8
1549 bool "Support Hitachi-Powergrids SELI8 service unit card"
1551 select ARCH_SUPPORT_PSCI
1552 select BOARD_EARLY_INIT_F
1553 select BOARD_LATE_INIT
1555 select CPU_V7_HAS_NONSEC
1556 select CPU_V7_HAS_VIRT
1558 select FSL_DDR_INTERACTIVE
1559 select GPIO_EXTRA_HEADER
1563 Support for Hitachi-Powergrids SELI8 service unit card.
1564 SELI8 is a QorIQ LS1021a based service unit card used
1565 in XMC20 and FOX615 product families.
1567 config TARGET_PG_WCOM_EXPU1
1568 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1570 select ARCH_SUPPORT_PSCI
1571 select BOARD_EARLY_INIT_F
1572 select BOARD_LATE_INIT
1574 select CPU_V7_HAS_NONSEC
1575 select CPU_V7_HAS_VIRT
1577 select FSL_DDR_INTERACTIVE
1581 Support for Hitachi-Powergrids EXPU1 service unit card.
1582 EXPU1 is a QorIQ LS1021a based service unit card used
1583 in XMC20 and FOX615 product families.
1585 config TARGET_LS1021ATSN
1586 bool "Support ls1021atsn"
1588 select ARCH_SUPPORT_PSCI
1589 select BOARD_EARLY_INIT_F
1590 select BOARD_LATE_INIT
1592 select CPU_V7_HAS_NONSEC
1593 select CPU_V7_HAS_VIRT
1594 select LS1_DEEP_SLEEP
1596 select GPIO_EXTRA_HEADER
1599 config TARGET_LS1021AIOT
1600 bool "Support ls1021aiot"
1602 select ARCH_SUPPORT_PSCI
1603 select BOARD_LATE_INIT
1605 select CPU_V7_HAS_NONSEC
1606 select CPU_V7_HAS_VIRT
1608 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1609 select GPIO_EXTRA_HEADER
1612 Support for Freescale LS1021AIOT platform.
1613 The LS1021A Freescale board (IOT) is a high-performance
1614 development platform that supports the QorIQ LS1021A
1615 Layerscape Architecture processor.
1617 config TARGET_LS1043AQDS
1618 bool "Support ls1043aqds"
1621 select ARMV8_MULTIENTRY
1622 select ARCH_SUPPORT_TFABOOT
1623 select BOARD_EARLY_INIT_F
1624 select BOARD_LATE_INIT
1626 select FSL_DDR_INTERACTIVE if !SPL
1627 select FSL_DSPI if !SPL_NO_DSPI
1628 select DM_SPI_FLASH if FSL_DSPI
1629 select GPIO_EXTRA_HEADER
1633 Support for Freescale LS1043AQDS platform.
1635 config TARGET_LS1043ARDB
1636 bool "Support ls1043ardb"
1639 select ARMV8_MULTIENTRY
1640 select ARCH_SUPPORT_TFABOOT
1641 select BOARD_EARLY_INIT_F
1642 select BOARD_LATE_INIT
1644 select FSL_DSPI if !SPL_NO_DSPI
1645 select DM_SPI_FLASH if FSL_DSPI
1646 select GPIO_EXTRA_HEADER
1648 Support for Freescale LS1043ARDB platform.
1650 config TARGET_LS1046AQDS
1651 bool "Support ls1046aqds"
1654 select ARMV8_MULTIENTRY
1655 select ARCH_SUPPORT_TFABOOT
1656 select BOARD_EARLY_INIT_F
1657 select BOARD_LATE_INIT
1658 select DM_SPI_FLASH if DM_SPI
1660 select FSL_DDR_BIST if !SPL
1661 select FSL_DDR_INTERACTIVE if !SPL
1662 select FSL_DDR_INTERACTIVE if !SPL
1663 select GPIO_EXTRA_HEADER
1666 Support for Freescale LS1046AQDS platform.
1667 The LS1046A Development System (QDS) is a high-performance
1668 development platform that supports the QorIQ LS1046A
1669 Layerscape Architecture processor.
1671 config TARGET_LS1046ARDB
1672 bool "Support ls1046ardb"
1675 select ARMV8_MULTIENTRY
1676 select ARCH_SUPPORT_TFABOOT
1677 select BOARD_EARLY_INIT_F
1678 select BOARD_LATE_INIT
1679 select DM_SPI_FLASH if DM_SPI
1680 select POWER_MC34VR500
1683 select FSL_DDR_INTERACTIVE if !SPL
1684 select GPIO_EXTRA_HEADER
1687 Support for Freescale LS1046ARDB platform.
1688 The LS1046A Reference Design Board (RDB) is a high-performance
1689 development platform that supports the QorIQ LS1046A
1690 Layerscape Architecture processor.
1692 config TARGET_LS1046AFRWY
1693 bool "Support ls1046afrwy"
1696 select ARMV8_MULTIENTRY
1697 select ARCH_SUPPORT_TFABOOT
1698 select BOARD_EARLY_INIT_F
1699 select BOARD_LATE_INIT
1700 select DM_SPI_FLASH if DM_SPI
1701 select GPIO_EXTRA_HEADER
1704 Support for Freescale LS1046AFRWY platform.
1705 The LS1046A Freeway Board (FRWY) is a high-performance
1706 development platform that supports the QorIQ LS1046A
1707 Layerscape Architecture processor.
1713 select ARMV8_MULTIENTRY
1730 select GPIO_EXTRA_HEADER
1731 select SPL_DM if SPL
1732 select SPL_DM_SPI if SPL
1733 select SPL_DM_SPI_FLASH if SPL
1734 select SPL_DM_I2C if SPL
1735 select SPL_DM_MMC if SPL
1736 select SPL_DM_SERIAL if SPL
1738 Support for Kontron SMARC-sAL28 board.
1740 config TARGET_COLIBRI_PXA270
1741 bool "Support colibri_pxa270"
1743 select GPIO_EXTRA_HEADER
1745 config ARCH_UNIPHIER
1746 bool "Socionext UniPhier SoCs"
1747 select BOARD_LATE_INIT
1757 select OF_BOARD_SETUP
1761 select SPL_BOARD_INIT if SPL
1762 select SPL_DM if SPL
1763 select SPL_LIBCOMMON_SUPPORT if SPL
1764 select SPL_LIBGENERIC_SUPPORT if SPL
1765 select SPL_OF_CONTROL if SPL
1766 select SPL_PINCTRL if SPL
1769 imply DISTRO_DEFAULTS
1772 Support for UniPhier SoC family developed by Socionext Inc.
1773 (formerly, System LSI Business Division of Panasonic Corporation)
1775 config ARCH_SYNQUACER
1776 bool "Socionext SynQuacer SoCs"
1782 select SYSRESET_PSCI
1785 Support for SynQuacer SoC family developed by Socionext Inc.
1786 This SoC is used on 96boards EE DeveloperBox.
1789 bool "Support STMicroelectronics STM32 MCU with cortex M"
1793 select GPIO_EXTRA_HEADER
1797 bool "Support STMicrolectronics SoCs"
1806 Support for STMicroelectronics STiH407/10 SoC family.
1807 This SoC is used on Linaro 96Board STiH410-B2260
1810 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1811 select ARCH_MISC_INIT
1812 select ARCH_SUPPORT_TFABOOT
1813 select BOARD_LATE_INIT
1819 select GPIO_EXTRA_HEADER
1823 select OF_SYSTEM_SETUP
1829 select SYS_THUMB_BUILD
1833 imply OF_LIBFDT_OVERLAY
1834 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1837 Support for STM32MP SoC family developed by STMicroelectronics,
1838 MPUs based on ARM cortex A core
1839 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1840 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1842 SPL is the unsecure FSBL for the basic boot chain.
1844 config ARCH_ROCKCHIP
1845 bool "Support Rockchip SoCs"
1847 select BINMAN if SPL_OPTEE
1857 select DM_USB if USB
1858 select ENABLE_ARM_SOC_BOOT0_HOOK
1861 select SPL_DM if SPL
1862 select SPL_DM_SPI if SPL
1863 select SPL_DM_SPI_FLASH if SPL
1865 select SYS_THUMB_BUILD if !ARM64
1868 imply DEBUG_UART_BOARD_INIT
1869 imply DISTRO_DEFAULTS
1871 imply SARADC_ROCKCHIP
1873 imply SPL_SYS_MALLOC_SIMPLE
1876 imply USB_FUNCTION_FASTBOOT
1878 config ARCH_OCTEONTX
1879 bool "Support OcteonTX SoCs"
1882 select GPIO_EXTRA_HEADER
1886 select BOARD_LATE_INIT
1887 select SYS_CACHE_SHIFT_7
1889 config ARCH_OCTEONTX2
1890 bool "Support OcteonTX2 SoCs"
1893 select GPIO_EXTRA_HEADER
1897 select BOARD_LATE_INIT
1898 select SYS_CACHE_SHIFT_7
1900 config TARGET_THUNDERX_88XX
1901 bool "Support ThunderX 88xx"
1903 select GPIO_EXTRA_HEADER
1906 select SYS_CACHE_SHIFT_7
1909 bool "Support Aspeed SoCs"
1914 config TARGET_DURIAN
1915 bool "Support Phytium Durian Platform"
1917 select GPIO_EXTRA_HEADER
1919 Support for durian platform.
1920 It has 2GB Sdram, uart and pcie.
1922 config TARGET_PRESIDIO_ASIC
1923 bool "Support Cortina Presidio ASIC Platform"
1926 config TARGET_XENGUEST_ARM64
1927 bool "Xen guest ARM64"
1931 select LINUX_KERNEL_IMAGE_HEADER
1936 config ARCH_SUPPORT_TFABOOT
1940 bool "Support for booting from TF-A"
1941 depends on ARCH_SUPPORT_TFABOOT
1944 Some platforms support the setup of secure registers (for instance
1945 for CPU errata handling) or provide secure services like PSCI.
1946 Those services could also be provided by other firmware parts
1947 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
1948 does not need to (and cannot) execute this code.
1949 Enabling this option will make a U-Boot binary that is relying
1950 on other firmware layers to provide secure functionality.
1952 config TI_SECURE_DEVICE
1953 bool "HS Device Type Support"
1954 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1956 If a high secure (HS) device type is being used, this config
1957 must be set. This option impacts various aspects of the
1958 build system (to create signed boot images that can be
1959 authenticated) and the code. See the doc/README.ti-secure
1960 file for further details.
1962 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1963 config ISW_ENTRY_ADDR
1964 hex "Address in memory or XIP address of bootloader entry point"
1965 default 0x402F4000 if AM43XX
1966 default 0x402F0400 if AM33XX
1967 default 0x40301350 if OMAP54XX
1969 After any reset, the boot ROM searches the boot media for a valid
1970 boot image. For non-XIP devices, the ROM then copies the image into
1971 internal memory. For all boot modes, after the ROM processes the
1972 boot image it eventually computes the entry point address depending
1973 on the device type (secure/non-secure), boot media (xip/non-xip) and
1977 source "arch/arm/mach-aspeed/Kconfig"
1979 source "arch/arm/mach-at91/Kconfig"
1981 source "arch/arm/mach-bcm283x/Kconfig"
1983 source "arch/arm/mach-bcmstb/Kconfig"
1985 source "arch/arm/mach-davinci/Kconfig"
1987 source "arch/arm/mach-exynos/Kconfig"
1989 source "arch/arm/mach-highbank/Kconfig"
1991 source "arch/arm/mach-integrator/Kconfig"
1993 source "arch/arm/mach-ipq40xx/Kconfig"
1995 source "arch/arm/mach-k3/Kconfig"
1997 source "arch/arm/mach-keystone/Kconfig"
1999 source "arch/arm/mach-kirkwood/Kconfig"
2001 source "arch/arm/mach-lpc32xx/Kconfig"
2003 source "arch/arm/mach-mvebu/Kconfig"
2005 source "arch/arm/mach-octeontx/Kconfig"
2007 source "arch/arm/mach-octeontx2/Kconfig"
2009 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2011 source "arch/arm/mach-imx/mx2/Kconfig"
2013 source "arch/arm/mach-imx/mx3/Kconfig"
2015 source "arch/arm/mach-imx/mx5/Kconfig"
2017 source "arch/arm/mach-imx/mx6/Kconfig"
2019 source "arch/arm/mach-imx/mx7/Kconfig"
2021 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2023 source "arch/arm/mach-imx/imx8/Kconfig"
2025 source "arch/arm/mach-imx/imx8m/Kconfig"
2027 source "arch/arm/mach-imx/imxrt/Kconfig"
2029 source "arch/arm/mach-imx/mxs/Kconfig"
2031 source "arch/arm/mach-omap2/Kconfig"
2033 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2035 source "arch/arm/mach-orion5x/Kconfig"
2037 source "arch/arm/mach-owl/Kconfig"
2039 source "arch/arm/mach-rmobile/Kconfig"
2041 source "arch/arm/mach-meson/Kconfig"
2043 source "arch/arm/mach-mediatek/Kconfig"
2045 source "arch/arm/mach-qemu/Kconfig"
2047 source "arch/arm/mach-rockchip/Kconfig"
2049 source "arch/arm/mach-s5pc1xx/Kconfig"
2051 source "arch/arm/mach-snapdragon/Kconfig"
2053 source "arch/arm/mach-socfpga/Kconfig"
2055 source "arch/arm/mach-sti/Kconfig"
2057 source "arch/arm/mach-stm32/Kconfig"
2059 source "arch/arm/mach-stm32mp/Kconfig"
2061 source "arch/arm/mach-sunxi/Kconfig"
2063 source "arch/arm/mach-tegra/Kconfig"
2065 source "arch/arm/mach-u8500/Kconfig"
2067 source "arch/arm/mach-uniphier/Kconfig"
2069 source "arch/arm/cpu/armv7/vf610/Kconfig"
2071 source "arch/arm/mach-zynq/Kconfig"
2073 source "arch/arm/mach-zynqmp/Kconfig"
2075 source "arch/arm/mach-versal/Kconfig"
2077 source "arch/arm/mach-zynqmp-r5/Kconfig"
2079 source "arch/arm/cpu/armv7/Kconfig"
2081 source "arch/arm/cpu/armv8/Kconfig"
2083 source "arch/arm/mach-imx/Kconfig"
2085 source "arch/arm/mach-nexell/Kconfig"
2087 source "board/armltd/total_compute/Kconfig"
2089 source "board/bosch/shc/Kconfig"
2090 source "board/bosch/guardian/Kconfig"
2091 source "board/CarMediaLab/flea3/Kconfig"
2092 source "board/Marvell/aspenite/Kconfig"
2093 source "board/Marvell/gplugd/Kconfig"
2094 source "board/Marvell/octeontx/Kconfig"
2095 source "board/Marvell/octeontx2/Kconfig"
2096 source "board/armltd/vexpress64/Kconfig"
2097 source "board/cortina/presidio-asic/Kconfig"
2098 source "board/broadcom/bcm963158/Kconfig"
2099 source "board/broadcom/bcm968360bg/Kconfig"
2100 source "board/broadcom/bcm968580xref/Kconfig"
2101 source "board/broadcom/bcmns3/Kconfig"
2102 source "board/cavium/thunderx/Kconfig"
2103 source "board/eets/pdu001/Kconfig"
2104 source "board/emulation/qemu-arm/Kconfig"
2105 source "board/freescale/ls2080aqds/Kconfig"
2106 source "board/freescale/ls2080ardb/Kconfig"
2107 source "board/freescale/ls1088a/Kconfig"
2108 source "board/freescale/ls1028a/Kconfig"
2109 source "board/freescale/ls1021aqds/Kconfig"
2110 source "board/freescale/ls1043aqds/Kconfig"
2111 source "board/freescale/ls1021atwr/Kconfig"
2112 source "board/freescale/ls1021atsn/Kconfig"
2113 source "board/freescale/ls1021aiot/Kconfig"
2114 source "board/freescale/ls1046aqds/Kconfig"
2115 source "board/freescale/ls1043ardb/Kconfig"
2116 source "board/freescale/ls1046ardb/Kconfig"
2117 source "board/freescale/ls1046afrwy/Kconfig"
2118 source "board/freescale/ls1012aqds/Kconfig"
2119 source "board/freescale/ls1012ardb/Kconfig"
2120 source "board/freescale/ls1012afrdm/Kconfig"
2121 source "board/freescale/lx2160a/Kconfig"
2122 source "board/grinn/chiliboard/Kconfig"
2123 source "board/hisilicon/hikey/Kconfig"
2124 source "board/hisilicon/hikey960/Kconfig"
2125 source "board/hisilicon/poplar/Kconfig"
2126 source "board/isee/igep003x/Kconfig"
2127 source "board/kontron/sl28/Kconfig"
2128 source "board/myir/mys_6ulx/Kconfig"
2129 source "board/seeed/npi_imx6ull/Kconfig"
2130 source "board/socionext/developerbox/Kconfig"
2131 source "board/spear/spear300/Kconfig"
2132 source "board/spear/spear310/Kconfig"
2133 source "board/spear/spear320/Kconfig"
2134 source "board/spear/spear600/Kconfig"
2135 source "board/spear/x600/Kconfig"
2136 source "board/st/stv0991/Kconfig"
2137 source "board/tcl/sl50/Kconfig"
2138 source "board/toradex/colibri_pxa270/Kconfig"
2139 source "board/variscite/dart_6ul/Kconfig"
2140 source "board/vscom/baltos/Kconfig"
2141 source "board/phytium/durian/Kconfig"
2142 source "board/xen/xenguest_arm64/Kconfig"
2143 source "board/keymile/Kconfig"
2145 source "arch/arm/Kconfig.debug"
2150 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2151 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2152 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64