1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed from
19 almost any 4K aligned address. This logic relies on the relocation
20 information that is embedded in the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
25 default n if ARCH_QEMU
26 default y if POSITION_INDEPENDENT
28 U-Boot typically uses a hard-coded value for the stack pointer
29 before relocation. Enable this option to instead calculate the
30 initial SP at run-time. This is useful to avoid hard-coding addresses
31 into U-Boot, so that it can be loaded and executed at arbitrary
32 addresses and thus avoid using arbitrary addresses at runtime.
34 If this option is enabled, the early stack pointer is set to
35 &_bss_start with a offset value added. The offset is specified by
36 SYS_INIT_SP_BSS_OFFSET.
38 config SYS_INIT_SP_BSS_OFFSET
39 int "Early stack offset from the .bss base address"
40 depends on INIT_SP_RELATIVE
43 This option's value is the offset added to &_bss_start in order to
44 calculate the stack pointer. This offset should be large enough so
45 that the early malloc region, global data (gd), and early stack usage
46 do not overlap any appended DTB.
48 config LINUX_KERNEL_IMAGE_HEADER
51 Place a Linux kernel image header at the start of the U-Boot binary.
52 The format of the header is described in the Linux kernel source at
53 Documentation/arm64/booting.txt. This feature is useful since the
54 image header reports the amount of memory (BSS and similar) that
55 U-Boot needs to use, but which isn't part of the binary.
57 if LINUX_KERNEL_IMAGE_HEADER
58 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
61 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
62 TEXT_OFFSET value written to the Linux kernel image header.
72 ARM GICV3 Interrupt translation service (ITS).
73 Basic support for programming locality specific peripheral
74 interrupts (LPI) configuration tables and enable LPI tables.
75 LPI configuration table can be used by u-boot or Linux.
76 ARM GICV3 has limitation, once the LPI table is enabled, LPI
77 configuration table can not be re-programmed, unless GICV3 reset.
83 config DMA_ADDR_T_64BIT
93 config GPIO_EXTRA_HEADER
96 # Used for compatibility with asm files copied from the kernel
97 config ARM_ASM_UNIFIED
101 # Used for compatibility with asm files copied from the kernel
105 config SYS_ICACHE_OFF
106 bool "Do not enable icache"
109 Do not enable instruction cache in U-Boot.
111 config SPL_SYS_ICACHE_OFF
112 bool "Do not enable icache in SPL"
114 default SYS_ICACHE_OFF
116 Do not enable instruction cache in SPL.
118 config SYS_DCACHE_OFF
119 bool "Do not enable dcache"
122 Do not enable data cache in U-Boot.
124 config SPL_SYS_DCACHE_OFF
125 bool "Do not enable dcache in SPL"
127 default SYS_DCACHE_OFF
129 Do not enable data cache in SPL.
131 config SYS_ARM_CACHE_CP15
132 bool "CP15 based cache enabling support"
134 Select this if your processor suports enabling caches by using
138 bool "MMU-based Paged Memory Management Support"
139 select SYS_ARM_CACHE_CP15
141 Select if you want MMU-based virtualised addressing space
142 support via paged memory management.
145 bool 'Use the ARM v7 PMSA Compliant MPU'
147 Some ARM systems without an MMU have instead a Memory Protection
148 Unit (MPU) that defines the type and permissions for regions of
150 If your CPU has an MPU then you should choose 'y' here unless you
151 know that you do not want to use the MPU.
153 # If set, the workarounds for these ARM errata are applied early during U-Boot
154 # startup. Note that in general these options force the workarounds to be
155 # applied; no CPU-type/version detection exists, unlike the similar options in
156 # the Linux kernel. Do not set these options unless they apply! Also note that
157 # the following can be machine-specific errata. These do have ability to
158 # provide rudimentary version and machine-specific checks, but expect no
160 # CONFIG_ARM_ERRATA_430973
161 # CONFIG_ARM_ERRATA_454179
162 # CONFIG_ARM_ERRATA_621766
163 # CONFIG_ARM_ERRATA_798870
164 # CONFIG_ARM_ERRATA_801819
165 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
166 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
168 config ARM_ERRATA_430973
171 config ARM_ERRATA_454179
174 config ARM_ERRATA_621766
177 config ARM_ERRATA_716044
180 config ARM_ERRATA_725233
183 config ARM_ERRATA_742230
186 config ARM_ERRATA_743622
189 config ARM_ERRATA_751472
192 config ARM_ERRATA_761320
195 config ARM_ERRATA_773022
198 config ARM_ERRATA_774769
201 config ARM_ERRATA_794072
204 config ARM_ERRATA_798870
207 config ARM_ERRATA_801819
210 config ARM_ERRATA_826974
213 config ARM_ERRATA_828024
216 config ARM_ERRATA_829520
219 config ARM_ERRATA_833069
222 config ARM_ERRATA_833471
225 config ARM_ERRATA_845369
228 config ARM_ERRATA_852421
231 config ARM_ERRATA_852423
234 config ARM_ERRATA_855873
237 config ARM_CORTEX_A8_CVE_2017_5715
240 config ARM_CORTEX_A15_CVE_2017_5715
245 select SYS_CACHE_SHIFT_5
250 select SYS_CACHE_SHIFT_5
255 select SYS_CACHE_SHIFT_5
260 select SYS_CACHE_SHIFT_5
265 select SYS_CACHE_SHIFT_5
271 select SYS_CACHE_SHIFT_5
278 select SYS_CACHE_SHIFT_6
285 select SYS_CACHE_SHIFT_5
286 select SYS_THUMB_BUILD
292 select SYS_ARM_CACHE_CP15
294 select SYS_CACHE_SHIFT_6
298 select SYS_CACHE_SHIFT_5
303 select SYS_CACHE_SHIFT_5
307 default "arm720t" if CPU_ARM720T
308 default "arm920t" if CPU_ARM920T
309 default "arm926ejs" if CPU_ARM926EJS
310 default "arm946es" if CPU_ARM946ES
311 default "arm1136" if CPU_ARM1136
312 default "arm1176" if CPU_ARM1176
313 default "armv7" if CPU_V7A
314 default "armv7" if CPU_V7R
315 default "armv7m" if CPU_V7M
316 default "pxa" if CPU_PXA
317 default "sa1100" if CPU_SA1100
318 default "armv8" if ARM64
322 default 4 if CPU_ARM720T
323 default 4 if CPU_ARM920T
324 default 5 if CPU_ARM926EJS
325 default 5 if CPU_ARM946ES
326 default 6 if CPU_ARM1136
327 default 6 if CPU_ARM1176
332 default 4 if CPU_SA1100
335 config SYS_CACHE_SHIFT_5
338 config SYS_CACHE_SHIFT_6
341 config SYS_CACHE_SHIFT_7
344 config SYS_CACHELINE_SIZE
346 default 128 if SYS_CACHE_SHIFT_7
347 default 64 if SYS_CACHE_SHIFT_6
348 default 32 if SYS_CACHE_SHIFT_5
351 prompt "Select the ARM data write cache policy"
352 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
354 default SYS_ARM_CACHE_WRITEBACK
356 config SYS_ARM_CACHE_WRITEBACK
357 bool "Write-back (WB)"
359 A write updates the cache only and marks the cache line as dirty.
360 External memory is updated only when the line is evicted or explicitly
363 config SYS_ARM_CACHE_WRITETHROUGH
364 bool "Write-through (WT)"
366 A write updates both the cache and the external memory system.
367 This does not mark the cache line as dirty.
369 config SYS_ARM_CACHE_WRITEALLOC
370 bool "Write allocation (WA)"
372 A cache line is allocated on a write miss. This means that executing a
373 store instruction on the processor might cause a burst read to occur.
374 There is a linefill to obtain the data for the cache line, before the
379 bool "Enable ARCH_CPU_INIT"
381 Some architectures require a call to arch_cpu_init().
382 Say Y here to enable it
384 config SYS_ARCH_TIMER
385 bool "ARM Generic Timer support"
386 depends on CPU_V7A || ARM64
389 The ARM Generic Timer (aka arch-timer) provides an architected
390 interface to a timer source on an SoC.
391 It is mandatory for ARMv8 implementation and widely available
395 bool "Support for ARM SMC Calling Convention (SMCCC)"
396 depends on CPU_V7A || ARM64
399 Say Y here if you want to enable ARM SMC Calling Convention.
400 This should be enabled if U-Boot needs to communicate with system
401 firmware (for example, PSCI) according to SMCCC.
404 bool "support boot from semihosting"
406 In emulated environments, semihosting is a way for
407 the hosted environment to call out to the emulator to
408 retrieve files from the host machine.
410 config SYS_THUMB_BUILD
411 bool "Build U-Boot using the Thumb instruction set"
414 Use this flag to build U-Boot using the Thumb instruction set for
415 ARM architectures. Thumb instruction set provides better code
416 density. For ARM architectures that support Thumb2 this flag will
417 result in Thumb2 code generated by GCC.
419 config SPL_SYS_THUMB_BUILD
420 bool "Build SPL using the Thumb instruction set"
421 default y if SYS_THUMB_BUILD
422 depends on !ARM64 && SPL
424 Use this flag to build SPL using the Thumb instruction set for
425 ARM architectures. Thumb instruction set provides better code
426 density. For ARM architectures that support Thumb2 this flag will
427 result in Thumb2 code generated by GCC.
429 config TPL_SYS_THUMB_BUILD
430 bool "Build TPL using the Thumb instruction set"
431 default y if SYS_THUMB_BUILD
432 depends on TPL && !ARM64
434 Use this flag to build TPL using the Thumb instruction set for
435 ARM architectures. Thumb instruction set provides better code
436 density. For ARM architectures that support Thumb2 this flag will
437 result in Thumb2 code generated by GCC.
440 config SYS_L2CACHE_OFF
443 If SoC does not support L2CACHE or one does not want to enable
444 L2CACHE, choose this option.
446 config ENABLE_ARM_SOC_BOOT0_HOOK
447 bool "prepare BOOT0 header"
449 If the SoC's BOOT0 requires a header area filled with (magic)
450 values, then choose this option, and create a file included as
451 <asm/arch/boot0.h> which contains the required assembler code.
453 config ARM_CORTEX_CPU_IS_UP
457 config USE_ARCH_MEMCPY
458 bool "Use an assembly optimized implementation of memcpy"
462 Enable the generation of an optimized version of memcpy.
463 Such an implementation may be faster under some conditions
464 but may increase the binary size.
466 config SPL_USE_ARCH_MEMCPY
467 bool "Use an assembly optimized implementation of memcpy for SPL"
468 default y if USE_ARCH_MEMCPY
469 depends on !ARM64 && SPL
471 Enable the generation of an optimized version of memcpy.
472 Such an implementation may be faster under some conditions
473 but may increase the binary size.
475 config TPL_USE_ARCH_MEMCPY
476 bool "Use an assembly optimized implementation of memcpy for TPL"
477 default y if USE_ARCH_MEMCPY
478 depends on !ARM64 && TPL
480 Enable the generation of an optimized version of memcpy.
481 Such an implementation may be faster under some conditions
482 but may increase the binary size.
484 config USE_ARCH_MEMSET
485 bool "Use an assembly optimized implementation of memset"
489 Enable the generation of an optimized version of memset.
490 Such an implementation may be faster under some conditions
491 but may increase the binary size.
493 config SPL_USE_ARCH_MEMSET
494 bool "Use an assembly optimized implementation of memset for SPL"
495 default y if USE_ARCH_MEMSET
496 depends on !ARM64 && SPL
498 Enable the generation of an optimized version of memset.
499 Such an implementation may be faster under some conditions
500 but may increase the binary size.
502 config TPL_USE_ARCH_MEMSET
503 bool "Use an assembly optimized implementation of memset for TPL"
504 default y if USE_ARCH_MEMSET
505 depends on !ARM64 && TPL
507 Enable the generation of an optimized version of memset.
508 Such an implementation may be faster under some conditions
509 but may increase the binary size.
511 config ARM64_SUPPORT_AARCH32
512 bool "ARM64 system support AArch32 execution state"
514 default y if !TARGET_THUNDERX_88XX
516 This ARM64 system supports AArch32 execution state.
519 prompt "Target select"
524 select GPIO_EXTRA_HEADER
525 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
526 select SPL_SEPARATE_BSS if SPL
528 config TARGET_ASPENITE
529 bool "Support aspenite"
531 select GPIO_EXTRA_HEADER
536 select GPIO_EXTRA_HEADER
537 select SPL_DM_SPI if SPL
540 Support for TI's DaVinci platform.
543 bool "Marvell Kirkwood"
544 select ARCH_MISC_INIT
545 select BOARD_EARLY_INIT_F
547 select GPIO_EXTRA_HEADER
550 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
556 select GPIO_EXTRA_HEADER
557 select SPL_DM_SPI if SPL
558 select SPL_DM_SPI_FLASH if SPL
567 select GPIO_EXTRA_HEADER
569 config TARGET_STV0991
570 bool "Support stv0991"
576 select GPIO_EXTRA_HEADER
585 select GPIO_EXTRA_HEADER
588 bool "Broadcom BCM283X family"
592 select GPIO_EXTRA_HEADER
595 select SERIAL_SEARCH_ALL
600 bool "Broadcom BCM63158 family"
606 bool "Broadcom BCM68360 family"
612 bool "Broadcom BCM6858 family"
618 bool "Broadcom BCM7XXX family"
621 select GPIO_EXTRA_HEADER
623 select OF_PRIOR_STAGE
626 This enables support for Broadcom ARM-based set-top box
627 chipsets, including the 7445 family of chips.
629 config TARGET_BCMCYGNUS
630 bool "Support bcmcygnus"
632 select GPIO_EXTRA_HEADER
634 imply BCM_SF2_ETH_GMAC
642 bool "Support Broadcom Northstar2"
644 select GPIO_EXTRA_HEADER
646 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
647 ARMv8 Cortex-A57 processors targeting a broad range of networking
651 bool "Support Broadcom NS3"
653 select BOARD_LATE_INIT
655 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
656 ARMv8 Cortex-A72 processors targeting a broad range of networking
660 bool "Samsung EXYNOS"
670 select GPIO_EXTRA_HEADER
671 imply SYS_THUMB_BUILD
676 bool "Samsung S5PC1XX"
682 select GPIO_EXTRA_HEADER
686 bool "Calxeda Highbank"
699 config ARCH_INTEGRATOR
700 bool "ARM Ltd. Integrator family"
703 select GPIO_EXTRA_HEADER
708 bool "Qualcomm IPQ40xx SoCs"
714 select GPIO_EXTRA_HEADER
726 select GPIO_EXTRA_HEADER
728 select SYS_ARCH_TIMER
729 select SYS_THUMB_BUILD
735 bool "Texas Instruments' K3 Architecture"
740 config ARCH_OMAP2PLUS
743 select GPIO_EXTRA_HEADER
744 select SPL_BOARD_INIT if SPL
745 select SPL_STACK_R if SPL
747 imply TI_SYSC if DM && OF_CONTROL
752 select GPIO_EXTRA_HEADER
753 imply DISTRO_DEFAULTS
756 Support for the Meson SoC family developed by Amlogic Inc.,
757 targeted at media players and tablet computers. We currently
758 support the S905 (GXBaby) 64-bit SoC.
763 select GPIO_EXTRA_HEADER
766 select SPL_LIBCOMMON_SUPPORT if SPL
767 select SPL_LIBGENERIC_SUPPORT if SPL
768 select SPL_OF_CONTROL if SPL
771 Support for the MediaTek SoCs family developed by MediaTek Inc.
772 Please refer to doc/README.mediatek for more information.
775 bool "NXP LPC32xx platform"
780 select GPIO_EXTRA_HEADER
786 bool "NXP i.MX8 platform"
789 select GPIO_EXTRA_HEADER
791 select ENABLE_ARM_SOC_BOOT0_HOOK
794 bool "NXP i.MX8M platform"
796 select GPIO_EXTRA_HEADER
797 select SYS_FSL_HAS_SEC if IMX_HAB
798 select SYS_FSL_SEC_COMPAT_4
799 select SYS_FSL_SEC_LE
805 bool "NXP i.MX8ULP platform"
810 select GPIO_EXTRA_HEADER
814 bool "NXP i.MXRT platform"
818 select GPIO_EXTRA_HEADER
823 bool "NXP i.MX23 family"
825 select GPIO_EXTRA_HEADER
832 select GPIO_EXTRA_HEADER
836 bool "NXP i.MX28 family"
838 select GPIO_EXTRA_HEADER
843 bool "NXP i.MX31 family"
845 select GPIO_EXTRA_HEADER
850 select GPIO_EXTRA_HEADER
851 select SYS_FSL_HAS_SEC if IMX_HAB
852 select SYS_FSL_SEC_COMPAT_4
853 select SYS_FSL_SEC_LE
854 select ROM_UNIFIED_SECTIONS
856 imply SYS_THUMB_BUILD
860 select ARCH_MISC_INIT
862 select GPIO_EXTRA_HEADER
863 select SYS_FSL_HAS_SEC if IMX_HAB
864 select SYS_FSL_SEC_COMPAT_4
865 select SYS_FSL_SEC_LE
866 imply BOARD_EARLY_INIT_F
868 imply SYS_THUMB_BUILD
873 select GPIO_EXTRA_HEADER
874 select SYS_FSL_HAS_SEC
875 select SYS_FSL_SEC_COMPAT_4
876 select SYS_FSL_SEC_LE
878 imply SYS_THUMB_BUILD
882 default "arch/arm/mach-omap2/u-boot-spl.lds"
887 select BOARD_EARLY_INIT_F
889 select GPIO_EXTRA_HEADER
893 bool "Nexell S5P4418/S5P6818 SoC"
894 select ENABLE_ARM_SOC_BOOT0_HOOK
896 select GPIO_EXTRA_HEADER
899 bool "Actions Semi OWL SoCs"
903 select GPIO_EXTRA_HEADER
908 select SYS_RELOC_GD_ENV_ADDR
912 bool "QEMU Virtual Platform"
923 bool "Renesas ARM SoCs"
926 select GPIO_EXTRA_HEADER
927 imply BOARD_EARLY_INIT_F
930 imply SYS_THUMB_BUILD
931 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
933 config ARCH_SNAPDRAGON
934 bool "Qualcomm Snapdragon SoCs"
939 select GPIO_EXTRA_HEADER
948 bool "Altera SOCFPGA family"
949 select ARCH_EARLY_INIT_R
950 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
951 select ARM64 if TARGET_SOCFPGA_SOC64
952 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
955 select GPIO_EXTRA_HEADER
956 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
958 select SPL_DM_RESET if DM_RESET
960 select SPL_LIBCOMMON_SUPPORT
961 select SPL_LIBGENERIC_SUPPORT
962 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
963 select SPL_OF_CONTROL
964 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
965 select SPL_SERIAL_SUPPORT
970 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
972 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
973 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
983 imply SPL_DM_SPI_FLASH
984 imply SPL_LIBDISK_SUPPORT
985 imply SPL_MMC_SUPPORT
986 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
987 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
988 imply SPL_SPI_FLASH_SUPPORT
989 imply SPL_SPI_SUPPORT
993 bool "Support sunxi (Allwinner) SoCs"
996 select CMD_MMC if MMC
997 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1003 select DM_MMC if MMC
1004 select DM_SCSI if SCSI
1006 select GPIO_EXTRA_HEADER
1007 select OF_BOARD_SETUP
1010 select SPECIFY_CONSOLE_INDEX
1011 select SPL_STACK_R if SPL
1012 select SPL_SYS_MALLOC_SIMPLE if SPL
1013 select SPL_SYS_THUMB_BUILD if !ARM64
1016 select SYS_THUMB_BUILD if !ARM64
1017 select USB if DISTRO_DEFAULTS
1018 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1019 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1020 select SPL_USE_TINY_PRINTF
1022 select SYS_RELOC_GD_ENV_ADDR
1023 imply BOARD_LATE_INIT
1026 imply CMD_UBI if MTD_RAW_NAND
1027 imply DISTRO_DEFAULTS
1030 imply OF_LIBFDT_OVERLAY
1031 imply PRE_CONSOLE_BUFFER
1033 imply SPL_LIBCOMMON_SUPPORT
1034 imply SPL_LIBGENERIC_SUPPORT
1035 imply SPL_MMC_SUPPORT if MMC
1037 imply SPL_SERIAL_SUPPORT
1041 bool "ST-Ericsson U8500 Series"
1045 select DM_MMC if MMC
1050 imply ARM_PL180_MMCI
1052 imply NOMADIK_MTU_TIMER
1055 imply SYSRESET_SYSCON
1058 bool "Support Xilinx Versal Platform"
1062 select DM_ETH if NET
1063 select DM_MMC if MMC
1065 select GPIO_EXTRA_HEADER
1068 imply BOARD_LATE_INIT
1069 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1072 bool "Freescale Vybrid"
1074 select GPIO_EXTRA_HEADER
1075 select SYS_FSL_ERRATUM_ESDHC111
1080 bool "Xilinx Zynq based platform"
1085 select DM_ETH if NET
1086 select DM_MMC if MMC
1090 select GPIO_EXTRA_HEADER
1093 select SPL_BOARD_INIT if SPL
1094 select SPL_CLK if SPL
1095 select SPL_DM if SPL
1096 select SPL_DM_SPI if SPL
1097 select SPL_DM_SPI_FLASH if SPL
1098 select SPL_OF_CONTROL if SPL
1099 select SPL_SEPARATE_BSS if SPL
1101 imply ARCH_EARLY_INIT_R
1102 imply BOARD_LATE_INIT
1106 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1109 config ARCH_ZYNQMP_R5
1110 bool "Xilinx ZynqMP R5 based platform"
1114 select DM_ETH if NET
1115 select DM_MMC if MMC
1117 select GPIO_EXTRA_HEADER
1123 bool "Xilinx ZynqMP based platform"
1127 select DM_ETH if NET
1129 select DM_MMC if MMC
1131 select DM_SPI if SPI
1132 select DM_SPI_FLASH if DM_SPI
1134 select GPIO_EXTRA_HEADER
1136 select SPL_BOARD_INIT if SPL
1137 select SPL_CLK if SPL
1138 select SPL_DM if SPL
1139 select SPL_DM_SPI if SPI && SPL_DM
1140 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1141 select SPL_DM_MAILBOX if SPL
1142 select SPL_FIRMWARE if SPL
1143 select SPL_SEPARATE_BSS if SPL
1147 imply BOARD_LATE_INIT
1149 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1156 select GPIO_EXTRA_HEADER
1157 imply DISTRO_DEFAULTS
1160 config TARGET_VEXPRESS64_AEMV8A
1161 bool "Support vexpress_aemv8a"
1163 select GPIO_EXTRA_HEADER
1166 config TARGET_VEXPRESS64_BASE_FVP
1167 bool "Support Versatile Express ARMv8a FVP BASE model"
1169 select GPIO_EXTRA_HEADER
1173 config TARGET_VEXPRESS64_JUNO
1174 bool "Support Versatile Express Juno Development Platform"
1176 select GPIO_EXTRA_HEADER
1189 config TARGET_TOTAL_COMPUTE
1190 bool "Support Total Compute Platform"
1198 config TARGET_LS2080A_EMU
1199 bool "Support ls2080a_emu"
1202 select ARMV8_MULTIENTRY
1203 select FSL_DDR_SYNC_REFRESH
1204 select GPIO_EXTRA_HEADER
1206 Support for Freescale LS2080A_EMU platform.
1207 The LS2080A Development System (EMULATOR) is a pre-silicon
1208 development platform that supports the QorIQ LS2080A
1209 Layerscape Architecture processor.
1211 config TARGET_LS1088AQDS
1212 bool "Support ls1088aqds"
1215 select ARMV8_MULTIENTRY
1216 select ARCH_SUPPORT_TFABOOT
1217 select BOARD_LATE_INIT
1218 select GPIO_EXTRA_HEADER
1220 select FSL_DDR_INTERACTIVE if !SD_BOOT
1222 Support for NXP LS1088AQDS platform.
1223 The LS1088A Development System (QDS) is a high-performance
1224 development platform that supports the QorIQ LS1088A
1225 Layerscape Architecture processor.
1227 config TARGET_LS2080AQDS
1228 bool "Support ls2080aqds"
1231 select ARMV8_MULTIENTRY
1232 select ARCH_SUPPORT_TFABOOT
1233 select BOARD_LATE_INIT
1234 select GPIO_EXTRA_HEADER
1239 select FSL_DDR_INTERACTIVE if !SPL
1241 Support for Freescale LS2080AQDS platform.
1242 The LS2080A Development System (QDS) is a high-performance
1243 development platform that supports the QorIQ LS2080A
1244 Layerscape Architecture processor.
1246 config TARGET_LS2080ARDB
1247 bool "Support ls2080ardb"
1250 select ARMV8_MULTIENTRY
1251 select ARCH_SUPPORT_TFABOOT
1252 select BOARD_LATE_INIT
1255 select FSL_DDR_INTERACTIVE if !SPL
1256 select GPIO_EXTRA_HEADER
1260 Support for Freescale LS2080ARDB platform.
1261 The LS2080A Reference design board (RDB) is a high-performance
1262 development platform that supports the QorIQ LS2080A
1263 Layerscape Architecture processor.
1265 config TARGET_LS2081ARDB
1266 bool "Support ls2081ardb"
1269 select ARMV8_MULTIENTRY
1270 select BOARD_LATE_INIT
1271 select GPIO_EXTRA_HEADER
1274 Support for Freescale LS2081ARDB platform.
1275 The LS2081A Reference design board (RDB) is a high-performance
1276 development platform that supports the QorIQ LS2081A/LS2041A
1277 Layerscape Architecture processor.
1279 config TARGET_LX2160ARDB
1280 bool "Support lx2160ardb"
1283 select ARMV8_MULTIENTRY
1284 select ARCH_SUPPORT_TFABOOT
1285 select BOARD_LATE_INIT
1286 select GPIO_EXTRA_HEADER
1288 Support for NXP LX2160ARDB platform.
1289 The lx2160ardb (LX2160A Reference design board (RDB)
1290 is a high-performance development platform that supports the
1291 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1293 config TARGET_LX2160AQDS
1294 bool "Support lx2160aqds"
1297 select ARMV8_MULTIENTRY
1298 select ARCH_SUPPORT_TFABOOT
1299 select BOARD_LATE_INIT
1300 select GPIO_EXTRA_HEADER
1302 Support for NXP LX2160AQDS platform.
1303 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1304 is a high-performance development platform that supports the
1305 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1307 config TARGET_LX2162AQDS
1308 bool "Support lx2162aqds"
1310 select ARCH_MISC_INIT
1312 select ARMV8_MULTIENTRY
1313 select ARCH_SUPPORT_TFABOOT
1314 select BOARD_LATE_INIT
1315 select GPIO_EXTRA_HEADER
1317 Support for NXP LX2162AQDS platform.
1318 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1321 bool "Support HiKey 96boards Consumer Edition Platform"
1326 select GPIO_EXTRA_HEADER
1329 select SPECIFY_CONSOLE_INDEX
1332 Support for HiKey 96boards platform. It features a HI6220
1333 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1335 config TARGET_HIKEY960
1336 bool "Support HiKey960 96boards Consumer Edition Platform"
1340 select GPIO_EXTRA_HEADER
1345 Support for HiKey960 96boards platform. It features a HI3660
1346 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1348 config TARGET_POPLAR
1349 bool "Support Poplar 96boards Enterprise Edition Platform"
1353 select GPIO_EXTRA_HEADER
1358 Support for Poplar 96boards EE platform. It features a HI3798cv200
1359 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1360 making it capable of running any commercial set-top solution based on
1363 config TARGET_LS1012AQDS
1364 bool "Support ls1012aqds"
1367 select ARCH_SUPPORT_TFABOOT
1368 select BOARD_LATE_INIT
1369 select GPIO_EXTRA_HEADER
1371 Support for Freescale LS1012AQDS platform.
1372 The LS1012A Development System (QDS) is a high-performance
1373 development platform that supports the QorIQ LS1012A
1374 Layerscape Architecture processor.
1376 config TARGET_LS1012ARDB
1377 bool "Support ls1012ardb"
1380 select ARCH_SUPPORT_TFABOOT
1381 select BOARD_LATE_INIT
1382 select GPIO_EXTRA_HEADER
1386 Support for Freescale LS1012ARDB platform.
1387 The LS1012A Reference design board (RDB) is a high-performance
1388 development platform that supports the QorIQ LS1012A
1389 Layerscape Architecture processor.
1391 config TARGET_LS1012A2G5RDB
1392 bool "Support ls1012a2g5rdb"
1395 select ARCH_SUPPORT_TFABOOT
1396 select BOARD_LATE_INIT
1397 select GPIO_EXTRA_HEADER
1400 Support for Freescale LS1012A2G5RDB platform.
1401 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1402 development platform that supports the QorIQ LS1012A
1403 Layerscape Architecture processor.
1405 config TARGET_LS1012AFRWY
1406 bool "Support ls1012afrwy"
1409 select ARCH_SUPPORT_TFABOOT
1410 select BOARD_LATE_INIT
1411 select GPIO_EXTRA_HEADER
1415 Support for Freescale LS1012AFRWY platform.
1416 The LS1012A FRWY board (FRWY) is a high-performance
1417 development platform that supports the QorIQ LS1012A
1418 Layerscape Architecture processor.
1420 config TARGET_LS1012AFRDM
1421 bool "Support ls1012afrdm"
1424 select ARCH_SUPPORT_TFABOOT
1425 select GPIO_EXTRA_HEADER
1427 Support for Freescale LS1012AFRDM platform.
1428 The LS1012A Freedom board (FRDM) is a high-performance
1429 development platform that supports the QorIQ LS1012A
1430 Layerscape Architecture processor.
1432 config TARGET_LS1028AQDS
1433 bool "Support ls1028aqds"
1436 select ARMV8_MULTIENTRY
1437 select ARCH_SUPPORT_TFABOOT
1438 select BOARD_LATE_INIT
1439 select GPIO_EXTRA_HEADER
1441 Support for Freescale LS1028AQDS platform
1442 The LS1028A Development System (QDS) is a high-performance
1443 development platform that supports the QorIQ LS1028A
1444 Layerscape Architecture processor.
1446 config TARGET_LS1028ARDB
1447 bool "Support ls1028ardb"
1450 select ARMV8_MULTIENTRY
1451 select ARCH_SUPPORT_TFABOOT
1452 select BOARD_LATE_INIT
1453 select GPIO_EXTRA_HEADER
1455 Support for Freescale LS1028ARDB platform
1456 The LS1028A Development System (RDB) is a high-performance
1457 development platform that supports the QorIQ LS1028A
1458 Layerscape Architecture processor.
1460 config TARGET_LS1088ARDB
1461 bool "Support ls1088ardb"
1464 select ARMV8_MULTIENTRY
1465 select ARCH_SUPPORT_TFABOOT
1466 select BOARD_LATE_INIT
1468 select FSL_DDR_INTERACTIVE if !SD_BOOT
1469 select GPIO_EXTRA_HEADER
1471 Support for NXP LS1088ARDB platform.
1472 The LS1088A Reference design board (RDB) is a high-performance
1473 development platform that supports the QorIQ LS1088A
1474 Layerscape Architecture processor.
1476 config TARGET_LS1021AQDS
1477 bool "Support ls1021aqds"
1479 select ARCH_SUPPORT_PSCI
1480 select BOARD_EARLY_INIT_F
1481 select BOARD_LATE_INIT
1483 select CPU_V7_HAS_NONSEC
1484 select CPU_V7_HAS_VIRT
1485 select LS1_DEEP_SLEEP
1488 select FSL_DDR_INTERACTIVE
1489 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1490 select GPIO_EXTRA_HEADER
1491 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1494 config TARGET_LS1021ATWR
1495 bool "Support ls1021atwr"
1497 select ARCH_SUPPORT_PSCI
1498 select BOARD_EARLY_INIT_F
1499 select BOARD_LATE_INIT
1501 select CPU_V7_HAS_NONSEC
1502 select CPU_V7_HAS_VIRT
1503 select LS1_DEEP_SLEEP
1505 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1506 select GPIO_EXTRA_HEADER
1509 config TARGET_PG_WCOM_SELI8
1510 bool "Support Hitachi-Powergrids SELI8 service unit card"
1512 select ARCH_SUPPORT_PSCI
1513 select BOARD_EARLY_INIT_F
1514 select BOARD_LATE_INIT
1516 select CPU_V7_HAS_NONSEC
1517 select CPU_V7_HAS_VIRT
1519 select FSL_DDR_INTERACTIVE
1520 select GPIO_EXTRA_HEADER
1524 Support for Hitachi-Powergrids SELI8 service unit card.
1525 SELI8 is a QorIQ LS1021a based service unit card used
1526 in XMC20 and FOX615 product families.
1528 config TARGET_PG_WCOM_EXPU1
1529 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1531 select ARCH_SUPPORT_PSCI
1532 select BOARD_EARLY_INIT_F
1533 select BOARD_LATE_INIT
1535 select CPU_V7_HAS_NONSEC
1536 select CPU_V7_HAS_VIRT
1538 select FSL_DDR_INTERACTIVE
1542 Support for Hitachi-Powergrids EXPU1 service unit card.
1543 EXPU1 is a QorIQ LS1021a based service unit card used
1544 in XMC20 and FOX615 product families.
1546 config TARGET_LS1021ATSN
1547 bool "Support ls1021atsn"
1549 select ARCH_SUPPORT_PSCI
1550 select BOARD_EARLY_INIT_F
1551 select BOARD_LATE_INIT
1553 select CPU_V7_HAS_NONSEC
1554 select CPU_V7_HAS_VIRT
1555 select LS1_DEEP_SLEEP
1557 select GPIO_EXTRA_HEADER
1560 config TARGET_LS1021AIOT
1561 bool "Support ls1021aiot"
1563 select ARCH_SUPPORT_PSCI
1564 select BOARD_LATE_INIT
1566 select CPU_V7_HAS_NONSEC
1567 select CPU_V7_HAS_VIRT
1569 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1570 select GPIO_EXTRA_HEADER
1573 Support for Freescale LS1021AIOT platform.
1574 The LS1021A Freescale board (IOT) is a high-performance
1575 development platform that supports the QorIQ LS1021A
1576 Layerscape Architecture processor.
1578 config TARGET_LS1043AQDS
1579 bool "Support ls1043aqds"
1582 select ARMV8_MULTIENTRY
1583 select ARCH_SUPPORT_TFABOOT
1584 select BOARD_EARLY_INIT_F
1585 select BOARD_LATE_INIT
1587 select FSL_DDR_INTERACTIVE if !SPL
1588 select FSL_DSPI if !SPL_NO_DSPI
1589 select DM_SPI_FLASH if FSL_DSPI
1590 select GPIO_EXTRA_HEADER
1594 Support for Freescale LS1043AQDS platform.
1596 config TARGET_LS1043ARDB
1597 bool "Support ls1043ardb"
1600 select ARMV8_MULTIENTRY
1601 select ARCH_SUPPORT_TFABOOT
1602 select BOARD_EARLY_INIT_F
1603 select BOARD_LATE_INIT
1605 select FSL_DSPI if !SPL_NO_DSPI
1606 select DM_SPI_FLASH if FSL_DSPI
1607 select GPIO_EXTRA_HEADER
1609 Support for Freescale LS1043ARDB platform.
1611 config TARGET_LS1046AQDS
1612 bool "Support ls1046aqds"
1615 select ARMV8_MULTIENTRY
1616 select ARCH_SUPPORT_TFABOOT
1617 select BOARD_EARLY_INIT_F
1618 select BOARD_LATE_INIT
1619 select DM_SPI_FLASH if DM_SPI
1621 select FSL_DDR_BIST if !SPL
1622 select FSL_DDR_INTERACTIVE if !SPL
1623 select FSL_DDR_INTERACTIVE if !SPL
1624 select GPIO_EXTRA_HEADER
1627 Support for Freescale LS1046AQDS platform.
1628 The LS1046A Development System (QDS) is a high-performance
1629 development platform that supports the QorIQ LS1046A
1630 Layerscape Architecture processor.
1632 config TARGET_LS1046ARDB
1633 bool "Support ls1046ardb"
1636 select ARMV8_MULTIENTRY
1637 select ARCH_SUPPORT_TFABOOT
1638 select BOARD_EARLY_INIT_F
1639 select BOARD_LATE_INIT
1640 select DM_SPI_FLASH if DM_SPI
1641 select POWER_MC34VR500
1644 select FSL_DDR_INTERACTIVE if !SPL
1645 select GPIO_EXTRA_HEADER
1648 Support for Freescale LS1046ARDB platform.
1649 The LS1046A Reference Design Board (RDB) is a high-performance
1650 development platform that supports the QorIQ LS1046A
1651 Layerscape Architecture processor.
1653 config TARGET_LS1046AFRWY
1654 bool "Support ls1046afrwy"
1657 select ARMV8_MULTIENTRY
1658 select ARCH_SUPPORT_TFABOOT
1659 select BOARD_EARLY_INIT_F
1660 select BOARD_LATE_INIT
1661 select DM_SPI_FLASH if DM_SPI
1662 select GPIO_EXTRA_HEADER
1665 Support for Freescale LS1046AFRWY platform.
1666 The LS1046A Freeway Board (FRWY) is a high-performance
1667 development platform that supports the QorIQ LS1046A
1668 Layerscape Architecture processor.
1674 select ARMV8_MULTIENTRY
1690 select GPIO_EXTRA_HEADER
1691 select SPL_DM if SPL
1692 select SPL_DM_SPI if SPL
1693 select SPL_DM_SPI_FLASH if SPL
1694 select SPL_DM_I2C if SPL
1695 select SPL_DM_MMC if SPL
1696 select SPL_DM_SERIAL if SPL
1698 Support for Kontron SMARC-sAL28 board.
1700 config TARGET_COLIBRI_PXA270
1701 bool "Support colibri_pxa270"
1703 select GPIO_EXTRA_HEADER
1705 config ARCH_UNIPHIER
1706 bool "Socionext UniPhier SoCs"
1707 select BOARD_LATE_INIT
1716 select OF_BOARD_SETUP
1720 select SPL_BOARD_INIT if SPL
1721 select SPL_DM if SPL
1722 select SPL_LIBCOMMON_SUPPORT if SPL
1723 select SPL_LIBGENERIC_SUPPORT if SPL
1724 select SPL_OF_CONTROL if SPL
1725 select SPL_PINCTRL if SPL
1728 imply DISTRO_DEFAULTS
1731 Support for UniPhier SoC family developed by Socionext Inc.
1732 (formerly, System LSI Business Division of Panasonic Corporation)
1734 config ARCH_SYNQUACER
1735 bool "Socionext SynQuacer SoCs"
1741 select SYSRESET_PSCI
1744 Support for SynQuacer SoC family developed by Socionext Inc.
1745 This SoC is used on 96boards EE DeveloperBox.
1748 bool "Support STMicroelectronics STM32 MCU with cortex M"
1752 select GPIO_EXTRA_HEADER
1756 bool "Support STMicrolectronics SoCs"
1765 Support for STMicroelectronics STiH407/10 SoC family.
1766 This SoC is used on Linaro 96Board STiH410-B2260
1769 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1770 select ARCH_MISC_INIT
1771 select ARCH_SUPPORT_TFABOOT
1772 select BOARD_LATE_INIT
1778 select GPIO_EXTRA_HEADER
1782 select OF_SYSTEM_SETUP
1788 select SYS_THUMB_BUILD
1792 imply OF_LIBFDT_OVERLAY
1793 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1796 Support for STM32MP SoC family developed by STMicroelectronics,
1797 MPUs based on ARM cortex A core
1798 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1799 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1801 SPL is the unsecure FSBL for the basic boot chain.
1803 config ARCH_ROCKCHIP
1804 bool "Support Rockchip SoCs"
1806 select BINMAN if SPL_OPTEE || (SPL && !ARM64)
1816 select ENABLE_ARM_SOC_BOOT0_HOOK
1819 select SPL_DM if SPL
1820 select SPL_DM_SPI if SPL
1821 select SPL_DM_SPI_FLASH if SPL
1823 select SYS_THUMB_BUILD if !ARM64
1826 imply DEBUG_UART_BOARD_INIT
1827 imply DISTRO_DEFAULTS
1829 imply SARADC_ROCKCHIP
1831 imply SPL_SYS_MALLOC_SIMPLE
1834 imply USB_FUNCTION_FASTBOOT
1836 config ARCH_OCTEONTX
1837 bool "Support OcteonTX SoCs"
1840 select GPIO_EXTRA_HEADER
1844 select BOARD_LATE_INIT
1845 select SYS_CACHE_SHIFT_7
1847 config ARCH_OCTEONTX2
1848 bool "Support OcteonTX2 SoCs"
1851 select GPIO_EXTRA_HEADER
1855 select BOARD_LATE_INIT
1856 select SYS_CACHE_SHIFT_7
1858 config TARGET_THUNDERX_88XX
1859 bool "Support ThunderX 88xx"
1861 select GPIO_EXTRA_HEADER
1864 select SYS_CACHE_SHIFT_7
1867 bool "Support Aspeed SoCs"
1872 config TARGET_DURIAN
1873 bool "Support Phytium Durian Platform"
1875 select GPIO_EXTRA_HEADER
1877 Support for durian platform.
1878 It has 2GB Sdram, uart and pcie.
1880 config TARGET_PRESIDIO_ASIC
1881 bool "Support Cortina Presidio ASIC Platform"
1884 config TARGET_XENGUEST_ARM64
1885 bool "Xen guest ARM64"
1889 select LINUX_KERNEL_IMAGE_HEADER
1894 config ARCH_SUPPORT_TFABOOT
1898 bool "Support for booting from TF-A"
1899 depends on ARCH_SUPPORT_TFABOOT
1902 Some platforms support the setup of secure registers (for instance
1903 for CPU errata handling) or provide secure services like PSCI.
1904 Those services could also be provided by other firmware parts
1905 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
1906 does not need to (and cannot) execute this code.
1907 Enabling this option will make a U-Boot binary that is relying
1908 on other firmware layers to provide secure functionality.
1910 config TI_SECURE_DEVICE
1911 bool "HS Device Type Support"
1912 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1914 If a high secure (HS) device type is being used, this config
1915 must be set. This option impacts various aspects of the
1916 build system (to create signed boot images that can be
1917 authenticated) and the code. See the doc/README.ti-secure
1918 file for further details.
1920 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1921 config ISW_ENTRY_ADDR
1922 hex "Address in memory or XIP address of bootloader entry point"
1923 default 0x402F4000 if AM43XX
1924 default 0x402F0400 if AM33XX
1925 default 0x40301350 if OMAP54XX
1927 After any reset, the boot ROM searches the boot media for a valid
1928 boot image. For non-XIP devices, the ROM then copies the image into
1929 internal memory. For all boot modes, after the ROM processes the
1930 boot image it eventually computes the entry point address depending
1931 on the device type (secure/non-secure), boot media (xip/non-xip) and
1935 source "arch/arm/mach-aspeed/Kconfig"
1937 source "arch/arm/mach-at91/Kconfig"
1939 source "arch/arm/mach-bcm283x/Kconfig"
1941 source "arch/arm/mach-bcmstb/Kconfig"
1943 source "arch/arm/mach-davinci/Kconfig"
1945 source "arch/arm/mach-exynos/Kconfig"
1947 source "arch/arm/mach-highbank/Kconfig"
1949 source "arch/arm/mach-integrator/Kconfig"
1951 source "arch/arm/mach-ipq40xx/Kconfig"
1953 source "arch/arm/mach-k3/Kconfig"
1955 source "arch/arm/mach-keystone/Kconfig"
1957 source "arch/arm/mach-kirkwood/Kconfig"
1959 source "arch/arm/mach-lpc32xx/Kconfig"
1961 source "arch/arm/mach-mvebu/Kconfig"
1963 source "arch/arm/mach-octeontx/Kconfig"
1965 source "arch/arm/mach-octeontx2/Kconfig"
1967 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1969 source "arch/arm/mach-imx/mx2/Kconfig"
1971 source "arch/arm/mach-imx/mx3/Kconfig"
1973 source "arch/arm/mach-imx/mx5/Kconfig"
1975 source "arch/arm/mach-imx/mx6/Kconfig"
1977 source "arch/arm/mach-imx/mx7/Kconfig"
1979 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1981 source "arch/arm/mach-imx/imx8/Kconfig"
1983 source "arch/arm/mach-imx/imx8m/Kconfig"
1985 source "arch/arm/mach-imx/imx8ulp/Kconfig"
1987 source "arch/arm/mach-imx/imxrt/Kconfig"
1989 source "arch/arm/mach-imx/mxs/Kconfig"
1991 source "arch/arm/mach-omap2/Kconfig"
1993 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1995 source "arch/arm/mach-orion5x/Kconfig"
1997 source "arch/arm/mach-owl/Kconfig"
1999 source "arch/arm/mach-rmobile/Kconfig"
2001 source "arch/arm/mach-meson/Kconfig"
2003 source "arch/arm/mach-mediatek/Kconfig"
2005 source "arch/arm/mach-qemu/Kconfig"
2007 source "arch/arm/mach-rockchip/Kconfig"
2009 source "arch/arm/mach-s5pc1xx/Kconfig"
2011 source "arch/arm/mach-snapdragon/Kconfig"
2013 source "arch/arm/mach-socfpga/Kconfig"
2015 source "arch/arm/mach-sti/Kconfig"
2017 source "arch/arm/mach-stm32/Kconfig"
2019 source "arch/arm/mach-stm32mp/Kconfig"
2021 source "arch/arm/mach-sunxi/Kconfig"
2023 source "arch/arm/mach-tegra/Kconfig"
2025 source "arch/arm/mach-u8500/Kconfig"
2027 source "arch/arm/mach-uniphier/Kconfig"
2029 source "arch/arm/cpu/armv7/vf610/Kconfig"
2031 source "arch/arm/mach-zynq/Kconfig"
2033 source "arch/arm/mach-zynqmp/Kconfig"
2035 source "arch/arm/mach-versal/Kconfig"
2037 source "arch/arm/mach-zynqmp-r5/Kconfig"
2039 source "arch/arm/cpu/armv7/Kconfig"
2041 source "arch/arm/cpu/armv8/Kconfig"
2043 source "arch/arm/mach-imx/Kconfig"
2045 source "arch/arm/mach-nexell/Kconfig"
2047 source "board/armltd/total_compute/Kconfig"
2049 source "board/bosch/shc/Kconfig"
2050 source "board/bosch/guardian/Kconfig"
2051 source "board/CarMediaLab/flea3/Kconfig"
2052 source "board/Marvell/aspenite/Kconfig"
2053 source "board/Marvell/octeontx/Kconfig"
2054 source "board/Marvell/octeontx2/Kconfig"
2055 source "board/armltd/vexpress64/Kconfig"
2056 source "board/cortina/presidio-asic/Kconfig"
2057 source "board/broadcom/bcm963158/Kconfig"
2058 source "board/broadcom/bcm968360bg/Kconfig"
2059 source "board/broadcom/bcm968580xref/Kconfig"
2060 source "board/broadcom/bcmns3/Kconfig"
2061 source "board/cavium/thunderx/Kconfig"
2062 source "board/eets/pdu001/Kconfig"
2063 source "board/emulation/qemu-arm/Kconfig"
2064 source "board/freescale/ls2080aqds/Kconfig"
2065 source "board/freescale/ls2080ardb/Kconfig"
2066 source "board/freescale/ls1088a/Kconfig"
2067 source "board/freescale/ls1028a/Kconfig"
2068 source "board/freescale/ls1021aqds/Kconfig"
2069 source "board/freescale/ls1043aqds/Kconfig"
2070 source "board/freescale/ls1021atwr/Kconfig"
2071 source "board/freescale/ls1021atsn/Kconfig"
2072 source "board/freescale/ls1021aiot/Kconfig"
2073 source "board/freescale/ls1046aqds/Kconfig"
2074 source "board/freescale/ls1043ardb/Kconfig"
2075 source "board/freescale/ls1046ardb/Kconfig"
2076 source "board/freescale/ls1046afrwy/Kconfig"
2077 source "board/freescale/ls1012aqds/Kconfig"
2078 source "board/freescale/ls1012ardb/Kconfig"
2079 source "board/freescale/ls1012afrdm/Kconfig"
2080 source "board/freescale/lx2160a/Kconfig"
2081 source "board/grinn/chiliboard/Kconfig"
2082 source "board/hisilicon/hikey/Kconfig"
2083 source "board/hisilicon/hikey960/Kconfig"
2084 source "board/hisilicon/poplar/Kconfig"
2085 source "board/isee/igep003x/Kconfig"
2086 source "board/kontron/sl28/Kconfig"
2087 source "board/myir/mys_6ulx/Kconfig"
2088 source "board/seeed/npi_imx6ull/Kconfig"
2089 source "board/socionext/developerbox/Kconfig"
2090 source "board/st/stv0991/Kconfig"
2091 source "board/tcl/sl50/Kconfig"
2092 source "board/toradex/colibri_pxa270/Kconfig"
2093 source "board/variscite/dart_6ul/Kconfig"
2094 source "board/vscom/baltos/Kconfig"
2095 source "board/phytium/durian/Kconfig"
2096 source "board/xen/xenguest_arm64/Kconfig"
2097 source "board/keymile/Kconfig"
2099 source "arch/arm/Kconfig.debug"
2104 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2105 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2106 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64