1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed from
19 almost any 4K aligned address. This logic relies on the relocation
20 information that is embedded in the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
25 default n if ARCH_QEMU
26 default y if POSITION_INDEPENDENT
28 U-Boot typically uses a hard-coded value for the stack pointer
29 before relocation. Enable this option to instead calculate the
30 initial SP at run-time. This is useful to avoid hard-coding addresses
31 into U-Boot, so that it can be loaded and executed at arbitrary
32 addresses and thus avoid using arbitrary addresses at runtime.
34 If this option is enabled, the early stack pointer is set to
35 &_bss_start with a offset value added. The offset is specified by
36 SYS_INIT_SP_BSS_OFFSET.
38 config SYS_INIT_SP_BSS_OFFSET
39 int "Early stack offset from the .bss base address"
40 depends on INIT_SP_RELATIVE
43 This option's value is the offset added to &_bss_start in order to
44 calculate the stack pointer. This offset should be large enough so
45 that the early malloc region, global data (gd), and early stack usage
46 do not overlap any appended DTB.
48 config LINUX_KERNEL_IMAGE_HEADER
51 Place a Linux kernel image header at the start of the U-Boot binary.
52 The format of the header is described in the Linux kernel source at
53 Documentation/arm64/booting.txt. This feature is useful since the
54 image header reports the amount of memory (BSS and similar) that
55 U-Boot needs to use, but which isn't part of the binary.
57 if LINUX_KERNEL_IMAGE_HEADER
58 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
61 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
62 TEXT_OFFSET value written to the Linux kernel image header.
78 ARM GICV3 Interrupt translation service (ITS).
79 Basic support for programming locality specific peripheral
80 interrupts (LPI) configuration tables and enable LPI tables.
81 LPI configuration table can be used by u-boot or Linux.
82 ARM GICV3 has limitation, once the LPI table is enabled, LPI
83 configuration table can not be re-programmed, unless GICV3 reset.
89 config DMA_ADDR_T_64BIT
99 config GPIO_EXTRA_HEADER
102 # Used for compatibility with asm files copied from the kernel
103 config ARM_ASM_UNIFIED
107 # Used for compatibility with asm files copied from the kernel
111 config SYS_ICACHE_OFF
112 bool "Do not enable icache"
115 Do not enable instruction cache in U-Boot.
117 config SPL_SYS_ICACHE_OFF
118 bool "Do not enable icache in SPL"
120 default SYS_ICACHE_OFF
122 Do not enable instruction cache in SPL.
124 config SYS_DCACHE_OFF
125 bool "Do not enable dcache"
128 Do not enable data cache in U-Boot.
130 config SPL_SYS_DCACHE_OFF
131 bool "Do not enable dcache in SPL"
133 default SYS_DCACHE_OFF
135 Do not enable data cache in SPL.
137 config SYS_ARM_CACHE_CP15
138 bool "CP15 based cache enabling support"
140 Select this if your processor suports enabling caches by using
144 bool "MMU-based Paged Memory Management Support"
145 select SYS_ARM_CACHE_CP15
147 Select if you want MMU-based virtualised addressing space
148 support via paged memory management.
151 bool 'Use the ARM v7 PMSA Compliant MPU'
153 Some ARM systems without an MMU have instead a Memory Protection
154 Unit (MPU) that defines the type and permissions for regions of
156 If your CPU has an MPU then you should choose 'y' here unless you
157 know that you do not want to use the MPU.
159 # If set, the workarounds for these ARM errata are applied early during U-Boot
160 # startup. Note that in general these options force the workarounds to be
161 # applied; no CPU-type/version detection exists, unlike the similar options in
162 # the Linux kernel. Do not set these options unless they apply! Also note that
163 # the following can be machine-specific errata. These do have ability to
164 # provide rudimentary version and machine-specific checks, but expect no
166 # CONFIG_ARM_ERRATA_430973
167 # CONFIG_ARM_ERRATA_454179
168 # CONFIG_ARM_ERRATA_621766
169 # CONFIG_ARM_ERRATA_798870
170 # CONFIG_ARM_ERRATA_801819
171 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
172 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
174 config ARM_ERRATA_430973
177 config ARM_ERRATA_454179
180 config ARM_ERRATA_621766
183 config ARM_ERRATA_716044
186 config ARM_ERRATA_725233
189 config ARM_ERRATA_742230
192 config ARM_ERRATA_743622
195 config ARM_ERRATA_751472
198 config ARM_ERRATA_761320
201 config ARM_ERRATA_773022
204 config ARM_ERRATA_774769
207 config ARM_ERRATA_794072
210 config ARM_ERRATA_798870
213 config ARM_ERRATA_801819
216 config ARM_ERRATA_826974
219 config ARM_ERRATA_828024
222 config ARM_ERRATA_829520
225 config ARM_ERRATA_833069
228 config ARM_ERRATA_833471
231 config ARM_ERRATA_845369
234 config ARM_ERRATA_852421
237 config ARM_ERRATA_852423
240 config ARM_ERRATA_855873
243 config ARM_CORTEX_A8_CVE_2017_5715
246 config ARM_CORTEX_A15_CVE_2017_5715
251 select SYS_CACHE_SHIFT_5
256 select SYS_CACHE_SHIFT_5
261 select SYS_CACHE_SHIFT_5
266 select SYS_CACHE_SHIFT_5
271 select SYS_CACHE_SHIFT_5
277 select SYS_CACHE_SHIFT_5
284 select SYS_CACHE_SHIFT_6
291 select SYS_CACHE_SHIFT_5
292 select SYS_THUMB_BUILD
298 select SYS_ARM_CACHE_CP15
300 select SYS_CACHE_SHIFT_6
304 select SYS_CACHE_SHIFT_5
309 select SYS_CACHE_SHIFT_5
313 default "arm720t" if CPU_ARM720T
314 default "arm920t" if CPU_ARM920T
315 default "arm926ejs" if CPU_ARM926EJS
316 default "arm946es" if CPU_ARM946ES
317 default "arm1136" if CPU_ARM1136
318 default "arm1176" if CPU_ARM1176
319 default "armv7" if CPU_V7A
320 default "armv7" if CPU_V7R
321 default "armv7m" if CPU_V7M
322 default "pxa" if CPU_PXA
323 default "sa1100" if CPU_SA1100
324 default "armv8" if ARM64
328 default 4 if CPU_ARM720T
329 default 4 if CPU_ARM920T
330 default 5 if CPU_ARM926EJS
331 default 5 if CPU_ARM946ES
332 default 6 if CPU_ARM1136
333 default 6 if CPU_ARM1176
338 default 4 if CPU_SA1100
342 prompt "Select the ARM data write cache policy"
343 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
345 default SYS_ARM_CACHE_WRITEBACK
347 config SYS_ARM_CACHE_WRITEBACK
348 bool "Write-back (WB)"
350 A write updates the cache only and marks the cache line as dirty.
351 External memory is updated only when the line is evicted or explicitly
354 config SYS_ARM_CACHE_WRITETHROUGH
355 bool "Write-through (WT)"
357 A write updates both the cache and the external memory system.
358 This does not mark the cache line as dirty.
360 config SYS_ARM_CACHE_WRITEALLOC
361 bool "Write allocation (WA)"
363 A cache line is allocated on a write miss. This means that executing a
364 store instruction on the processor might cause a burst read to occur.
365 There is a linefill to obtain the data for the cache line, before the
370 bool "Enable ARCH_CPU_INIT"
372 Some architectures require a call to arch_cpu_init().
373 Say Y here to enable it
375 config SYS_ARCH_TIMER
376 bool "ARM Generic Timer support"
377 depends on CPU_V7A || ARM64
380 The ARM Generic Timer (aka arch-timer) provides an architected
381 interface to a timer source on an SoC.
382 It is mandatory for ARMv8 implementation and widely available
386 bool "Support for ARM SMC Calling Convention (SMCCC)"
387 depends on CPU_V7A || ARM64
390 Say Y here if you want to enable ARM SMC Calling Convention.
391 This should be enabled if U-Boot needs to communicate with system
392 firmware (for example, PSCI) according to SMCCC.
395 bool "support boot from semihosting"
397 In emulated environments, semihosting is a way for
398 the hosted environment to call out to the emulator to
399 retrieve files from the host machine.
401 config SYS_THUMB_BUILD
402 bool "Build U-Boot using the Thumb instruction set"
405 Use this flag to build U-Boot using the Thumb instruction set for
406 ARM architectures. Thumb instruction set provides better code
407 density. For ARM architectures that support Thumb2 this flag will
408 result in Thumb2 code generated by GCC.
410 config SPL_SYS_THUMB_BUILD
411 bool "Build SPL using the Thumb instruction set"
412 default y if SYS_THUMB_BUILD
413 depends on !ARM64 && SPL
415 Use this flag to build SPL using the Thumb instruction set for
416 ARM architectures. Thumb instruction set provides better code
417 density. For ARM architectures that support Thumb2 this flag will
418 result in Thumb2 code generated by GCC.
420 config TPL_SYS_THUMB_BUILD
421 bool "Build TPL using the Thumb instruction set"
422 default y if SYS_THUMB_BUILD
423 depends on TPL && !ARM64
425 Use this flag to build TPL using the Thumb instruction set for
426 ARM architectures. Thumb instruction set provides better code
427 density. For ARM architectures that support Thumb2 this flag will
428 result in Thumb2 code generated by GCC.
431 config SYS_L2CACHE_OFF
434 If SoC does not support L2CACHE or one does not want to enable
435 L2CACHE, choose this option.
437 config ENABLE_ARM_SOC_BOOT0_HOOK
438 bool "prepare BOOT0 header"
440 If the SoC's BOOT0 requires a header area filled with (magic)
441 values, then choose this option, and create a file included as
442 <asm/arch/boot0.h> which contains the required assembler code.
444 config ARM_CORTEX_CPU_IS_UP
448 config USE_ARCH_MEMCPY
449 bool "Use an assembly optimized implementation of memcpy"
453 Enable the generation of an optimized version of memcpy.
454 Such an implementation may be faster under some conditions
455 but may increase the binary size.
457 config SPL_USE_ARCH_MEMCPY
458 bool "Use an assembly optimized implementation of memcpy for SPL"
459 default y if USE_ARCH_MEMCPY
460 depends on !ARM64 && SPL
462 Enable the generation of an optimized version of memcpy.
463 Such an implementation may be faster under some conditions
464 but may increase the binary size.
466 config TPL_USE_ARCH_MEMCPY
467 bool "Use an assembly optimized implementation of memcpy for TPL"
468 default y if USE_ARCH_MEMCPY
469 depends on !ARM64 && TPL
471 Enable the generation of an optimized version of memcpy.
472 Such an implementation may be faster under some conditions
473 but may increase the binary size.
475 config USE_ARCH_MEMSET
476 bool "Use an assembly optimized implementation of memset"
480 Enable the generation of an optimized version of memset.
481 Such an implementation may be faster under some conditions
482 but may increase the binary size.
484 config SPL_USE_ARCH_MEMSET
485 bool "Use an assembly optimized implementation of memset for SPL"
486 default y if USE_ARCH_MEMSET
487 depends on !ARM64 && SPL
489 Enable the generation of an optimized version of memset.
490 Such an implementation may be faster under some conditions
491 but may increase the binary size.
493 config TPL_USE_ARCH_MEMSET
494 bool "Use an assembly optimized implementation of memset for TPL"
495 default y if USE_ARCH_MEMSET
496 depends on !ARM64 && TPL
498 Enable the generation of an optimized version of memset.
499 Such an implementation may be faster under some conditions
500 but may increase the binary size.
502 config ARM64_SUPPORT_AARCH32
503 bool "ARM64 system support AArch32 execution state"
505 default y if !TARGET_THUNDERX_88XX
507 This ARM64 system supports AArch32 execution state.
510 prompt "Target select"
515 select GPIO_EXTRA_HEADER
516 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
517 select SPL_SEPARATE_BSS if SPL
519 config TARGET_ASPENITE
520 bool "Support aspenite"
522 select GPIO_EXTRA_HEADER
527 select GPIO_EXTRA_HEADER
528 select SPL_DM_SPI if SPL
531 Support for TI's DaVinci platform.
534 bool "Marvell Kirkwood"
535 select ARCH_MISC_INIT
536 select BOARD_EARLY_INIT_F
538 select GPIO_EXTRA_HEADER
541 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
547 select GPIO_EXTRA_HEADER
548 select SPL_DM_SPI if SPL
549 select SPL_DM_SPI_FLASH if SPL
558 select GPIO_EXTRA_HEADER
560 config TARGET_STV0991
561 bool "Support stv0991"
567 select GPIO_EXTRA_HEADER
576 select GPIO_EXTRA_HEADER
579 bool "Broadcom BCM283X family"
583 select GPIO_EXTRA_HEADER
586 select SERIAL_SEARCH_ALL
591 bool "Broadcom BCM63158 family"
597 bool "Broadcom BCM68360 family"
603 bool "Broadcom BCM6858 family"
609 bool "Broadcom BCM7XXX family"
612 select GPIO_EXTRA_HEADER
614 select OF_PRIOR_STAGE
617 This enables support for Broadcom ARM-based set-top box
618 chipsets, including the 7445 family of chips.
620 config TARGET_BCMCYGNUS
621 bool "Support bcmcygnus"
623 select GPIO_EXTRA_HEADER
625 imply BCM_SF2_ETH_GMAC
633 bool "Support Broadcom Northstar2"
635 select GPIO_EXTRA_HEADER
637 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
638 ARMv8 Cortex-A57 processors targeting a broad range of networking
642 bool "Support Broadcom NS3"
644 select BOARD_LATE_INIT
646 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
647 ARMv8 Cortex-A72 processors targeting a broad range of networking
651 bool "Samsung EXYNOS"
661 select GPIO_EXTRA_HEADER
662 imply SYS_THUMB_BUILD
667 bool "Samsung S5PC1XX"
673 select GPIO_EXTRA_HEADER
677 bool "Calxeda Highbank"
690 config ARCH_INTEGRATOR
691 bool "ARM Ltd. Integrator family"
694 select GPIO_EXTRA_HEADER
699 bool "Qualcomm IPQ40xx SoCs"
705 select GPIO_EXTRA_HEADER
718 select GPIO_EXTRA_HEADER
720 select SYS_ARCH_TIMER
721 select SYS_THUMB_BUILD
727 bool "Texas Instruments' K3 Architecture"
732 config ARCH_OMAP2PLUS
735 select GPIO_EXTRA_HEADER
736 select SPL_BOARD_INIT if SPL
737 select SPL_STACK_R if SPL
739 imply TI_SYSC if DM && OF_CONTROL
744 select GPIO_EXTRA_HEADER
745 imply DISTRO_DEFAULTS
748 Support for the Meson SoC family developed by Amlogic Inc.,
749 targeted at media players and tablet computers. We currently
750 support the S905 (GXBaby) 64-bit SoC.
755 select GPIO_EXTRA_HEADER
758 select SPL_LIBCOMMON_SUPPORT if SPL
759 select SPL_LIBGENERIC_SUPPORT if SPL
760 select SPL_OF_CONTROL if SPL
763 Support for the MediaTek SoCs family developed by MediaTek Inc.
764 Please refer to doc/README.mediatek for more information.
767 bool "NXP LPC32xx platform"
772 select GPIO_EXTRA_HEADER
778 bool "NXP i.MX8 platform"
781 select GPIO_EXTRA_HEADER
784 select ENABLE_ARM_SOC_BOOT0_HOOK
787 bool "NXP i.MX8M platform"
789 select GPIO_EXTRA_HEADER
791 select SYS_FSL_HAS_SEC if IMX_HAB
792 select SYS_FSL_SEC_COMPAT_4
793 select SYS_FSL_SEC_LE
800 bool "NXP i.MX8ULP platform"
806 select GPIO_EXTRA_HEADER
810 bool "NXP i.MXRT platform"
814 select GPIO_EXTRA_HEADER
820 bool "NXP i.MX23 family"
822 select GPIO_EXTRA_HEADER
830 select GPIO_EXTRA_HEADER
835 bool "NXP i.MX28 family"
837 select GPIO_EXTRA_HEADER
843 bool "NXP i.MX31 family"
845 select GPIO_EXTRA_HEADER
851 select GPIO_EXTRA_HEADER
853 select SYS_FSL_HAS_SEC if IMX_HAB
854 select SYS_FSL_SEC_COMPAT_4
855 select SYS_FSL_SEC_LE
856 select ROM_UNIFIED_SECTIONS
858 imply SYS_THUMB_BUILD
862 select ARCH_MISC_INIT
864 select GPIO_EXTRA_HEADER
866 select SYS_FSL_HAS_SEC if IMX_HAB
867 select SYS_FSL_SEC_COMPAT_4
868 select SYS_FSL_SEC_LE
869 imply BOARD_EARLY_INIT_F
871 imply SYS_THUMB_BUILD
876 select GPIO_EXTRA_HEADER
878 select SYS_FSL_HAS_SEC
879 select SYS_FSL_SEC_COMPAT_4
880 select SYS_FSL_SEC_LE
882 imply SYS_THUMB_BUILD
886 default "arch/arm/mach-omap2/u-boot-spl.lds"
891 select BOARD_EARLY_INIT_F
893 select GPIO_EXTRA_HEADER
898 bool "Nexell S5P4418/S5P6818 SoC"
899 select ENABLE_ARM_SOC_BOOT0_HOOK
901 select GPIO_EXTRA_HEADER
904 bool "Actions Semi OWL SoCs"
908 select GPIO_EXTRA_HEADER
913 select SYS_RELOC_GD_ENV_ADDR
917 bool "QEMU Virtual Platform"
928 bool "Renesas ARM SoCs"
931 select GPIO_EXTRA_HEADER
932 imply BOARD_EARLY_INIT_F
935 imply SYS_THUMB_BUILD
936 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
938 config ARCH_SNAPDRAGON
939 bool "Qualcomm Snapdragon SoCs"
944 select GPIO_EXTRA_HEADER
953 bool "Altera SOCFPGA family"
954 select ARCH_EARLY_INIT_R
955 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
956 select ARM64 if TARGET_SOCFPGA_SOC64
957 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
961 select GPIO_EXTRA_HEADER
962 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
964 select SPL_DM_RESET if DM_RESET
966 select SPL_LIBCOMMON_SUPPORT
967 select SPL_LIBGENERIC_SUPPORT
968 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
969 select SPL_OF_CONTROL
970 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
971 select SPL_SERIAL_SUPPORT
976 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
978 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
979 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
989 imply SPL_DM_SPI_FLASH
990 imply SPL_LIBDISK_SUPPORT
991 imply SPL_MMC_SUPPORT
992 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
993 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
994 imply SPL_SPI_FLASH_SUPPORT
995 imply SPL_SPI_SUPPORT
999 bool "Support sunxi (Allwinner) SoCs"
1002 select CMD_MMC if MMC
1003 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1009 select DM_MMC if MMC
1010 select DM_SCSI if SCSI
1012 select GPIO_EXTRA_HEADER
1013 select OF_BOARD_SETUP
1016 select SPECIFY_CONSOLE_INDEX
1017 select SPL_STACK_R if SPL
1018 select SPL_SYS_MALLOC_SIMPLE if SPL
1019 select SPL_SYS_THUMB_BUILD if !ARM64
1022 select SYS_THUMB_BUILD if !ARM64
1023 select USB if DISTRO_DEFAULTS
1024 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1025 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1026 select SPL_USE_TINY_PRINTF
1028 select SYS_RELOC_GD_ENV_ADDR
1029 imply BOARD_LATE_INIT
1032 imply CMD_UBI if MTD_RAW_NAND
1033 imply DISTRO_DEFAULTS
1036 imply OF_LIBFDT_OVERLAY
1037 imply PRE_CONSOLE_BUFFER
1039 imply SPL_LIBCOMMON_SUPPORT
1040 imply SPL_LIBGENERIC_SUPPORT
1041 imply SPL_MMC_SUPPORT if MMC
1043 imply SPL_SERIAL_SUPPORT
1047 bool "ST-Ericsson U8500 Series"
1051 select DM_MMC if MMC
1056 imply ARM_PL180_MMCI
1058 imply NOMADIK_MTU_TIMER
1061 imply SYSRESET_SYSCON
1064 bool "Support Xilinx Versal Platform"
1068 select DM_ETH if NET
1069 select DM_MMC if MMC
1072 select GPIO_EXTRA_HEADER
1075 imply BOARD_LATE_INIT
1076 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1079 bool "Freescale Vybrid"
1081 select GPIO_EXTRA_HEADER
1083 select SYS_FSL_ERRATUM_ESDHC111
1088 bool "Xilinx Zynq based platform"
1093 select DM_ETH if NET
1094 select DM_MMC if MMC
1098 select GPIO_EXTRA_HEADER
1101 select SPL_BOARD_INIT if SPL
1102 select SPL_CLK if SPL
1103 select SPL_DM if SPL
1104 select SPL_DM_SPI if SPL
1105 select SPL_DM_SPI_FLASH if SPL
1106 select SPL_OF_CONTROL if SPL
1107 select SPL_SEPARATE_BSS if SPL
1109 imply ARCH_EARLY_INIT_R
1110 imply BOARD_LATE_INIT
1114 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1117 config ARCH_ZYNQMP_R5
1118 bool "Xilinx ZynqMP R5 based platform"
1122 select DM_ETH if NET
1123 select DM_MMC if MMC
1125 select GPIO_EXTRA_HEADER
1131 bool "Xilinx ZynqMP based platform"
1135 select DM_ETH if NET
1137 select DM_MMC if MMC
1139 select DM_SPI if SPI
1140 select DM_SPI_FLASH if DM_SPI
1143 select GPIO_EXTRA_HEADER
1145 select SPL_BOARD_INIT if SPL
1146 select SPL_CLK if SPL
1147 select SPL_DM if SPL
1148 select SPL_DM_SPI if SPI && SPL_DM
1149 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1150 select SPL_DM_MAILBOX if SPL
1151 select SPL_FIRMWARE if SPL
1152 select SPL_SEPARATE_BSS if SPL
1156 imply BOARD_LATE_INIT
1158 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1165 select GPIO_EXTRA_HEADER
1166 imply DISTRO_DEFAULTS
1169 config TARGET_VEXPRESS64_AEMV8A
1170 bool "Support vexpress_aemv8a"
1172 select GPIO_EXTRA_HEADER
1175 config TARGET_VEXPRESS64_BASE_FVP
1176 bool "Support Versatile Express ARMv8a FVP BASE model"
1178 select GPIO_EXTRA_HEADER
1182 config TARGET_VEXPRESS64_JUNO
1183 bool "Support Versatile Express Juno Development Platform"
1185 select GPIO_EXTRA_HEADER
1198 config TARGET_TOTAL_COMPUTE
1199 bool "Support Total Compute Platform"
1207 config TARGET_LS2080A_EMU
1208 bool "Support ls2080a_emu"
1211 select ARMV8_MULTIENTRY
1212 select FSL_DDR_SYNC_REFRESH
1213 select GPIO_EXTRA_HEADER
1215 Support for Freescale LS2080A_EMU platform.
1216 The LS2080A Development System (EMULATOR) is a pre-silicon
1217 development platform that supports the QorIQ LS2080A
1218 Layerscape Architecture processor.
1220 config TARGET_LS1088AQDS
1221 bool "Support ls1088aqds"
1224 select ARMV8_MULTIENTRY
1225 select ARCH_SUPPORT_TFABOOT
1226 select BOARD_LATE_INIT
1227 select GPIO_EXTRA_HEADER
1229 select FSL_DDR_INTERACTIVE if !SD_BOOT
1231 Support for NXP LS1088AQDS platform.
1232 The LS1088A Development System (QDS) is a high-performance
1233 development platform that supports the QorIQ LS1088A
1234 Layerscape Architecture processor.
1236 config TARGET_LS2080AQDS
1237 bool "Support ls2080aqds"
1240 select ARMV8_MULTIENTRY
1241 select ARCH_SUPPORT_TFABOOT
1242 select BOARD_LATE_INIT
1243 select GPIO_EXTRA_HEADER
1248 select FSL_DDR_INTERACTIVE if !SPL
1250 Support for Freescale LS2080AQDS platform.
1251 The LS2080A Development System (QDS) is a high-performance
1252 development platform that supports the QorIQ LS2080A
1253 Layerscape Architecture processor.
1255 config TARGET_LS2080ARDB
1256 bool "Support ls2080ardb"
1259 select ARMV8_MULTIENTRY
1260 select ARCH_SUPPORT_TFABOOT
1261 select BOARD_LATE_INIT
1264 select FSL_DDR_INTERACTIVE if !SPL
1265 select GPIO_EXTRA_HEADER
1269 Support for Freescale LS2080ARDB platform.
1270 The LS2080A Reference design board (RDB) is a high-performance
1271 development platform that supports the QorIQ LS2080A
1272 Layerscape Architecture processor.
1274 config TARGET_LS2081ARDB
1275 bool "Support ls2081ardb"
1278 select ARMV8_MULTIENTRY
1279 select BOARD_LATE_INIT
1280 select GPIO_EXTRA_HEADER
1283 Support for Freescale LS2081ARDB platform.
1284 The LS2081A Reference design board (RDB) is a high-performance
1285 development platform that supports the QorIQ LS2081A/LS2041A
1286 Layerscape Architecture processor.
1288 config TARGET_LX2160ARDB
1289 bool "Support lx2160ardb"
1292 select ARMV8_MULTIENTRY
1293 select ARCH_SUPPORT_TFABOOT
1294 select BOARD_LATE_INIT
1295 select GPIO_EXTRA_HEADER
1297 Support for NXP LX2160ARDB platform.
1298 The lx2160ardb (LX2160A Reference design board (RDB)
1299 is a high-performance development platform that supports the
1300 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1302 config TARGET_LX2160AQDS
1303 bool "Support lx2160aqds"
1306 select ARMV8_MULTIENTRY
1307 select ARCH_SUPPORT_TFABOOT
1308 select BOARD_LATE_INIT
1309 select GPIO_EXTRA_HEADER
1311 Support for NXP LX2160AQDS platform.
1312 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1313 is a high-performance development platform that supports the
1314 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1316 config TARGET_LX2162AQDS
1317 bool "Support lx2162aqds"
1319 select ARCH_MISC_INIT
1321 select ARMV8_MULTIENTRY
1322 select ARCH_SUPPORT_TFABOOT
1323 select BOARD_LATE_INIT
1324 select GPIO_EXTRA_HEADER
1326 Support for NXP LX2162AQDS platform.
1327 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1330 bool "Support HiKey 96boards Consumer Edition Platform"
1335 select GPIO_EXTRA_HEADER
1338 select SPECIFY_CONSOLE_INDEX
1341 Support for HiKey 96boards platform. It features a HI6220
1342 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1344 config TARGET_HIKEY960
1345 bool "Support HiKey960 96boards Consumer Edition Platform"
1349 select GPIO_EXTRA_HEADER
1354 Support for HiKey960 96boards platform. It features a HI3660
1355 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1357 config TARGET_POPLAR
1358 bool "Support Poplar 96boards Enterprise Edition Platform"
1362 select GPIO_EXTRA_HEADER
1367 Support for Poplar 96boards EE platform. It features a HI3798cv200
1368 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1369 making it capable of running any commercial set-top solution based on
1372 config TARGET_LS1012AQDS
1373 bool "Support ls1012aqds"
1376 select ARCH_SUPPORT_TFABOOT
1377 select BOARD_LATE_INIT
1378 select GPIO_EXTRA_HEADER
1380 Support for Freescale LS1012AQDS platform.
1381 The LS1012A Development System (QDS) is a high-performance
1382 development platform that supports the QorIQ LS1012A
1383 Layerscape Architecture processor.
1385 config TARGET_LS1012ARDB
1386 bool "Support ls1012ardb"
1389 select ARCH_SUPPORT_TFABOOT
1390 select BOARD_LATE_INIT
1391 select GPIO_EXTRA_HEADER
1395 Support for Freescale LS1012ARDB platform.
1396 The LS1012A Reference design board (RDB) is a high-performance
1397 development platform that supports the QorIQ LS1012A
1398 Layerscape Architecture processor.
1400 config TARGET_LS1012A2G5RDB
1401 bool "Support ls1012a2g5rdb"
1404 select ARCH_SUPPORT_TFABOOT
1405 select BOARD_LATE_INIT
1406 select GPIO_EXTRA_HEADER
1409 Support for Freescale LS1012A2G5RDB platform.
1410 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1411 development platform that supports the QorIQ LS1012A
1412 Layerscape Architecture processor.
1414 config TARGET_LS1012AFRWY
1415 bool "Support ls1012afrwy"
1418 select ARCH_SUPPORT_TFABOOT
1419 select BOARD_LATE_INIT
1420 select GPIO_EXTRA_HEADER
1424 Support for Freescale LS1012AFRWY platform.
1425 The LS1012A FRWY board (FRWY) is a high-performance
1426 development platform that supports the QorIQ LS1012A
1427 Layerscape Architecture processor.
1429 config TARGET_LS1012AFRDM
1430 bool "Support ls1012afrdm"
1433 select ARCH_SUPPORT_TFABOOT
1434 select GPIO_EXTRA_HEADER
1436 Support for Freescale LS1012AFRDM platform.
1437 The LS1012A Freedom board (FRDM) is a high-performance
1438 development platform that supports the QorIQ LS1012A
1439 Layerscape Architecture processor.
1441 config TARGET_LS1028AQDS
1442 bool "Support ls1028aqds"
1445 select ARMV8_MULTIENTRY
1446 select ARCH_SUPPORT_TFABOOT
1447 select BOARD_LATE_INIT
1448 select GPIO_EXTRA_HEADER
1450 Support for Freescale LS1028AQDS platform
1451 The LS1028A Development System (QDS) is a high-performance
1452 development platform that supports the QorIQ LS1028A
1453 Layerscape Architecture processor.
1455 config TARGET_LS1028ARDB
1456 bool "Support ls1028ardb"
1459 select ARMV8_MULTIENTRY
1460 select ARCH_SUPPORT_TFABOOT
1461 select BOARD_LATE_INIT
1462 select GPIO_EXTRA_HEADER
1464 Support for Freescale LS1028ARDB platform
1465 The LS1028A Development System (RDB) is a high-performance
1466 development platform that supports the QorIQ LS1028A
1467 Layerscape Architecture processor.
1469 config TARGET_LS1088ARDB
1470 bool "Support ls1088ardb"
1473 select ARMV8_MULTIENTRY
1474 select ARCH_SUPPORT_TFABOOT
1475 select BOARD_LATE_INIT
1477 select FSL_DDR_INTERACTIVE if !SD_BOOT
1478 select GPIO_EXTRA_HEADER
1480 Support for NXP LS1088ARDB platform.
1481 The LS1088A Reference design board (RDB) is a high-performance
1482 development platform that supports the QorIQ LS1088A
1483 Layerscape Architecture processor.
1485 config TARGET_LS1021AQDS
1486 bool "Support ls1021aqds"
1488 select ARCH_SUPPORT_PSCI
1489 select BOARD_EARLY_INIT_F
1490 select BOARD_LATE_INIT
1492 select CPU_V7_HAS_NONSEC
1493 select CPU_V7_HAS_VIRT
1494 select LS1_DEEP_SLEEP
1497 select FSL_DDR_INTERACTIVE
1498 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1499 select GPIO_EXTRA_HEADER
1500 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1503 config TARGET_LS1021ATWR
1504 bool "Support ls1021atwr"
1506 select ARCH_SUPPORT_PSCI
1507 select BOARD_EARLY_INIT_F
1508 select BOARD_LATE_INIT
1510 select CPU_V7_HAS_NONSEC
1511 select CPU_V7_HAS_VIRT
1512 select LS1_DEEP_SLEEP
1514 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1515 select GPIO_EXTRA_HEADER
1518 config TARGET_PG_WCOM_SELI8
1519 bool "Support Hitachi-Powergrids SELI8 service unit card"
1521 select ARCH_SUPPORT_PSCI
1522 select BOARD_EARLY_INIT_F
1523 select BOARD_LATE_INIT
1525 select CPU_V7_HAS_NONSEC
1526 select CPU_V7_HAS_VIRT
1528 select FSL_DDR_INTERACTIVE
1529 select GPIO_EXTRA_HEADER
1533 Support for Hitachi-Powergrids SELI8 service unit card.
1534 SELI8 is a QorIQ LS1021a based service unit card used
1535 in XMC20 and FOX615 product families.
1537 config TARGET_PG_WCOM_EXPU1
1538 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1540 select ARCH_SUPPORT_PSCI
1541 select BOARD_EARLY_INIT_F
1542 select BOARD_LATE_INIT
1544 select CPU_V7_HAS_NONSEC
1545 select CPU_V7_HAS_VIRT
1547 select FSL_DDR_INTERACTIVE
1551 Support for Hitachi-Powergrids EXPU1 service unit card.
1552 EXPU1 is a QorIQ LS1021a based service unit card used
1553 in XMC20 and FOX615 product families.
1555 config TARGET_LS1021ATSN
1556 bool "Support ls1021atsn"
1558 select ARCH_SUPPORT_PSCI
1559 select BOARD_EARLY_INIT_F
1560 select BOARD_LATE_INIT
1562 select CPU_V7_HAS_NONSEC
1563 select CPU_V7_HAS_VIRT
1564 select LS1_DEEP_SLEEP
1566 select GPIO_EXTRA_HEADER
1569 config TARGET_LS1021AIOT
1570 bool "Support ls1021aiot"
1572 select ARCH_SUPPORT_PSCI
1573 select BOARD_LATE_INIT
1575 select CPU_V7_HAS_NONSEC
1576 select CPU_V7_HAS_VIRT
1578 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1579 select GPIO_EXTRA_HEADER
1582 Support for Freescale LS1021AIOT platform.
1583 The LS1021A Freescale board (IOT) is a high-performance
1584 development platform that supports the QorIQ LS1021A
1585 Layerscape Architecture processor.
1587 config TARGET_LS1043AQDS
1588 bool "Support ls1043aqds"
1591 select ARMV8_MULTIENTRY
1592 select ARCH_SUPPORT_TFABOOT
1593 select BOARD_EARLY_INIT_F
1594 select BOARD_LATE_INIT
1596 select FSL_DDR_INTERACTIVE if !SPL
1597 select FSL_DSPI if !SPL_NO_DSPI
1598 select DM_SPI_FLASH if FSL_DSPI
1599 select GPIO_EXTRA_HEADER
1603 Support for Freescale LS1043AQDS platform.
1605 config TARGET_LS1043ARDB
1606 bool "Support ls1043ardb"
1609 select ARMV8_MULTIENTRY
1610 select ARCH_SUPPORT_TFABOOT
1611 select BOARD_EARLY_INIT_F
1612 select BOARD_LATE_INIT
1614 select FSL_DSPI if !SPL_NO_DSPI
1615 select DM_SPI_FLASH if FSL_DSPI
1616 select GPIO_EXTRA_HEADER
1618 Support for Freescale LS1043ARDB platform.
1620 config TARGET_LS1046AQDS
1621 bool "Support ls1046aqds"
1624 select ARMV8_MULTIENTRY
1625 select ARCH_SUPPORT_TFABOOT
1626 select BOARD_EARLY_INIT_F
1627 select BOARD_LATE_INIT
1628 select DM_SPI_FLASH if DM_SPI
1630 select FSL_DDR_BIST if !SPL
1631 select FSL_DDR_INTERACTIVE if !SPL
1632 select FSL_DDR_INTERACTIVE if !SPL
1633 select GPIO_EXTRA_HEADER
1636 Support for Freescale LS1046AQDS platform.
1637 The LS1046A Development System (QDS) is a high-performance
1638 development platform that supports the QorIQ LS1046A
1639 Layerscape Architecture processor.
1641 config TARGET_LS1046ARDB
1642 bool "Support ls1046ardb"
1645 select ARMV8_MULTIENTRY
1646 select ARCH_SUPPORT_TFABOOT
1647 select BOARD_EARLY_INIT_F
1648 select BOARD_LATE_INIT
1649 select DM_SPI_FLASH if DM_SPI
1650 select POWER_MC34VR500
1653 select FSL_DDR_INTERACTIVE if !SPL
1654 select GPIO_EXTRA_HEADER
1657 Support for Freescale LS1046ARDB platform.
1658 The LS1046A Reference Design Board (RDB) is a high-performance
1659 development platform that supports the QorIQ LS1046A
1660 Layerscape Architecture processor.
1662 config TARGET_LS1046AFRWY
1663 bool "Support ls1046afrwy"
1666 select ARMV8_MULTIENTRY
1667 select ARCH_SUPPORT_TFABOOT
1668 select BOARD_EARLY_INIT_F
1669 select BOARD_LATE_INIT
1670 select DM_SPI_FLASH if DM_SPI
1671 select GPIO_EXTRA_HEADER
1674 Support for Freescale LS1046AFRWY platform.
1675 The LS1046A Freeway Board (FRWY) is a high-performance
1676 development platform that supports the QorIQ LS1046A
1677 Layerscape Architecture processor.
1683 select ARMV8_MULTIENTRY
1699 select GPIO_EXTRA_HEADER
1700 select SPL_DM if SPL
1701 select SPL_DM_SPI if SPL
1702 select SPL_DM_SPI_FLASH if SPL
1703 select SPL_DM_I2C if SPL
1704 select SPL_DM_MMC if SPL
1705 select SPL_DM_SERIAL if SPL
1707 Support for Kontron SMARC-sAL28 board.
1709 config TARGET_COLIBRI_PXA270
1710 bool "Support colibri_pxa270"
1712 select GPIO_EXTRA_HEADER
1714 config ARCH_UNIPHIER
1715 bool "Socionext UniPhier SoCs"
1716 select BOARD_LATE_INIT
1725 select OF_BOARD_SETUP
1729 select SPL_BOARD_INIT if SPL
1730 select SPL_DM if SPL
1731 select SPL_LIBCOMMON_SUPPORT if SPL
1732 select SPL_LIBGENERIC_SUPPORT if SPL
1733 select SPL_OF_CONTROL if SPL
1734 select SPL_PINCTRL if SPL
1737 imply DISTRO_DEFAULTS
1740 Support for UniPhier SoC family developed by Socionext Inc.
1741 (formerly, System LSI Business Division of Panasonic Corporation)
1743 config ARCH_SYNQUACER
1744 bool "Socionext SynQuacer SoCs"
1750 select SYSRESET_PSCI
1753 Support for SynQuacer SoC family developed by Socionext Inc.
1754 This SoC is used on 96boards EE DeveloperBox.
1757 bool "Support STMicroelectronics STM32 MCU with cortex M"
1761 select GPIO_EXTRA_HEADER
1765 bool "Support STMicrolectronics SoCs"
1774 Support for STMicroelectronics STiH407/10 SoC family.
1775 This SoC is used on Linaro 96Board STiH410-B2260
1778 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1779 select ARCH_MISC_INIT
1780 select ARCH_SUPPORT_TFABOOT
1781 select BOARD_LATE_INIT
1787 select GPIO_EXTRA_HEADER
1791 select OF_SYSTEM_SETUP
1797 select SYS_THUMB_BUILD
1801 imply OF_LIBFDT_OVERLAY
1802 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1805 Support for STM32MP SoC family developed by STMicroelectronics,
1806 MPUs based on ARM cortex A core
1807 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1808 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1810 SPL is the unsecure FSBL for the basic boot chain.
1812 config ARCH_ROCKCHIP
1813 bool "Support Rockchip SoCs"
1815 select BINMAN if SPL_OPTEE || (SPL && !ARM64)
1825 select ENABLE_ARM_SOC_BOOT0_HOOK
1828 select SPL_DM if SPL
1829 select SPL_DM_SPI if SPL
1830 select SPL_DM_SPI_FLASH if SPL
1832 select SYS_THUMB_BUILD if !ARM64
1835 imply DEBUG_UART_BOARD_INIT
1836 imply DISTRO_DEFAULTS
1838 imply SARADC_ROCKCHIP
1840 imply SPL_SYS_MALLOC_SIMPLE
1843 imply USB_FUNCTION_FASTBOOT
1845 config ARCH_OCTEONTX
1846 bool "Support OcteonTX SoCs"
1849 select GPIO_EXTRA_HEADER
1853 select BOARD_LATE_INIT
1854 select SYS_CACHE_SHIFT_7
1856 config ARCH_OCTEONTX2
1857 bool "Support OcteonTX2 SoCs"
1860 select GPIO_EXTRA_HEADER
1864 select BOARD_LATE_INIT
1865 select SYS_CACHE_SHIFT_7
1867 config TARGET_THUNDERX_88XX
1868 bool "Support ThunderX 88xx"
1870 select GPIO_EXTRA_HEADER
1873 select SYS_CACHE_SHIFT_7
1876 bool "Support Aspeed SoCs"
1881 config TARGET_DURIAN
1882 bool "Support Phytium Durian Platform"
1884 select GPIO_EXTRA_HEADER
1886 Support for durian platform.
1887 It has 2GB Sdram, uart and pcie.
1889 config TARGET_PRESIDIO_ASIC
1890 bool "Support Cortina Presidio ASIC Platform"
1894 config TARGET_XENGUEST_ARM64
1895 bool "Xen guest ARM64"
1899 select LINUX_KERNEL_IMAGE_HEADER
1904 config ARCH_SUPPORT_TFABOOT
1908 bool "Support for booting from TF-A"
1909 depends on ARCH_SUPPORT_TFABOOT
1912 Some platforms support the setup of secure registers (for instance
1913 for CPU errata handling) or provide secure services like PSCI.
1914 Those services could also be provided by other firmware parts
1915 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
1916 does not need to (and cannot) execute this code.
1917 Enabling this option will make a U-Boot binary that is relying
1918 on other firmware layers to provide secure functionality.
1920 config TI_SECURE_DEVICE
1921 bool "HS Device Type Support"
1922 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1924 If a high secure (HS) device type is being used, this config
1925 must be set. This option impacts various aspects of the
1926 build system (to create signed boot images that can be
1927 authenticated) and the code. See the doc/README.ti-secure
1928 file for further details.
1930 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1931 config ISW_ENTRY_ADDR
1932 hex "Address in memory or XIP address of bootloader entry point"
1933 default 0x402F4000 if AM43XX
1934 default 0x402F0400 if AM33XX
1935 default 0x40301350 if OMAP54XX
1937 After any reset, the boot ROM searches the boot media for a valid
1938 boot image. For non-XIP devices, the ROM then copies the image into
1939 internal memory. For all boot modes, after the ROM processes the
1940 boot image it eventually computes the entry point address depending
1941 on the device type (secure/non-secure), boot media (xip/non-xip) and
1945 source "arch/arm/mach-aspeed/Kconfig"
1947 source "arch/arm/mach-at91/Kconfig"
1949 source "arch/arm/mach-bcm283x/Kconfig"
1951 source "arch/arm/mach-bcmstb/Kconfig"
1953 source "arch/arm/mach-davinci/Kconfig"
1955 source "arch/arm/mach-exynos/Kconfig"
1957 source "arch/arm/mach-highbank/Kconfig"
1959 source "arch/arm/mach-integrator/Kconfig"
1961 source "arch/arm/mach-ipq40xx/Kconfig"
1963 source "arch/arm/mach-k3/Kconfig"
1965 source "arch/arm/mach-keystone/Kconfig"
1967 source "arch/arm/mach-kirkwood/Kconfig"
1969 source "arch/arm/mach-lpc32xx/Kconfig"
1971 source "arch/arm/mach-mvebu/Kconfig"
1973 source "arch/arm/mach-octeontx/Kconfig"
1975 source "arch/arm/mach-octeontx2/Kconfig"
1977 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1979 source "arch/arm/mach-imx/mx2/Kconfig"
1981 source "arch/arm/mach-imx/mx3/Kconfig"
1983 source "arch/arm/mach-imx/mx5/Kconfig"
1985 source "arch/arm/mach-imx/mx6/Kconfig"
1987 source "arch/arm/mach-imx/mx7/Kconfig"
1989 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1991 source "arch/arm/mach-imx/imx8/Kconfig"
1993 source "arch/arm/mach-imx/imx8m/Kconfig"
1995 source "arch/arm/mach-imx/imx8ulp/Kconfig"
1997 source "arch/arm/mach-imx/imxrt/Kconfig"
1999 source "arch/arm/mach-imx/mxs/Kconfig"
2001 source "arch/arm/mach-omap2/Kconfig"
2003 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2005 source "arch/arm/mach-orion5x/Kconfig"
2007 source "arch/arm/mach-owl/Kconfig"
2009 source "arch/arm/mach-rmobile/Kconfig"
2011 source "arch/arm/mach-meson/Kconfig"
2013 source "arch/arm/mach-mediatek/Kconfig"
2015 source "arch/arm/mach-qemu/Kconfig"
2017 source "arch/arm/mach-rockchip/Kconfig"
2019 source "arch/arm/mach-s5pc1xx/Kconfig"
2021 source "arch/arm/mach-snapdragon/Kconfig"
2023 source "arch/arm/mach-socfpga/Kconfig"
2025 source "arch/arm/mach-sti/Kconfig"
2027 source "arch/arm/mach-stm32/Kconfig"
2029 source "arch/arm/mach-stm32mp/Kconfig"
2031 source "arch/arm/mach-sunxi/Kconfig"
2033 source "arch/arm/mach-tegra/Kconfig"
2035 source "arch/arm/mach-u8500/Kconfig"
2037 source "arch/arm/mach-uniphier/Kconfig"
2039 source "arch/arm/cpu/armv7/vf610/Kconfig"
2041 source "arch/arm/mach-zynq/Kconfig"
2043 source "arch/arm/mach-zynqmp/Kconfig"
2045 source "arch/arm/mach-versal/Kconfig"
2047 source "arch/arm/mach-zynqmp-r5/Kconfig"
2049 source "arch/arm/cpu/armv7/Kconfig"
2051 source "arch/arm/cpu/armv8/Kconfig"
2053 source "arch/arm/mach-imx/Kconfig"
2055 source "arch/arm/mach-nexell/Kconfig"
2057 source "board/armltd/total_compute/Kconfig"
2059 source "board/bosch/shc/Kconfig"
2060 source "board/bosch/guardian/Kconfig"
2061 source "board/CarMediaLab/flea3/Kconfig"
2062 source "board/Marvell/aspenite/Kconfig"
2063 source "board/Marvell/octeontx/Kconfig"
2064 source "board/Marvell/octeontx2/Kconfig"
2065 source "board/armltd/vexpress64/Kconfig"
2066 source "board/cortina/presidio-asic/Kconfig"
2067 source "board/broadcom/bcm963158/Kconfig"
2068 source "board/broadcom/bcm968360bg/Kconfig"
2069 source "board/broadcom/bcm968580xref/Kconfig"
2070 source "board/broadcom/bcmns3/Kconfig"
2071 source "board/cavium/thunderx/Kconfig"
2072 source "board/eets/pdu001/Kconfig"
2073 source "board/emulation/qemu-arm/Kconfig"
2074 source "board/freescale/ls2080aqds/Kconfig"
2075 source "board/freescale/ls2080ardb/Kconfig"
2076 source "board/freescale/ls1088a/Kconfig"
2077 source "board/freescale/ls1028a/Kconfig"
2078 source "board/freescale/ls1021aqds/Kconfig"
2079 source "board/freescale/ls1043aqds/Kconfig"
2080 source "board/freescale/ls1021atwr/Kconfig"
2081 source "board/freescale/ls1021atsn/Kconfig"
2082 source "board/freescale/ls1021aiot/Kconfig"
2083 source "board/freescale/ls1046aqds/Kconfig"
2084 source "board/freescale/ls1043ardb/Kconfig"
2085 source "board/freescale/ls1046ardb/Kconfig"
2086 source "board/freescale/ls1046afrwy/Kconfig"
2087 source "board/freescale/ls1012aqds/Kconfig"
2088 source "board/freescale/ls1012ardb/Kconfig"
2089 source "board/freescale/ls1012afrdm/Kconfig"
2090 source "board/freescale/lx2160a/Kconfig"
2091 source "board/grinn/chiliboard/Kconfig"
2092 source "board/hisilicon/hikey/Kconfig"
2093 source "board/hisilicon/hikey960/Kconfig"
2094 source "board/hisilicon/poplar/Kconfig"
2095 source "board/isee/igep003x/Kconfig"
2096 source "board/kontron/sl28/Kconfig"
2097 source "board/myir/mys_6ulx/Kconfig"
2098 source "board/seeed/npi_imx6ull/Kconfig"
2099 source "board/socionext/developerbox/Kconfig"
2100 source "board/st/stv0991/Kconfig"
2101 source "board/tcl/sl50/Kconfig"
2102 source "board/toradex/colibri_pxa270/Kconfig"
2103 source "board/variscite/dart_6ul/Kconfig"
2104 source "board/vscom/baltos/Kconfig"
2105 source "board/phytium/durian/Kconfig"
2106 source "board/xen/xenguest_arm64/Kconfig"
2107 source "board/keymile/Kconfig"
2109 source "arch/arm/Kconfig.debug"
2114 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2115 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2116 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64