1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed from
19 almost any 4K aligned address. This logic relies on the relocation
20 information that is embedded in the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
25 default n if ARCH_QEMU
26 default y if POSITION_INDEPENDENT
28 U-Boot typically uses a hard-coded value for the stack pointer
29 before relocation. Enable this option to instead calculate the
30 initial SP at run-time. This is useful to avoid hard-coding addresses
31 into U-Boot, so that it can be loaded and executed at arbitrary
32 addresses and thus avoid using arbitrary addresses at runtime.
34 If this option is enabled, the early stack pointer is set to
35 &_bss_start with a offset value added. The offset is specified by
36 SYS_INIT_SP_BSS_OFFSET.
38 config SYS_INIT_SP_BSS_OFFSET
39 int "Early stack offset from the .bss base address"
40 depends on INIT_SP_RELATIVE
43 This option's value is the offset added to &_bss_start in order to
44 calculate the stack pointer. This offset should be large enough so
45 that the early malloc region, global data (gd), and early stack usage
46 do not overlap any appended DTB.
48 config LINUX_KERNEL_IMAGE_HEADER
51 Place a Linux kernel image header at the start of the U-Boot binary.
52 The format of the header is described in the Linux kernel source at
53 Documentation/arm64/booting.txt. This feature is useful since the
54 image header reports the amount of memory (BSS and similar) that
55 U-Boot needs to use, but which isn't part of the binary.
57 if LINUX_KERNEL_IMAGE_HEADER
58 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
61 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
62 TEXT_OFFSET value written to the Linux kernel image header.
71 ARM GICV3 Interrupt translation service (ITS).
72 Basic support for programming locality specific peripheral
73 interrupts (LPI) configuration tables and enable LPI tables.
74 LPI configuration table can be used by u-boot or Linux.
75 ARM GICV3 has limitation, once the LPI table is enabled, LPI
76 configuration table can not be re-programmed, unless GICV3 reset.
82 config DMA_ADDR_T_64BIT
92 # Used for compatibility with asm files copied from the kernel
93 config ARM_ASM_UNIFIED
97 # Used for compatibility with asm files copied from the kernel
101 config SYS_ICACHE_OFF
102 bool "Do not enable icache"
105 Do not enable instruction cache in U-Boot.
107 config SPL_SYS_ICACHE_OFF
108 bool "Do not enable icache in SPL"
110 default SYS_ICACHE_OFF
112 Do not enable instruction cache in SPL.
114 config SYS_DCACHE_OFF
115 bool "Do not enable dcache"
118 Do not enable data cache in U-Boot.
120 config SPL_SYS_DCACHE_OFF
121 bool "Do not enable dcache in SPL"
123 default SYS_DCACHE_OFF
125 Do not enable data cache in SPL.
127 config SYS_ARM_CACHE_CP15
128 bool "CP15 based cache enabling support"
130 Select this if your processor suports enabling caches by using
134 bool "MMU-based Paged Memory Management Support"
135 select SYS_ARM_CACHE_CP15
137 Select if you want MMU-based virtualised addressing space
138 support via paged memory management.
141 bool 'Use the ARM v7 PMSA Compliant MPU'
143 Some ARM systems without an MMU have instead a Memory Protection
144 Unit (MPU) that defines the type and permissions for regions of
146 If your CPU has an MPU then you should choose 'y' here unless you
147 know that you do not want to use the MPU.
149 # If set, the workarounds for these ARM errata are applied early during U-Boot
150 # startup. Note that in general these options force the workarounds to be
151 # applied; no CPU-type/version detection exists, unlike the similar options in
152 # the Linux kernel. Do not set these options unless they apply! Also note that
153 # the following can be machine-specific errata. These do have ability to
154 # provide rudimentary version and machine-specific checks, but expect no
156 # CONFIG_ARM_ERRATA_430973
157 # CONFIG_ARM_ERRATA_454179
158 # CONFIG_ARM_ERRATA_621766
159 # CONFIG_ARM_ERRATA_798870
160 # CONFIG_ARM_ERRATA_801819
161 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
162 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
164 config ARM_ERRATA_430973
167 config ARM_ERRATA_454179
170 config ARM_ERRATA_621766
173 config ARM_ERRATA_716044
176 config ARM_ERRATA_725233
179 config ARM_ERRATA_742230
182 config ARM_ERRATA_743622
185 config ARM_ERRATA_751472
188 config ARM_ERRATA_761320
191 config ARM_ERRATA_773022
194 config ARM_ERRATA_774769
197 config ARM_ERRATA_794072
200 config ARM_ERRATA_798870
203 config ARM_ERRATA_801819
206 config ARM_ERRATA_826974
209 config ARM_ERRATA_828024
212 config ARM_ERRATA_829520
215 config ARM_ERRATA_833069
218 config ARM_ERRATA_833471
221 config ARM_ERRATA_845369
224 config ARM_ERRATA_852421
227 config ARM_ERRATA_852423
230 config ARM_ERRATA_855873
233 config ARM_CORTEX_A8_CVE_2017_5715
236 config ARM_CORTEX_A15_CVE_2017_5715
241 select SYS_CACHE_SHIFT_5
246 select SYS_CACHE_SHIFT_5
251 select SYS_CACHE_SHIFT_5
256 select SYS_CACHE_SHIFT_5
261 select SYS_CACHE_SHIFT_5
267 select SYS_CACHE_SHIFT_5
274 select SYS_CACHE_SHIFT_6
281 select SYS_CACHE_SHIFT_5
282 select SYS_THUMB_BUILD
288 select SYS_ARM_CACHE_CP15
290 select SYS_CACHE_SHIFT_6
294 select SYS_CACHE_SHIFT_5
299 select SYS_CACHE_SHIFT_5
303 default "arm720t" if CPU_ARM720T
304 default "arm920t" if CPU_ARM920T
305 default "arm926ejs" if CPU_ARM926EJS
306 default "arm946es" if CPU_ARM946ES
307 default "arm1136" if CPU_ARM1136
308 default "arm1176" if CPU_ARM1176
309 default "armv7" if CPU_V7A
310 default "armv7" if CPU_V7R
311 default "armv7m" if CPU_V7M
312 default "pxa" if CPU_PXA
313 default "sa1100" if CPU_SA1100
314 default "armv8" if ARM64
318 default 4 if CPU_ARM720T
319 default 4 if CPU_ARM920T
320 default 5 if CPU_ARM926EJS
321 default 5 if CPU_ARM946ES
322 default 6 if CPU_ARM1136
323 default 6 if CPU_ARM1176
328 default 4 if CPU_SA1100
331 config SYS_CACHE_SHIFT_5
334 config SYS_CACHE_SHIFT_6
337 config SYS_CACHE_SHIFT_7
340 config SYS_CACHELINE_SIZE
342 default 128 if SYS_CACHE_SHIFT_7
343 default 64 if SYS_CACHE_SHIFT_6
344 default 32 if SYS_CACHE_SHIFT_5
347 prompt "Select the ARM data write cache policy"
348 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
349 TARGET_BCMNSP || CPU_PXA || RZA1
350 default SYS_ARM_CACHE_WRITEBACK
352 config SYS_ARM_CACHE_WRITEBACK
353 bool "Write-back (WB)"
355 A write updates the cache only and marks the cache line as dirty.
356 External memory is updated only when the line is evicted or explicitly
359 config SYS_ARM_CACHE_WRITETHROUGH
360 bool "Write-through (WT)"
362 A write updates both the cache and the external memory system.
363 This does not mark the cache line as dirty.
365 config SYS_ARM_CACHE_WRITEALLOC
366 bool "Write allocation (WA)"
368 A cache line is allocated on a write miss. This means that executing a
369 store instruction on the processor might cause a burst read to occur.
370 There is a linefill to obtain the data for the cache line, before the
375 bool "Enable ARCH_CPU_INIT"
377 Some architectures require a call to arch_cpu_init().
378 Say Y here to enable it
380 config SYS_ARCH_TIMER
381 bool "ARM Generic Timer support"
382 depends on CPU_V7A || ARM64
385 The ARM Generic Timer (aka arch-timer) provides an architected
386 interface to a timer source on an SoC.
387 It is mandatory for ARMv8 implementation and widely available
391 bool "Support for ARM SMC Calling Convention (SMCCC)"
392 depends on CPU_V7A || ARM64
395 Say Y here if you want to enable ARM SMC Calling Convention.
396 This should be enabled if U-Boot needs to communicate with system
397 firmware (for example, PSCI) according to SMCCC.
400 bool "support boot from semihosting"
402 In emulated environments, semihosting is a way for
403 the hosted environment to call out to the emulator to
404 retrieve files from the host machine.
406 config SYS_THUMB_BUILD
407 bool "Build U-Boot using the Thumb instruction set"
410 Use this flag to build U-Boot using the Thumb instruction set for
411 ARM architectures. Thumb instruction set provides better code
412 density. For ARM architectures that support Thumb2 this flag will
413 result in Thumb2 code generated by GCC.
415 config SPL_SYS_THUMB_BUILD
416 bool "Build SPL using the Thumb instruction set"
417 default y if SYS_THUMB_BUILD
418 depends on !ARM64 && SPL
420 Use this flag to build SPL using the Thumb instruction set for
421 ARM architectures. Thumb instruction set provides better code
422 density. For ARM architectures that support Thumb2 this flag will
423 result in Thumb2 code generated by GCC.
425 config TPL_SYS_THUMB_BUILD
426 bool "Build TPL using the Thumb instruction set"
427 default y if SYS_THUMB_BUILD
428 depends on TPL && !ARM64
430 Use this flag to build TPL using the Thumb instruction set for
431 ARM architectures. Thumb instruction set provides better code
432 density. For ARM architectures that support Thumb2 this flag will
433 result in Thumb2 code generated by GCC.
436 config SYS_L2CACHE_OFF
439 If SoC does not support L2CACHE or one does not want to enable
440 L2CACHE, choose this option.
442 config ENABLE_ARM_SOC_BOOT0_HOOK
443 bool "prepare BOOT0 header"
445 If the SoC's BOOT0 requires a header area filled with (magic)
446 values, then choose this option, and create a file included as
447 <asm/arch/boot0.h> which contains the required assembler code.
449 config ARM_CORTEX_CPU_IS_UP
453 config USE_ARCH_MEMCPY
454 bool "Use an assembly optimized implementation of memcpy"
458 Enable the generation of an optimized version of memcpy.
459 Such an implementation may be faster under some conditions
460 but may increase the binary size.
462 config SPL_USE_ARCH_MEMCPY
463 bool "Use an assembly optimized implementation of memcpy for SPL"
464 default y if USE_ARCH_MEMCPY
465 depends on !ARM64 && SPL
467 Enable the generation of an optimized version of memcpy.
468 Such an implementation may be faster under some conditions
469 but may increase the binary size.
471 config TPL_USE_ARCH_MEMCPY
472 bool "Use an assembly optimized implementation of memcpy for TPL"
473 default y if USE_ARCH_MEMCPY
474 depends on !ARM64 && TPL
476 Enable the generation of an optimized version of memcpy.
477 Such an implementation may be faster under some conditions
478 but may increase the binary size.
480 config USE_ARCH_MEMSET
481 bool "Use an assembly optimized implementation of memset"
485 Enable the generation of an optimized version of memset.
486 Such an implementation may be faster under some conditions
487 but may increase the binary size.
489 config SPL_USE_ARCH_MEMSET
490 bool "Use an assembly optimized implementation of memset for SPL"
491 default y if USE_ARCH_MEMSET
492 depends on !ARM64 && SPL
494 Enable the generation of an optimized version of memset.
495 Such an implementation may be faster under some conditions
496 but may increase the binary size.
498 config TPL_USE_ARCH_MEMSET
499 bool "Use an assembly optimized implementation of memset for TPL"
500 default y if USE_ARCH_MEMSET
501 depends on !ARM64 && TPL
503 Enable the generation of an optimized version of memset.
504 Such an implementation may be faster under some conditions
505 but may increase the binary size.
507 config ARM64_SUPPORT_AARCH32
508 bool "ARM64 system support AArch32 execution state"
510 default y if !TARGET_THUNDERX_88XX
512 This ARM64 system supports AArch32 execution state.
515 prompt "Target select"
520 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
521 select SPL_SEPARATE_BSS if SPL
523 config TARGET_EDB93XX
524 bool "Support edb93xx"
528 config TARGET_ASPENITE
529 bool "Support aspenite"
533 bool "Support gplugd"
539 select SPL_DM_SPI if SPL
542 Support for TI's DaVinci platform.
545 bool "Marvell Kirkwood"
546 select ARCH_MISC_INIT
547 select BOARD_EARLY_INIT_F
551 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
557 select SPL_DM_SPI if SPL
558 select SPL_DM_SPI_FLASH if SPL
573 config TARGET_SPEAR300
574 bool "Support spear300"
575 select BOARD_EARLY_INIT_F
580 config TARGET_SPEAR310
581 bool "Support spear310"
582 select BOARD_EARLY_INIT_F
587 config TARGET_SPEAR320
588 bool "Support spear320"
589 select BOARD_EARLY_INIT_F
594 config TARGET_SPEAR600
595 bool "Support spear600"
596 select BOARD_EARLY_INIT_F
601 config TARGET_STV0991
602 bool "Support stv0991"
615 select BOARD_LATE_INIT
625 bool "Broadcom BCM283X family"
631 select SERIAL_SEARCH_ALL
636 bool "Broadcom BCM63158 family"
642 bool "Broadcom BCM68360 family"
648 bool "Broadcom BCM6858 family"
653 config TARGET_VEXPRESS_CA15_TC2
654 bool "Support vexpress_ca15_tc2"
656 select CPU_V7_HAS_NONSEC
657 select CPU_V7_HAS_VIRT
661 bool "Broadcom BCM7XXX family"
665 select OF_PRIOR_STAGE
668 This enables support for Broadcom ARM-based set-top box
669 chipsets, including the 7445 family of chips.
671 config TARGET_VEXPRESS_CA5X2
672 bool "Support vexpress_ca5x2"
676 config TARGET_VEXPRESS_CA9X4
677 bool "Support vexpress_ca9x4"
681 config TARGET_BCM23550_W1D
682 bool "Support bcm23550_w1d"
687 config TARGET_BCM28155_AP
688 bool "Support bcm28155_ap"
693 config TARGET_BCMCYGNUS
694 bool "Support bcmcygnus"
697 imply BCM_SF2_ETH_GMAC
705 bool "Support bcmnsp"
709 bool "Support Broadcom Northstar2"
712 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
713 ARMv8 Cortex-A57 processors targeting a broad range of networking
717 bool "Support Broadcom NS3"
719 select BOARD_LATE_INIT
721 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
722 ARMv8 Cortex-A72 processors targeting a broad range of networking
726 bool "Samsung EXYNOS"
735 imply SYS_THUMB_BUILD
740 bool "Samsung S5PC1XX"
749 bool "Calxeda Highbank"
753 config ARCH_INTEGRATOR
754 bool "ARM Ltd. Integrator family"
761 bool "Qualcomm IPQ40xx SoCs"
779 select SYS_ARCH_TIMER
780 select SYS_THUMB_BUILD
786 bool "Texas Instruments' K3 Architecture"
791 config ARCH_OMAP2PLUS
794 select SPL_BOARD_INIT if SPL
795 select SPL_STACK_R if SPL
797 imply TI_SYSC if DM && OF_CONTROL
802 imply DISTRO_DEFAULTS
805 Support for the Meson SoC family developed by Amlogic Inc.,
806 targeted at media players and tablet computers. We currently
807 support the S905 (GXBaby) 64-bit SoC.
814 select SPL_LIBCOMMON_SUPPORT if SPL
815 select SPL_LIBGENERIC_SUPPORT if SPL
816 select SPL_OF_CONTROL if SPL
819 Support for the MediaTek SoCs family developed by MediaTek Inc.
820 Please refer to doc/README.mediatek for more information.
823 bool "NXP LPC32xx platform"
833 bool "NXP i.MX8 platform"
837 select ENABLE_ARM_SOC_BOOT0_HOOK
840 bool "NXP i.MX8M platform"
847 bool "NXP i.MXRT platform"
855 bool "NXP i.MX23 family"
866 bool "NXP i.MX28 family"
872 bool "NXP i.MX31 family"
878 select ROM_UNIFIED_SECTIONS
880 imply SYS_THUMB_BUILD
884 select ARCH_MISC_INIT
886 select SYS_FSL_HAS_SEC if IMX_HAB
887 select SYS_FSL_SEC_COMPAT_4
888 select SYS_FSL_SEC_LE
889 imply BOARD_EARLY_INIT_F
891 imply SYS_THUMB_BUILD
896 select SYS_FSL_HAS_SEC
897 select SYS_FSL_SEC_COMPAT_4
898 select SYS_FSL_SEC_LE
900 imply SYS_THUMB_BUILD
904 default "arch/arm/mach-omap2/u-boot-spl.lds"
909 select BOARD_EARLY_INIT_F
914 bool "Nexell S5P4418/S5P6818 SoC"
915 select ENABLE_ARM_SOC_BOOT0_HOOK
919 bool "Actions Semi OWL SoCs"
927 select SYS_RELOC_GD_ENV_ADDR
931 bool "QEMU Virtual Platform"
942 bool "Renesas ARM SoCs"
945 imply BOARD_EARLY_INIT_F
948 imply SYS_THUMB_BUILD
949 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
951 config TARGET_S32V234EVB
952 bool "Support s32v234evb"
954 select SYS_FSL_ERRATUM_ESDHC111
956 config ARCH_SNAPDRAGON
957 bool "Qualcomm Snapdragon SoCs"
970 bool "Altera SOCFPGA family"
971 select ARCH_EARLY_INIT_R
972 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
973 select ARM64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
974 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
977 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
979 select SPL_DM_RESET if DM_RESET
981 select SPL_LIBCOMMON_SUPPORT
982 select SPL_LIBGENERIC_SUPPORT
983 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
984 select SPL_OF_CONTROL
985 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
986 select SPL_SERIAL_SUPPORT
988 select SPL_WATCHDOG_SUPPORT
991 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
993 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
994 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
1004 imply SPL_DM_SPI_FLASH
1005 imply SPL_LIBDISK_SUPPORT
1006 imply SPL_MMC_SUPPORT
1007 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1008 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1009 imply SPL_SPI_FLASH_SUPPORT
1010 imply SPL_SPI_SUPPORT
1014 bool "Support sunxi (Allwinner) SoCs"
1017 select CMD_MMC if MMC
1018 select CMD_USB if DISTRO_DEFAULTS
1024 select DM_MMC if MMC
1025 select DM_SCSI if SCSI
1027 select DM_USB if DISTRO_DEFAULTS
1028 select OF_BOARD_SETUP
1031 select SPECIFY_CONSOLE_INDEX
1032 select SPL_STACK_R if SPL
1033 select SPL_SYS_MALLOC_SIMPLE if SPL
1034 select SPL_SYS_THUMB_BUILD if !ARM64
1037 select SYS_THUMB_BUILD if !ARM64
1038 select USB if DISTRO_DEFAULTS
1039 select USB_KEYBOARD if DISTRO_DEFAULTS
1040 select USB_STORAGE if DISTRO_DEFAULTS
1041 select SPL_USE_TINY_PRINTF
1043 select SYS_RELOC_GD_ENV_ADDR
1044 imply BOARD_LATE_INIT
1047 imply CMD_UBI if MTD_RAW_NAND
1048 imply DISTRO_DEFAULTS
1051 imply OF_LIBFDT_OVERLAY
1052 imply PRE_CONSOLE_BUFFER
1053 imply SPL_GPIO_SUPPORT
1054 imply SPL_LIBCOMMON_SUPPORT
1055 imply SPL_LIBGENERIC_SUPPORT
1056 imply SPL_MMC_SUPPORT if MMC
1057 imply SPL_POWER_SUPPORT
1058 imply SPL_SERIAL_SUPPORT
1062 bool "ST-Ericsson U8500 Series"
1066 select DM_MMC if MMC
1068 select DM_USB if USB
1072 imply ARM_PL180_MMCI
1074 imply NOMADIK_MTU_TIMER
1077 imply SYSRESET_SYSCON
1080 bool "Support Xilinx Versal Platform"
1084 select DM_ETH if NET
1085 select DM_MMC if MMC
1088 imply BOARD_LATE_INIT
1089 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1092 bool "Freescale Vybrid"
1094 select SYS_FSL_ERRATUM_ESDHC111
1099 bool "Xilinx Zynq based platform"
1104 select DM_ETH if NET
1105 select DM_MMC if MMC
1109 select DM_USB if USB
1112 select SPL_BOARD_INIT if SPL
1113 select SPL_CLK if SPL
1114 select SPL_DM if SPL
1115 select SPL_DM_SPI if SPL
1116 select SPL_DM_SPI_FLASH if SPL
1117 select SPL_OF_CONTROL if SPL
1118 select SPL_SEPARATE_BSS if SPL
1120 imply ARCH_EARLY_INIT_R
1121 imply BOARD_LATE_INIT
1125 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1128 config ARCH_ZYNQMP_R5
1129 bool "Xilinx ZynqMP R5 based platform"
1133 select DM_ETH if NET
1134 select DM_MMC if MMC
1141 bool "Xilinx ZynqMP based platform"
1145 select DM_ETH if NET
1147 select DM_MMC if MMC
1149 select DM_SPI if SPI
1150 select DM_SPI_FLASH if DM_SPI
1151 select DM_USB if USB
1154 select SPL_BOARD_INIT if SPL
1155 select SPL_CLK if SPL
1156 select SPL_DM if SPL
1157 select SPL_DM_SPI if SPI && SPL_DM
1158 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1159 select SPL_DM_MAILBOX if SPL
1160 select SPL_FIRMWARE if SPL
1161 select SPL_SEPARATE_BSS if SPL
1164 imply BOARD_LATE_INIT
1166 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1173 imply DISTRO_DEFAULTS
1176 config TARGET_VEXPRESS64_AEMV8A
1177 bool "Support vexpress_aemv8a"
1181 config TARGET_VEXPRESS64_BASE_FVP
1182 bool "Support Versatile Express ARMv8a FVP BASE model"
1187 config TARGET_VEXPRESS64_JUNO
1188 bool "Support Versatile Express Juno Development Platform"
1203 config TARGET_TOTAL_COMPUTE
1204 bool "Support Total Compute Platform"
1212 config TARGET_LS2080A_EMU
1213 bool "Support ls2080a_emu"
1216 select ARMV8_MULTIENTRY
1217 select FSL_DDR_SYNC_REFRESH
1219 Support for Freescale LS2080A_EMU platform.
1220 The LS2080A Development System (EMULATOR) is a pre-silicon
1221 development platform that supports the QorIQ LS2080A
1222 Layerscape Architecture processor.
1224 config TARGET_LS2080A_SIMU
1225 bool "Support ls2080a_simu"
1228 select ARMV8_MULTIENTRY
1229 select BOARD_LATE_INIT
1231 Support for Freescale LS2080A_SIMU platform.
1232 The LS2080A Development System (QDS) is a pre silicon
1233 development platform that supports the QorIQ LS2080A
1234 Layerscape Architecture processor.
1236 config TARGET_LS1088AQDS
1237 bool "Support ls1088aqds"
1240 select ARMV8_MULTIENTRY
1241 select ARCH_SUPPORT_TFABOOT
1242 select BOARD_LATE_INIT
1244 select FSL_DDR_INTERACTIVE if !SD_BOOT
1246 Support for NXP LS1088AQDS platform.
1247 The LS1088A Development System (QDS) is a high-performance
1248 development platform that supports the QorIQ LS1088A
1249 Layerscape Architecture processor.
1251 config TARGET_LS2080AQDS
1252 bool "Support ls2080aqds"
1255 select ARMV8_MULTIENTRY
1256 select ARCH_SUPPORT_TFABOOT
1257 select BOARD_LATE_INIT
1262 select FSL_DDR_INTERACTIVE if !SPL
1264 Support for Freescale LS2080AQDS platform.
1265 The LS2080A Development System (QDS) is a high-performance
1266 development platform that supports the QorIQ LS2080A
1267 Layerscape Architecture processor.
1269 config TARGET_LS2080ARDB
1270 bool "Support ls2080ardb"
1273 select ARMV8_MULTIENTRY
1274 select ARCH_SUPPORT_TFABOOT
1275 select BOARD_LATE_INIT
1278 select FSL_DDR_INTERACTIVE if !SPL
1282 Support for Freescale LS2080ARDB platform.
1283 The LS2080A Reference design board (RDB) is a high-performance
1284 development platform that supports the QorIQ LS2080A
1285 Layerscape Architecture processor.
1287 config TARGET_LS2081ARDB
1288 bool "Support ls2081ardb"
1291 select ARMV8_MULTIENTRY
1292 select BOARD_LATE_INIT
1295 Support for Freescale LS2081ARDB platform.
1296 The LS2081A Reference design board (RDB) is a high-performance
1297 development platform that supports the QorIQ LS2081A/LS2041A
1298 Layerscape Architecture processor.
1300 config TARGET_LX2160ARDB
1301 bool "Support lx2160ardb"
1304 select ARMV8_MULTIENTRY
1305 select ARCH_SUPPORT_TFABOOT
1306 select BOARD_LATE_INIT
1308 Support for NXP LX2160ARDB platform.
1309 The lx2160ardb (LX2160A Reference design board (RDB)
1310 is a high-performance development platform that supports the
1311 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1313 config TARGET_LX2160AQDS
1314 bool "Support lx2160aqds"
1317 select ARMV8_MULTIENTRY
1318 select ARCH_SUPPORT_TFABOOT
1319 select BOARD_LATE_INIT
1321 Support for NXP LX2160AQDS platform.
1322 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1323 is a high-performance development platform that supports the
1324 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1326 config TARGET_LX2162AQDS
1327 bool "Support lx2162aqds"
1329 select ARCH_MISC_INIT
1331 select ARMV8_MULTIENTRY
1332 select ARCH_SUPPORT_TFABOOT
1333 select BOARD_LATE_INIT
1335 Support for NXP LX2162AQDS platform.
1336 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1339 bool "Support HiKey 96boards Consumer Edition Platform"
1346 select SPECIFY_CONSOLE_INDEX
1349 Support for HiKey 96boards platform. It features a HI6220
1350 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1352 config TARGET_HIKEY960
1353 bool "Support HiKey960 96boards Consumer Edition Platform"
1361 Support for HiKey960 96boards platform. It features a HI3660
1362 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1364 config TARGET_POPLAR
1365 bool "Support Poplar 96boards Enterprise Edition Platform"
1374 Support for Poplar 96boards EE platform. It features a HI3798cv200
1375 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1376 making it capable of running any commercial set-top solution based on
1379 config TARGET_LS1012AQDS
1380 bool "Support ls1012aqds"
1383 select ARCH_SUPPORT_TFABOOT
1384 select BOARD_LATE_INIT
1386 Support for Freescale LS1012AQDS platform.
1387 The LS1012A Development System (QDS) is a high-performance
1388 development platform that supports the QorIQ LS1012A
1389 Layerscape Architecture processor.
1391 config TARGET_LS1012ARDB
1392 bool "Support ls1012ardb"
1395 select ARCH_SUPPORT_TFABOOT
1396 select BOARD_LATE_INIT
1400 Support for Freescale LS1012ARDB platform.
1401 The LS1012A Reference design board (RDB) is a high-performance
1402 development platform that supports the QorIQ LS1012A
1403 Layerscape Architecture processor.
1405 config TARGET_LS1012A2G5RDB
1406 bool "Support ls1012a2g5rdb"
1409 select ARCH_SUPPORT_TFABOOT
1410 select BOARD_LATE_INIT
1413 Support for Freescale LS1012A2G5RDB platform.
1414 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1415 development platform that supports the QorIQ LS1012A
1416 Layerscape Architecture processor.
1418 config TARGET_LS1012AFRWY
1419 bool "Support ls1012afrwy"
1422 select ARCH_SUPPORT_TFABOOT
1423 select BOARD_LATE_INIT
1427 Support for Freescale LS1012AFRWY platform.
1428 The LS1012A FRWY board (FRWY) is a high-performance
1429 development platform that supports the QorIQ LS1012A
1430 Layerscape Architecture processor.
1432 config TARGET_LS1012AFRDM
1433 bool "Support ls1012afrdm"
1436 select ARCH_SUPPORT_TFABOOT
1438 Support for Freescale LS1012AFRDM platform.
1439 The LS1012A Freedom board (FRDM) is a high-performance
1440 development platform that supports the QorIQ LS1012A
1441 Layerscape Architecture processor.
1443 config TARGET_LS1028AQDS
1444 bool "Support ls1028aqds"
1447 select ARMV8_MULTIENTRY
1448 select ARCH_SUPPORT_TFABOOT
1449 select BOARD_LATE_INIT
1451 Support for Freescale LS1028AQDS platform
1452 The LS1028A Development System (QDS) is a high-performance
1453 development platform that supports the QorIQ LS1028A
1454 Layerscape Architecture processor.
1456 config TARGET_LS1028ARDB
1457 bool "Support ls1028ardb"
1460 select ARMV8_MULTIENTRY
1461 select ARCH_SUPPORT_TFABOOT
1462 select BOARD_LATE_INIT
1464 Support for Freescale LS1028ARDB platform
1465 The LS1028A Development System (RDB) is a high-performance
1466 development platform that supports the QorIQ LS1028A
1467 Layerscape Architecture processor.
1469 config TARGET_LS1088ARDB
1470 bool "Support ls1088ardb"
1473 select ARMV8_MULTIENTRY
1474 select ARCH_SUPPORT_TFABOOT
1475 select BOARD_LATE_INIT
1477 select FSL_DDR_INTERACTIVE if !SD_BOOT
1479 Support for NXP LS1088ARDB platform.
1480 The LS1088A Reference design board (RDB) is a high-performance
1481 development platform that supports the QorIQ LS1088A
1482 Layerscape Architecture processor.
1484 config TARGET_LS1021AQDS
1485 bool "Support ls1021aqds"
1487 select ARCH_SUPPORT_PSCI
1488 select BOARD_EARLY_INIT_F
1489 select BOARD_LATE_INIT
1491 select CPU_V7_HAS_NONSEC
1492 select CPU_V7_HAS_VIRT
1493 select LS1_DEEP_SLEEP
1496 select FSL_DDR_INTERACTIVE
1497 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1498 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1501 config TARGET_LS1021ATWR
1502 bool "Support ls1021atwr"
1504 select ARCH_SUPPORT_PSCI
1505 select BOARD_EARLY_INIT_F
1506 select BOARD_LATE_INIT
1508 select CPU_V7_HAS_NONSEC
1509 select CPU_V7_HAS_VIRT
1510 select LS1_DEEP_SLEEP
1512 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1515 config TARGET_LS1021ATSN
1516 bool "Support ls1021atsn"
1518 select ARCH_SUPPORT_PSCI
1519 select BOARD_EARLY_INIT_F
1520 select BOARD_LATE_INIT
1522 select CPU_V7_HAS_NONSEC
1523 select CPU_V7_HAS_VIRT
1524 select LS1_DEEP_SLEEP
1528 config TARGET_LS1021AIOT
1529 bool "Support ls1021aiot"
1531 select ARCH_SUPPORT_PSCI
1532 select BOARD_LATE_INIT
1534 select CPU_V7_HAS_NONSEC
1535 select CPU_V7_HAS_VIRT
1537 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1540 Support for Freescale LS1021AIOT platform.
1541 The LS1021A Freescale board (IOT) is a high-performance
1542 development platform that supports the QorIQ LS1021A
1543 Layerscape Architecture processor.
1545 config TARGET_LS1043AQDS
1546 bool "Support ls1043aqds"
1549 select ARMV8_MULTIENTRY
1550 select ARCH_SUPPORT_TFABOOT
1551 select BOARD_EARLY_INIT_F
1552 select BOARD_LATE_INIT
1554 select FSL_DDR_INTERACTIVE if !SPL
1555 select FSL_DSPI if !SPL_NO_DSPI
1556 select DM_SPI_FLASH if FSL_DSPI
1560 Support for Freescale LS1043AQDS platform.
1562 config TARGET_LS1043ARDB
1563 bool "Support ls1043ardb"
1566 select ARMV8_MULTIENTRY
1567 select ARCH_SUPPORT_TFABOOT
1568 select BOARD_EARLY_INIT_F
1569 select BOARD_LATE_INIT
1571 select FSL_DSPI if !SPL_NO_DSPI
1572 select DM_SPI_FLASH if FSL_DSPI
1574 Support for Freescale LS1043ARDB platform.
1576 config TARGET_LS1046AQDS
1577 bool "Support ls1046aqds"
1580 select ARMV8_MULTIENTRY
1581 select ARCH_SUPPORT_TFABOOT
1582 select BOARD_EARLY_INIT_F
1583 select BOARD_LATE_INIT
1584 select DM_SPI_FLASH if DM_SPI
1586 select FSL_DDR_BIST if !SPL
1587 select FSL_DDR_INTERACTIVE if !SPL
1588 select FSL_DDR_INTERACTIVE if !SPL
1591 Support for Freescale LS1046AQDS platform.
1592 The LS1046A Development System (QDS) is a high-performance
1593 development platform that supports the QorIQ LS1046A
1594 Layerscape Architecture processor.
1596 config TARGET_LS1046ARDB
1597 bool "Support ls1046ardb"
1600 select ARMV8_MULTIENTRY
1601 select ARCH_SUPPORT_TFABOOT
1602 select BOARD_EARLY_INIT_F
1603 select BOARD_LATE_INIT
1604 select DM_SPI_FLASH if DM_SPI
1605 select POWER_MC34VR500
1608 select FSL_DDR_INTERACTIVE if !SPL
1611 Support for Freescale LS1046ARDB platform.
1612 The LS1046A Reference Design Board (RDB) is a high-performance
1613 development platform that supports the QorIQ LS1046A
1614 Layerscape Architecture processor.
1616 config TARGET_LS1046AFRWY
1617 bool "Support ls1046afrwy"
1620 select ARMV8_MULTIENTRY
1621 select ARCH_SUPPORT_TFABOOT
1622 select BOARD_EARLY_INIT_F
1623 select BOARD_LATE_INIT
1624 select DM_SPI_FLASH if DM_SPI
1627 Support for Freescale LS1046AFRWY platform.
1628 The LS1046A Freeway Board (FRWY) is a high-performance
1629 development platform that supports the QorIQ LS1046A
1630 Layerscape Architecture processor.
1636 select ARMV8_MULTIENTRY
1640 Support for Kontron SMARC-sAL28 board.
1642 config TARGET_COLIBRI_PXA270
1643 bool "Support colibri_pxa270"
1646 config ARCH_UNIPHIER
1647 bool "Socionext UniPhier SoCs"
1648 select BOARD_LATE_INIT
1658 select OF_BOARD_SETUP
1662 select SPL_BOARD_INIT if SPL
1663 select SPL_DM if SPL
1664 select SPL_LIBCOMMON_SUPPORT if SPL
1665 select SPL_LIBGENERIC_SUPPORT if SPL
1666 select SPL_OF_CONTROL if SPL
1667 select SPL_PINCTRL if SPL
1670 imply DISTRO_DEFAULTS
1673 Support for UniPhier SoC family developed by Socionext Inc.
1674 (formerly, System LSI Business Division of Panasonic Corporation)
1677 bool "Support STMicroelectronics STM32 MCU with cortex M"
1684 bool "Support STMicrolectronics SoCs"
1693 Support for STMicroelectronics STiH407/10 SoC family.
1694 This SoC is used on Linaro 96Board STiH410-B2260
1697 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1698 select ARCH_MISC_INIT
1699 select ARCH_SUPPORT_TFABOOT
1700 select BOARD_LATE_INIT
1709 select OF_SYSTEM_SETUP
1715 select SYS_THUMB_BUILD
1719 imply OF_LIBFDT_OVERLAY
1720 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1723 Support for STM32MP SoC family developed by STMicroelectronics,
1724 MPUs based on ARM cortex A core
1725 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1726 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1728 SPL is the unsecure FSBL for the basic boot chain.
1730 config ARCH_ROCKCHIP
1731 bool "Support Rockchip SoCs"
1733 select BINMAN if SPL_OPTEE
1743 select DM_USB if USB
1744 select ENABLE_ARM_SOC_BOOT0_HOOK
1747 select SPL_DM if SPL
1748 select SPL_DM_SPI if SPL
1749 select SPL_DM_SPI_FLASH if SPL
1751 select SYS_THUMB_BUILD if !ARM64
1754 imply DEBUG_UART_BOARD_INIT
1755 imply DISTRO_DEFAULTS
1757 imply SARADC_ROCKCHIP
1759 imply SPL_SYS_MALLOC_SIMPLE
1762 imply USB_FUNCTION_FASTBOOT
1764 config ARCH_OCTEONTX
1765 bool "Support OcteonTX SoCs"
1771 select BOARD_LATE_INIT
1772 select SYS_CACHE_SHIFT_7
1774 config ARCH_OCTEONTX2
1775 bool "Support OcteonTX2 SoCs"
1781 select BOARD_LATE_INIT
1782 select SYS_CACHE_SHIFT_7
1784 config TARGET_THUNDERX_88XX
1785 bool "Support ThunderX 88xx"
1789 select SYS_CACHE_SHIFT_7
1792 bool "Support Aspeed SoCs"
1797 config TARGET_DURIAN
1798 bool "Support Phytium Durian Platform"
1801 Support for durian platform.
1802 It has 2GB Sdram, uart and pcie.
1804 config TARGET_PRESIDIO_ASIC
1805 bool "Support Cortina Presidio ASIC Platform"
1808 config TARGET_XENGUEST_ARM64
1809 bool "Xen guest ARM64"
1813 select LINUX_KERNEL_IMAGE_HEADER
1818 config ARCH_SUPPORT_TFABOOT
1822 bool "Support for booting from TF-A"
1823 depends on ARCH_SUPPORT_TFABOOT
1826 Some platforms support the setup of secure registers (for instance
1827 for CPU errata handling) or provide secure services like PSCI.
1828 Those services could also be provided by other firmware parts
1829 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
1830 does not need to (and cannot) execute this code.
1831 Enabling this option will make a U-Boot binary that is relying
1832 on other firmware layers to provide secure functionality.
1834 config TI_SECURE_DEVICE
1835 bool "HS Device Type Support"
1836 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1838 If a high secure (HS) device type is being used, this config
1839 must be set. This option impacts various aspects of the
1840 build system (to create signed boot images that can be
1841 authenticated) and the code. See the doc/README.ti-secure
1842 file for further details.
1844 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1845 config ISW_ENTRY_ADDR
1846 hex "Address in memory or XIP address of bootloader entry point"
1847 default 0x402F4000 if AM43XX
1848 default 0x402F0400 if AM33XX
1849 default 0x40301350 if OMAP54XX
1851 After any reset, the boot ROM searches the boot media for a valid
1852 boot image. For non-XIP devices, the ROM then copies the image into
1853 internal memory. For all boot modes, after the ROM processes the
1854 boot image it eventually computes the entry point address depending
1855 on the device type (secure/non-secure), boot media (xip/non-xip) and
1859 source "arch/arm/mach-aspeed/Kconfig"
1861 source "arch/arm/mach-at91/Kconfig"
1863 source "arch/arm/mach-bcm283x/Kconfig"
1865 source "arch/arm/mach-bcmstb/Kconfig"
1867 source "arch/arm/mach-davinci/Kconfig"
1869 source "arch/arm/mach-exynos/Kconfig"
1871 source "arch/arm/mach-highbank/Kconfig"
1873 source "arch/arm/mach-integrator/Kconfig"
1875 source "arch/arm/mach-ipq40xx/Kconfig"
1877 source "arch/arm/mach-k3/Kconfig"
1879 source "arch/arm/mach-keystone/Kconfig"
1881 source "arch/arm/mach-kirkwood/Kconfig"
1883 source "arch/arm/mach-lpc32xx/Kconfig"
1885 source "arch/arm/mach-mvebu/Kconfig"
1887 source "arch/arm/mach-octeontx/Kconfig"
1889 source "arch/arm/mach-octeontx2/Kconfig"
1891 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1893 source "arch/arm/mach-imx/mx2/Kconfig"
1895 source "arch/arm/mach-imx/mx3/Kconfig"
1897 source "arch/arm/mach-imx/mx5/Kconfig"
1899 source "arch/arm/mach-imx/mx6/Kconfig"
1901 source "arch/arm/mach-imx/mx7/Kconfig"
1903 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1905 source "arch/arm/mach-imx/imx8/Kconfig"
1907 source "arch/arm/mach-imx/imx8m/Kconfig"
1909 source "arch/arm/mach-imx/imxrt/Kconfig"
1911 source "arch/arm/mach-imx/mxs/Kconfig"
1913 source "arch/arm/mach-omap2/Kconfig"
1915 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1917 source "arch/arm/mach-orion5x/Kconfig"
1919 source "arch/arm/mach-owl/Kconfig"
1921 source "arch/arm/mach-rmobile/Kconfig"
1923 source "arch/arm/mach-meson/Kconfig"
1925 source "arch/arm/mach-mediatek/Kconfig"
1927 source "arch/arm/mach-qemu/Kconfig"
1929 source "arch/arm/mach-rockchip/Kconfig"
1931 source "arch/arm/mach-s5pc1xx/Kconfig"
1933 source "arch/arm/mach-snapdragon/Kconfig"
1935 source "arch/arm/mach-socfpga/Kconfig"
1937 source "arch/arm/mach-sti/Kconfig"
1939 source "arch/arm/mach-stm32/Kconfig"
1941 source "arch/arm/mach-stm32mp/Kconfig"
1943 source "arch/arm/mach-sunxi/Kconfig"
1945 source "arch/arm/mach-tegra/Kconfig"
1947 source "arch/arm/mach-u8500/Kconfig"
1949 source "arch/arm/mach-uniphier/Kconfig"
1951 source "arch/arm/cpu/armv7/vf610/Kconfig"
1953 source "arch/arm/mach-zynq/Kconfig"
1955 source "arch/arm/mach-zynqmp/Kconfig"
1957 source "arch/arm/mach-versal/Kconfig"
1959 source "arch/arm/mach-zynqmp-r5/Kconfig"
1961 source "arch/arm/cpu/armv7/Kconfig"
1963 source "arch/arm/cpu/armv8/Kconfig"
1965 source "arch/arm/mach-imx/Kconfig"
1967 source "arch/arm/mach-nexell/Kconfig"
1969 source "board/armltd/total_compute/Kconfig"
1971 source "board/bosch/shc/Kconfig"
1972 source "board/bosch/guardian/Kconfig"
1973 source "board/CarMediaLab/flea3/Kconfig"
1974 source "board/Marvell/aspenite/Kconfig"
1975 source "board/Marvell/gplugd/Kconfig"
1976 source "board/Marvell/octeontx/Kconfig"
1977 source "board/Marvell/octeontx2/Kconfig"
1978 source "board/armadeus/apf27/Kconfig"
1979 source "board/armltd/vexpress/Kconfig"
1980 source "board/armltd/vexpress64/Kconfig"
1981 source "board/cortina/presidio-asic/Kconfig"
1982 source "board/broadcom/bcm23550_w1d/Kconfig"
1983 source "board/broadcom/bcm28155_ap/Kconfig"
1984 source "board/broadcom/bcm963158/Kconfig"
1985 source "board/broadcom/bcm968360bg/Kconfig"
1986 source "board/broadcom/bcm968580xref/Kconfig"
1987 source "board/broadcom/bcmcygnus/Kconfig"
1988 source "board/broadcom/bcmnsp/Kconfig"
1989 source "board/broadcom/bcmns2/Kconfig"
1990 source "board/broadcom/bcmns3/Kconfig"
1991 source "board/cavium/thunderx/Kconfig"
1992 source "board/cirrus/edb93xx/Kconfig"
1993 source "board/eets/pdu001/Kconfig"
1994 source "board/emulation/qemu-arm/Kconfig"
1995 source "board/freescale/ls2080a/Kconfig"
1996 source "board/freescale/ls2080aqds/Kconfig"
1997 source "board/freescale/ls2080ardb/Kconfig"
1998 source "board/freescale/ls1088a/Kconfig"
1999 source "board/freescale/ls1028a/Kconfig"
2000 source "board/freescale/ls1021aqds/Kconfig"
2001 source "board/freescale/ls1043aqds/Kconfig"
2002 source "board/freescale/ls1021atwr/Kconfig"
2003 source "board/freescale/ls1021atsn/Kconfig"
2004 source "board/freescale/ls1021aiot/Kconfig"
2005 source "board/freescale/ls1046aqds/Kconfig"
2006 source "board/freescale/ls1043ardb/Kconfig"
2007 source "board/freescale/ls1046ardb/Kconfig"
2008 source "board/freescale/ls1046afrwy/Kconfig"
2009 source "board/freescale/ls1012aqds/Kconfig"
2010 source "board/freescale/ls1012ardb/Kconfig"
2011 source "board/freescale/ls1012afrdm/Kconfig"
2012 source "board/freescale/lx2160a/Kconfig"
2013 source "board/freescale/s32v234evb/Kconfig"
2014 source "board/grinn/chiliboard/Kconfig"
2015 source "board/hisilicon/hikey/Kconfig"
2016 source "board/hisilicon/hikey960/Kconfig"
2017 source "board/hisilicon/poplar/Kconfig"
2018 source "board/isee/igep003x/Kconfig"
2019 source "board/kontron/sl28/Kconfig"
2020 source "board/myir/mys_6ulx/Kconfig"
2021 source "board/spear/spear300/Kconfig"
2022 source "board/spear/spear310/Kconfig"
2023 source "board/spear/spear320/Kconfig"
2024 source "board/spear/spear600/Kconfig"
2025 source "board/spear/x600/Kconfig"
2026 source "board/st/stv0991/Kconfig"
2027 source "board/tcl/sl50/Kconfig"
2028 source "board/toradex/colibri_pxa270/Kconfig"
2029 source "board/variscite/dart_6ul/Kconfig"
2030 source "board/vscom/baltos/Kconfig"
2031 source "board/phytium/durian/Kconfig"
2032 source "board/xen/xenguest_arm64/Kconfig"
2034 source "arch/arm/Kconfig.debug"
2039 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2040 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2041 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64