1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
15 select INIT_SP_RELATIVE
17 U-Boot expects to be linked to a specific hard-coded address, and to
18 be loaded to and run from that address. This option lifts that
19 restriction, thus allowing the code to be loaded to and executed
20 from almost any address. This logic relies on the relocation
21 information that is embedded in the binary to support U-Boot
22 relocating itself to the top-of-RAM later during execution.
24 config INIT_SP_RELATIVE
25 bool "Specify the early stack pointer relative to the .bss section"
27 U-Boot typically uses a hard-coded value for the stack pointer
28 before relocation. Enable this option to instead calculate the
29 initial SP at run-time. This is useful to avoid hard-coding addresses
30 into U-Boot, so that it can be loaded and executed at arbitrary
31 addresses and thus avoid using arbitrary addresses at runtime.
33 If this option is enabled, the early stack pointer is set to
34 &_bss_start with a offset value added. The offset is specified by
35 SYS_INIT_SP_BSS_OFFSET.
37 config SYS_INIT_SP_BSS_OFFSET
38 int "Early stack offset from the .bss base address"
39 depends on INIT_SP_RELATIVE
42 This option's value is the offset added to &_bss_start in order to
43 calculate the stack pointer. This offset should be large enough so
44 that the early malloc region, global data (gd), and early stack usage
45 do not overlap any appended DTB.
47 config LINUX_KERNEL_IMAGE_HEADER
50 Place a Linux kernel image header at the start of the U-Boot binary.
51 The format of the header is described in the Linux kernel source at
52 Documentation/arm64/booting.txt. This feature is useful since the
53 image header reports the amount of memory (BSS and similar) that
54 U-Boot needs to use, but which isn't part of the binary.
56 if LINUX_KERNEL_IMAGE_HEADER
57 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
60 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
61 TEXT_OFFSET value written to the Linux kernel image header.
68 ARM GICV3 Interrupt translation service (ITS).
69 Basic support for programming locality specific peripheral
70 interrupts (LPI) configuration tables and enable LPI tables.
71 LPI configuration table can be used by u-boot or Linux.
72 ARM GICV3 has limitation, once the LPI table is enabled, LPI
73 configuration table can not be re-programmed, unless GICV3 reset.
77 default y if ARM64 && !POSITION_INDEPENDENT
79 config DMA_ADDR_T_64BIT
89 # Used for compatibility with asm files copied from the kernel
90 config ARM_ASM_UNIFIED
94 # Used for compatibility with asm files copied from the kernel
99 bool "Do not enable icache"
102 Do not enable instruction cache in U-Boot.
104 config SPL_SYS_ICACHE_OFF
105 bool "Do not enable icache in SPL"
107 default SYS_ICACHE_OFF
109 Do not enable instruction cache in SPL.
111 config SYS_DCACHE_OFF
112 bool "Do not enable dcache"
115 Do not enable data cache in U-Boot.
117 config SPL_SYS_DCACHE_OFF
118 bool "Do not enable dcache in SPL"
120 default SYS_DCACHE_OFF
122 Do not enable data cache in SPL.
124 config SYS_ARM_CACHE_CP15
125 bool "CP15 based cache enabling support"
127 Select this if your processor suports enabling caches by using
131 bool "MMU-based Paged Memory Management Support"
132 select SYS_ARM_CACHE_CP15
134 Select if you want MMU-based virtualised addressing space
135 support via paged memory management.
138 bool 'Use the ARM v7 PMSA Compliant MPU'
140 Some ARM systems without an MMU have instead a Memory Protection
141 Unit (MPU) that defines the type and permissions for regions of
143 If your CPU has an MPU then you should choose 'y' here unless you
144 know that you do not want to use the MPU.
146 # If set, the workarounds for these ARM errata are applied early during U-Boot
147 # startup. Note that in general these options force the workarounds to be
148 # applied; no CPU-type/version detection exists, unlike the similar options in
149 # the Linux kernel. Do not set these options unless they apply! Also note that
150 # the following can be machine-specific errata. These do have ability to
151 # provide rudimentary version and machine-specific checks, but expect no
153 # CONFIG_ARM_ERRATA_430973
154 # CONFIG_ARM_ERRATA_454179
155 # CONFIG_ARM_ERRATA_621766
156 # CONFIG_ARM_ERRATA_798870
157 # CONFIG_ARM_ERRATA_801819
158 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
159 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
161 config ARM_ERRATA_430973
164 config ARM_ERRATA_454179
167 config ARM_ERRATA_621766
170 config ARM_ERRATA_716044
173 config ARM_ERRATA_725233
176 config ARM_ERRATA_742230
179 config ARM_ERRATA_743622
182 config ARM_ERRATA_751472
185 config ARM_ERRATA_761320
188 config ARM_ERRATA_773022
191 config ARM_ERRATA_774769
194 config ARM_ERRATA_794072
197 config ARM_ERRATA_798870
200 config ARM_ERRATA_801819
203 config ARM_ERRATA_826974
206 config ARM_ERRATA_828024
209 config ARM_ERRATA_829520
212 config ARM_ERRATA_833069
215 config ARM_ERRATA_833471
218 config ARM_ERRATA_845369
221 config ARM_ERRATA_852421
224 config ARM_ERRATA_852423
227 config ARM_ERRATA_855873
230 config ARM_CORTEX_A8_CVE_2017_5715
233 config ARM_CORTEX_A15_CVE_2017_5715
238 select SYS_CACHE_SHIFT_5
243 select SYS_CACHE_SHIFT_5
248 select SYS_CACHE_SHIFT_5
253 select SYS_CACHE_SHIFT_5
258 select SYS_CACHE_SHIFT_5
264 select SYS_CACHE_SHIFT_5
271 select SYS_CACHE_SHIFT_6
278 select SYS_CACHE_SHIFT_5
279 select SYS_THUMB_BUILD
285 select SYS_ARM_CACHE_CP15
287 select SYS_CACHE_SHIFT_6
291 select SYS_CACHE_SHIFT_5
296 select SYS_CACHE_SHIFT_5
300 default "arm720t" if CPU_ARM720T
301 default "arm920t" if CPU_ARM920T
302 default "arm926ejs" if CPU_ARM926EJS
303 default "arm946es" if CPU_ARM946ES
304 default "arm1136" if CPU_ARM1136
305 default "arm1176" if CPU_ARM1176
306 default "armv7" if CPU_V7A
307 default "armv7" if CPU_V7R
308 default "armv7m" if CPU_V7M
309 default "pxa" if CPU_PXA
310 default "sa1100" if CPU_SA1100
311 default "armv8" if ARM64
315 default 4 if CPU_ARM720T
316 default 4 if CPU_ARM920T
317 default 5 if CPU_ARM926EJS
318 default 5 if CPU_ARM946ES
319 default 6 if CPU_ARM1136
320 default 6 if CPU_ARM1176
325 default 4 if CPU_SA1100
328 config SYS_CACHE_SHIFT_5
331 config SYS_CACHE_SHIFT_6
334 config SYS_CACHE_SHIFT_7
337 config SYS_CACHELINE_SIZE
339 default 128 if SYS_CACHE_SHIFT_7
340 default 64 if SYS_CACHE_SHIFT_6
341 default 32 if SYS_CACHE_SHIFT_5
344 prompt "Select the ARM data write cache policy"
345 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
346 TARGET_BCMNSP || CPU_PXA || RZA1
347 default SYS_ARM_CACHE_WRITEBACK
349 config SYS_ARM_CACHE_WRITEBACK
350 bool "Write-back (WB)"
352 A write updates the cache only and marks the cache line as dirty.
353 External memory is updated only when the line is evicted or explicitly
356 config SYS_ARM_CACHE_WRITETHROUGH
357 bool "Write-through (WT)"
359 A write updates both the cache and the external memory system.
360 This does not mark the cache line as dirty.
362 config SYS_ARM_CACHE_WRITEALLOC
363 bool "Write allocation (WA)"
365 A cache line is allocated on a write miss. This means that executing a
366 store instruction on the processor might cause a burst read to occur.
367 There is a linefill to obtain the data for the cache line, before the
372 bool "Enable ARCH_CPU_INIT"
374 Some architectures require a call to arch_cpu_init().
375 Say Y here to enable it
377 config SYS_ARCH_TIMER
378 bool "ARM Generic Timer support"
379 depends on CPU_V7A || ARM64
382 The ARM Generic Timer (aka arch-timer) provides an architected
383 interface to a timer source on an SoC.
384 It is mandatory for ARMv8 implementation and widely available
388 bool "Support for ARM SMC Calling Convention (SMCCC)"
389 depends on CPU_V7A || ARM64
392 Say Y here if you want to enable ARM SMC Calling Convention.
393 This should be enabled if U-Boot needs to communicate with system
394 firmware (for example, PSCI) according to SMCCC.
397 bool "support boot from semihosting"
399 In emulated environments, semihosting is a way for
400 the hosted environment to call out to the emulator to
401 retrieve files from the host machine.
403 config SYS_THUMB_BUILD
404 bool "Build U-Boot using the Thumb instruction set"
407 Use this flag to build U-Boot using the Thumb instruction set for
408 ARM architectures. Thumb instruction set provides better code
409 density. For ARM architectures that support Thumb2 this flag will
410 result in Thumb2 code generated by GCC.
412 config SPL_SYS_THUMB_BUILD
413 bool "Build SPL using the Thumb instruction set"
414 default y if SYS_THUMB_BUILD
415 depends on !ARM64 && SPL
417 Use this flag to build SPL using the Thumb instruction set for
418 ARM architectures. Thumb instruction set provides better code
419 density. For ARM architectures that support Thumb2 this flag will
420 result in Thumb2 code generated by GCC.
422 config TPL_SYS_THUMB_BUILD
423 bool "Build TPL using the Thumb instruction set"
424 default y if SYS_THUMB_BUILD
425 depends on TPL && !ARM64
427 Use this flag to build TPL using the Thumb instruction set for
428 ARM architectures. Thumb instruction set provides better code
429 density. For ARM architectures that support Thumb2 this flag will
430 result in Thumb2 code generated by GCC.
433 config SYS_L2CACHE_OFF
436 If SoC does not support L2CACHE or one does not want to enable
437 L2CACHE, choose this option.
439 config ENABLE_ARM_SOC_BOOT0_HOOK
440 bool "prepare BOOT0 header"
442 If the SoC's BOOT0 requires a header area filled with (magic)
443 values, then choose this option, and create a file included as
444 <asm/arch/boot0.h> which contains the required assembler code.
446 config ARM_CORTEX_CPU_IS_UP
450 config USE_ARCH_MEMCPY
451 bool "Use an assembly optimized implementation of memcpy"
455 Enable the generation of an optimized version of memcpy.
456 Such an implementation may be faster under some conditions
457 but may increase the binary size.
459 config SPL_USE_ARCH_MEMCPY
460 bool "Use an assembly optimized implementation of memcpy for SPL"
461 default y if USE_ARCH_MEMCPY
462 depends on !ARM64 && SPL
464 Enable the generation of an optimized version of memcpy.
465 Such an implementation may be faster under some conditions
466 but may increase the binary size.
468 config TPL_USE_ARCH_MEMCPY
469 bool "Use an assembly optimized implementation of memcpy for TPL"
470 default y if USE_ARCH_MEMCPY
471 depends on !ARM64 && TPL
473 Enable the generation of an optimized version of memcpy.
474 Such an implementation may be faster under some conditions
475 but may increase the binary size.
477 config USE_ARCH_MEMSET
478 bool "Use an assembly optimized implementation of memset"
482 Enable the generation of an optimized version of memset.
483 Such an implementation may be faster under some conditions
484 but may increase the binary size.
486 config SPL_USE_ARCH_MEMSET
487 bool "Use an assembly optimized implementation of memset for SPL"
488 default y if USE_ARCH_MEMSET
489 depends on !ARM64 && SPL
491 Enable the generation of an optimized version of memset.
492 Such an implementation may be faster under some conditions
493 but may increase the binary size.
495 config TPL_USE_ARCH_MEMSET
496 bool "Use an assembly optimized implementation of memset for TPL"
497 default y if USE_ARCH_MEMSET
498 depends on !ARM64 && TPL
500 Enable the generation of an optimized version of memset.
501 Such an implementation may be faster under some conditions
502 but may increase the binary size.
504 config SET_STACK_SIZE
505 bool "Enable an option to set max stack size that can be used"
506 default y if ARCH_VERSAL || ARCH_ZYNQMP || ARCH_ZYNQ
508 This will enable an option to set max stack size that can be
512 hex "Define max stack size that can be used by U-Boot"
513 depends on SET_STACK_SIZE
514 default 0x4000000 if ARCH_VERSAL || ARCH_ZYNQMP
515 default 0x1000000 if ARCH_ZYNQ
517 Define Max stack size that can be used by U-Boot so that the
518 initrd_high will be calculated as base stack pointer minus this
521 config ARM64_SUPPORT_AARCH32
522 bool "ARM64 system support AArch32 execution state"
524 default y if !TARGET_THUNDERX_88XX
526 This ARM64 system supports AArch32 execution state.
529 prompt "Target select"
534 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
535 select SPL_SEPARATE_BSS if SPL
537 config TARGET_EDB93XX
538 bool "Support edb93xx"
542 config TARGET_ASPENITE
543 bool "Support aspenite"
547 bool "Support gplugd"
553 select SPL_DM_SPI if SPL
556 Support for TI's DaVinci platform.
559 bool "Marvell Kirkwood"
560 select ARCH_MISC_INIT
561 select BOARD_EARLY_INIT_F
565 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
571 select SPL_DM_SPI if SPL
572 select SPL_DM_SPI_FLASH if SPL
587 config TARGET_SPEAR300
588 bool "Support spear300"
589 select BOARD_EARLY_INIT_F
594 config TARGET_SPEAR310
595 bool "Support spear310"
596 select BOARD_EARLY_INIT_F
601 config TARGET_SPEAR320
602 bool "Support spear320"
603 select BOARD_EARLY_INIT_F
608 config TARGET_SPEAR600
609 bool "Support spear600"
610 select BOARD_EARLY_INIT_F
615 config TARGET_STV0991
616 bool "Support stv0991"
629 select BOARD_LATE_INIT
638 config TARGET_MX35PDK
639 bool "Support mx35pdk"
640 select BOARD_LATE_INIT
644 bool "Broadcom BCM283X family"
650 select SERIAL_SEARCH_ALL
655 bool "Broadcom BCM63158 family"
661 bool "Broadcom BCM68360 family"
667 bool "Broadcom BCM6858 family"
672 config TARGET_VEXPRESS_CA15_TC2
673 bool "Support vexpress_ca15_tc2"
675 select CPU_V7_HAS_NONSEC
676 select CPU_V7_HAS_VIRT
680 bool "Broadcom BCM7XXX family"
684 select OF_PRIOR_STAGE
687 This enables support for Broadcom ARM-based set-top box
688 chipsets, including the 7445 family of chips.
690 config TARGET_VEXPRESS_CA5X2
691 bool "Support vexpress_ca5x2"
695 config TARGET_VEXPRESS_CA9X4
696 bool "Support vexpress_ca9x4"
700 config TARGET_BCM23550_W1D
701 bool "Support bcm23550_w1d"
706 config TARGET_BCM28155_AP
707 bool "Support bcm28155_ap"
712 config TARGET_BCMCYGNUS
713 bool "Support bcmcygnus"
716 imply BCM_SF2_ETH_GMAC
724 bool "Support bcmnsp"
728 bool "Support Broadcom Northstar2"
731 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
732 ARMv8 Cortex-A57 processors targeting a broad range of networking
736 bool "Samsung EXYNOS"
745 imply SYS_THUMB_BUILD
750 bool "Samsung S5PC1XX"
759 bool "Calxeda Highbank"
763 config ARCH_INTEGRATOR
764 bool "ARM Ltd. Integrator family"
771 bool "Qualcomm IPQ40xx SoCs"
786 select SYS_ARCH_TIMER
787 select SYS_THUMB_BUILD
793 bool "Texas Instruments' K3 Architecture"
798 config ARCH_OMAP2PLUS
801 select SPL_BOARD_INIT if SPL
802 select SPL_STACK_R if SPL
808 imply DISTRO_DEFAULTS
811 Support for the Meson SoC family developed by Amlogic Inc.,
812 targeted at media players and tablet computers. We currently
813 support the S905 (GXBaby) 64-bit SoC.
820 select SPL_LIBCOMMON_SUPPORT if SPL
821 select SPL_LIBGENERIC_SUPPORT if SPL
822 select SPL_OF_CONTROL if SPL
825 Support for the MediaTek SoCs family developed by MediaTek Inc.
826 Please refer to doc/README.mediatek for more information.
829 bool "NXP LPC32xx platform"
839 bool "NXP i.MX8 platform"
843 select ENABLE_ARM_SOC_BOOT0_HOOK
846 bool "NXP i.MX8M platform"
853 bool "NXP i.MXRT platform"
861 bool "NXP i.MX23 family"
872 bool "NXP i.MX28 family"
878 bool "NXP i.MX31 family"
884 select ROM_UNIFIED_SECTIONS
886 imply SYS_THUMB_BUILD
890 select ARCH_MISC_INIT
892 select SYS_FSL_HAS_SEC if IMX_HAB
893 select SYS_FSL_SEC_COMPAT_4
894 select SYS_FSL_SEC_LE
895 imply BOARD_EARLY_INIT_F
897 imply SYS_THUMB_BUILD
902 select SYS_FSL_HAS_SEC
903 select SYS_FSL_SEC_COMPAT_4
904 select SYS_FSL_SEC_LE
906 imply SYS_THUMB_BUILD
910 default "arch/arm/mach-omap2/u-boot-spl.lds"
915 select BOARD_EARLY_INIT_F
920 bool "Nexell S5P4418/S5P6818 SoC"
921 select ENABLE_ARM_SOC_BOOT0_HOOK
925 bool "Actions Semi OWL SoCs"
933 select SYS_RELOC_GD_ENV_ADDR
937 bool "QEMU Virtual Platform"
938 select ARCH_SUPPORT_TFABOOT
948 bool "Renesas ARM SoCs"
949 select BOARD_EARLY_INIT_F if !RZA1
954 imply SYS_THUMB_BUILD
955 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
957 config TARGET_S32V234EVB
958 bool "Support s32v234evb"
960 select SYS_FSL_ERRATUM_ESDHC111
962 config ARCH_SNAPDRAGON
963 bool "Qualcomm Snapdragon SoCs"
976 bool "Altera SOCFPGA family"
977 select ARCH_EARLY_INIT_R
978 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
979 select ARM64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
980 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
983 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
985 select SPL_DM_RESET if DM_RESET
987 select SPL_LIBCOMMON_SUPPORT
988 select SPL_LIBGENERIC_SUPPORT
989 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
990 select SPL_OF_CONTROL
991 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
992 select SPL_SERIAL_SUPPORT
994 select SPL_WATCHDOG_SUPPORT
997 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
999 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1000 select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
1010 imply SPL_DM_SPI_FLASH
1011 imply SPL_LIBDISK_SUPPORT
1012 imply SPL_MMC_SUPPORT
1013 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1014 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1015 imply SPL_SPI_FLASH_SUPPORT
1016 imply SPL_SPI_SUPPORT
1020 bool "Support sunxi (Allwinner) SoCs"
1023 select CMD_MMC if MMC
1024 select CMD_USB if DISTRO_DEFAULTS
1030 select DM_MMC if MMC
1031 select DM_SCSI if SCSI
1033 select DM_USB if DISTRO_DEFAULTS
1034 select OF_BOARD_SETUP
1037 select SPECIFY_CONSOLE_INDEX
1038 select SPL_STACK_R if SPL
1039 select SPL_SYS_MALLOC_SIMPLE if SPL
1040 select SPL_SYS_THUMB_BUILD if !ARM64
1043 select SYS_THUMB_BUILD if !ARM64
1044 select USB if DISTRO_DEFAULTS
1045 select USB_KEYBOARD if DISTRO_DEFAULTS
1046 select USB_STORAGE if DISTRO_DEFAULTS
1047 select SPL_USE_TINY_PRINTF
1049 select SYS_RELOC_GD_ENV_ADDR
1052 imply CMD_UBI if MTD_RAW_NAND
1053 imply DISTRO_DEFAULTS
1056 imply OF_LIBFDT_OVERLAY
1057 imply PRE_CONSOLE_BUFFER
1058 imply SPL_GPIO_SUPPORT
1059 imply SPL_LIBCOMMON_SUPPORT
1060 imply SPL_LIBGENERIC_SUPPORT
1061 imply SPL_MMC_SUPPORT if MMC
1062 imply SPL_POWER_SUPPORT
1063 imply SPL_SERIAL_SUPPORT
1067 bool "ST-Ericsson U8500 Series"
1071 select DM_MMC if MMC
1073 select DM_USB if USB
1077 imply ARM_PL180_MMCI
1079 imply NOMADIK_MTU_TIMER
1082 imply SYSRESET_SYSCON
1085 bool "Support Xilinx Versal Platform"
1089 select DM_ETH if NET
1090 select DM_MMC if MMC
1093 imply BOARD_LATE_INIT
1096 bool "Freescale Vybrid"
1098 select SYS_FSL_ERRATUM_ESDHC111
1103 bool "Xilinx Zynq based platform"
1108 select DM_ETH if NET
1109 select DM_MMC if MMC
1113 select DM_USB if USB
1116 select SPL_BOARD_INIT if SPL
1117 select SPL_CLK if SPL
1118 select SPL_DM if SPL
1119 select SPL_DM_SPI if SPL
1120 select SPL_DM_SPI_FLASH if SPL
1121 select SPL_OF_CONTROL if SPL
1122 select SPL_SEPARATE_BSS if SPL
1124 imply ARCH_EARLY_INIT_R
1125 imply BOARD_LATE_INIT
1131 config ARCH_ZYNQMP_R5
1132 bool "Xilinx ZynqMP R5 based platform"
1136 select DM_ETH if NET
1137 select DM_MMC if MMC
1144 bool "Xilinx ZynqMP based platform"
1148 select DM_ETH if NET
1150 select DM_MMC if MMC
1152 select DM_SPI if SPI
1153 select DM_SPI_FLASH if DM_SPI
1154 select DM_USB if USB
1157 select SPL_BOARD_INIT if SPL
1158 select SPL_CLK if SPL
1159 select SPL_DM_SPI if SPI
1160 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1161 select SPL_DM_MAILBOX if SPL
1162 select SPL_FIRMWARE if SPL
1163 select SPL_SEPARATE_BSS if SPL
1166 imply BOARD_LATE_INIT
1174 imply DISTRO_DEFAULTS
1177 config TARGET_VEXPRESS64_AEMV8A
1178 bool "Support vexpress_aemv8a"
1182 config TARGET_VEXPRESS64_BASE_FVP
1183 bool "Support Versatile Express ARMv8a FVP BASE model"
1188 config TARGET_VEXPRESS64_JUNO
1189 bool "Support Versatile Express Juno Development Platform"
1204 config TARGET_LS2080A_EMU
1205 bool "Support ls2080a_emu"
1208 select ARMV8_MULTIENTRY
1209 select FSL_DDR_SYNC_REFRESH
1211 Support for Freescale LS2080A_EMU platform.
1212 The LS2080A Development System (EMULATOR) is a pre-silicon
1213 development platform that supports the QorIQ LS2080A
1214 Layerscape Architecture processor.
1216 config TARGET_LS2080A_SIMU
1217 bool "Support ls2080a_simu"
1220 select ARMV8_MULTIENTRY
1221 select BOARD_LATE_INIT
1223 Support for Freescale LS2080A_SIMU platform.
1224 The LS2080A Development System (QDS) is a pre silicon
1225 development platform that supports the QorIQ LS2080A
1226 Layerscape Architecture processor.
1228 config TARGET_LS1088AQDS
1229 bool "Support ls1088aqds"
1232 select ARMV8_MULTIENTRY
1233 select ARCH_SUPPORT_TFABOOT
1234 select BOARD_LATE_INIT
1236 select FSL_DDR_INTERACTIVE if !SD_BOOT
1238 Support for NXP LS1088AQDS platform.
1239 The LS1088A Development System (QDS) is a high-performance
1240 development platform that supports the QorIQ LS1088A
1241 Layerscape Architecture processor.
1243 config TARGET_LS2080AQDS
1244 bool "Support ls2080aqds"
1247 select ARMV8_MULTIENTRY
1248 select ARCH_SUPPORT_TFABOOT
1249 select BOARD_LATE_INIT
1254 select FSL_DDR_INTERACTIVE if !SPL
1256 Support for Freescale LS2080AQDS platform.
1257 The LS2080A Development System (QDS) is a high-performance
1258 development platform that supports the QorIQ LS2080A
1259 Layerscape Architecture processor.
1261 config TARGET_LS2080ARDB
1262 bool "Support ls2080ardb"
1265 select ARMV8_MULTIENTRY
1266 select ARCH_SUPPORT_TFABOOT
1267 select BOARD_LATE_INIT
1270 select FSL_DDR_INTERACTIVE if !SPL
1274 Support for Freescale LS2080ARDB platform.
1275 The LS2080A Reference design board (RDB) is a high-performance
1276 development platform that supports the QorIQ LS2080A
1277 Layerscape Architecture processor.
1279 config TARGET_LS2081ARDB
1280 bool "Support ls2081ardb"
1283 select ARMV8_MULTIENTRY
1284 select BOARD_LATE_INIT
1287 Support for Freescale LS2081ARDB platform.
1288 The LS2081A Reference design board (RDB) is a high-performance
1289 development platform that supports the QorIQ LS2081A/LS2041A
1290 Layerscape Architecture processor.
1292 config TARGET_LX2160ARDB
1293 bool "Support lx2160ardb"
1296 select ARMV8_MULTIENTRY
1297 select ARCH_SUPPORT_TFABOOT
1298 select BOARD_LATE_INIT
1300 Support for NXP LX2160ARDB platform.
1301 The lx2160ardb (LX2160A Reference design board (RDB)
1302 is a high-performance development platform that supports the
1303 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1305 config TARGET_LX2160AQDS
1306 bool "Support lx2160aqds"
1309 select ARMV8_MULTIENTRY
1310 select ARCH_SUPPORT_TFABOOT
1311 select BOARD_LATE_INIT
1313 Support for NXP LX2160AQDS platform.
1314 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1315 is a high-performance development platform that supports the
1316 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1319 bool "Support HiKey 96boards Consumer Edition Platform"
1326 select SPECIFY_CONSOLE_INDEX
1329 Support for HiKey 96boards platform. It features a HI6220
1330 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1332 config TARGET_HIKEY960
1333 bool "Support HiKey960 96boards Consumer Edition Platform"
1341 Support for HiKey960 96boards platform. It features a HI3660
1342 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1344 config TARGET_POPLAR
1345 bool "Support Poplar 96boards Enterprise Edition Platform"
1354 Support for Poplar 96boards EE platform. It features a HI3798cv200
1355 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1356 making it capable of running any commercial set-top solution based on
1359 config TARGET_LS1012AQDS
1360 bool "Support ls1012aqds"
1363 select ARCH_SUPPORT_TFABOOT
1364 select BOARD_LATE_INIT
1366 Support for Freescale LS1012AQDS platform.
1367 The LS1012A Development System (QDS) is a high-performance
1368 development platform that supports the QorIQ LS1012A
1369 Layerscape Architecture processor.
1371 config TARGET_LS1012ARDB
1372 bool "Support ls1012ardb"
1375 select ARCH_SUPPORT_TFABOOT
1376 select BOARD_LATE_INIT
1380 Support for Freescale LS1012ARDB platform.
1381 The LS1012A Reference design board (RDB) is a high-performance
1382 development platform that supports the QorIQ LS1012A
1383 Layerscape Architecture processor.
1385 config TARGET_LS1012A2G5RDB
1386 bool "Support ls1012a2g5rdb"
1389 select ARCH_SUPPORT_TFABOOT
1390 select BOARD_LATE_INIT
1393 Support for Freescale LS1012A2G5RDB platform.
1394 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1395 development platform that supports the QorIQ LS1012A
1396 Layerscape Architecture processor.
1398 config TARGET_LS1012AFRWY
1399 bool "Support ls1012afrwy"
1402 select ARCH_SUPPORT_TFABOOT
1403 select BOARD_LATE_INIT
1407 Support for Freescale LS1012AFRWY platform.
1408 The LS1012A FRWY board (FRWY) is a high-performance
1409 development platform that supports the QorIQ LS1012A
1410 Layerscape Architecture processor.
1412 config TARGET_LS1012AFRDM
1413 bool "Support ls1012afrdm"
1416 select ARCH_SUPPORT_TFABOOT
1418 Support for Freescale LS1012AFRDM platform.
1419 The LS1012A Freedom board (FRDM) is a high-performance
1420 development platform that supports the QorIQ LS1012A
1421 Layerscape Architecture processor.
1423 config TARGET_LS1028AQDS
1424 bool "Support ls1028aqds"
1427 select ARMV8_MULTIENTRY
1428 select ARCH_SUPPORT_TFABOOT
1429 select BOARD_LATE_INIT
1431 Support for Freescale LS1028AQDS platform
1432 The LS1028A Development System (QDS) is a high-performance
1433 development platform that supports the QorIQ LS1028A
1434 Layerscape Architecture processor.
1436 config TARGET_LS1028ARDB
1437 bool "Support ls1028ardb"
1440 select ARMV8_MULTIENTRY
1441 select ARCH_SUPPORT_TFABOOT
1442 select BOARD_LATE_INIT
1444 Support for Freescale LS1028ARDB platform
1445 The LS1028A Development System (RDB) is a high-performance
1446 development platform that supports the QorIQ LS1028A
1447 Layerscape Architecture processor.
1449 config TARGET_LS1088ARDB
1450 bool "Support ls1088ardb"
1453 select ARMV8_MULTIENTRY
1454 select ARCH_SUPPORT_TFABOOT
1455 select BOARD_LATE_INIT
1457 select FSL_DDR_INTERACTIVE if !SD_BOOT
1459 Support for NXP LS1088ARDB platform.
1460 The LS1088A Reference design board (RDB) is a high-performance
1461 development platform that supports the QorIQ LS1088A
1462 Layerscape Architecture processor.
1464 config TARGET_LS1021AQDS
1465 bool "Support ls1021aqds"
1467 select ARCH_SUPPORT_PSCI
1468 select BOARD_EARLY_INIT_F
1469 select BOARD_LATE_INIT
1471 select CPU_V7_HAS_NONSEC
1472 select CPU_V7_HAS_VIRT
1473 select LS1_DEEP_SLEEP
1476 select FSL_DDR_INTERACTIVE
1477 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1478 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1481 config TARGET_LS1021ATWR
1482 bool "Support ls1021atwr"
1484 select ARCH_SUPPORT_PSCI
1485 select BOARD_EARLY_INIT_F
1486 select BOARD_LATE_INIT
1488 select CPU_V7_HAS_NONSEC
1489 select CPU_V7_HAS_VIRT
1490 select LS1_DEEP_SLEEP
1492 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1495 config TARGET_LS1021ATSN
1496 bool "Support ls1021atsn"
1498 select ARCH_SUPPORT_PSCI
1499 select BOARD_EARLY_INIT_F
1500 select BOARD_LATE_INIT
1502 select CPU_V7_HAS_NONSEC
1503 select CPU_V7_HAS_VIRT
1504 select LS1_DEEP_SLEEP
1508 config TARGET_LS1021AIOT
1509 bool "Support ls1021aiot"
1511 select ARCH_SUPPORT_PSCI
1512 select BOARD_LATE_INIT
1514 select CPU_V7_HAS_NONSEC
1515 select CPU_V7_HAS_VIRT
1517 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1520 Support for Freescale LS1021AIOT platform.
1521 The LS1021A Freescale board (IOT) is a high-performance
1522 development platform that supports the QorIQ LS1021A
1523 Layerscape Architecture processor.
1525 config TARGET_LS1043AQDS
1526 bool "Support ls1043aqds"
1529 select ARMV8_MULTIENTRY
1530 select ARCH_SUPPORT_TFABOOT
1531 select BOARD_EARLY_INIT_F
1532 select BOARD_LATE_INIT
1534 select FSL_DDR_INTERACTIVE if !SPL
1535 select FSL_DSPI if !SPL_NO_DSPI
1536 select DM_SPI_FLASH if FSL_DSPI
1540 Support for Freescale LS1043AQDS platform.
1542 config TARGET_LS1043ARDB
1543 bool "Support ls1043ardb"
1546 select ARMV8_MULTIENTRY
1547 select ARCH_SUPPORT_TFABOOT
1548 select BOARD_EARLY_INIT_F
1549 select BOARD_LATE_INIT
1551 select FSL_DSPI if !SPL_NO_DSPI
1552 select DM_SPI_FLASH if FSL_DSPI
1554 Support for Freescale LS1043ARDB platform.
1556 config TARGET_LS1046AQDS
1557 bool "Support ls1046aqds"
1560 select ARMV8_MULTIENTRY
1561 select ARCH_SUPPORT_TFABOOT
1562 select BOARD_EARLY_INIT_F
1563 select BOARD_LATE_INIT
1564 select DM_SPI_FLASH if DM_SPI
1566 select FSL_DDR_BIST if !SPL
1567 select FSL_DDR_INTERACTIVE if !SPL
1568 select FSL_DDR_INTERACTIVE if !SPL
1571 Support for Freescale LS1046AQDS platform.
1572 The LS1046A Development System (QDS) is a high-performance
1573 development platform that supports the QorIQ LS1046A
1574 Layerscape Architecture processor.
1576 config TARGET_LS1046ARDB
1577 bool "Support ls1046ardb"
1580 select ARMV8_MULTIENTRY
1581 select ARCH_SUPPORT_TFABOOT
1582 select BOARD_EARLY_INIT_F
1583 select BOARD_LATE_INIT
1584 select DM_SPI_FLASH if DM_SPI
1585 select POWER_MC34VR500
1588 select FSL_DDR_INTERACTIVE if !SPL
1591 Support for Freescale LS1046ARDB platform.
1592 The LS1046A Reference Design Board (RDB) is a high-performance
1593 development platform that supports the QorIQ LS1046A
1594 Layerscape Architecture processor.
1596 config TARGET_LS1046AFRWY
1597 bool "Support ls1046afrwy"
1600 select ARMV8_MULTIENTRY
1601 select ARCH_SUPPORT_TFABOOT
1602 select BOARD_EARLY_INIT_F
1603 select BOARD_LATE_INIT
1604 select DM_SPI_FLASH if DM_SPI
1607 Support for Freescale LS1046AFRWY platform.
1608 The LS1046A Freeway Board (FRWY) is a high-performance
1609 development platform that supports the QorIQ LS1046A
1610 Layerscape Architecture processor.
1612 config TARGET_COLIBRI_PXA270
1613 bool "Support colibri_pxa270"
1616 config ARCH_UNIPHIER
1617 bool "Socionext UniPhier SoCs"
1618 select BOARD_LATE_INIT
1628 select OF_BOARD_SETUP
1632 select SPL_BOARD_INIT if SPL
1633 select SPL_DM if SPL
1634 select SPL_LIBCOMMON_SUPPORT if SPL
1635 select SPL_LIBGENERIC_SUPPORT if SPL
1636 select SPL_OF_CONTROL if SPL
1637 select SPL_PINCTRL if SPL
1640 imply DISTRO_DEFAULTS
1643 Support for UniPhier SoC family developed by Socionext Inc.
1644 (formerly, System LSI Business Division of Panasonic Corporation)
1647 bool "Support STMicroelectronics STM32 MCU with cortex M"
1654 bool "Support STMicrolectronics SoCs"
1663 Support for STMicroelectronics STiH407/10 SoC family.
1664 This SoC is used on Linaro 96Board STiH410-B2260
1667 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1668 select ARCH_MISC_INIT
1669 select ARCH_SUPPORT_TFABOOT
1670 select BOARD_LATE_INIT
1679 select OF_SYSTEM_SETUP
1685 select SYS_THUMB_BUILD
1689 imply OF_LIBFDT_OVERLAY
1690 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1693 Support for STM32MP SoC family developed by STMicroelectronics,
1694 MPUs based on ARM cortex A core
1695 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1696 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1698 SPL is the unsecure FSBL for the basic boot chain.
1700 config ARCH_ROCKCHIP
1701 bool "Support Rockchip SoCs"
1703 select BINMAN if !ARM64
1713 select DM_USB if USB
1714 select ENABLE_ARM_SOC_BOOT0_HOOK
1717 select SPL_DM if SPL
1718 select SPL_DM_SPI if SPL
1719 select SPL_DM_SPI_FLASH if SPL
1721 select SYS_THUMB_BUILD if !ARM64
1724 imply DEBUG_UART_BOARD_INIT
1725 imply DISTRO_DEFAULTS
1727 imply SARADC_ROCKCHIP
1729 imply SPL_SYS_MALLOC_SIMPLE
1732 imply USB_FUNCTION_FASTBOOT
1734 config TARGET_THUNDERX_88XX
1735 bool "Support ThunderX 88xx"
1739 select SYS_CACHE_SHIFT_7
1742 bool "Support Aspeed SoCs"
1747 config TARGET_DURIAN
1748 bool "Support Phytium Durian Platform"
1751 Support for durian platform.
1752 It has 2GB Sdram, uart and pcie.
1754 config TARGET_PRESIDIO_ASIC
1755 bool "Support Cortina Presidio ASIC Platform"
1760 config ARCH_SUPPORT_TFABOOT
1764 bool "Support for booting from TF-A"
1765 depends on ARCH_SUPPORT_TFABOOT
1768 Enabling this will make a U-Boot binary that is capable of being
1769 booted via TF-A (Trusted Firmware for Cortex-A).
1771 config TI_SECURE_DEVICE
1772 bool "HS Device Type Support"
1773 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1775 If a high secure (HS) device type is being used, this config
1776 must be set. This option impacts various aspects of the
1777 build system (to create signed boot images that can be
1778 authenticated) and the code. See the doc/README.ti-secure
1779 file for further details.
1781 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1782 config ISW_ENTRY_ADDR
1783 hex "Address in memory or XIP address of bootloader entry point"
1784 default 0x402F4000 if AM43XX
1785 default 0x402F0400 if AM33XX
1786 default 0x40301350 if OMAP54XX
1788 After any reset, the boot ROM searches the boot media for a valid
1789 boot image. For non-XIP devices, the ROM then copies the image into
1790 internal memory. For all boot modes, after the ROM processes the
1791 boot image it eventually computes the entry point address depending
1792 on the device type (secure/non-secure), boot media (xip/non-xip) and
1796 source "arch/arm/mach-aspeed/Kconfig"
1798 source "arch/arm/mach-at91/Kconfig"
1800 source "arch/arm/mach-bcm283x/Kconfig"
1802 source "arch/arm/mach-bcmstb/Kconfig"
1804 source "arch/arm/mach-davinci/Kconfig"
1806 source "arch/arm/mach-exynos/Kconfig"
1808 source "arch/arm/mach-highbank/Kconfig"
1810 source "arch/arm/mach-integrator/Kconfig"
1812 source "arch/arm/mach-ipq40xx/Kconfig"
1814 source "arch/arm/mach-k3/Kconfig"
1816 source "arch/arm/mach-keystone/Kconfig"
1818 source "arch/arm/mach-kirkwood/Kconfig"
1820 source "arch/arm/mach-lpc32xx/Kconfig"
1822 source "arch/arm/mach-mvebu/Kconfig"
1824 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1826 source "arch/arm/mach-imx/mx2/Kconfig"
1828 source "arch/arm/mach-imx/mx3/Kconfig"
1830 source "arch/arm/mach-imx/mx5/Kconfig"
1832 source "arch/arm/mach-imx/mx6/Kconfig"
1834 source "arch/arm/mach-imx/mx7/Kconfig"
1836 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1838 source "arch/arm/mach-imx/imx8/Kconfig"
1840 source "arch/arm/mach-imx/imx8m/Kconfig"
1842 source "arch/arm/mach-imx/imxrt/Kconfig"
1844 source "arch/arm/mach-imx/mxs/Kconfig"
1846 source "arch/arm/mach-omap2/Kconfig"
1848 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1850 source "arch/arm/mach-orion5x/Kconfig"
1852 source "arch/arm/mach-owl/Kconfig"
1854 source "arch/arm/mach-rmobile/Kconfig"
1856 source "arch/arm/mach-meson/Kconfig"
1858 source "arch/arm/mach-mediatek/Kconfig"
1860 source "arch/arm/mach-qemu/Kconfig"
1862 source "arch/arm/mach-rockchip/Kconfig"
1864 source "arch/arm/mach-s5pc1xx/Kconfig"
1866 source "arch/arm/mach-snapdragon/Kconfig"
1868 source "arch/arm/mach-socfpga/Kconfig"
1870 source "arch/arm/mach-sti/Kconfig"
1872 source "arch/arm/mach-stm32/Kconfig"
1874 source "arch/arm/mach-stm32mp/Kconfig"
1876 source "arch/arm/mach-sunxi/Kconfig"
1878 source "arch/arm/mach-tegra/Kconfig"
1880 source "arch/arm/mach-u8500/Kconfig"
1882 source "arch/arm/mach-uniphier/Kconfig"
1884 source "arch/arm/cpu/armv7/vf610/Kconfig"
1886 source "arch/arm/mach-zynq/Kconfig"
1888 source "arch/arm/mach-zynqmp/Kconfig"
1890 source "arch/arm/mach-versal/Kconfig"
1892 source "arch/arm/mach-zynqmp-r5/Kconfig"
1894 source "arch/arm/cpu/armv7/Kconfig"
1896 source "arch/arm/cpu/armv8/Kconfig"
1898 source "arch/arm/mach-imx/Kconfig"
1900 source "arch/arm/mach-nexell/Kconfig"
1902 source "board/bosch/shc/Kconfig"
1903 source "board/bosch/guardian/Kconfig"
1904 source "board/CarMediaLab/flea3/Kconfig"
1905 source "board/Marvell/aspenite/Kconfig"
1906 source "board/Marvell/gplugd/Kconfig"
1907 source "board/armadeus/apf27/Kconfig"
1908 source "board/armltd/vexpress/Kconfig"
1909 source "board/armltd/vexpress64/Kconfig"
1910 source "board/cortina/presidio-asic/Kconfig"
1911 source "board/broadcom/bcm23550_w1d/Kconfig"
1912 source "board/broadcom/bcm28155_ap/Kconfig"
1913 source "board/broadcom/bcm963158/Kconfig"
1914 source "board/broadcom/bcm968360bg/Kconfig"
1915 source "board/broadcom/bcm968580xref/Kconfig"
1916 source "board/broadcom/bcmcygnus/Kconfig"
1917 source "board/broadcom/bcmnsp/Kconfig"
1918 source "board/broadcom/bcmns2/Kconfig"
1919 source "board/cavium/thunderx/Kconfig"
1920 source "board/cirrus/edb93xx/Kconfig"
1921 source "board/eets/pdu001/Kconfig"
1922 source "board/emulation/qemu-arm/Kconfig"
1923 source "board/freescale/ls2080a/Kconfig"
1924 source "board/freescale/ls2080aqds/Kconfig"
1925 source "board/freescale/ls2080ardb/Kconfig"
1926 source "board/freescale/ls1088a/Kconfig"
1927 source "board/freescale/ls1028a/Kconfig"
1928 source "board/freescale/ls1021aqds/Kconfig"
1929 source "board/freescale/ls1043aqds/Kconfig"
1930 source "board/freescale/ls1021atwr/Kconfig"
1931 source "board/freescale/ls1021atsn/Kconfig"
1932 source "board/freescale/ls1021aiot/Kconfig"
1933 source "board/freescale/ls1046aqds/Kconfig"
1934 source "board/freescale/ls1043ardb/Kconfig"
1935 source "board/freescale/ls1046ardb/Kconfig"
1936 source "board/freescale/ls1046afrwy/Kconfig"
1937 source "board/freescale/ls1012aqds/Kconfig"
1938 source "board/freescale/ls1012ardb/Kconfig"
1939 source "board/freescale/ls1012afrdm/Kconfig"
1940 source "board/freescale/lx2160a/Kconfig"
1941 source "board/freescale/mx35pdk/Kconfig"
1942 source "board/freescale/s32v234evb/Kconfig"
1943 source "board/grinn/chiliboard/Kconfig"
1944 source "board/hisilicon/hikey/Kconfig"
1945 source "board/hisilicon/hikey960/Kconfig"
1946 source "board/hisilicon/poplar/Kconfig"
1947 source "board/isee/igep003x/Kconfig"
1948 source "board/spear/spear300/Kconfig"
1949 source "board/spear/spear310/Kconfig"
1950 source "board/spear/spear320/Kconfig"
1951 source "board/spear/spear600/Kconfig"
1952 source "board/spear/x600/Kconfig"
1953 source "board/st/stv0991/Kconfig"
1954 source "board/tcl/sl50/Kconfig"
1955 source "board/toradex/colibri_pxa270/Kconfig"
1956 source "board/variscite/dart_6ul/Kconfig"
1957 source "board/vscom/baltos/Kconfig"
1958 source "board/xilinx/Kconfig"
1959 source "board/xilinx/zynq/Kconfig"
1960 source "board/xilinx/zynqmp/Kconfig"
1961 source "board/phytium/durian/Kconfig"
1963 source "arch/arm/Kconfig.debug"
1968 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
1969 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
1970 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64