1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed from
19 almost any 4K aligned address. This logic relies on the relocation
20 information that is embedded in the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
25 default n if ARCH_QEMU
26 default y if POSITION_INDEPENDENT
28 U-Boot typically uses a hard-coded value for the stack pointer
29 before relocation. Enable this option to instead calculate the
30 initial SP at run-time. This is useful to avoid hard-coding addresses
31 into U-Boot, so that it can be loaded and executed at arbitrary
32 addresses and thus avoid using arbitrary addresses at runtime.
34 If this option is enabled, the early stack pointer is set to
35 &_bss_start with a offset value added. The offset is specified by
36 SYS_INIT_SP_BSS_OFFSET.
38 config SYS_INIT_SP_BSS_OFFSET
39 int "Early stack offset from the .bss base address"
40 depends on INIT_SP_RELATIVE
43 This option's value is the offset added to &_bss_start in order to
44 calculate the stack pointer. This offset should be large enough so
45 that the early malloc region, global data (gd), and early stack usage
46 do not overlap any appended DTB.
48 config LINUX_KERNEL_IMAGE_HEADER
51 Place a Linux kernel image header at the start of the U-Boot binary.
52 The format of the header is described in the Linux kernel source at
53 Documentation/arm64/booting.txt. This feature is useful since the
54 image header reports the amount of memory (BSS and similar) that
55 U-Boot needs to use, but which isn't part of the binary.
57 if LINUX_KERNEL_IMAGE_HEADER
58 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
61 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
62 TEXT_OFFSET value written to the Linux kernel image header.
71 ARM GICV3 Interrupt translation service (ITS).
72 Basic support for programming locality specific peripheral
73 interrupts (LPI) configuration tables and enable LPI tables.
74 LPI configuration table can be used by u-boot or Linux.
75 ARM GICV3 has limitation, once the LPI table is enabled, LPI
76 configuration table can not be re-programmed, unless GICV3 reset.
82 config DMA_ADDR_T_64BIT
92 # Used for compatibility with asm files copied from the kernel
93 config ARM_ASM_UNIFIED
97 # Used for compatibility with asm files copied from the kernel
101 config SYS_ICACHE_OFF
102 bool "Do not enable icache"
105 Do not enable instruction cache in U-Boot.
107 config SPL_SYS_ICACHE_OFF
108 bool "Do not enable icache in SPL"
110 default SYS_ICACHE_OFF
112 Do not enable instruction cache in SPL.
114 config SYS_DCACHE_OFF
115 bool "Do not enable dcache"
118 Do not enable data cache in U-Boot.
120 config SPL_SYS_DCACHE_OFF
121 bool "Do not enable dcache in SPL"
123 default SYS_DCACHE_OFF
125 Do not enable data cache in SPL.
127 config SYS_ARM_CACHE_CP15
128 bool "CP15 based cache enabling support"
130 Select this if your processor suports enabling caches by using
134 bool "MMU-based Paged Memory Management Support"
135 select SYS_ARM_CACHE_CP15
137 Select if you want MMU-based virtualised addressing space
138 support via paged memory management.
141 bool 'Use the ARM v7 PMSA Compliant MPU'
143 Some ARM systems without an MMU have instead a Memory Protection
144 Unit (MPU) that defines the type and permissions for regions of
146 If your CPU has an MPU then you should choose 'y' here unless you
147 know that you do not want to use the MPU.
149 # If set, the workarounds for these ARM errata are applied early during U-Boot
150 # startup. Note that in general these options force the workarounds to be
151 # applied; no CPU-type/version detection exists, unlike the similar options in
152 # the Linux kernel. Do not set these options unless they apply! Also note that
153 # the following can be machine-specific errata. These do have ability to
154 # provide rudimentary version and machine-specific checks, but expect no
156 # CONFIG_ARM_ERRATA_430973
157 # CONFIG_ARM_ERRATA_454179
158 # CONFIG_ARM_ERRATA_621766
159 # CONFIG_ARM_ERRATA_798870
160 # CONFIG_ARM_ERRATA_801819
161 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
162 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
164 config ARM_ERRATA_430973
167 config ARM_ERRATA_454179
170 config ARM_ERRATA_621766
173 config ARM_ERRATA_716044
176 config ARM_ERRATA_725233
179 config ARM_ERRATA_742230
182 config ARM_ERRATA_743622
185 config ARM_ERRATA_751472
188 config ARM_ERRATA_761320
191 config ARM_ERRATA_773022
194 config ARM_ERRATA_774769
197 config ARM_ERRATA_794072
200 config ARM_ERRATA_798870
203 config ARM_ERRATA_801819
206 config ARM_ERRATA_826974
209 config ARM_ERRATA_828024
212 config ARM_ERRATA_829520
215 config ARM_ERRATA_833069
218 config ARM_ERRATA_833471
221 config ARM_ERRATA_845369
224 config ARM_ERRATA_852421
227 config ARM_ERRATA_852423
230 config ARM_ERRATA_855873
233 config ARM_CORTEX_A8_CVE_2017_5715
236 config ARM_CORTEX_A15_CVE_2017_5715
241 select SYS_CACHE_SHIFT_5
246 select SYS_CACHE_SHIFT_5
251 select SYS_CACHE_SHIFT_5
256 select SYS_CACHE_SHIFT_5
261 select SYS_CACHE_SHIFT_5
267 select SYS_CACHE_SHIFT_5
274 select SYS_CACHE_SHIFT_6
281 select SYS_CACHE_SHIFT_5
282 select SYS_THUMB_BUILD
288 select SYS_ARM_CACHE_CP15
290 select SYS_CACHE_SHIFT_6
294 select SYS_CACHE_SHIFT_5
299 select SYS_CACHE_SHIFT_5
303 default "arm720t" if CPU_ARM720T
304 default "arm920t" if CPU_ARM920T
305 default "arm926ejs" if CPU_ARM926EJS
306 default "arm946es" if CPU_ARM946ES
307 default "arm1136" if CPU_ARM1136
308 default "arm1176" if CPU_ARM1176
309 default "armv7" if CPU_V7A
310 default "armv7" if CPU_V7R
311 default "armv7m" if CPU_V7M
312 default "pxa" if CPU_PXA
313 default "sa1100" if CPU_SA1100
314 default "armv8" if ARM64
318 default 4 if CPU_ARM720T
319 default 4 if CPU_ARM920T
320 default 5 if CPU_ARM926EJS
321 default 5 if CPU_ARM946ES
322 default 6 if CPU_ARM1136
323 default 6 if CPU_ARM1176
328 default 4 if CPU_SA1100
331 config SYS_CACHE_SHIFT_5
334 config SYS_CACHE_SHIFT_6
337 config SYS_CACHE_SHIFT_7
340 config SYS_CACHELINE_SIZE
342 default 128 if SYS_CACHE_SHIFT_7
343 default 64 if SYS_CACHE_SHIFT_6
344 default 32 if SYS_CACHE_SHIFT_5
347 prompt "Select the ARM data write cache policy"
348 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
349 TARGET_BCMNSP || CPU_PXA || RZA1
350 default SYS_ARM_CACHE_WRITEBACK
352 config SYS_ARM_CACHE_WRITEBACK
353 bool "Write-back (WB)"
355 A write updates the cache only and marks the cache line as dirty.
356 External memory is updated only when the line is evicted or explicitly
359 config SYS_ARM_CACHE_WRITETHROUGH
360 bool "Write-through (WT)"
362 A write updates both the cache and the external memory system.
363 This does not mark the cache line as dirty.
365 config SYS_ARM_CACHE_WRITEALLOC
366 bool "Write allocation (WA)"
368 A cache line is allocated on a write miss. This means that executing a
369 store instruction on the processor might cause a burst read to occur.
370 There is a linefill to obtain the data for the cache line, before the
375 bool "Enable ARCH_CPU_INIT"
377 Some architectures require a call to arch_cpu_init().
378 Say Y here to enable it
380 config SYS_ARCH_TIMER
381 bool "ARM Generic Timer support"
382 depends on CPU_V7A || ARM64
385 The ARM Generic Timer (aka arch-timer) provides an architected
386 interface to a timer source on an SoC.
387 It is mandatory for ARMv8 implementation and widely available
391 bool "Support for ARM SMC Calling Convention (SMCCC)"
392 depends on CPU_V7A || ARM64
395 Say Y here if you want to enable ARM SMC Calling Convention.
396 This should be enabled if U-Boot needs to communicate with system
397 firmware (for example, PSCI) according to SMCCC.
400 bool "support boot from semihosting"
402 In emulated environments, semihosting is a way for
403 the hosted environment to call out to the emulator to
404 retrieve files from the host machine.
406 config SYS_THUMB_BUILD
407 bool "Build U-Boot using the Thumb instruction set"
410 Use this flag to build U-Boot using the Thumb instruction set for
411 ARM architectures. Thumb instruction set provides better code
412 density. For ARM architectures that support Thumb2 this flag will
413 result in Thumb2 code generated by GCC.
415 config SPL_SYS_THUMB_BUILD
416 bool "Build SPL using the Thumb instruction set"
417 default y if SYS_THUMB_BUILD
418 depends on !ARM64 && SPL
420 Use this flag to build SPL using the Thumb instruction set for
421 ARM architectures. Thumb instruction set provides better code
422 density. For ARM architectures that support Thumb2 this flag will
423 result in Thumb2 code generated by GCC.
425 config TPL_SYS_THUMB_BUILD
426 bool "Build TPL using the Thumb instruction set"
427 default y if SYS_THUMB_BUILD
428 depends on TPL && !ARM64
430 Use this flag to build TPL using the Thumb instruction set for
431 ARM architectures. Thumb instruction set provides better code
432 density. For ARM architectures that support Thumb2 this flag will
433 result in Thumb2 code generated by GCC.
436 config SYS_L2CACHE_OFF
439 If SoC does not support L2CACHE or one does not want to enable
440 L2CACHE, choose this option.
442 config ENABLE_ARM_SOC_BOOT0_HOOK
443 bool "prepare BOOT0 header"
445 If the SoC's BOOT0 requires a header area filled with (magic)
446 values, then choose this option, and create a file included as
447 <asm/arch/boot0.h> which contains the required assembler code.
449 config ARM_CORTEX_CPU_IS_UP
453 config USE_ARCH_MEMCPY
454 bool "Use an assembly optimized implementation of memcpy"
458 Enable the generation of an optimized version of memcpy.
459 Such an implementation may be faster under some conditions
460 but may increase the binary size.
462 config SPL_USE_ARCH_MEMCPY
463 bool "Use an assembly optimized implementation of memcpy for SPL"
464 default y if USE_ARCH_MEMCPY
465 depends on !ARM64 && SPL
467 Enable the generation of an optimized version of memcpy.
468 Such an implementation may be faster under some conditions
469 but may increase the binary size.
471 config TPL_USE_ARCH_MEMCPY
472 bool "Use an assembly optimized implementation of memcpy for TPL"
473 default y if USE_ARCH_MEMCPY
474 depends on !ARM64 && TPL
476 Enable the generation of an optimized version of memcpy.
477 Such an implementation may be faster under some conditions
478 but may increase the binary size.
480 config USE_ARCH_MEMSET
481 bool "Use an assembly optimized implementation of memset"
485 Enable the generation of an optimized version of memset.
486 Such an implementation may be faster under some conditions
487 but may increase the binary size.
489 config SPL_USE_ARCH_MEMSET
490 bool "Use an assembly optimized implementation of memset for SPL"
491 default y if USE_ARCH_MEMSET
492 depends on !ARM64 && SPL
494 Enable the generation of an optimized version of memset.
495 Such an implementation may be faster under some conditions
496 but may increase the binary size.
498 config TPL_USE_ARCH_MEMSET
499 bool "Use an assembly optimized implementation of memset for TPL"
500 default y if USE_ARCH_MEMSET
501 depends on !ARM64 && TPL
503 Enable the generation of an optimized version of memset.
504 Such an implementation may be faster under some conditions
505 but may increase the binary size.
507 config ARM64_SUPPORT_AARCH32
508 bool "ARM64 system support AArch32 execution state"
510 default y if !TARGET_THUNDERX_88XX
512 This ARM64 system supports AArch32 execution state.
515 prompt "Target select"
520 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
521 select SPL_SEPARATE_BSS if SPL
523 config TARGET_EDB93XX
524 bool "Support edb93xx"
528 config TARGET_ASPENITE
529 bool "Support aspenite"
533 bool "Support gplugd"
539 select SPL_DM_SPI if SPL
542 Support for TI's DaVinci platform.
545 bool "Marvell Kirkwood"
546 select ARCH_MISC_INIT
547 select BOARD_EARLY_INIT_F
551 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
557 select SPL_DM_SPI if SPL
558 select SPL_DM_SPI_FLASH if SPL
573 config TARGET_SPEAR300
574 bool "Support spear300"
575 select BOARD_EARLY_INIT_F
580 config TARGET_SPEAR310
581 bool "Support spear310"
582 select BOARD_EARLY_INIT_F
587 config TARGET_SPEAR320
588 bool "Support spear320"
589 select BOARD_EARLY_INIT_F
594 config TARGET_SPEAR600
595 bool "Support spear600"
596 select BOARD_EARLY_INIT_F
601 config TARGET_STV0991
602 bool "Support stv0991"
615 select BOARD_LATE_INIT
624 config TARGET_MX35PDK
625 bool "Support mx35pdk"
626 select BOARD_LATE_INIT
630 bool "Broadcom BCM283X family"
636 select SERIAL_SEARCH_ALL
641 bool "Broadcom BCM63158 family"
647 bool "Broadcom BCM68360 family"
653 bool "Broadcom BCM6858 family"
658 config TARGET_VEXPRESS_CA15_TC2
659 bool "Support vexpress_ca15_tc2"
661 select CPU_V7_HAS_NONSEC
662 select CPU_V7_HAS_VIRT
666 bool "Broadcom BCM7XXX family"
670 select OF_PRIOR_STAGE
673 This enables support for Broadcom ARM-based set-top box
674 chipsets, including the 7445 family of chips.
676 config TARGET_VEXPRESS_CA5X2
677 bool "Support vexpress_ca5x2"
681 config TARGET_VEXPRESS_CA9X4
682 bool "Support vexpress_ca9x4"
686 config TARGET_BCM23550_W1D
687 bool "Support bcm23550_w1d"
692 config TARGET_BCM28155_AP
693 bool "Support bcm28155_ap"
698 config TARGET_BCMCYGNUS
699 bool "Support bcmcygnus"
702 imply BCM_SF2_ETH_GMAC
710 bool "Support bcmnsp"
714 bool "Support Broadcom Northstar2"
717 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
718 ARMv8 Cortex-A57 processors targeting a broad range of networking
722 bool "Support Broadcom NS3"
724 select BOARD_LATE_INIT
726 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
727 ARMv8 Cortex-A72 processors targeting a broad range of networking
731 bool "Samsung EXYNOS"
740 imply SYS_THUMB_BUILD
745 bool "Samsung S5PC1XX"
754 bool "Calxeda Highbank"
758 config ARCH_INTEGRATOR
759 bool "ARM Ltd. Integrator family"
766 bool "Qualcomm IPQ40xx SoCs"
784 select SYS_ARCH_TIMER
785 select SYS_THUMB_BUILD
791 bool "Texas Instruments' K3 Architecture"
796 config ARCH_OMAP2PLUS
799 select SPL_BOARD_INIT if SPL
800 select SPL_STACK_R if SPL
802 imply TI_SYSC if DM && OF_CONTROL
807 imply DISTRO_DEFAULTS
810 Support for the Meson SoC family developed by Amlogic Inc.,
811 targeted at media players and tablet computers. We currently
812 support the S905 (GXBaby) 64-bit SoC.
819 select SPL_LIBCOMMON_SUPPORT if SPL
820 select SPL_LIBGENERIC_SUPPORT if SPL
821 select SPL_OF_CONTROL if SPL
824 Support for the MediaTek SoCs family developed by MediaTek Inc.
825 Please refer to doc/README.mediatek for more information.
828 bool "NXP LPC32xx platform"
838 bool "NXP i.MX8 platform"
842 select ENABLE_ARM_SOC_BOOT0_HOOK
845 bool "NXP i.MX8M platform"
852 bool "NXP i.MXRT platform"
860 bool "NXP i.MX23 family"
871 bool "NXP i.MX28 family"
877 bool "NXP i.MX31 family"
883 select ROM_UNIFIED_SECTIONS
885 imply SYS_THUMB_BUILD
889 select ARCH_MISC_INIT
891 select SYS_FSL_HAS_SEC if IMX_HAB
892 select SYS_FSL_SEC_COMPAT_4
893 select SYS_FSL_SEC_LE
894 imply BOARD_EARLY_INIT_F
896 imply SYS_THUMB_BUILD
901 select SYS_FSL_HAS_SEC
902 select SYS_FSL_SEC_COMPAT_4
903 select SYS_FSL_SEC_LE
905 imply SYS_THUMB_BUILD
909 default "arch/arm/mach-omap2/u-boot-spl.lds"
914 select BOARD_EARLY_INIT_F
919 bool "Nexell S5P4418/S5P6818 SoC"
920 select ENABLE_ARM_SOC_BOOT0_HOOK
924 bool "Actions Semi OWL SoCs"
932 select SYS_RELOC_GD_ENV_ADDR
936 bool "QEMU Virtual Platform"
947 bool "Renesas ARM SoCs"
950 imply BOARD_EARLY_INIT_F
953 imply SYS_THUMB_BUILD
954 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
956 config TARGET_S32V234EVB
957 bool "Support s32v234evb"
959 select SYS_FSL_ERRATUM_ESDHC111
961 config ARCH_SNAPDRAGON
962 bool "Qualcomm Snapdragon SoCs"
975 bool "Altera SOCFPGA family"
976 select ARCH_EARLY_INIT_R
977 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
978 select ARM64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
979 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
982 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
984 select SPL_DM_RESET if DM_RESET
986 select SPL_LIBCOMMON_SUPPORT
987 select SPL_LIBGENERIC_SUPPORT
988 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
989 select SPL_OF_CONTROL
990 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
991 select SPL_SERIAL_SUPPORT
993 select SPL_WATCHDOG_SUPPORT
996 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
998 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
999 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
1009 imply SPL_DM_SPI_FLASH
1010 imply SPL_LIBDISK_SUPPORT
1011 imply SPL_MMC_SUPPORT
1012 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1013 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1014 imply SPL_SPI_FLASH_SUPPORT
1015 imply SPL_SPI_SUPPORT
1019 bool "Support sunxi (Allwinner) SoCs"
1022 select CMD_MMC if MMC
1023 select CMD_USB if DISTRO_DEFAULTS
1029 select DM_MMC if MMC
1030 select DM_SCSI if SCSI
1032 select DM_USB if DISTRO_DEFAULTS
1033 select OF_BOARD_SETUP
1036 select SPECIFY_CONSOLE_INDEX
1037 select SPL_STACK_R if SPL
1038 select SPL_SYS_MALLOC_SIMPLE if SPL
1039 select SPL_SYS_THUMB_BUILD if !ARM64
1042 select SYS_THUMB_BUILD if !ARM64
1043 select USB if DISTRO_DEFAULTS
1044 select USB_KEYBOARD if DISTRO_DEFAULTS
1045 select USB_STORAGE if DISTRO_DEFAULTS
1046 select SPL_USE_TINY_PRINTF
1048 select SYS_RELOC_GD_ENV_ADDR
1051 imply CMD_UBI if MTD_RAW_NAND
1052 imply DISTRO_DEFAULTS
1055 imply OF_LIBFDT_OVERLAY
1056 imply PRE_CONSOLE_BUFFER
1057 imply SPL_GPIO_SUPPORT
1058 imply SPL_LIBCOMMON_SUPPORT
1059 imply SPL_LIBGENERIC_SUPPORT
1060 imply SPL_MMC_SUPPORT if MMC
1061 imply SPL_POWER_SUPPORT
1062 imply SPL_SERIAL_SUPPORT
1066 bool "ST-Ericsson U8500 Series"
1070 select DM_MMC if MMC
1072 select DM_USB if USB
1076 imply ARM_PL180_MMCI
1078 imply NOMADIK_MTU_TIMER
1081 imply SYSRESET_SYSCON
1084 bool "Support Xilinx Versal Platform"
1088 select DM_ETH if NET
1089 select DM_MMC if MMC
1092 imply BOARD_LATE_INIT
1093 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1096 bool "Freescale Vybrid"
1098 select SYS_FSL_ERRATUM_ESDHC111
1103 bool "Xilinx Zynq based platform"
1108 select DM_ETH if NET
1109 select DM_MMC if MMC
1113 select DM_USB if USB
1116 select SPL_BOARD_INIT if SPL
1117 select SPL_CLK if SPL
1118 select SPL_DM if SPL
1119 select SPL_DM_SPI if SPL
1120 select SPL_DM_SPI_FLASH if SPL
1121 select SPL_OF_CONTROL if SPL
1122 select SPL_SEPARATE_BSS if SPL
1124 imply ARCH_EARLY_INIT_R
1125 imply BOARD_LATE_INIT
1129 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1132 config ARCH_ZYNQMP_R5
1133 bool "Xilinx ZynqMP R5 based platform"
1137 select DM_ETH if NET
1138 select DM_MMC if MMC
1145 bool "Xilinx ZynqMP based platform"
1149 select DM_ETH if NET
1151 select DM_MMC if MMC
1153 select DM_SPI if SPI
1154 select DM_SPI_FLASH if DM_SPI
1155 select DM_USB if USB
1158 select SPL_BOARD_INIT if SPL
1159 select SPL_CLK if SPL
1160 select SPL_DM if SPL
1161 select SPL_DM_SPI if SPI && SPL_DM
1162 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1163 select SPL_DM_MAILBOX if SPL
1164 select SPL_FIRMWARE if SPL
1165 select SPL_SEPARATE_BSS if SPL
1168 imply BOARD_LATE_INIT
1170 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1177 imply DISTRO_DEFAULTS
1180 config TARGET_VEXPRESS64_AEMV8A
1181 bool "Support vexpress_aemv8a"
1185 config TARGET_VEXPRESS64_BASE_FVP
1186 bool "Support Versatile Express ARMv8a FVP BASE model"
1191 config TARGET_VEXPRESS64_JUNO
1192 bool "Support Versatile Express Juno Development Platform"
1207 config TARGET_TOTAL_COMPUTE
1208 bool "Support Total Compute Platform"
1216 config TARGET_LS2080A_EMU
1217 bool "Support ls2080a_emu"
1220 select ARMV8_MULTIENTRY
1221 select FSL_DDR_SYNC_REFRESH
1223 Support for Freescale LS2080A_EMU platform.
1224 The LS2080A Development System (EMULATOR) is a pre-silicon
1225 development platform that supports the QorIQ LS2080A
1226 Layerscape Architecture processor.
1228 config TARGET_LS2080A_SIMU
1229 bool "Support ls2080a_simu"
1232 select ARMV8_MULTIENTRY
1233 select BOARD_LATE_INIT
1235 Support for Freescale LS2080A_SIMU platform.
1236 The LS2080A Development System (QDS) is a pre silicon
1237 development platform that supports the QorIQ LS2080A
1238 Layerscape Architecture processor.
1240 config TARGET_LS1088AQDS
1241 bool "Support ls1088aqds"
1244 select ARMV8_MULTIENTRY
1245 select ARCH_SUPPORT_TFABOOT
1246 select BOARD_LATE_INIT
1248 select FSL_DDR_INTERACTIVE if !SD_BOOT
1250 Support for NXP LS1088AQDS platform.
1251 The LS1088A Development System (QDS) is a high-performance
1252 development platform that supports the QorIQ LS1088A
1253 Layerscape Architecture processor.
1255 config TARGET_LS2080AQDS
1256 bool "Support ls2080aqds"
1259 select ARMV8_MULTIENTRY
1260 select ARCH_SUPPORT_TFABOOT
1261 select BOARD_LATE_INIT
1266 select FSL_DDR_INTERACTIVE if !SPL
1268 Support for Freescale LS2080AQDS platform.
1269 The LS2080A Development System (QDS) is a high-performance
1270 development platform that supports the QorIQ LS2080A
1271 Layerscape Architecture processor.
1273 config TARGET_LS2080ARDB
1274 bool "Support ls2080ardb"
1277 select ARMV8_MULTIENTRY
1278 select ARCH_SUPPORT_TFABOOT
1279 select BOARD_LATE_INIT
1282 select FSL_DDR_INTERACTIVE if !SPL
1286 Support for Freescale LS2080ARDB platform.
1287 The LS2080A Reference design board (RDB) is a high-performance
1288 development platform that supports the QorIQ LS2080A
1289 Layerscape Architecture processor.
1291 config TARGET_LS2081ARDB
1292 bool "Support ls2081ardb"
1295 select ARMV8_MULTIENTRY
1296 select BOARD_LATE_INIT
1299 Support for Freescale LS2081ARDB platform.
1300 The LS2081A Reference design board (RDB) is a high-performance
1301 development platform that supports the QorIQ LS2081A/LS2041A
1302 Layerscape Architecture processor.
1304 config TARGET_LX2160ARDB
1305 bool "Support lx2160ardb"
1308 select ARMV8_MULTIENTRY
1309 select ARCH_SUPPORT_TFABOOT
1310 select BOARD_LATE_INIT
1312 Support for NXP LX2160ARDB platform.
1313 The lx2160ardb (LX2160A Reference design board (RDB)
1314 is a high-performance development platform that supports the
1315 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1317 config TARGET_LX2160AQDS
1318 bool "Support lx2160aqds"
1321 select ARMV8_MULTIENTRY
1322 select ARCH_SUPPORT_TFABOOT
1323 select BOARD_LATE_INIT
1325 Support for NXP LX2160AQDS platform.
1326 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1327 is a high-performance development platform that supports the
1328 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1330 config TARGET_LX2162AQDS
1331 bool "Support lx2162aqds"
1333 select ARCH_MISC_INIT
1335 select ARMV8_MULTIENTRY
1336 select ARCH_SUPPORT_TFABOOT
1337 select BOARD_LATE_INIT
1339 Support for NXP LX2162AQDS platform.
1340 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1343 bool "Support HiKey 96boards Consumer Edition Platform"
1350 select SPECIFY_CONSOLE_INDEX
1353 Support for HiKey 96boards platform. It features a HI6220
1354 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1356 config TARGET_HIKEY960
1357 bool "Support HiKey960 96boards Consumer Edition Platform"
1365 Support for HiKey960 96boards platform. It features a HI3660
1366 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1368 config TARGET_POPLAR
1369 bool "Support Poplar 96boards Enterprise Edition Platform"
1378 Support for Poplar 96boards EE platform. It features a HI3798cv200
1379 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1380 making it capable of running any commercial set-top solution based on
1383 config TARGET_LS1012AQDS
1384 bool "Support ls1012aqds"
1387 select ARCH_SUPPORT_TFABOOT
1388 select BOARD_LATE_INIT
1390 Support for Freescale LS1012AQDS platform.
1391 The LS1012A Development System (QDS) is a high-performance
1392 development platform that supports the QorIQ LS1012A
1393 Layerscape Architecture processor.
1395 config TARGET_LS1012ARDB
1396 bool "Support ls1012ardb"
1399 select ARCH_SUPPORT_TFABOOT
1400 select BOARD_LATE_INIT
1404 Support for Freescale LS1012ARDB platform.
1405 The LS1012A Reference design board (RDB) is a high-performance
1406 development platform that supports the QorIQ LS1012A
1407 Layerscape Architecture processor.
1409 config TARGET_LS1012A2G5RDB
1410 bool "Support ls1012a2g5rdb"
1413 select ARCH_SUPPORT_TFABOOT
1414 select BOARD_LATE_INIT
1417 Support for Freescale LS1012A2G5RDB platform.
1418 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1419 development platform that supports the QorIQ LS1012A
1420 Layerscape Architecture processor.
1422 config TARGET_LS1012AFRWY
1423 bool "Support ls1012afrwy"
1426 select ARCH_SUPPORT_TFABOOT
1427 select BOARD_LATE_INIT
1431 Support for Freescale LS1012AFRWY platform.
1432 The LS1012A FRWY board (FRWY) is a high-performance
1433 development platform that supports the QorIQ LS1012A
1434 Layerscape Architecture processor.
1436 config TARGET_LS1012AFRDM
1437 bool "Support ls1012afrdm"
1440 select ARCH_SUPPORT_TFABOOT
1442 Support for Freescale LS1012AFRDM platform.
1443 The LS1012A Freedom board (FRDM) is a high-performance
1444 development platform that supports the QorIQ LS1012A
1445 Layerscape Architecture processor.
1447 config TARGET_LS1028AQDS
1448 bool "Support ls1028aqds"
1451 select ARMV8_MULTIENTRY
1452 select ARCH_SUPPORT_TFABOOT
1453 select BOARD_LATE_INIT
1455 Support for Freescale LS1028AQDS platform
1456 The LS1028A Development System (QDS) is a high-performance
1457 development platform that supports the QorIQ LS1028A
1458 Layerscape Architecture processor.
1460 config TARGET_LS1028ARDB
1461 bool "Support ls1028ardb"
1464 select ARMV8_MULTIENTRY
1465 select ARCH_SUPPORT_TFABOOT
1466 select BOARD_LATE_INIT
1468 Support for Freescale LS1028ARDB platform
1469 The LS1028A Development System (RDB) is a high-performance
1470 development platform that supports the QorIQ LS1028A
1471 Layerscape Architecture processor.
1473 config TARGET_LS1088ARDB
1474 bool "Support ls1088ardb"
1477 select ARMV8_MULTIENTRY
1478 select ARCH_SUPPORT_TFABOOT
1479 select BOARD_LATE_INIT
1481 select FSL_DDR_INTERACTIVE if !SD_BOOT
1483 Support for NXP LS1088ARDB platform.
1484 The LS1088A Reference design board (RDB) is a high-performance
1485 development platform that supports the QorIQ LS1088A
1486 Layerscape Architecture processor.
1488 config TARGET_LS1021AQDS
1489 bool "Support ls1021aqds"
1491 select ARCH_SUPPORT_PSCI
1492 select BOARD_EARLY_INIT_F
1493 select BOARD_LATE_INIT
1495 select CPU_V7_HAS_NONSEC
1496 select CPU_V7_HAS_VIRT
1497 select LS1_DEEP_SLEEP
1500 select FSL_DDR_INTERACTIVE
1501 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1502 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1505 config TARGET_LS1021ATWR
1506 bool "Support ls1021atwr"
1508 select ARCH_SUPPORT_PSCI
1509 select BOARD_EARLY_INIT_F
1510 select BOARD_LATE_INIT
1512 select CPU_V7_HAS_NONSEC
1513 select CPU_V7_HAS_VIRT
1514 select LS1_DEEP_SLEEP
1516 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1519 config TARGET_LS1021ATSN
1520 bool "Support ls1021atsn"
1522 select ARCH_SUPPORT_PSCI
1523 select BOARD_EARLY_INIT_F
1524 select BOARD_LATE_INIT
1526 select CPU_V7_HAS_NONSEC
1527 select CPU_V7_HAS_VIRT
1528 select LS1_DEEP_SLEEP
1532 config TARGET_LS1021AIOT
1533 bool "Support ls1021aiot"
1535 select ARCH_SUPPORT_PSCI
1536 select BOARD_LATE_INIT
1538 select CPU_V7_HAS_NONSEC
1539 select CPU_V7_HAS_VIRT
1541 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1544 Support for Freescale LS1021AIOT platform.
1545 The LS1021A Freescale board (IOT) is a high-performance
1546 development platform that supports the QorIQ LS1021A
1547 Layerscape Architecture processor.
1549 config TARGET_LS1043AQDS
1550 bool "Support ls1043aqds"
1553 select ARMV8_MULTIENTRY
1554 select ARCH_SUPPORT_TFABOOT
1555 select BOARD_EARLY_INIT_F
1556 select BOARD_LATE_INIT
1558 select FSL_DDR_INTERACTIVE if !SPL
1559 select FSL_DSPI if !SPL_NO_DSPI
1560 select DM_SPI_FLASH if FSL_DSPI
1564 Support for Freescale LS1043AQDS platform.
1566 config TARGET_LS1043ARDB
1567 bool "Support ls1043ardb"
1570 select ARMV8_MULTIENTRY
1571 select ARCH_SUPPORT_TFABOOT
1572 select BOARD_EARLY_INIT_F
1573 select BOARD_LATE_INIT
1575 select FSL_DSPI if !SPL_NO_DSPI
1576 select DM_SPI_FLASH if FSL_DSPI
1578 Support for Freescale LS1043ARDB platform.
1580 config TARGET_LS1046AQDS
1581 bool "Support ls1046aqds"
1584 select ARMV8_MULTIENTRY
1585 select ARCH_SUPPORT_TFABOOT
1586 select BOARD_EARLY_INIT_F
1587 select BOARD_LATE_INIT
1588 select DM_SPI_FLASH if DM_SPI
1590 select FSL_DDR_BIST if !SPL
1591 select FSL_DDR_INTERACTIVE if !SPL
1592 select FSL_DDR_INTERACTIVE if !SPL
1595 Support for Freescale LS1046AQDS platform.
1596 The LS1046A Development System (QDS) is a high-performance
1597 development platform that supports the QorIQ LS1046A
1598 Layerscape Architecture processor.
1600 config TARGET_LS1046ARDB
1601 bool "Support ls1046ardb"
1604 select ARMV8_MULTIENTRY
1605 select ARCH_SUPPORT_TFABOOT
1606 select BOARD_EARLY_INIT_F
1607 select BOARD_LATE_INIT
1608 select DM_SPI_FLASH if DM_SPI
1609 select POWER_MC34VR500
1612 select FSL_DDR_INTERACTIVE if !SPL
1615 Support for Freescale LS1046ARDB platform.
1616 The LS1046A Reference Design Board (RDB) is a high-performance
1617 development platform that supports the QorIQ LS1046A
1618 Layerscape Architecture processor.
1620 config TARGET_LS1046AFRWY
1621 bool "Support ls1046afrwy"
1624 select ARMV8_MULTIENTRY
1625 select ARCH_SUPPORT_TFABOOT
1626 select BOARD_EARLY_INIT_F
1627 select BOARD_LATE_INIT
1628 select DM_SPI_FLASH if DM_SPI
1631 Support for Freescale LS1046AFRWY platform.
1632 The LS1046A Freeway Board (FRWY) is a high-performance
1633 development platform that supports the QorIQ LS1046A
1634 Layerscape Architecture processor.
1640 select ARMV8_MULTIENTRY
1644 Support for Kontron SMARC-sAL28 board.
1646 config TARGET_COLIBRI_PXA270
1647 bool "Support colibri_pxa270"
1650 config ARCH_UNIPHIER
1651 bool "Socionext UniPhier SoCs"
1652 select BOARD_LATE_INIT
1662 select OF_BOARD_SETUP
1666 select SPL_BOARD_INIT if SPL
1667 select SPL_DM if SPL
1668 select SPL_LIBCOMMON_SUPPORT if SPL
1669 select SPL_LIBGENERIC_SUPPORT if SPL
1670 select SPL_OF_CONTROL if SPL
1671 select SPL_PINCTRL if SPL
1674 imply DISTRO_DEFAULTS
1677 Support for UniPhier SoC family developed by Socionext Inc.
1678 (formerly, System LSI Business Division of Panasonic Corporation)
1681 bool "Support STMicroelectronics STM32 MCU with cortex M"
1688 bool "Support STMicrolectronics SoCs"
1697 Support for STMicroelectronics STiH407/10 SoC family.
1698 This SoC is used on Linaro 96Board STiH410-B2260
1701 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1702 select ARCH_MISC_INIT
1703 select ARCH_SUPPORT_TFABOOT
1704 select BOARD_LATE_INIT
1713 select OF_SYSTEM_SETUP
1719 select SYS_THUMB_BUILD
1723 imply OF_LIBFDT_OVERLAY
1724 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1727 Support for STM32MP SoC family developed by STMicroelectronics,
1728 MPUs based on ARM cortex A core
1729 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1730 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1732 SPL is the unsecure FSBL for the basic boot chain.
1734 config ARCH_ROCKCHIP
1735 bool "Support Rockchip SoCs"
1737 select BINMAN if SPL_OPTEE
1747 select DM_USB if USB
1748 select ENABLE_ARM_SOC_BOOT0_HOOK
1751 select SPL_DM if SPL
1752 select SPL_DM_SPI if SPL
1753 select SPL_DM_SPI_FLASH if SPL
1755 select SYS_THUMB_BUILD if !ARM64
1758 imply DEBUG_UART_BOARD_INIT
1759 imply DISTRO_DEFAULTS
1761 imply SARADC_ROCKCHIP
1763 imply SPL_SYS_MALLOC_SIMPLE
1766 imply USB_FUNCTION_FASTBOOT
1768 config ARCH_OCTEONTX
1769 bool "Support OcteonTX SoCs"
1775 select BOARD_LATE_INIT
1776 select SYS_CACHE_SHIFT_7
1778 config ARCH_OCTEONTX2
1779 bool "Support OcteonTX2 SoCs"
1785 select BOARD_LATE_INIT
1786 select SYS_CACHE_SHIFT_7
1788 config TARGET_THUNDERX_88XX
1789 bool "Support ThunderX 88xx"
1793 select SYS_CACHE_SHIFT_7
1796 bool "Support Aspeed SoCs"
1801 config TARGET_DURIAN
1802 bool "Support Phytium Durian Platform"
1805 Support for durian platform.
1806 It has 2GB Sdram, uart and pcie.
1808 config TARGET_PRESIDIO_ASIC
1809 bool "Support Cortina Presidio ASIC Platform"
1812 config TARGET_XENGUEST_ARM64
1813 bool "Xen guest ARM64"
1817 select LINUX_KERNEL_IMAGE_HEADER
1822 config ARCH_SUPPORT_TFABOOT
1826 bool "Support for booting from TF-A"
1827 depends on ARCH_SUPPORT_TFABOOT
1830 Some platforms support the setup of secure registers (for instance
1831 for CPU errata handling) or provide secure services like PSCI.
1832 Those services could also be provided by other firmware parts
1833 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
1834 does not need to (and cannot) execute this code.
1835 Enabling this option will make a U-Boot binary that is relying
1836 on other firmware layers to provide secure functionality.
1838 config TI_SECURE_DEVICE
1839 bool "HS Device Type Support"
1840 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1842 If a high secure (HS) device type is being used, this config
1843 must be set. This option impacts various aspects of the
1844 build system (to create signed boot images that can be
1845 authenticated) and the code. See the doc/README.ti-secure
1846 file for further details.
1848 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1849 config ISW_ENTRY_ADDR
1850 hex "Address in memory or XIP address of bootloader entry point"
1851 default 0x402F4000 if AM43XX
1852 default 0x402F0400 if AM33XX
1853 default 0x40301350 if OMAP54XX
1855 After any reset, the boot ROM searches the boot media for a valid
1856 boot image. For non-XIP devices, the ROM then copies the image into
1857 internal memory. For all boot modes, after the ROM processes the
1858 boot image it eventually computes the entry point address depending
1859 on the device type (secure/non-secure), boot media (xip/non-xip) and
1863 source "arch/arm/mach-aspeed/Kconfig"
1865 source "arch/arm/mach-at91/Kconfig"
1867 source "arch/arm/mach-bcm283x/Kconfig"
1869 source "arch/arm/mach-bcmstb/Kconfig"
1871 source "arch/arm/mach-davinci/Kconfig"
1873 source "arch/arm/mach-exynos/Kconfig"
1875 source "arch/arm/mach-highbank/Kconfig"
1877 source "arch/arm/mach-integrator/Kconfig"
1879 source "arch/arm/mach-ipq40xx/Kconfig"
1881 source "arch/arm/mach-k3/Kconfig"
1883 source "arch/arm/mach-keystone/Kconfig"
1885 source "arch/arm/mach-kirkwood/Kconfig"
1887 source "arch/arm/mach-lpc32xx/Kconfig"
1889 source "arch/arm/mach-mvebu/Kconfig"
1891 source "arch/arm/mach-octeontx/Kconfig"
1893 source "arch/arm/mach-octeontx2/Kconfig"
1895 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1897 source "arch/arm/mach-imx/mx2/Kconfig"
1899 source "arch/arm/mach-imx/mx3/Kconfig"
1901 source "arch/arm/mach-imx/mx5/Kconfig"
1903 source "arch/arm/mach-imx/mx6/Kconfig"
1905 source "arch/arm/mach-imx/mx7/Kconfig"
1907 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1909 source "arch/arm/mach-imx/imx8/Kconfig"
1911 source "arch/arm/mach-imx/imx8m/Kconfig"
1913 source "arch/arm/mach-imx/imxrt/Kconfig"
1915 source "arch/arm/mach-imx/mxs/Kconfig"
1917 source "arch/arm/mach-omap2/Kconfig"
1919 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1921 source "arch/arm/mach-orion5x/Kconfig"
1923 source "arch/arm/mach-owl/Kconfig"
1925 source "arch/arm/mach-rmobile/Kconfig"
1927 source "arch/arm/mach-meson/Kconfig"
1929 source "arch/arm/mach-mediatek/Kconfig"
1931 source "arch/arm/mach-qemu/Kconfig"
1933 source "arch/arm/mach-rockchip/Kconfig"
1935 source "arch/arm/mach-s5pc1xx/Kconfig"
1937 source "arch/arm/mach-snapdragon/Kconfig"
1939 source "arch/arm/mach-socfpga/Kconfig"
1941 source "arch/arm/mach-sti/Kconfig"
1943 source "arch/arm/mach-stm32/Kconfig"
1945 source "arch/arm/mach-stm32mp/Kconfig"
1947 source "arch/arm/mach-sunxi/Kconfig"
1949 source "arch/arm/mach-tegra/Kconfig"
1951 source "arch/arm/mach-u8500/Kconfig"
1953 source "arch/arm/mach-uniphier/Kconfig"
1955 source "arch/arm/cpu/armv7/vf610/Kconfig"
1957 source "arch/arm/mach-zynq/Kconfig"
1959 source "arch/arm/mach-zynqmp/Kconfig"
1961 source "arch/arm/mach-versal/Kconfig"
1963 source "arch/arm/mach-zynqmp-r5/Kconfig"
1965 source "arch/arm/cpu/armv7/Kconfig"
1967 source "arch/arm/cpu/armv8/Kconfig"
1969 source "arch/arm/mach-imx/Kconfig"
1971 source "arch/arm/mach-nexell/Kconfig"
1973 source "board/armltd/total_compute/Kconfig"
1975 source "board/bosch/shc/Kconfig"
1976 source "board/bosch/guardian/Kconfig"
1977 source "board/CarMediaLab/flea3/Kconfig"
1978 source "board/Marvell/aspenite/Kconfig"
1979 source "board/Marvell/gplugd/Kconfig"
1980 source "board/Marvell/octeontx/Kconfig"
1981 source "board/Marvell/octeontx2/Kconfig"
1982 source "board/armadeus/apf27/Kconfig"
1983 source "board/armltd/vexpress/Kconfig"
1984 source "board/armltd/vexpress64/Kconfig"
1985 source "board/cortina/presidio-asic/Kconfig"
1986 source "board/broadcom/bcm23550_w1d/Kconfig"
1987 source "board/broadcom/bcm28155_ap/Kconfig"
1988 source "board/broadcom/bcm963158/Kconfig"
1989 source "board/broadcom/bcm968360bg/Kconfig"
1990 source "board/broadcom/bcm968580xref/Kconfig"
1991 source "board/broadcom/bcmcygnus/Kconfig"
1992 source "board/broadcom/bcmnsp/Kconfig"
1993 source "board/broadcom/bcmns2/Kconfig"
1994 source "board/broadcom/bcmns3/Kconfig"
1995 source "board/cavium/thunderx/Kconfig"
1996 source "board/cirrus/edb93xx/Kconfig"
1997 source "board/eets/pdu001/Kconfig"
1998 source "board/emulation/qemu-arm/Kconfig"
1999 source "board/freescale/ls2080a/Kconfig"
2000 source "board/freescale/ls2080aqds/Kconfig"
2001 source "board/freescale/ls2080ardb/Kconfig"
2002 source "board/freescale/ls1088a/Kconfig"
2003 source "board/freescale/ls1028a/Kconfig"
2004 source "board/freescale/ls1021aqds/Kconfig"
2005 source "board/freescale/ls1043aqds/Kconfig"
2006 source "board/freescale/ls1021atwr/Kconfig"
2007 source "board/freescale/ls1021atsn/Kconfig"
2008 source "board/freescale/ls1021aiot/Kconfig"
2009 source "board/freescale/ls1046aqds/Kconfig"
2010 source "board/freescale/ls1043ardb/Kconfig"
2011 source "board/freescale/ls1046ardb/Kconfig"
2012 source "board/freescale/ls1046afrwy/Kconfig"
2013 source "board/freescale/ls1012aqds/Kconfig"
2014 source "board/freescale/ls1012ardb/Kconfig"
2015 source "board/freescale/ls1012afrdm/Kconfig"
2016 source "board/freescale/lx2160a/Kconfig"
2017 source "board/freescale/mx35pdk/Kconfig"
2018 source "board/freescale/s32v234evb/Kconfig"
2019 source "board/grinn/chiliboard/Kconfig"
2020 source "board/hisilicon/hikey/Kconfig"
2021 source "board/hisilicon/hikey960/Kconfig"
2022 source "board/hisilicon/poplar/Kconfig"
2023 source "board/isee/igep003x/Kconfig"
2024 source "board/kontron/sl28/Kconfig"
2025 source "board/myir/mys_6ulx/Kconfig"
2026 source "board/spear/spear300/Kconfig"
2027 source "board/spear/spear310/Kconfig"
2028 source "board/spear/spear320/Kconfig"
2029 source "board/spear/spear600/Kconfig"
2030 source "board/spear/x600/Kconfig"
2031 source "board/st/stv0991/Kconfig"
2032 source "board/tcl/sl50/Kconfig"
2033 source "board/toradex/colibri_pxa270/Kconfig"
2034 source "board/variscite/dart_6ul/Kconfig"
2035 source "board/vscom/baltos/Kconfig"
2036 source "board/phytium/durian/Kconfig"
2037 source "board/xen/xenguest_arm64/Kconfig"
2039 source "arch/arm/Kconfig.debug"
2044 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2045 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2046 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64