1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed from
19 almost any 4K aligned address. This logic relies on the relocation
20 information that is embedded in the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
25 default n if ARCH_QEMU
26 default y if POSITION_INDEPENDENT
28 U-Boot typically uses a hard-coded value for the stack pointer
29 before relocation. Enable this option to instead calculate the
30 initial SP at run-time. This is useful to avoid hard-coding addresses
31 into U-Boot, so that it can be loaded and executed at arbitrary
32 addresses and thus avoid using arbitrary addresses at runtime.
34 If this option is enabled, the early stack pointer is set to
35 &_bss_start with a offset value added. The offset is specified by
36 SYS_INIT_SP_BSS_OFFSET.
38 config SYS_INIT_SP_BSS_OFFSET
39 int "Early stack offset from the .bss base address"
40 depends on INIT_SP_RELATIVE
43 This option's value is the offset added to &_bss_start in order to
44 calculate the stack pointer. This offset should be large enough so
45 that the early malloc region, global data (gd), and early stack usage
46 do not overlap any appended DTB.
48 config LINUX_KERNEL_IMAGE_HEADER
51 Place a Linux kernel image header at the start of the U-Boot binary.
52 The format of the header is described in the Linux kernel source at
53 Documentation/arm64/booting.txt. This feature is useful since the
54 image header reports the amount of memory (BSS and similar) that
55 U-Boot needs to use, but which isn't part of the binary.
57 if LINUX_KERNEL_IMAGE_HEADER
58 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
61 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
62 TEXT_OFFSET value written to the Linux kernel image header.
72 ARM GICV3 Interrupt translation service (ITS).
73 Basic support for programming locality specific peripheral
74 interrupts (LPI) configuration tables and enable LPI tables.
75 LPI configuration table can be used by u-boot or Linux.
76 ARM GICV3 has limitation, once the LPI table is enabled, LPI
77 configuration table can not be re-programmed, unless GICV3 reset.
83 config DMA_ADDR_T_64BIT
93 config GPIO_EXTRA_HEADER
96 # Used for compatibility with asm files copied from the kernel
97 config ARM_ASM_UNIFIED
101 # Used for compatibility with asm files copied from the kernel
105 config SYS_ICACHE_OFF
106 bool "Do not enable icache"
109 Do not enable instruction cache in U-Boot.
111 config SPL_SYS_ICACHE_OFF
112 bool "Do not enable icache in SPL"
114 default SYS_ICACHE_OFF
116 Do not enable instruction cache in SPL.
118 config SYS_DCACHE_OFF
119 bool "Do not enable dcache"
122 Do not enable data cache in U-Boot.
124 config SPL_SYS_DCACHE_OFF
125 bool "Do not enable dcache in SPL"
127 default SYS_DCACHE_OFF
129 Do not enable data cache in SPL.
131 config SYS_ARM_CACHE_CP15
132 bool "CP15 based cache enabling support"
134 Select this if your processor suports enabling caches by using
138 bool "MMU-based Paged Memory Management Support"
139 select SYS_ARM_CACHE_CP15
141 Select if you want MMU-based virtualised addressing space
142 support via paged memory management.
145 bool 'Use the ARM v7 PMSA Compliant MPU'
147 Some ARM systems without an MMU have instead a Memory Protection
148 Unit (MPU) that defines the type and permissions for regions of
150 If your CPU has an MPU then you should choose 'y' here unless you
151 know that you do not want to use the MPU.
153 # If set, the workarounds for these ARM errata are applied early during U-Boot
154 # startup. Note that in general these options force the workarounds to be
155 # applied; no CPU-type/version detection exists, unlike the similar options in
156 # the Linux kernel. Do not set these options unless they apply! Also note that
157 # the following can be machine-specific errata. These do have ability to
158 # provide rudimentary version and machine-specific checks, but expect no
160 # CONFIG_ARM_ERRATA_430973
161 # CONFIG_ARM_ERRATA_454179
162 # CONFIG_ARM_ERRATA_621766
163 # CONFIG_ARM_ERRATA_798870
164 # CONFIG_ARM_ERRATA_801819
165 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
166 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
168 config ARM_ERRATA_430973
171 config ARM_ERRATA_454179
174 config ARM_ERRATA_621766
177 config ARM_ERRATA_716044
180 config ARM_ERRATA_725233
183 config ARM_ERRATA_742230
186 config ARM_ERRATA_743622
189 config ARM_ERRATA_751472
192 config ARM_ERRATA_761320
195 config ARM_ERRATA_773022
198 config ARM_ERRATA_774769
201 config ARM_ERRATA_794072
204 config ARM_ERRATA_798870
207 config ARM_ERRATA_801819
210 config ARM_ERRATA_826974
213 config ARM_ERRATA_828024
216 config ARM_ERRATA_829520
219 config ARM_ERRATA_833069
222 config ARM_ERRATA_833471
225 config ARM_ERRATA_845369
228 config ARM_ERRATA_852421
231 config ARM_ERRATA_852423
234 config ARM_ERRATA_855873
237 config ARM_CORTEX_A8_CVE_2017_5715
240 config ARM_CORTEX_A15_CVE_2017_5715
245 select SYS_CACHE_SHIFT_5
250 select SYS_CACHE_SHIFT_5
255 select SYS_CACHE_SHIFT_5
260 select SYS_CACHE_SHIFT_5
265 select SYS_CACHE_SHIFT_5
271 select SYS_CACHE_SHIFT_5
278 select SYS_CACHE_SHIFT_6
285 select SYS_CACHE_SHIFT_5
286 select SYS_THUMB_BUILD
292 select SYS_ARM_CACHE_CP15
294 select SYS_CACHE_SHIFT_6
298 select SYS_CACHE_SHIFT_5
303 select SYS_CACHE_SHIFT_5
307 default "arm720t" if CPU_ARM720T
308 default "arm920t" if CPU_ARM920T
309 default "arm926ejs" if CPU_ARM926EJS
310 default "arm946es" if CPU_ARM946ES
311 default "arm1136" if CPU_ARM1136
312 default "arm1176" if CPU_ARM1176
313 default "armv7" if CPU_V7A
314 default "armv7" if CPU_V7R
315 default "armv7m" if CPU_V7M
316 default "pxa" if CPU_PXA
317 default "sa1100" if CPU_SA1100
318 default "armv8" if ARM64
322 default 4 if CPU_ARM720T
323 default 4 if CPU_ARM920T
324 default 5 if CPU_ARM926EJS
325 default 5 if CPU_ARM946ES
326 default 6 if CPU_ARM1136
327 default 6 if CPU_ARM1176
332 default 4 if CPU_SA1100
335 config SYS_CACHE_SHIFT_5
338 config SYS_CACHE_SHIFT_6
341 config SYS_CACHE_SHIFT_7
344 config SYS_CACHELINE_SIZE
346 default 128 if SYS_CACHE_SHIFT_7
347 default 64 if SYS_CACHE_SHIFT_6
348 default 32 if SYS_CACHE_SHIFT_5
351 prompt "Select the ARM data write cache policy"
352 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
354 default SYS_ARM_CACHE_WRITEBACK
356 config SYS_ARM_CACHE_WRITEBACK
357 bool "Write-back (WB)"
359 A write updates the cache only and marks the cache line as dirty.
360 External memory is updated only when the line is evicted or explicitly
363 config SYS_ARM_CACHE_WRITETHROUGH
364 bool "Write-through (WT)"
366 A write updates both the cache and the external memory system.
367 This does not mark the cache line as dirty.
369 config SYS_ARM_CACHE_WRITEALLOC
370 bool "Write allocation (WA)"
372 A cache line is allocated on a write miss. This means that executing a
373 store instruction on the processor might cause a burst read to occur.
374 There is a linefill to obtain the data for the cache line, before the
379 bool "Enable ARCH_CPU_INIT"
381 Some architectures require a call to arch_cpu_init().
382 Say Y here to enable it
384 config SYS_ARCH_TIMER
385 bool "ARM Generic Timer support"
386 depends on CPU_V7A || ARM64
389 The ARM Generic Timer (aka arch-timer) provides an architected
390 interface to a timer source on an SoC.
391 It is mandatory for ARMv8 implementation and widely available
395 bool "Support for ARM SMC Calling Convention (SMCCC)"
396 depends on CPU_V7A || ARM64
399 Say Y here if you want to enable ARM SMC Calling Convention.
400 This should be enabled if U-Boot needs to communicate with system
401 firmware (for example, PSCI) according to SMCCC.
404 bool "support boot from semihosting"
406 In emulated environments, semihosting is a way for
407 the hosted environment to call out to the emulator to
408 retrieve files from the host machine.
410 config SYS_THUMB_BUILD
411 bool "Build U-Boot using the Thumb instruction set"
414 Use this flag to build U-Boot using the Thumb instruction set for
415 ARM architectures. Thumb instruction set provides better code
416 density. For ARM architectures that support Thumb2 this flag will
417 result in Thumb2 code generated by GCC.
419 config SPL_SYS_THUMB_BUILD
420 bool "Build SPL using the Thumb instruction set"
421 default y if SYS_THUMB_BUILD
422 depends on !ARM64 && SPL
424 Use this flag to build SPL using the Thumb instruction set for
425 ARM architectures. Thumb instruction set provides better code
426 density. For ARM architectures that support Thumb2 this flag will
427 result in Thumb2 code generated by GCC.
429 config TPL_SYS_THUMB_BUILD
430 bool "Build TPL using the Thumb instruction set"
431 default y if SYS_THUMB_BUILD
432 depends on TPL && !ARM64
434 Use this flag to build TPL using the Thumb instruction set for
435 ARM architectures. Thumb instruction set provides better code
436 density. For ARM architectures that support Thumb2 this flag will
437 result in Thumb2 code generated by GCC.
440 config SYS_L2CACHE_OFF
443 If SoC does not support L2CACHE or one does not want to enable
444 L2CACHE, choose this option.
446 config ENABLE_ARM_SOC_BOOT0_HOOK
447 bool "prepare BOOT0 header"
449 If the SoC's BOOT0 requires a header area filled with (magic)
450 values, then choose this option, and create a file included as
451 <asm/arch/boot0.h> which contains the required assembler code.
453 config ARM_CORTEX_CPU_IS_UP
457 config USE_ARCH_MEMCPY
458 bool "Use an assembly optimized implementation of memcpy"
462 Enable the generation of an optimized version of memcpy.
463 Such an implementation may be faster under some conditions
464 but may increase the binary size.
466 config SPL_USE_ARCH_MEMCPY
467 bool "Use an assembly optimized implementation of memcpy for SPL"
468 default y if USE_ARCH_MEMCPY
469 depends on !ARM64 && SPL
471 Enable the generation of an optimized version of memcpy.
472 Such an implementation may be faster under some conditions
473 but may increase the binary size.
475 config TPL_USE_ARCH_MEMCPY
476 bool "Use an assembly optimized implementation of memcpy for TPL"
477 default y if USE_ARCH_MEMCPY
478 depends on !ARM64 && TPL
480 Enable the generation of an optimized version of memcpy.
481 Such an implementation may be faster under some conditions
482 but may increase the binary size.
484 config USE_ARCH_MEMSET
485 bool "Use an assembly optimized implementation of memset"
489 Enable the generation of an optimized version of memset.
490 Such an implementation may be faster under some conditions
491 but may increase the binary size.
493 config SPL_USE_ARCH_MEMSET
494 bool "Use an assembly optimized implementation of memset for SPL"
495 default y if USE_ARCH_MEMSET
496 depends on !ARM64 && SPL
498 Enable the generation of an optimized version of memset.
499 Such an implementation may be faster under some conditions
500 but may increase the binary size.
502 config TPL_USE_ARCH_MEMSET
503 bool "Use an assembly optimized implementation of memset for TPL"
504 default y if USE_ARCH_MEMSET
505 depends on !ARM64 && TPL
507 Enable the generation of an optimized version of memset.
508 Such an implementation may be faster under some conditions
509 but may increase the binary size.
511 config ARM64_SUPPORT_AARCH32
512 bool "ARM64 system support AArch32 execution state"
514 default y if !TARGET_THUNDERX_88XX
516 This ARM64 system supports AArch32 execution state.
519 prompt "Target select"
524 select GPIO_EXTRA_HEADER
525 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
526 select SPL_SEPARATE_BSS if SPL
528 config TARGET_ASPENITE
529 bool "Support aspenite"
531 select GPIO_EXTRA_HEADER
536 select GPIO_EXTRA_HEADER
537 select SPL_DM_SPI if SPL
540 Support for TI's DaVinci platform.
543 bool "Marvell Kirkwood"
544 select ARCH_MISC_INIT
545 select BOARD_EARLY_INIT_F
547 select GPIO_EXTRA_HEADER
550 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
556 select GPIO_EXTRA_HEADER
557 select SPL_DM_SPI if SPL
558 select SPL_DM_SPI_FLASH if SPL
567 select GPIO_EXTRA_HEADER
569 config TARGET_STV0991
570 bool "Support stv0991"
576 select GPIO_EXTRA_HEADER
585 select GPIO_EXTRA_HEADER
588 bool "Broadcom BCM283X family"
592 select GPIO_EXTRA_HEADER
595 select SERIAL_SEARCH_ALL
600 bool "Broadcom BCM63158 family"
606 bool "Broadcom BCM68360 family"
612 bool "Broadcom BCM6858 family"
618 bool "Broadcom BCM7XXX family"
621 select GPIO_EXTRA_HEADER
623 select OF_PRIOR_STAGE
626 This enables support for Broadcom ARM-based set-top box
627 chipsets, including the 7445 family of chips.
629 config TARGET_BCMCYGNUS
630 bool "Support bcmcygnus"
632 select GPIO_EXTRA_HEADER
634 imply BCM_SF2_ETH_GMAC
642 bool "Support Broadcom Northstar2"
644 select GPIO_EXTRA_HEADER
646 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
647 ARMv8 Cortex-A57 processors targeting a broad range of networking
651 bool "Support Broadcom NS3"
653 select BOARD_LATE_INIT
655 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
656 ARMv8 Cortex-A72 processors targeting a broad range of networking
660 bool "Samsung EXYNOS"
670 select GPIO_EXTRA_HEADER
671 imply SYS_THUMB_BUILD
676 bool "Samsung S5PC1XX"
682 select GPIO_EXTRA_HEADER
686 bool "Calxeda Highbank"
699 config ARCH_INTEGRATOR
700 bool "ARM Ltd. Integrator family"
703 select GPIO_EXTRA_HEADER
708 bool "Qualcomm IPQ40xx SoCs"
714 select GPIO_EXTRA_HEADER
726 select GPIO_EXTRA_HEADER
728 select SYS_ARCH_TIMER
729 select SYS_THUMB_BUILD
735 bool "Texas Instruments' K3 Architecture"
740 config ARCH_OMAP2PLUS
743 select GPIO_EXTRA_HEADER
744 select SPL_BOARD_INIT if SPL
745 select SPL_STACK_R if SPL
747 imply TI_SYSC if DM && OF_CONTROL
752 select GPIO_EXTRA_HEADER
753 imply DISTRO_DEFAULTS
756 Support for the Meson SoC family developed by Amlogic Inc.,
757 targeted at media players and tablet computers. We currently
758 support the S905 (GXBaby) 64-bit SoC.
763 select GPIO_EXTRA_HEADER
766 select SPL_LIBCOMMON_SUPPORT if SPL
767 select SPL_LIBGENERIC_SUPPORT if SPL
768 select SPL_OF_CONTROL if SPL
771 Support for the MediaTek SoCs family developed by MediaTek Inc.
772 Please refer to doc/README.mediatek for more information.
775 bool "NXP LPC32xx platform"
780 select GPIO_EXTRA_HEADER
786 bool "NXP i.MX8 platform"
789 select GPIO_EXTRA_HEADER
791 select ENABLE_ARM_SOC_BOOT0_HOOK
794 bool "NXP i.MX8M platform"
796 select GPIO_EXTRA_HEADER
797 select SYS_FSL_HAS_SEC if IMX_HAB
798 select SYS_FSL_SEC_COMPAT_4
799 select SYS_FSL_SEC_LE
805 bool "NXP i.MXRT platform"
809 select GPIO_EXTRA_HEADER
814 bool "NXP i.MX23 family"
816 select GPIO_EXTRA_HEADER
823 select GPIO_EXTRA_HEADER
827 bool "NXP i.MX28 family"
829 select GPIO_EXTRA_HEADER
834 bool "NXP i.MX31 family"
836 select GPIO_EXTRA_HEADER
841 select GPIO_EXTRA_HEADER
842 select SYS_FSL_HAS_SEC if IMX_HAB
843 select SYS_FSL_SEC_COMPAT_4
844 select SYS_FSL_SEC_LE
845 select ROM_UNIFIED_SECTIONS
847 imply SYS_THUMB_BUILD
851 select ARCH_MISC_INIT
853 select GPIO_EXTRA_HEADER
854 select SYS_FSL_HAS_SEC if IMX_HAB
855 select SYS_FSL_SEC_COMPAT_4
856 select SYS_FSL_SEC_LE
857 imply BOARD_EARLY_INIT_F
859 imply SYS_THUMB_BUILD
864 select GPIO_EXTRA_HEADER
865 select SYS_FSL_HAS_SEC
866 select SYS_FSL_SEC_COMPAT_4
867 select SYS_FSL_SEC_LE
869 imply SYS_THUMB_BUILD
873 default "arch/arm/mach-omap2/u-boot-spl.lds"
878 select BOARD_EARLY_INIT_F
880 select GPIO_EXTRA_HEADER
884 bool "Nexell S5P4418/S5P6818 SoC"
885 select ENABLE_ARM_SOC_BOOT0_HOOK
887 select GPIO_EXTRA_HEADER
890 bool "Actions Semi OWL SoCs"
894 select GPIO_EXTRA_HEADER
899 select SYS_RELOC_GD_ENV_ADDR
903 bool "QEMU Virtual Platform"
914 bool "Renesas ARM SoCs"
917 select GPIO_EXTRA_HEADER
918 imply BOARD_EARLY_INIT_F
921 imply SYS_THUMB_BUILD
922 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
924 config ARCH_SNAPDRAGON
925 bool "Qualcomm Snapdragon SoCs"
930 select GPIO_EXTRA_HEADER
939 bool "Altera SOCFPGA family"
940 select ARCH_EARLY_INIT_R
941 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
942 select ARM64 if TARGET_SOCFPGA_SOC64
943 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
946 select GPIO_EXTRA_HEADER
947 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
949 select SPL_DM_RESET if DM_RESET
951 select SPL_LIBCOMMON_SUPPORT
952 select SPL_LIBGENERIC_SUPPORT
953 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
954 select SPL_OF_CONTROL
955 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
956 select SPL_SERIAL_SUPPORT
961 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
963 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
964 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
974 imply SPL_DM_SPI_FLASH
975 imply SPL_LIBDISK_SUPPORT
976 imply SPL_MMC_SUPPORT
977 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
978 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
979 imply SPL_SPI_FLASH_SUPPORT
980 imply SPL_SPI_SUPPORT
984 bool "Support sunxi (Allwinner) SoCs"
987 select CMD_MMC if MMC
988 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
995 select DM_SCSI if SCSI
997 select GPIO_EXTRA_HEADER
998 select OF_BOARD_SETUP
1001 select SPECIFY_CONSOLE_INDEX
1002 select SPL_STACK_R if SPL
1003 select SPL_SYS_MALLOC_SIMPLE if SPL
1004 select SPL_SYS_THUMB_BUILD if !ARM64
1007 select SYS_THUMB_BUILD if !ARM64
1008 select USB if DISTRO_DEFAULTS
1009 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1010 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1011 select SPL_USE_TINY_PRINTF
1013 select SYS_RELOC_GD_ENV_ADDR
1014 imply BOARD_LATE_INIT
1017 imply CMD_UBI if MTD_RAW_NAND
1018 imply DISTRO_DEFAULTS
1021 imply OF_LIBFDT_OVERLAY
1022 imply PRE_CONSOLE_BUFFER
1024 imply SPL_LIBCOMMON_SUPPORT
1025 imply SPL_LIBGENERIC_SUPPORT
1026 imply SPL_MMC_SUPPORT if MMC
1028 imply SPL_SERIAL_SUPPORT
1032 bool "ST-Ericsson U8500 Series"
1036 select DM_MMC if MMC
1041 imply ARM_PL180_MMCI
1043 imply NOMADIK_MTU_TIMER
1046 imply SYSRESET_SYSCON
1049 bool "Support Xilinx Versal Platform"
1053 select DM_ETH if NET
1054 select DM_MMC if MMC
1056 select GPIO_EXTRA_HEADER
1058 imply BOARD_LATE_INIT
1059 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1062 bool "Freescale Vybrid"
1064 select GPIO_EXTRA_HEADER
1065 select SYS_FSL_ERRATUM_ESDHC111
1070 bool "Xilinx Zynq based platform"
1075 select DM_ETH if NET
1076 select DM_MMC if MMC
1080 select GPIO_EXTRA_HEADER
1083 select SPL_BOARD_INIT if SPL
1084 select SPL_CLK if SPL
1085 select SPL_DM if SPL
1086 select SPL_DM_SPI if SPL
1087 select SPL_DM_SPI_FLASH if SPL
1088 select SPL_OF_CONTROL if SPL
1089 select SPL_SEPARATE_BSS if SPL
1091 imply ARCH_EARLY_INIT_R
1092 imply BOARD_LATE_INIT
1096 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1099 config ARCH_ZYNQMP_R5
1100 bool "Xilinx ZynqMP R5 based platform"
1104 select DM_ETH if NET
1105 select DM_MMC if MMC
1107 select GPIO_EXTRA_HEADER
1113 bool "Xilinx ZynqMP based platform"
1117 select DM_ETH if NET
1119 select DM_MMC if MMC
1121 select DM_SPI if SPI
1122 select DM_SPI_FLASH if DM_SPI
1124 select GPIO_EXTRA_HEADER
1126 select SPL_BOARD_INIT if SPL
1127 select SPL_CLK if SPL
1128 select SPL_DM if SPL
1129 select SPL_DM_SPI if SPI && SPL_DM
1130 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1131 select SPL_DM_MAILBOX if SPL
1132 select SPL_FIRMWARE if SPL
1133 select SPL_SEPARATE_BSS if SPL
1136 imply BOARD_LATE_INIT
1138 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1145 select GPIO_EXTRA_HEADER
1146 imply DISTRO_DEFAULTS
1149 config TARGET_VEXPRESS64_AEMV8A
1150 bool "Support vexpress_aemv8a"
1152 select GPIO_EXTRA_HEADER
1155 config TARGET_VEXPRESS64_BASE_FVP
1156 bool "Support Versatile Express ARMv8a FVP BASE model"
1158 select GPIO_EXTRA_HEADER
1162 config TARGET_VEXPRESS64_JUNO
1163 bool "Support Versatile Express Juno Development Platform"
1165 select GPIO_EXTRA_HEADER
1178 config TARGET_TOTAL_COMPUTE
1179 bool "Support Total Compute Platform"
1187 config TARGET_LS2080A_EMU
1188 bool "Support ls2080a_emu"
1191 select ARMV8_MULTIENTRY
1192 select FSL_DDR_SYNC_REFRESH
1193 select GPIO_EXTRA_HEADER
1195 Support for Freescale LS2080A_EMU platform.
1196 The LS2080A Development System (EMULATOR) is a pre-silicon
1197 development platform that supports the QorIQ LS2080A
1198 Layerscape Architecture processor.
1200 config TARGET_LS1088AQDS
1201 bool "Support ls1088aqds"
1204 select ARMV8_MULTIENTRY
1205 select ARCH_SUPPORT_TFABOOT
1206 select BOARD_LATE_INIT
1207 select GPIO_EXTRA_HEADER
1209 select FSL_DDR_INTERACTIVE if !SD_BOOT
1211 Support for NXP LS1088AQDS platform.
1212 The LS1088A Development System (QDS) is a high-performance
1213 development platform that supports the QorIQ LS1088A
1214 Layerscape Architecture processor.
1216 config TARGET_LS2080AQDS
1217 bool "Support ls2080aqds"
1220 select ARMV8_MULTIENTRY
1221 select ARCH_SUPPORT_TFABOOT
1222 select BOARD_LATE_INIT
1223 select GPIO_EXTRA_HEADER
1228 select FSL_DDR_INTERACTIVE if !SPL
1230 Support for Freescale LS2080AQDS platform.
1231 The LS2080A Development System (QDS) is a high-performance
1232 development platform that supports the QorIQ LS2080A
1233 Layerscape Architecture processor.
1235 config TARGET_LS2080ARDB
1236 bool "Support ls2080ardb"
1239 select ARMV8_MULTIENTRY
1240 select ARCH_SUPPORT_TFABOOT
1241 select BOARD_LATE_INIT
1244 select FSL_DDR_INTERACTIVE if !SPL
1245 select GPIO_EXTRA_HEADER
1249 Support for Freescale LS2080ARDB platform.
1250 The LS2080A Reference design board (RDB) is a high-performance
1251 development platform that supports the QorIQ LS2080A
1252 Layerscape Architecture processor.
1254 config TARGET_LS2081ARDB
1255 bool "Support ls2081ardb"
1258 select ARMV8_MULTIENTRY
1259 select BOARD_LATE_INIT
1260 select GPIO_EXTRA_HEADER
1263 Support for Freescale LS2081ARDB platform.
1264 The LS2081A Reference design board (RDB) is a high-performance
1265 development platform that supports the QorIQ LS2081A/LS2041A
1266 Layerscape Architecture processor.
1268 config TARGET_LX2160ARDB
1269 bool "Support lx2160ardb"
1272 select ARMV8_MULTIENTRY
1273 select ARCH_SUPPORT_TFABOOT
1274 select BOARD_LATE_INIT
1275 select GPIO_EXTRA_HEADER
1277 Support for NXP LX2160ARDB platform.
1278 The lx2160ardb (LX2160A Reference design board (RDB)
1279 is a high-performance development platform that supports the
1280 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1282 config TARGET_LX2160AQDS
1283 bool "Support lx2160aqds"
1286 select ARMV8_MULTIENTRY
1287 select ARCH_SUPPORT_TFABOOT
1288 select BOARD_LATE_INIT
1289 select GPIO_EXTRA_HEADER
1291 Support for NXP LX2160AQDS platform.
1292 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1293 is a high-performance development platform that supports the
1294 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1296 config TARGET_LX2162AQDS
1297 bool "Support lx2162aqds"
1299 select ARCH_MISC_INIT
1301 select ARMV8_MULTIENTRY
1302 select ARCH_SUPPORT_TFABOOT
1303 select BOARD_LATE_INIT
1304 select GPIO_EXTRA_HEADER
1306 Support for NXP LX2162AQDS platform.
1307 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1310 bool "Support HiKey 96boards Consumer Edition Platform"
1315 select GPIO_EXTRA_HEADER
1318 select SPECIFY_CONSOLE_INDEX
1321 Support for HiKey 96boards platform. It features a HI6220
1322 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1324 config TARGET_HIKEY960
1325 bool "Support HiKey960 96boards Consumer Edition Platform"
1329 select GPIO_EXTRA_HEADER
1334 Support for HiKey960 96boards platform. It features a HI3660
1335 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1337 config TARGET_POPLAR
1338 bool "Support Poplar 96boards Enterprise Edition Platform"
1342 select GPIO_EXTRA_HEADER
1347 Support for Poplar 96boards EE platform. It features a HI3798cv200
1348 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1349 making it capable of running any commercial set-top solution based on
1352 config TARGET_LS1012AQDS
1353 bool "Support ls1012aqds"
1356 select ARCH_SUPPORT_TFABOOT
1357 select BOARD_LATE_INIT
1358 select GPIO_EXTRA_HEADER
1360 Support for Freescale LS1012AQDS platform.
1361 The LS1012A Development System (QDS) is a high-performance
1362 development platform that supports the QorIQ LS1012A
1363 Layerscape Architecture processor.
1365 config TARGET_LS1012ARDB
1366 bool "Support ls1012ardb"
1369 select ARCH_SUPPORT_TFABOOT
1370 select BOARD_LATE_INIT
1371 select GPIO_EXTRA_HEADER
1375 Support for Freescale LS1012ARDB platform.
1376 The LS1012A Reference design board (RDB) is a high-performance
1377 development platform that supports the QorIQ LS1012A
1378 Layerscape Architecture processor.
1380 config TARGET_LS1012A2G5RDB
1381 bool "Support ls1012a2g5rdb"
1384 select ARCH_SUPPORT_TFABOOT
1385 select BOARD_LATE_INIT
1386 select GPIO_EXTRA_HEADER
1389 Support for Freescale LS1012A2G5RDB platform.
1390 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1391 development platform that supports the QorIQ LS1012A
1392 Layerscape Architecture processor.
1394 config TARGET_LS1012AFRWY
1395 bool "Support ls1012afrwy"
1398 select ARCH_SUPPORT_TFABOOT
1399 select BOARD_LATE_INIT
1400 select GPIO_EXTRA_HEADER
1404 Support for Freescale LS1012AFRWY platform.
1405 The LS1012A FRWY board (FRWY) is a high-performance
1406 development platform that supports the QorIQ LS1012A
1407 Layerscape Architecture processor.
1409 config TARGET_LS1012AFRDM
1410 bool "Support ls1012afrdm"
1413 select ARCH_SUPPORT_TFABOOT
1414 select GPIO_EXTRA_HEADER
1416 Support for Freescale LS1012AFRDM platform.
1417 The LS1012A Freedom board (FRDM) is a high-performance
1418 development platform that supports the QorIQ LS1012A
1419 Layerscape Architecture processor.
1421 config TARGET_LS1028AQDS
1422 bool "Support ls1028aqds"
1425 select ARMV8_MULTIENTRY
1426 select ARCH_SUPPORT_TFABOOT
1427 select BOARD_LATE_INIT
1428 select GPIO_EXTRA_HEADER
1430 Support for Freescale LS1028AQDS platform
1431 The LS1028A Development System (QDS) is a high-performance
1432 development platform that supports the QorIQ LS1028A
1433 Layerscape Architecture processor.
1435 config TARGET_LS1028ARDB
1436 bool "Support ls1028ardb"
1439 select ARMV8_MULTIENTRY
1440 select ARCH_SUPPORT_TFABOOT
1441 select BOARD_LATE_INIT
1442 select GPIO_EXTRA_HEADER
1444 Support for Freescale LS1028ARDB platform
1445 The LS1028A Development System (RDB) is a high-performance
1446 development platform that supports the QorIQ LS1028A
1447 Layerscape Architecture processor.
1449 config TARGET_LS1088ARDB
1450 bool "Support ls1088ardb"
1453 select ARMV8_MULTIENTRY
1454 select ARCH_SUPPORT_TFABOOT
1455 select BOARD_LATE_INIT
1457 select FSL_DDR_INTERACTIVE if !SD_BOOT
1458 select GPIO_EXTRA_HEADER
1460 Support for NXP LS1088ARDB platform.
1461 The LS1088A Reference design board (RDB) is a high-performance
1462 development platform that supports the QorIQ LS1088A
1463 Layerscape Architecture processor.
1465 config TARGET_LS1021AQDS
1466 bool "Support ls1021aqds"
1468 select ARCH_SUPPORT_PSCI
1469 select BOARD_EARLY_INIT_F
1470 select BOARD_LATE_INIT
1472 select CPU_V7_HAS_NONSEC
1473 select CPU_V7_HAS_VIRT
1474 select LS1_DEEP_SLEEP
1477 select FSL_DDR_INTERACTIVE
1478 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1479 select GPIO_EXTRA_HEADER
1480 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1483 config TARGET_LS1021ATWR
1484 bool "Support ls1021atwr"
1486 select ARCH_SUPPORT_PSCI
1487 select BOARD_EARLY_INIT_F
1488 select BOARD_LATE_INIT
1490 select CPU_V7_HAS_NONSEC
1491 select CPU_V7_HAS_VIRT
1492 select LS1_DEEP_SLEEP
1494 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1495 select GPIO_EXTRA_HEADER
1498 config TARGET_PG_WCOM_SELI8
1499 bool "Support Hitachi-Powergrids SELI8 service unit card"
1501 select ARCH_SUPPORT_PSCI
1502 select BOARD_EARLY_INIT_F
1503 select BOARD_LATE_INIT
1505 select CPU_V7_HAS_NONSEC
1506 select CPU_V7_HAS_VIRT
1508 select FSL_DDR_INTERACTIVE
1509 select GPIO_EXTRA_HEADER
1513 Support for Hitachi-Powergrids SELI8 service unit card.
1514 SELI8 is a QorIQ LS1021a based service unit card used
1515 in XMC20 and FOX615 product families.
1517 config TARGET_PG_WCOM_EXPU1
1518 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1520 select ARCH_SUPPORT_PSCI
1521 select BOARD_EARLY_INIT_F
1522 select BOARD_LATE_INIT
1524 select CPU_V7_HAS_NONSEC
1525 select CPU_V7_HAS_VIRT
1527 select FSL_DDR_INTERACTIVE
1531 Support for Hitachi-Powergrids EXPU1 service unit card.
1532 EXPU1 is a QorIQ LS1021a based service unit card used
1533 in XMC20 and FOX615 product families.
1535 config TARGET_LS1021ATSN
1536 bool "Support ls1021atsn"
1538 select ARCH_SUPPORT_PSCI
1539 select BOARD_EARLY_INIT_F
1540 select BOARD_LATE_INIT
1542 select CPU_V7_HAS_NONSEC
1543 select CPU_V7_HAS_VIRT
1544 select LS1_DEEP_SLEEP
1546 select GPIO_EXTRA_HEADER
1549 config TARGET_LS1021AIOT
1550 bool "Support ls1021aiot"
1552 select ARCH_SUPPORT_PSCI
1553 select BOARD_LATE_INIT
1555 select CPU_V7_HAS_NONSEC
1556 select CPU_V7_HAS_VIRT
1558 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1559 select GPIO_EXTRA_HEADER
1562 Support for Freescale LS1021AIOT platform.
1563 The LS1021A Freescale board (IOT) is a high-performance
1564 development platform that supports the QorIQ LS1021A
1565 Layerscape Architecture processor.
1567 config TARGET_LS1043AQDS
1568 bool "Support ls1043aqds"
1571 select ARMV8_MULTIENTRY
1572 select ARCH_SUPPORT_TFABOOT
1573 select BOARD_EARLY_INIT_F
1574 select BOARD_LATE_INIT
1576 select FSL_DDR_INTERACTIVE if !SPL
1577 select FSL_DSPI if !SPL_NO_DSPI
1578 select DM_SPI_FLASH if FSL_DSPI
1579 select GPIO_EXTRA_HEADER
1583 Support for Freescale LS1043AQDS platform.
1585 config TARGET_LS1043ARDB
1586 bool "Support ls1043ardb"
1589 select ARMV8_MULTIENTRY
1590 select ARCH_SUPPORT_TFABOOT
1591 select BOARD_EARLY_INIT_F
1592 select BOARD_LATE_INIT
1594 select FSL_DSPI if !SPL_NO_DSPI
1595 select DM_SPI_FLASH if FSL_DSPI
1596 select GPIO_EXTRA_HEADER
1598 Support for Freescale LS1043ARDB platform.
1600 config TARGET_LS1046AQDS
1601 bool "Support ls1046aqds"
1604 select ARMV8_MULTIENTRY
1605 select ARCH_SUPPORT_TFABOOT
1606 select BOARD_EARLY_INIT_F
1607 select BOARD_LATE_INIT
1608 select DM_SPI_FLASH if DM_SPI
1610 select FSL_DDR_BIST if !SPL
1611 select FSL_DDR_INTERACTIVE if !SPL
1612 select FSL_DDR_INTERACTIVE if !SPL
1613 select GPIO_EXTRA_HEADER
1616 Support for Freescale LS1046AQDS platform.
1617 The LS1046A Development System (QDS) is a high-performance
1618 development platform that supports the QorIQ LS1046A
1619 Layerscape Architecture processor.
1621 config TARGET_LS1046ARDB
1622 bool "Support ls1046ardb"
1625 select ARMV8_MULTIENTRY
1626 select ARCH_SUPPORT_TFABOOT
1627 select BOARD_EARLY_INIT_F
1628 select BOARD_LATE_INIT
1629 select DM_SPI_FLASH if DM_SPI
1630 select POWER_MC34VR500
1633 select FSL_DDR_INTERACTIVE if !SPL
1634 select GPIO_EXTRA_HEADER
1637 Support for Freescale LS1046ARDB platform.
1638 The LS1046A Reference Design Board (RDB) is a high-performance
1639 development platform that supports the QorIQ LS1046A
1640 Layerscape Architecture processor.
1642 config TARGET_LS1046AFRWY
1643 bool "Support ls1046afrwy"
1646 select ARMV8_MULTIENTRY
1647 select ARCH_SUPPORT_TFABOOT
1648 select BOARD_EARLY_INIT_F
1649 select BOARD_LATE_INIT
1650 select DM_SPI_FLASH if DM_SPI
1651 select GPIO_EXTRA_HEADER
1654 Support for Freescale LS1046AFRWY platform.
1655 The LS1046A Freeway Board (FRWY) is a high-performance
1656 development platform that supports the QorIQ LS1046A
1657 Layerscape Architecture processor.
1663 select ARMV8_MULTIENTRY
1679 select GPIO_EXTRA_HEADER
1680 select SPL_DM if SPL
1681 select SPL_DM_SPI if SPL
1682 select SPL_DM_SPI_FLASH if SPL
1683 select SPL_DM_I2C if SPL
1684 select SPL_DM_MMC if SPL
1685 select SPL_DM_SERIAL if SPL
1687 Support for Kontron SMARC-sAL28 board.
1689 config TARGET_COLIBRI_PXA270
1690 bool "Support colibri_pxa270"
1692 select GPIO_EXTRA_HEADER
1694 config ARCH_UNIPHIER
1695 bool "Socionext UniPhier SoCs"
1696 select BOARD_LATE_INIT
1705 select OF_BOARD_SETUP
1709 select SPL_BOARD_INIT if SPL
1710 select SPL_DM if SPL
1711 select SPL_LIBCOMMON_SUPPORT if SPL
1712 select SPL_LIBGENERIC_SUPPORT if SPL
1713 select SPL_OF_CONTROL if SPL
1714 select SPL_PINCTRL if SPL
1717 imply DISTRO_DEFAULTS
1720 Support for UniPhier SoC family developed by Socionext Inc.
1721 (formerly, System LSI Business Division of Panasonic Corporation)
1723 config ARCH_SYNQUACER
1724 bool "Socionext SynQuacer SoCs"
1730 select SYSRESET_PSCI
1733 Support for SynQuacer SoC family developed by Socionext Inc.
1734 This SoC is used on 96boards EE DeveloperBox.
1737 bool "Support STMicroelectronics STM32 MCU with cortex M"
1741 select GPIO_EXTRA_HEADER
1745 bool "Support STMicrolectronics SoCs"
1754 Support for STMicroelectronics STiH407/10 SoC family.
1755 This SoC is used on Linaro 96Board STiH410-B2260
1758 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1759 select ARCH_MISC_INIT
1760 select ARCH_SUPPORT_TFABOOT
1761 select BOARD_LATE_INIT
1767 select GPIO_EXTRA_HEADER
1771 select OF_SYSTEM_SETUP
1777 select SYS_THUMB_BUILD
1781 imply OF_LIBFDT_OVERLAY
1782 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1785 Support for STM32MP SoC family developed by STMicroelectronics,
1786 MPUs based on ARM cortex A core
1787 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1788 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1790 SPL is the unsecure FSBL for the basic boot chain.
1792 config ARCH_ROCKCHIP
1793 bool "Support Rockchip SoCs"
1795 select BINMAN if SPL_OPTEE
1805 select ENABLE_ARM_SOC_BOOT0_HOOK
1808 select SPL_DM if SPL
1809 select SPL_DM_SPI if SPL
1810 select SPL_DM_SPI_FLASH if SPL
1812 select SYS_THUMB_BUILD if !ARM64
1815 imply DEBUG_UART_BOARD_INIT
1816 imply DISTRO_DEFAULTS
1818 imply SARADC_ROCKCHIP
1820 imply SPL_SYS_MALLOC_SIMPLE
1823 imply USB_FUNCTION_FASTBOOT
1825 config ARCH_OCTEONTX
1826 bool "Support OcteonTX SoCs"
1829 select GPIO_EXTRA_HEADER
1833 select BOARD_LATE_INIT
1834 select SYS_CACHE_SHIFT_7
1836 config ARCH_OCTEONTX2
1837 bool "Support OcteonTX2 SoCs"
1840 select GPIO_EXTRA_HEADER
1844 select BOARD_LATE_INIT
1845 select SYS_CACHE_SHIFT_7
1847 config TARGET_THUNDERX_88XX
1848 bool "Support ThunderX 88xx"
1850 select GPIO_EXTRA_HEADER
1853 select SYS_CACHE_SHIFT_7
1856 bool "Support Aspeed SoCs"
1861 config TARGET_DURIAN
1862 bool "Support Phytium Durian Platform"
1864 select GPIO_EXTRA_HEADER
1866 Support for durian platform.
1867 It has 2GB Sdram, uart and pcie.
1869 config TARGET_PRESIDIO_ASIC
1870 bool "Support Cortina Presidio ASIC Platform"
1873 config TARGET_XENGUEST_ARM64
1874 bool "Xen guest ARM64"
1878 select LINUX_KERNEL_IMAGE_HEADER
1883 config ARCH_SUPPORT_TFABOOT
1887 bool "Support for booting from TF-A"
1888 depends on ARCH_SUPPORT_TFABOOT
1891 Some platforms support the setup of secure registers (for instance
1892 for CPU errata handling) or provide secure services like PSCI.
1893 Those services could also be provided by other firmware parts
1894 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
1895 does not need to (and cannot) execute this code.
1896 Enabling this option will make a U-Boot binary that is relying
1897 on other firmware layers to provide secure functionality.
1899 config TI_SECURE_DEVICE
1900 bool "HS Device Type Support"
1901 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1903 If a high secure (HS) device type is being used, this config
1904 must be set. This option impacts various aspects of the
1905 build system (to create signed boot images that can be
1906 authenticated) and the code. See the doc/README.ti-secure
1907 file for further details.
1909 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1910 config ISW_ENTRY_ADDR
1911 hex "Address in memory or XIP address of bootloader entry point"
1912 default 0x402F4000 if AM43XX
1913 default 0x402F0400 if AM33XX
1914 default 0x40301350 if OMAP54XX
1916 After any reset, the boot ROM searches the boot media for a valid
1917 boot image. For non-XIP devices, the ROM then copies the image into
1918 internal memory. For all boot modes, after the ROM processes the
1919 boot image it eventually computes the entry point address depending
1920 on the device type (secure/non-secure), boot media (xip/non-xip) and
1924 source "arch/arm/mach-aspeed/Kconfig"
1926 source "arch/arm/mach-at91/Kconfig"
1928 source "arch/arm/mach-bcm283x/Kconfig"
1930 source "arch/arm/mach-bcmstb/Kconfig"
1932 source "arch/arm/mach-davinci/Kconfig"
1934 source "arch/arm/mach-exynos/Kconfig"
1936 source "arch/arm/mach-highbank/Kconfig"
1938 source "arch/arm/mach-integrator/Kconfig"
1940 source "arch/arm/mach-ipq40xx/Kconfig"
1942 source "arch/arm/mach-k3/Kconfig"
1944 source "arch/arm/mach-keystone/Kconfig"
1946 source "arch/arm/mach-kirkwood/Kconfig"
1948 source "arch/arm/mach-lpc32xx/Kconfig"
1950 source "arch/arm/mach-mvebu/Kconfig"
1952 source "arch/arm/mach-octeontx/Kconfig"
1954 source "arch/arm/mach-octeontx2/Kconfig"
1956 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1958 source "arch/arm/mach-imx/mx2/Kconfig"
1960 source "arch/arm/mach-imx/mx3/Kconfig"
1962 source "arch/arm/mach-imx/mx5/Kconfig"
1964 source "arch/arm/mach-imx/mx6/Kconfig"
1966 source "arch/arm/mach-imx/mx7/Kconfig"
1968 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1970 source "arch/arm/mach-imx/imx8/Kconfig"
1972 source "arch/arm/mach-imx/imx8m/Kconfig"
1974 source "arch/arm/mach-imx/imxrt/Kconfig"
1976 source "arch/arm/mach-imx/mxs/Kconfig"
1978 source "arch/arm/mach-omap2/Kconfig"
1980 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1982 source "arch/arm/mach-orion5x/Kconfig"
1984 source "arch/arm/mach-owl/Kconfig"
1986 source "arch/arm/mach-rmobile/Kconfig"
1988 source "arch/arm/mach-meson/Kconfig"
1990 source "arch/arm/mach-mediatek/Kconfig"
1992 source "arch/arm/mach-qemu/Kconfig"
1994 source "arch/arm/mach-rockchip/Kconfig"
1996 source "arch/arm/mach-s5pc1xx/Kconfig"
1998 source "arch/arm/mach-snapdragon/Kconfig"
2000 source "arch/arm/mach-socfpga/Kconfig"
2002 source "arch/arm/mach-sti/Kconfig"
2004 source "arch/arm/mach-stm32/Kconfig"
2006 source "arch/arm/mach-stm32mp/Kconfig"
2008 source "arch/arm/mach-sunxi/Kconfig"
2010 source "arch/arm/mach-tegra/Kconfig"
2012 source "arch/arm/mach-u8500/Kconfig"
2014 source "arch/arm/mach-uniphier/Kconfig"
2016 source "arch/arm/cpu/armv7/vf610/Kconfig"
2018 source "arch/arm/mach-zynq/Kconfig"
2020 source "arch/arm/mach-zynqmp/Kconfig"
2022 source "arch/arm/mach-versal/Kconfig"
2024 source "arch/arm/mach-zynqmp-r5/Kconfig"
2026 source "arch/arm/cpu/armv7/Kconfig"
2028 source "arch/arm/cpu/armv8/Kconfig"
2030 source "arch/arm/mach-imx/Kconfig"
2032 source "arch/arm/mach-nexell/Kconfig"
2034 source "board/armltd/total_compute/Kconfig"
2036 source "board/bosch/shc/Kconfig"
2037 source "board/bosch/guardian/Kconfig"
2038 source "board/CarMediaLab/flea3/Kconfig"
2039 source "board/Marvell/aspenite/Kconfig"
2040 source "board/Marvell/octeontx/Kconfig"
2041 source "board/Marvell/octeontx2/Kconfig"
2042 source "board/armltd/vexpress64/Kconfig"
2043 source "board/cortina/presidio-asic/Kconfig"
2044 source "board/broadcom/bcm963158/Kconfig"
2045 source "board/broadcom/bcm968360bg/Kconfig"
2046 source "board/broadcom/bcm968580xref/Kconfig"
2047 source "board/broadcom/bcmns3/Kconfig"
2048 source "board/cavium/thunderx/Kconfig"
2049 source "board/eets/pdu001/Kconfig"
2050 source "board/emulation/qemu-arm/Kconfig"
2051 source "board/freescale/ls2080aqds/Kconfig"
2052 source "board/freescale/ls2080ardb/Kconfig"
2053 source "board/freescale/ls1088a/Kconfig"
2054 source "board/freescale/ls1028a/Kconfig"
2055 source "board/freescale/ls1021aqds/Kconfig"
2056 source "board/freescale/ls1043aqds/Kconfig"
2057 source "board/freescale/ls1021atwr/Kconfig"
2058 source "board/freescale/ls1021atsn/Kconfig"
2059 source "board/freescale/ls1021aiot/Kconfig"
2060 source "board/freescale/ls1046aqds/Kconfig"
2061 source "board/freescale/ls1043ardb/Kconfig"
2062 source "board/freescale/ls1046ardb/Kconfig"
2063 source "board/freescale/ls1046afrwy/Kconfig"
2064 source "board/freescale/ls1012aqds/Kconfig"
2065 source "board/freescale/ls1012ardb/Kconfig"
2066 source "board/freescale/ls1012afrdm/Kconfig"
2067 source "board/freescale/lx2160a/Kconfig"
2068 source "board/grinn/chiliboard/Kconfig"
2069 source "board/hisilicon/hikey/Kconfig"
2070 source "board/hisilicon/hikey960/Kconfig"
2071 source "board/hisilicon/poplar/Kconfig"
2072 source "board/isee/igep003x/Kconfig"
2073 source "board/kontron/sl28/Kconfig"
2074 source "board/myir/mys_6ulx/Kconfig"
2075 source "board/seeed/npi_imx6ull/Kconfig"
2076 source "board/socionext/developerbox/Kconfig"
2077 source "board/st/stv0991/Kconfig"
2078 source "board/tcl/sl50/Kconfig"
2079 source "board/toradex/colibri_pxa270/Kconfig"
2080 source "board/variscite/dart_6ul/Kconfig"
2081 source "board/vscom/baltos/Kconfig"
2082 source "board/phytium/durian/Kconfig"
2083 source "board/xen/xenguest_arm64/Kconfig"
2084 source "board/keymile/Kconfig"
2086 source "arch/arm/Kconfig.debug"
2091 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2092 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2093 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64