1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed from
19 almost any 4K aligned address. This logic relies on the relocation
20 information that is embedded in the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
25 default n if ARCH_QEMU
26 default y if POSITION_INDEPENDENT
28 U-Boot typically uses a hard-coded value for the stack pointer
29 before relocation. Enable this option to instead calculate the
30 initial SP at run-time. This is useful to avoid hard-coding addresses
31 into U-Boot, so that it can be loaded and executed at arbitrary
32 addresses and thus avoid using arbitrary addresses at runtime.
34 If this option is enabled, the early stack pointer is set to
35 &_bss_start with a offset value added. The offset is specified by
36 SYS_INIT_SP_BSS_OFFSET.
38 config SYS_INIT_SP_BSS_OFFSET
39 int "Early stack offset from the .bss base address"
40 depends on INIT_SP_RELATIVE
43 This option's value is the offset added to &_bss_start in order to
44 calculate the stack pointer. This offset should be large enough so
45 that the early malloc region, global data (gd), and early stack usage
46 do not overlap any appended DTB.
48 config LINUX_KERNEL_IMAGE_HEADER
51 Place a Linux kernel image header at the start of the U-Boot binary.
52 The format of the header is described in the Linux kernel source at
53 Documentation/arm64/booting.txt. This feature is useful since the
54 image header reports the amount of memory (BSS and similar) that
55 U-Boot needs to use, but which isn't part of the binary.
57 if LINUX_KERNEL_IMAGE_HEADER
58 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
61 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
62 TEXT_OFFSET value written to the Linux kernel image header.
71 ARM GICV3 Interrupt translation service (ITS).
72 Basic support for programming locality specific peripheral
73 interrupts (LPI) configuration tables and enable LPI tables.
74 LPI configuration table can be used by u-boot or Linux.
75 ARM GICV3 has limitation, once the LPI table is enabled, LPI
76 configuration table can not be re-programmed, unless GICV3 reset.
82 config DMA_ADDR_T_64BIT
92 # Used for compatibility with asm files copied from the kernel
93 config ARM_ASM_UNIFIED
97 # Used for compatibility with asm files copied from the kernel
101 config SYS_ICACHE_OFF
102 bool "Do not enable icache"
105 Do not enable instruction cache in U-Boot.
107 config SPL_SYS_ICACHE_OFF
108 bool "Do not enable icache in SPL"
110 default SYS_ICACHE_OFF
112 Do not enable instruction cache in SPL.
114 config SYS_DCACHE_OFF
115 bool "Do not enable dcache"
118 Do not enable data cache in U-Boot.
120 config SPL_SYS_DCACHE_OFF
121 bool "Do not enable dcache in SPL"
123 default SYS_DCACHE_OFF
125 Do not enable data cache in SPL.
127 config SYS_ARM_CACHE_CP15
128 bool "CP15 based cache enabling support"
130 Select this if your processor suports enabling caches by using
134 bool "MMU-based Paged Memory Management Support"
135 select SYS_ARM_CACHE_CP15
137 Select if you want MMU-based virtualised addressing space
138 support via paged memory management.
141 bool 'Use the ARM v7 PMSA Compliant MPU'
143 Some ARM systems without an MMU have instead a Memory Protection
144 Unit (MPU) that defines the type and permissions for regions of
146 If your CPU has an MPU then you should choose 'y' here unless you
147 know that you do not want to use the MPU.
149 # If set, the workarounds for these ARM errata are applied early during U-Boot
150 # startup. Note that in general these options force the workarounds to be
151 # applied; no CPU-type/version detection exists, unlike the similar options in
152 # the Linux kernel. Do not set these options unless they apply! Also note that
153 # the following can be machine-specific errata. These do have ability to
154 # provide rudimentary version and machine-specific checks, but expect no
156 # CONFIG_ARM_ERRATA_430973
157 # CONFIG_ARM_ERRATA_454179
158 # CONFIG_ARM_ERRATA_621766
159 # CONFIG_ARM_ERRATA_798870
160 # CONFIG_ARM_ERRATA_801819
161 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
162 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
164 config ARM_ERRATA_430973
167 config ARM_ERRATA_454179
170 config ARM_ERRATA_621766
173 config ARM_ERRATA_716044
176 config ARM_ERRATA_725233
179 config ARM_ERRATA_742230
182 config ARM_ERRATA_743622
185 config ARM_ERRATA_751472
188 config ARM_ERRATA_761320
191 config ARM_ERRATA_773022
194 config ARM_ERRATA_774769
197 config ARM_ERRATA_794072
200 config ARM_ERRATA_798870
203 config ARM_ERRATA_801819
206 config ARM_ERRATA_826974
209 config ARM_ERRATA_828024
212 config ARM_ERRATA_829520
215 config ARM_ERRATA_833069
218 config ARM_ERRATA_833471
221 config ARM_ERRATA_845369
224 config ARM_ERRATA_852421
227 config ARM_ERRATA_852423
230 config ARM_ERRATA_855873
233 config ARM_CORTEX_A8_CVE_2017_5715
236 config ARM_CORTEX_A15_CVE_2017_5715
241 select SYS_CACHE_SHIFT_5
246 select SYS_CACHE_SHIFT_5
251 select SYS_CACHE_SHIFT_5
256 select SYS_CACHE_SHIFT_5
261 select SYS_CACHE_SHIFT_5
267 select SYS_CACHE_SHIFT_5
274 select SYS_CACHE_SHIFT_6
281 select SYS_CACHE_SHIFT_5
282 select SYS_THUMB_BUILD
288 select SYS_ARM_CACHE_CP15
290 select SYS_CACHE_SHIFT_6
294 select SYS_CACHE_SHIFT_5
299 select SYS_CACHE_SHIFT_5
303 default "arm720t" if CPU_ARM720T
304 default "arm920t" if CPU_ARM920T
305 default "arm926ejs" if CPU_ARM926EJS
306 default "arm946es" if CPU_ARM946ES
307 default "arm1136" if CPU_ARM1136
308 default "arm1176" if CPU_ARM1176
309 default "armv7" if CPU_V7A
310 default "armv7" if CPU_V7R
311 default "armv7m" if CPU_V7M
312 default "pxa" if CPU_PXA
313 default "sa1100" if CPU_SA1100
314 default "armv8" if ARM64
318 default 4 if CPU_ARM720T
319 default 4 if CPU_ARM920T
320 default 5 if CPU_ARM926EJS
321 default 5 if CPU_ARM946ES
322 default 6 if CPU_ARM1136
323 default 6 if CPU_ARM1176
328 default 4 if CPU_SA1100
331 config SYS_CACHE_SHIFT_5
334 config SYS_CACHE_SHIFT_6
337 config SYS_CACHE_SHIFT_7
340 config SYS_CACHELINE_SIZE
342 default 128 if SYS_CACHE_SHIFT_7
343 default 64 if SYS_CACHE_SHIFT_6
344 default 32 if SYS_CACHE_SHIFT_5
347 prompt "Select the ARM data write cache policy"
348 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
349 TARGET_BCMNSP || CPU_PXA || RZA1
350 default SYS_ARM_CACHE_WRITEBACK
352 config SYS_ARM_CACHE_WRITEBACK
353 bool "Write-back (WB)"
355 A write updates the cache only and marks the cache line as dirty.
356 External memory is updated only when the line is evicted or explicitly
359 config SYS_ARM_CACHE_WRITETHROUGH
360 bool "Write-through (WT)"
362 A write updates both the cache and the external memory system.
363 This does not mark the cache line as dirty.
365 config SYS_ARM_CACHE_WRITEALLOC
366 bool "Write allocation (WA)"
368 A cache line is allocated on a write miss. This means that executing a
369 store instruction on the processor might cause a burst read to occur.
370 There is a linefill to obtain the data for the cache line, before the
375 bool "Enable ARCH_CPU_INIT"
377 Some architectures require a call to arch_cpu_init().
378 Say Y here to enable it
380 config SYS_ARCH_TIMER
381 bool "ARM Generic Timer support"
382 depends on CPU_V7A || ARM64
385 The ARM Generic Timer (aka arch-timer) provides an architected
386 interface to a timer source on an SoC.
387 It is mandatory for ARMv8 implementation and widely available
391 bool "Support for ARM SMC Calling Convention (SMCCC)"
392 depends on CPU_V7A || ARM64
395 Say Y here if you want to enable ARM SMC Calling Convention.
396 This should be enabled if U-Boot needs to communicate with system
397 firmware (for example, PSCI) according to SMCCC.
400 bool "support boot from semihosting"
402 In emulated environments, semihosting is a way for
403 the hosted environment to call out to the emulator to
404 retrieve files from the host machine.
406 config SYS_THUMB_BUILD
407 bool "Build U-Boot using the Thumb instruction set"
410 Use this flag to build U-Boot using the Thumb instruction set for
411 ARM architectures. Thumb instruction set provides better code
412 density. For ARM architectures that support Thumb2 this flag will
413 result in Thumb2 code generated by GCC.
415 config SPL_SYS_THUMB_BUILD
416 bool "Build SPL using the Thumb instruction set"
417 default y if SYS_THUMB_BUILD
418 depends on !ARM64 && SPL
420 Use this flag to build SPL using the Thumb instruction set for
421 ARM architectures. Thumb instruction set provides better code
422 density. For ARM architectures that support Thumb2 this flag will
423 result in Thumb2 code generated by GCC.
425 config TPL_SYS_THUMB_BUILD
426 bool "Build TPL using the Thumb instruction set"
427 default y if SYS_THUMB_BUILD
428 depends on TPL && !ARM64
430 Use this flag to build TPL using the Thumb instruction set for
431 ARM architectures. Thumb instruction set provides better code
432 density. For ARM architectures that support Thumb2 this flag will
433 result in Thumb2 code generated by GCC.
436 config SYS_L2CACHE_OFF
439 If SoC does not support L2CACHE or one does not want to enable
440 L2CACHE, choose this option.
442 config ENABLE_ARM_SOC_BOOT0_HOOK
443 bool "prepare BOOT0 header"
445 If the SoC's BOOT0 requires a header area filled with (magic)
446 values, then choose this option, and create a file included as
447 <asm/arch/boot0.h> which contains the required assembler code.
449 config ARM_CORTEX_CPU_IS_UP
453 config USE_ARCH_MEMCPY
454 bool "Use an assembly optimized implementation of memcpy"
458 Enable the generation of an optimized version of memcpy.
459 Such an implementation may be faster under some conditions
460 but may increase the binary size.
462 config SPL_USE_ARCH_MEMCPY
463 bool "Use an assembly optimized implementation of memcpy for SPL"
464 default y if USE_ARCH_MEMCPY
465 depends on !ARM64 && SPL
467 Enable the generation of an optimized version of memcpy.
468 Such an implementation may be faster under some conditions
469 but may increase the binary size.
471 config TPL_USE_ARCH_MEMCPY
472 bool "Use an assembly optimized implementation of memcpy for TPL"
473 default y if USE_ARCH_MEMCPY
474 depends on !ARM64 && TPL
476 Enable the generation of an optimized version of memcpy.
477 Such an implementation may be faster under some conditions
478 but may increase the binary size.
480 config USE_ARCH_MEMSET
481 bool "Use an assembly optimized implementation of memset"
485 Enable the generation of an optimized version of memset.
486 Such an implementation may be faster under some conditions
487 but may increase the binary size.
489 config SPL_USE_ARCH_MEMSET
490 bool "Use an assembly optimized implementation of memset for SPL"
491 default y if USE_ARCH_MEMSET
492 depends on !ARM64 && SPL
494 Enable the generation of an optimized version of memset.
495 Such an implementation may be faster under some conditions
496 but may increase the binary size.
498 config TPL_USE_ARCH_MEMSET
499 bool "Use an assembly optimized implementation of memset for TPL"
500 default y if USE_ARCH_MEMSET
501 depends on !ARM64 && TPL
503 Enable the generation of an optimized version of memset.
504 Such an implementation may be faster under some conditions
505 but may increase the binary size.
507 config ARM64_SUPPORT_AARCH32
508 bool "ARM64 system support AArch32 execution state"
510 default y if !TARGET_THUNDERX_88XX
512 This ARM64 system supports AArch32 execution state.
515 prompt "Target select"
520 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
521 select SPL_SEPARATE_BSS if SPL
523 config TARGET_EDB93XX
524 bool "Support edb93xx"
528 config TARGET_ASPENITE
529 bool "Support aspenite"
533 bool "Support gplugd"
539 select SPL_DM_SPI if SPL
542 Support for TI's DaVinci platform.
545 bool "Marvell Kirkwood"
546 select ARCH_MISC_INIT
547 select BOARD_EARLY_INIT_F
551 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
557 select SPL_DM_SPI if SPL
558 select SPL_DM_SPI_FLASH if SPL
573 config TARGET_SPEAR300
574 bool "Support spear300"
575 select BOARD_EARLY_INIT_F
580 config TARGET_SPEAR310
581 bool "Support spear310"
582 select BOARD_EARLY_INIT_F
587 config TARGET_SPEAR320
588 bool "Support spear320"
589 select BOARD_EARLY_INIT_F
594 config TARGET_SPEAR600
595 bool "Support spear600"
596 select BOARD_EARLY_INIT_F
601 config TARGET_STV0991
602 bool "Support stv0991"
615 select BOARD_LATE_INIT
624 config TARGET_MX35PDK
625 bool "Support mx35pdk"
626 select BOARD_LATE_INIT
630 bool "Broadcom BCM283X family"
636 select SERIAL_SEARCH_ALL
641 bool "Broadcom BCM63158 family"
647 bool "Broadcom BCM68360 family"
653 bool "Broadcom BCM6858 family"
658 config TARGET_VEXPRESS_CA15_TC2
659 bool "Support vexpress_ca15_tc2"
661 select CPU_V7_HAS_NONSEC
662 select CPU_V7_HAS_VIRT
666 bool "Broadcom BCM7XXX family"
670 select OF_PRIOR_STAGE
673 This enables support for Broadcom ARM-based set-top box
674 chipsets, including the 7445 family of chips.
676 config TARGET_VEXPRESS_CA5X2
677 bool "Support vexpress_ca5x2"
681 config TARGET_VEXPRESS_CA9X4
682 bool "Support vexpress_ca9x4"
686 config TARGET_BCM23550_W1D
687 bool "Support bcm23550_w1d"
692 config TARGET_BCM28155_AP
693 bool "Support bcm28155_ap"
698 config TARGET_BCMCYGNUS
699 bool "Support bcmcygnus"
702 imply BCM_SF2_ETH_GMAC
710 bool "Support bcmnsp"
714 bool "Support Broadcom Northstar2"
717 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
718 ARMv8 Cortex-A57 processors targeting a broad range of networking
722 bool "Support Broadcom NS3"
724 select BOARD_LATE_INIT
726 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
727 ARMv8 Cortex-A72 processors targeting a broad range of networking
731 bool "Samsung EXYNOS"
740 imply SYS_THUMB_BUILD
745 bool "Samsung S5PC1XX"
754 bool "Calxeda Highbank"
758 config ARCH_INTEGRATOR
759 bool "ARM Ltd. Integrator family"
766 bool "Qualcomm IPQ40xx SoCs"
784 select SYS_ARCH_TIMER
785 select SYS_THUMB_BUILD
791 bool "Texas Instruments' K3 Architecture"
796 config ARCH_OMAP2PLUS
799 select SPL_BOARD_INIT if SPL
800 select SPL_STACK_R if SPL
802 imply TI_SYSC if DM && OF_CONTROL
807 imply DISTRO_DEFAULTS
810 Support for the Meson SoC family developed by Amlogic Inc.,
811 targeted at media players and tablet computers. We currently
812 support the S905 (GXBaby) 64-bit SoC.
819 select SPL_LIBCOMMON_SUPPORT if SPL
820 select SPL_LIBGENERIC_SUPPORT if SPL
821 select SPL_OF_CONTROL if SPL
824 Support for the MediaTek SoCs family developed by MediaTek Inc.
825 Please refer to doc/README.mediatek for more information.
828 bool "NXP LPC32xx platform"
838 bool "NXP i.MX8 platform"
842 select ENABLE_ARM_SOC_BOOT0_HOOK
845 bool "NXP i.MX8M platform"
852 bool "NXP i.MXRT platform"
860 bool "NXP i.MX23 family"
871 bool "NXP i.MX28 family"
877 bool "NXP i.MX31 family"
883 select ROM_UNIFIED_SECTIONS
885 imply SYS_THUMB_BUILD
889 select ARCH_MISC_INIT
891 select SYS_FSL_HAS_SEC if IMX_HAB
892 select SYS_FSL_SEC_COMPAT_4
893 select SYS_FSL_SEC_LE
894 imply BOARD_EARLY_INIT_F
896 imply SYS_THUMB_BUILD
901 select SYS_FSL_HAS_SEC
902 select SYS_FSL_SEC_COMPAT_4
903 select SYS_FSL_SEC_LE
905 imply SYS_THUMB_BUILD
909 default "arch/arm/mach-omap2/u-boot-spl.lds"
914 select BOARD_EARLY_INIT_F
919 bool "Nexell S5P4418/S5P6818 SoC"
920 select ENABLE_ARM_SOC_BOOT0_HOOK
924 bool "Actions Semi OWL SoCs"
932 select SYS_RELOC_GD_ENV_ADDR
936 bool "QEMU Virtual Platform"
947 bool "Renesas ARM SoCs"
950 imply BOARD_EARLY_INIT_F
953 imply SYS_THUMB_BUILD
954 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
956 config TARGET_S32V234EVB
957 bool "Support s32v234evb"
959 select SYS_FSL_ERRATUM_ESDHC111
961 config ARCH_SNAPDRAGON
962 bool "Qualcomm Snapdragon SoCs"
975 bool "Altera SOCFPGA family"
976 select ARCH_EARLY_INIT_R
977 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
978 select ARM64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
979 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
982 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
984 select SPL_DM_RESET if DM_RESET
986 select SPL_LIBCOMMON_SUPPORT
987 select SPL_LIBGENERIC_SUPPORT
988 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
989 select SPL_OF_CONTROL
990 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
991 select SPL_SERIAL_SUPPORT
993 select SPL_WATCHDOG_SUPPORT
996 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
998 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
999 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
1009 imply SPL_DM_SPI_FLASH
1010 imply SPL_LIBDISK_SUPPORT
1011 imply SPL_MMC_SUPPORT
1012 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1013 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1014 imply SPL_SPI_FLASH_SUPPORT
1015 imply SPL_SPI_SUPPORT
1019 bool "Support sunxi (Allwinner) SoCs"
1022 select CMD_MMC if MMC
1023 select CMD_USB if DISTRO_DEFAULTS
1029 select DM_MMC if MMC
1030 select DM_SCSI if SCSI
1032 select DM_USB if DISTRO_DEFAULTS
1033 select OF_BOARD_SETUP
1036 select SPECIFY_CONSOLE_INDEX
1037 select SPL_STACK_R if SPL
1038 select SPL_SYS_MALLOC_SIMPLE if SPL
1039 select SPL_SYS_THUMB_BUILD if !ARM64
1042 select SYS_THUMB_BUILD if !ARM64
1043 select USB if DISTRO_DEFAULTS
1044 select USB_KEYBOARD if DISTRO_DEFAULTS
1045 select USB_STORAGE if DISTRO_DEFAULTS
1046 select SPL_USE_TINY_PRINTF
1048 select SYS_RELOC_GD_ENV_ADDR
1049 imply BOARD_LATE_INIT
1052 imply CMD_UBI if MTD_RAW_NAND
1053 imply DISTRO_DEFAULTS
1056 imply OF_LIBFDT_OVERLAY
1057 imply PRE_CONSOLE_BUFFER
1058 imply SPL_GPIO_SUPPORT
1059 imply SPL_LIBCOMMON_SUPPORT
1060 imply SPL_LIBGENERIC_SUPPORT
1061 imply SPL_MMC_SUPPORT if MMC
1062 imply SPL_POWER_SUPPORT
1063 imply SPL_SERIAL_SUPPORT
1067 bool "ST-Ericsson U8500 Series"
1071 select DM_MMC if MMC
1073 select DM_USB if USB
1077 imply ARM_PL180_MMCI
1079 imply NOMADIK_MTU_TIMER
1082 imply SYSRESET_SYSCON
1085 bool "Support Xilinx Versal Platform"
1089 select DM_ETH if NET
1090 select DM_MMC if MMC
1093 imply BOARD_LATE_INIT
1094 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1097 bool "Freescale Vybrid"
1099 select SYS_FSL_ERRATUM_ESDHC111
1104 bool "Xilinx Zynq based platform"
1109 select DM_ETH if NET
1110 select DM_MMC if MMC
1114 select DM_USB if USB
1117 select SPL_BOARD_INIT if SPL
1118 select SPL_CLK if SPL
1119 select SPL_DM if SPL
1120 select SPL_DM_SPI if SPL
1121 select SPL_DM_SPI_FLASH if SPL
1122 select SPL_OF_CONTROL if SPL
1123 select SPL_SEPARATE_BSS if SPL
1125 imply ARCH_EARLY_INIT_R
1126 imply BOARD_LATE_INIT
1130 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1133 config ARCH_ZYNQMP_R5
1134 bool "Xilinx ZynqMP R5 based platform"
1138 select DM_ETH if NET
1139 select DM_MMC if MMC
1146 bool "Xilinx ZynqMP based platform"
1150 select DM_ETH if NET
1152 select DM_MMC if MMC
1154 select DM_SPI if SPI
1155 select DM_SPI_FLASH if DM_SPI
1156 select DM_USB if USB
1159 select SPL_BOARD_INIT if SPL
1160 select SPL_CLK if SPL
1161 select SPL_DM if SPL
1162 select SPL_DM_SPI if SPI && SPL_DM
1163 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1164 select SPL_DM_MAILBOX if SPL
1165 select SPL_FIRMWARE if SPL
1166 select SPL_SEPARATE_BSS if SPL
1169 imply BOARD_LATE_INIT
1171 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1178 imply DISTRO_DEFAULTS
1181 config TARGET_VEXPRESS64_AEMV8A
1182 bool "Support vexpress_aemv8a"
1186 config TARGET_VEXPRESS64_BASE_FVP
1187 bool "Support Versatile Express ARMv8a FVP BASE model"
1192 config TARGET_VEXPRESS64_JUNO
1193 bool "Support Versatile Express Juno Development Platform"
1208 config TARGET_TOTAL_COMPUTE
1209 bool "Support Total Compute Platform"
1217 config TARGET_LS2080A_EMU
1218 bool "Support ls2080a_emu"
1221 select ARMV8_MULTIENTRY
1222 select FSL_DDR_SYNC_REFRESH
1224 Support for Freescale LS2080A_EMU platform.
1225 The LS2080A Development System (EMULATOR) is a pre-silicon
1226 development platform that supports the QorIQ LS2080A
1227 Layerscape Architecture processor.
1229 config TARGET_LS2080A_SIMU
1230 bool "Support ls2080a_simu"
1233 select ARMV8_MULTIENTRY
1234 select BOARD_LATE_INIT
1236 Support for Freescale LS2080A_SIMU platform.
1237 The LS2080A Development System (QDS) is a pre silicon
1238 development platform that supports the QorIQ LS2080A
1239 Layerscape Architecture processor.
1241 config TARGET_LS1088AQDS
1242 bool "Support ls1088aqds"
1245 select ARMV8_MULTIENTRY
1246 select ARCH_SUPPORT_TFABOOT
1247 select BOARD_LATE_INIT
1249 select FSL_DDR_INTERACTIVE if !SD_BOOT
1251 Support for NXP LS1088AQDS platform.
1252 The LS1088A Development System (QDS) is a high-performance
1253 development platform that supports the QorIQ LS1088A
1254 Layerscape Architecture processor.
1256 config TARGET_LS2080AQDS
1257 bool "Support ls2080aqds"
1260 select ARMV8_MULTIENTRY
1261 select ARCH_SUPPORT_TFABOOT
1262 select BOARD_LATE_INIT
1267 select FSL_DDR_INTERACTIVE if !SPL
1269 Support for Freescale LS2080AQDS platform.
1270 The LS2080A Development System (QDS) is a high-performance
1271 development platform that supports the QorIQ LS2080A
1272 Layerscape Architecture processor.
1274 config TARGET_LS2080ARDB
1275 bool "Support ls2080ardb"
1278 select ARMV8_MULTIENTRY
1279 select ARCH_SUPPORT_TFABOOT
1280 select BOARD_LATE_INIT
1283 select FSL_DDR_INTERACTIVE if !SPL
1287 Support for Freescale LS2080ARDB platform.
1288 The LS2080A Reference design board (RDB) is a high-performance
1289 development platform that supports the QorIQ LS2080A
1290 Layerscape Architecture processor.
1292 config TARGET_LS2081ARDB
1293 bool "Support ls2081ardb"
1296 select ARMV8_MULTIENTRY
1297 select BOARD_LATE_INIT
1300 Support for Freescale LS2081ARDB platform.
1301 The LS2081A Reference design board (RDB) is a high-performance
1302 development platform that supports the QorIQ LS2081A/LS2041A
1303 Layerscape Architecture processor.
1305 config TARGET_LX2160ARDB
1306 bool "Support lx2160ardb"
1309 select ARMV8_MULTIENTRY
1310 select ARCH_SUPPORT_TFABOOT
1311 select BOARD_LATE_INIT
1313 Support for NXP LX2160ARDB platform.
1314 The lx2160ardb (LX2160A Reference design board (RDB)
1315 is a high-performance development platform that supports the
1316 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1318 config TARGET_LX2160AQDS
1319 bool "Support lx2160aqds"
1322 select ARMV8_MULTIENTRY
1323 select ARCH_SUPPORT_TFABOOT
1324 select BOARD_LATE_INIT
1326 Support for NXP LX2160AQDS platform.
1327 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1328 is a high-performance development platform that supports the
1329 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1331 config TARGET_LX2162AQDS
1332 bool "Support lx2162aqds"
1334 select ARCH_MISC_INIT
1336 select ARMV8_MULTIENTRY
1337 select ARCH_SUPPORT_TFABOOT
1338 select BOARD_LATE_INIT
1340 Support for NXP LX2162AQDS platform.
1341 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1344 bool "Support HiKey 96boards Consumer Edition Platform"
1351 select SPECIFY_CONSOLE_INDEX
1354 Support for HiKey 96boards platform. It features a HI6220
1355 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1357 config TARGET_HIKEY960
1358 bool "Support HiKey960 96boards Consumer Edition Platform"
1366 Support for HiKey960 96boards platform. It features a HI3660
1367 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1369 config TARGET_POPLAR
1370 bool "Support Poplar 96boards Enterprise Edition Platform"
1379 Support for Poplar 96boards EE platform. It features a HI3798cv200
1380 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1381 making it capable of running any commercial set-top solution based on
1384 config TARGET_LS1012AQDS
1385 bool "Support ls1012aqds"
1388 select ARCH_SUPPORT_TFABOOT
1389 select BOARD_LATE_INIT
1391 Support for Freescale LS1012AQDS platform.
1392 The LS1012A Development System (QDS) is a high-performance
1393 development platform that supports the QorIQ LS1012A
1394 Layerscape Architecture processor.
1396 config TARGET_LS1012ARDB
1397 bool "Support ls1012ardb"
1400 select ARCH_SUPPORT_TFABOOT
1401 select BOARD_LATE_INIT
1405 Support for Freescale LS1012ARDB platform.
1406 The LS1012A Reference design board (RDB) is a high-performance
1407 development platform that supports the QorIQ LS1012A
1408 Layerscape Architecture processor.
1410 config TARGET_LS1012A2G5RDB
1411 bool "Support ls1012a2g5rdb"
1414 select ARCH_SUPPORT_TFABOOT
1415 select BOARD_LATE_INIT
1418 Support for Freescale LS1012A2G5RDB platform.
1419 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1420 development platform that supports the QorIQ LS1012A
1421 Layerscape Architecture processor.
1423 config TARGET_LS1012AFRWY
1424 bool "Support ls1012afrwy"
1427 select ARCH_SUPPORT_TFABOOT
1428 select BOARD_LATE_INIT
1432 Support for Freescale LS1012AFRWY platform.
1433 The LS1012A FRWY board (FRWY) is a high-performance
1434 development platform that supports the QorIQ LS1012A
1435 Layerscape Architecture processor.
1437 config TARGET_LS1012AFRDM
1438 bool "Support ls1012afrdm"
1441 select ARCH_SUPPORT_TFABOOT
1443 Support for Freescale LS1012AFRDM platform.
1444 The LS1012A Freedom board (FRDM) is a high-performance
1445 development platform that supports the QorIQ LS1012A
1446 Layerscape Architecture processor.
1448 config TARGET_LS1028AQDS
1449 bool "Support ls1028aqds"
1452 select ARMV8_MULTIENTRY
1453 select ARCH_SUPPORT_TFABOOT
1454 select BOARD_LATE_INIT
1456 Support for Freescale LS1028AQDS platform
1457 The LS1028A Development System (QDS) is a high-performance
1458 development platform that supports the QorIQ LS1028A
1459 Layerscape Architecture processor.
1461 config TARGET_LS1028ARDB
1462 bool "Support ls1028ardb"
1465 select ARMV8_MULTIENTRY
1466 select ARCH_SUPPORT_TFABOOT
1467 select BOARD_LATE_INIT
1469 Support for Freescale LS1028ARDB platform
1470 The LS1028A Development System (RDB) is a high-performance
1471 development platform that supports the QorIQ LS1028A
1472 Layerscape Architecture processor.
1474 config TARGET_LS1088ARDB
1475 bool "Support ls1088ardb"
1478 select ARMV8_MULTIENTRY
1479 select ARCH_SUPPORT_TFABOOT
1480 select BOARD_LATE_INIT
1482 select FSL_DDR_INTERACTIVE if !SD_BOOT
1484 Support for NXP LS1088ARDB platform.
1485 The LS1088A Reference design board (RDB) is a high-performance
1486 development platform that supports the QorIQ LS1088A
1487 Layerscape Architecture processor.
1489 config TARGET_LS1021AQDS
1490 bool "Support ls1021aqds"
1492 select ARCH_SUPPORT_PSCI
1493 select BOARD_EARLY_INIT_F
1494 select BOARD_LATE_INIT
1496 select CPU_V7_HAS_NONSEC
1497 select CPU_V7_HAS_VIRT
1498 select LS1_DEEP_SLEEP
1501 select FSL_DDR_INTERACTIVE
1502 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1503 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1506 config TARGET_LS1021ATWR
1507 bool "Support ls1021atwr"
1509 select ARCH_SUPPORT_PSCI
1510 select BOARD_EARLY_INIT_F
1511 select BOARD_LATE_INIT
1513 select CPU_V7_HAS_NONSEC
1514 select CPU_V7_HAS_VIRT
1515 select LS1_DEEP_SLEEP
1517 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1520 config TARGET_LS1021ATSN
1521 bool "Support ls1021atsn"
1523 select ARCH_SUPPORT_PSCI
1524 select BOARD_EARLY_INIT_F
1525 select BOARD_LATE_INIT
1527 select CPU_V7_HAS_NONSEC
1528 select CPU_V7_HAS_VIRT
1529 select LS1_DEEP_SLEEP
1533 config TARGET_LS1021AIOT
1534 bool "Support ls1021aiot"
1536 select ARCH_SUPPORT_PSCI
1537 select BOARD_LATE_INIT
1539 select CPU_V7_HAS_NONSEC
1540 select CPU_V7_HAS_VIRT
1542 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1545 Support for Freescale LS1021AIOT platform.
1546 The LS1021A Freescale board (IOT) is a high-performance
1547 development platform that supports the QorIQ LS1021A
1548 Layerscape Architecture processor.
1550 config TARGET_LS1043AQDS
1551 bool "Support ls1043aqds"
1554 select ARMV8_MULTIENTRY
1555 select ARCH_SUPPORT_TFABOOT
1556 select BOARD_EARLY_INIT_F
1557 select BOARD_LATE_INIT
1559 select FSL_DDR_INTERACTIVE if !SPL
1560 select FSL_DSPI if !SPL_NO_DSPI
1561 select DM_SPI_FLASH if FSL_DSPI
1565 Support for Freescale LS1043AQDS platform.
1567 config TARGET_LS1043ARDB
1568 bool "Support ls1043ardb"
1571 select ARMV8_MULTIENTRY
1572 select ARCH_SUPPORT_TFABOOT
1573 select BOARD_EARLY_INIT_F
1574 select BOARD_LATE_INIT
1576 select FSL_DSPI if !SPL_NO_DSPI
1577 select DM_SPI_FLASH if FSL_DSPI
1579 Support for Freescale LS1043ARDB platform.
1581 config TARGET_LS1046AQDS
1582 bool "Support ls1046aqds"
1585 select ARMV8_MULTIENTRY
1586 select ARCH_SUPPORT_TFABOOT
1587 select BOARD_EARLY_INIT_F
1588 select BOARD_LATE_INIT
1589 select DM_SPI_FLASH if DM_SPI
1591 select FSL_DDR_BIST if !SPL
1592 select FSL_DDR_INTERACTIVE if !SPL
1593 select FSL_DDR_INTERACTIVE if !SPL
1596 Support for Freescale LS1046AQDS platform.
1597 The LS1046A Development System (QDS) is a high-performance
1598 development platform that supports the QorIQ LS1046A
1599 Layerscape Architecture processor.
1601 config TARGET_LS1046ARDB
1602 bool "Support ls1046ardb"
1605 select ARMV8_MULTIENTRY
1606 select ARCH_SUPPORT_TFABOOT
1607 select BOARD_EARLY_INIT_F
1608 select BOARD_LATE_INIT
1609 select DM_SPI_FLASH if DM_SPI
1610 select POWER_MC34VR500
1613 select FSL_DDR_INTERACTIVE if !SPL
1616 Support for Freescale LS1046ARDB platform.
1617 The LS1046A Reference Design Board (RDB) is a high-performance
1618 development platform that supports the QorIQ LS1046A
1619 Layerscape Architecture processor.
1621 config TARGET_LS1046AFRWY
1622 bool "Support ls1046afrwy"
1625 select ARMV8_MULTIENTRY
1626 select ARCH_SUPPORT_TFABOOT
1627 select BOARD_EARLY_INIT_F
1628 select BOARD_LATE_INIT
1629 select DM_SPI_FLASH if DM_SPI
1632 Support for Freescale LS1046AFRWY platform.
1633 The LS1046A Freeway Board (FRWY) is a high-performance
1634 development platform that supports the QorIQ LS1046A
1635 Layerscape Architecture processor.
1641 select ARMV8_MULTIENTRY
1645 Support for Kontron SMARC-sAL28 board.
1647 config TARGET_COLIBRI_PXA270
1648 bool "Support colibri_pxa270"
1651 config ARCH_UNIPHIER
1652 bool "Socionext UniPhier SoCs"
1653 select BOARD_LATE_INIT
1663 select OF_BOARD_SETUP
1667 select SPL_BOARD_INIT if SPL
1668 select SPL_DM if SPL
1669 select SPL_LIBCOMMON_SUPPORT if SPL
1670 select SPL_LIBGENERIC_SUPPORT if SPL
1671 select SPL_OF_CONTROL if SPL
1672 select SPL_PINCTRL if SPL
1675 imply DISTRO_DEFAULTS
1678 Support for UniPhier SoC family developed by Socionext Inc.
1679 (formerly, System LSI Business Division of Panasonic Corporation)
1682 bool "Support STMicroelectronics STM32 MCU with cortex M"
1689 bool "Support STMicrolectronics SoCs"
1698 Support for STMicroelectronics STiH407/10 SoC family.
1699 This SoC is used on Linaro 96Board STiH410-B2260
1702 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1703 select ARCH_MISC_INIT
1704 select ARCH_SUPPORT_TFABOOT
1705 select BOARD_LATE_INIT
1714 select OF_SYSTEM_SETUP
1720 select SYS_THUMB_BUILD
1724 imply OF_LIBFDT_OVERLAY
1725 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1728 Support for STM32MP SoC family developed by STMicroelectronics,
1729 MPUs based on ARM cortex A core
1730 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1731 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1733 SPL is the unsecure FSBL for the basic boot chain.
1735 config ARCH_ROCKCHIP
1736 bool "Support Rockchip SoCs"
1738 select BINMAN if SPL_OPTEE
1748 select DM_USB if USB
1749 select ENABLE_ARM_SOC_BOOT0_HOOK
1752 select SPL_DM if SPL
1753 select SPL_DM_SPI if SPL
1754 select SPL_DM_SPI_FLASH if SPL
1756 select SYS_THUMB_BUILD if !ARM64
1759 imply DEBUG_UART_BOARD_INIT
1760 imply DISTRO_DEFAULTS
1762 imply SARADC_ROCKCHIP
1764 imply SPL_SYS_MALLOC_SIMPLE
1767 imply USB_FUNCTION_FASTBOOT
1769 config ARCH_OCTEONTX
1770 bool "Support OcteonTX SoCs"
1776 select BOARD_LATE_INIT
1777 select SYS_CACHE_SHIFT_7
1779 config ARCH_OCTEONTX2
1780 bool "Support OcteonTX2 SoCs"
1786 select BOARD_LATE_INIT
1787 select SYS_CACHE_SHIFT_7
1789 config TARGET_THUNDERX_88XX
1790 bool "Support ThunderX 88xx"
1794 select SYS_CACHE_SHIFT_7
1797 bool "Support Aspeed SoCs"
1802 config TARGET_DURIAN
1803 bool "Support Phytium Durian Platform"
1806 Support for durian platform.
1807 It has 2GB Sdram, uart and pcie.
1809 config TARGET_PRESIDIO_ASIC
1810 bool "Support Cortina Presidio ASIC Platform"
1813 config TARGET_XENGUEST_ARM64
1814 bool "Xen guest ARM64"
1818 select LINUX_KERNEL_IMAGE_HEADER
1823 config ARCH_SUPPORT_TFABOOT
1827 bool "Support for booting from TF-A"
1828 depends on ARCH_SUPPORT_TFABOOT
1831 Some platforms support the setup of secure registers (for instance
1832 for CPU errata handling) or provide secure services like PSCI.
1833 Those services could also be provided by other firmware parts
1834 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
1835 does not need to (and cannot) execute this code.
1836 Enabling this option will make a U-Boot binary that is relying
1837 on other firmware layers to provide secure functionality.
1839 config TI_SECURE_DEVICE
1840 bool "HS Device Type Support"
1841 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1843 If a high secure (HS) device type is being used, this config
1844 must be set. This option impacts various aspects of the
1845 build system (to create signed boot images that can be
1846 authenticated) and the code. See the doc/README.ti-secure
1847 file for further details.
1849 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1850 config ISW_ENTRY_ADDR
1851 hex "Address in memory or XIP address of bootloader entry point"
1852 default 0x402F4000 if AM43XX
1853 default 0x402F0400 if AM33XX
1854 default 0x40301350 if OMAP54XX
1856 After any reset, the boot ROM searches the boot media for a valid
1857 boot image. For non-XIP devices, the ROM then copies the image into
1858 internal memory. For all boot modes, after the ROM processes the
1859 boot image it eventually computes the entry point address depending
1860 on the device type (secure/non-secure), boot media (xip/non-xip) and
1864 source "arch/arm/mach-aspeed/Kconfig"
1866 source "arch/arm/mach-at91/Kconfig"
1868 source "arch/arm/mach-bcm283x/Kconfig"
1870 source "arch/arm/mach-bcmstb/Kconfig"
1872 source "arch/arm/mach-davinci/Kconfig"
1874 source "arch/arm/mach-exynos/Kconfig"
1876 source "arch/arm/mach-highbank/Kconfig"
1878 source "arch/arm/mach-integrator/Kconfig"
1880 source "arch/arm/mach-ipq40xx/Kconfig"
1882 source "arch/arm/mach-k3/Kconfig"
1884 source "arch/arm/mach-keystone/Kconfig"
1886 source "arch/arm/mach-kirkwood/Kconfig"
1888 source "arch/arm/mach-lpc32xx/Kconfig"
1890 source "arch/arm/mach-mvebu/Kconfig"
1892 source "arch/arm/mach-octeontx/Kconfig"
1894 source "arch/arm/mach-octeontx2/Kconfig"
1896 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1898 source "arch/arm/mach-imx/mx2/Kconfig"
1900 source "arch/arm/mach-imx/mx3/Kconfig"
1902 source "arch/arm/mach-imx/mx5/Kconfig"
1904 source "arch/arm/mach-imx/mx6/Kconfig"
1906 source "arch/arm/mach-imx/mx7/Kconfig"
1908 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1910 source "arch/arm/mach-imx/imx8/Kconfig"
1912 source "arch/arm/mach-imx/imx8m/Kconfig"
1914 source "arch/arm/mach-imx/imxrt/Kconfig"
1916 source "arch/arm/mach-imx/mxs/Kconfig"
1918 source "arch/arm/mach-omap2/Kconfig"
1920 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1922 source "arch/arm/mach-orion5x/Kconfig"
1924 source "arch/arm/mach-owl/Kconfig"
1926 source "arch/arm/mach-rmobile/Kconfig"
1928 source "arch/arm/mach-meson/Kconfig"
1930 source "arch/arm/mach-mediatek/Kconfig"
1932 source "arch/arm/mach-qemu/Kconfig"
1934 source "arch/arm/mach-rockchip/Kconfig"
1936 source "arch/arm/mach-s5pc1xx/Kconfig"
1938 source "arch/arm/mach-snapdragon/Kconfig"
1940 source "arch/arm/mach-socfpga/Kconfig"
1942 source "arch/arm/mach-sti/Kconfig"
1944 source "arch/arm/mach-stm32/Kconfig"
1946 source "arch/arm/mach-stm32mp/Kconfig"
1948 source "arch/arm/mach-sunxi/Kconfig"
1950 source "arch/arm/mach-tegra/Kconfig"
1952 source "arch/arm/mach-u8500/Kconfig"
1954 source "arch/arm/mach-uniphier/Kconfig"
1956 source "arch/arm/cpu/armv7/vf610/Kconfig"
1958 source "arch/arm/mach-zynq/Kconfig"
1960 source "arch/arm/mach-zynqmp/Kconfig"
1962 source "arch/arm/mach-versal/Kconfig"
1964 source "arch/arm/mach-zynqmp-r5/Kconfig"
1966 source "arch/arm/cpu/armv7/Kconfig"
1968 source "arch/arm/cpu/armv8/Kconfig"
1970 source "arch/arm/mach-imx/Kconfig"
1972 source "arch/arm/mach-nexell/Kconfig"
1974 source "board/armltd/total_compute/Kconfig"
1976 source "board/bosch/shc/Kconfig"
1977 source "board/bosch/guardian/Kconfig"
1978 source "board/CarMediaLab/flea3/Kconfig"
1979 source "board/Marvell/aspenite/Kconfig"
1980 source "board/Marvell/gplugd/Kconfig"
1981 source "board/Marvell/octeontx/Kconfig"
1982 source "board/Marvell/octeontx2/Kconfig"
1983 source "board/armadeus/apf27/Kconfig"
1984 source "board/armltd/vexpress/Kconfig"
1985 source "board/armltd/vexpress64/Kconfig"
1986 source "board/cortina/presidio-asic/Kconfig"
1987 source "board/broadcom/bcm23550_w1d/Kconfig"
1988 source "board/broadcom/bcm28155_ap/Kconfig"
1989 source "board/broadcom/bcm963158/Kconfig"
1990 source "board/broadcom/bcm968360bg/Kconfig"
1991 source "board/broadcom/bcm968580xref/Kconfig"
1992 source "board/broadcom/bcmcygnus/Kconfig"
1993 source "board/broadcom/bcmnsp/Kconfig"
1994 source "board/broadcom/bcmns2/Kconfig"
1995 source "board/broadcom/bcmns3/Kconfig"
1996 source "board/cavium/thunderx/Kconfig"
1997 source "board/cirrus/edb93xx/Kconfig"
1998 source "board/eets/pdu001/Kconfig"
1999 source "board/emulation/qemu-arm/Kconfig"
2000 source "board/freescale/ls2080a/Kconfig"
2001 source "board/freescale/ls2080aqds/Kconfig"
2002 source "board/freescale/ls2080ardb/Kconfig"
2003 source "board/freescale/ls1088a/Kconfig"
2004 source "board/freescale/ls1028a/Kconfig"
2005 source "board/freescale/ls1021aqds/Kconfig"
2006 source "board/freescale/ls1043aqds/Kconfig"
2007 source "board/freescale/ls1021atwr/Kconfig"
2008 source "board/freescale/ls1021atsn/Kconfig"
2009 source "board/freescale/ls1021aiot/Kconfig"
2010 source "board/freescale/ls1046aqds/Kconfig"
2011 source "board/freescale/ls1043ardb/Kconfig"
2012 source "board/freescale/ls1046ardb/Kconfig"
2013 source "board/freescale/ls1046afrwy/Kconfig"
2014 source "board/freescale/ls1012aqds/Kconfig"
2015 source "board/freescale/ls1012ardb/Kconfig"
2016 source "board/freescale/ls1012afrdm/Kconfig"
2017 source "board/freescale/lx2160a/Kconfig"
2018 source "board/freescale/mx35pdk/Kconfig"
2019 source "board/freescale/s32v234evb/Kconfig"
2020 source "board/grinn/chiliboard/Kconfig"
2021 source "board/hisilicon/hikey/Kconfig"
2022 source "board/hisilicon/hikey960/Kconfig"
2023 source "board/hisilicon/poplar/Kconfig"
2024 source "board/isee/igep003x/Kconfig"
2025 source "board/kontron/sl28/Kconfig"
2026 source "board/myir/mys_6ulx/Kconfig"
2027 source "board/spear/spear300/Kconfig"
2028 source "board/spear/spear310/Kconfig"
2029 source "board/spear/spear320/Kconfig"
2030 source "board/spear/spear600/Kconfig"
2031 source "board/spear/x600/Kconfig"
2032 source "board/st/stv0991/Kconfig"
2033 source "board/tcl/sl50/Kconfig"
2034 source "board/toradex/colibri_pxa270/Kconfig"
2035 source "board/variscite/dart_6ul/Kconfig"
2036 source "board/vscom/baltos/Kconfig"
2037 source "board/phytium/durian/Kconfig"
2038 source "board/xen/xenguest_arm64/Kconfig"
2040 source "arch/arm/Kconfig.debug"
2045 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2046 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2047 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64