1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed
19 from almost any address. This logic relies on the relocation
20 information that is embedded in the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
26 U-Boot typically uses a hard-coded value for the stack pointer
27 before relocation. Enable this option to instead calculate the
28 initial SP at run-time. This is useful to avoid hard-coding addresses
29 into U-Boot, so that it can be loaded and executed at arbitrary
30 addresses and thus avoid using arbitrary addresses at runtime.
32 If this option is enabled, the early stack pointer is set to
33 &_bss_start with a offset value added. The offset is specified by
34 SYS_INIT_SP_BSS_OFFSET.
36 config SYS_INIT_SP_BSS_OFFSET
37 int "Early stack offset from the .bss base address"
38 depends on INIT_SP_RELATIVE
41 This option's value is the offset added to &_bss_start in order to
42 calculate the stack pointer. This offset should be large enough so
43 that the early malloc region, global data (gd), and early stack usage
44 do not overlap any appended DTB.
46 config LINUX_KERNEL_IMAGE_HEADER
49 Place a Linux kernel image header at the start of the U-Boot binary.
50 The format of the header is described in the Linux kernel source at
51 Documentation/arm64/booting.txt. This feature is useful since the
52 image header reports the amount of memory (BSS and similar) that
53 U-Boot needs to use, but which isn't part of the binary.
55 if LINUX_KERNEL_IMAGE_HEADER
56 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
59 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
60 TEXT_OFFSET value written to the Linux kernel image header.
67 ARM GICV3 Interrupt translation service (ITS).
68 Basic support for programming locality specific peripheral
69 interrupts (LPI) configuration tables and enable LPI tables.
70 LPI configuration table can be used by u-boot or Linux.
71 ARM GICV3 has limitation, once the LPI table is enabled, LPI
72 configuration table can not be re-programmed, unless GICV3 reset.
76 default y if ARM64 && !POSITION_INDEPENDENT
78 config DMA_ADDR_T_64BIT
88 # Used for compatibility with asm files copied from the kernel
89 config ARM_ASM_UNIFIED
93 # Used for compatibility with asm files copied from the kernel
98 bool "Do not enable icache"
101 Do not enable instruction cache in U-Boot.
103 config SPL_SYS_ICACHE_OFF
104 bool "Do not enable icache in SPL"
106 default SYS_ICACHE_OFF
108 Do not enable instruction cache in SPL.
110 config SYS_DCACHE_OFF
111 bool "Do not enable dcache"
114 Do not enable data cache in U-Boot.
116 config SPL_SYS_DCACHE_OFF
117 bool "Do not enable dcache in SPL"
119 default SYS_DCACHE_OFF
121 Do not enable data cache in SPL.
123 config SYS_ARM_CACHE_CP15
124 bool "CP15 based cache enabling support"
126 Select this if your processor suports enabling caches by using
130 bool "MMU-based Paged Memory Management Support"
131 select SYS_ARM_CACHE_CP15
133 Select if you want MMU-based virtualised addressing space
134 support via paged memory management.
137 bool 'Use the ARM v7 PMSA Compliant MPU'
139 Some ARM systems without an MMU have instead a Memory Protection
140 Unit (MPU) that defines the type and permissions for regions of
142 If your CPU has an MPU then you should choose 'y' here unless you
143 know that you do not want to use the MPU.
145 # If set, the workarounds for these ARM errata are applied early during U-Boot
146 # startup. Note that in general these options force the workarounds to be
147 # applied; no CPU-type/version detection exists, unlike the similar options in
148 # the Linux kernel. Do not set these options unless they apply! Also note that
149 # the following can be machine-specific errata. These do have ability to
150 # provide rudimentary version and machine-specific checks, but expect no
152 # CONFIG_ARM_ERRATA_430973
153 # CONFIG_ARM_ERRATA_454179
154 # CONFIG_ARM_ERRATA_621766
155 # CONFIG_ARM_ERRATA_798870
156 # CONFIG_ARM_ERRATA_801819
157 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
158 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
160 config ARM_ERRATA_430973
163 config ARM_ERRATA_454179
166 config ARM_ERRATA_621766
169 config ARM_ERRATA_716044
172 config ARM_ERRATA_725233
175 config ARM_ERRATA_742230
178 config ARM_ERRATA_743622
181 config ARM_ERRATA_751472
184 config ARM_ERRATA_761320
187 config ARM_ERRATA_773022
190 config ARM_ERRATA_774769
193 config ARM_ERRATA_794072
196 config ARM_ERRATA_798870
199 config ARM_ERRATA_801819
202 config ARM_ERRATA_826974
205 config ARM_ERRATA_828024
208 config ARM_ERRATA_829520
211 config ARM_ERRATA_833069
214 config ARM_ERRATA_833471
217 config ARM_ERRATA_845369
220 config ARM_ERRATA_852421
223 config ARM_ERRATA_852423
226 config ARM_ERRATA_855873
229 config ARM_CORTEX_A8_CVE_2017_5715
232 config ARM_CORTEX_A15_CVE_2017_5715
237 select SYS_CACHE_SHIFT_5
242 select SYS_CACHE_SHIFT_5
247 select SYS_CACHE_SHIFT_5
252 select SYS_CACHE_SHIFT_5
257 select SYS_CACHE_SHIFT_5
263 select SYS_CACHE_SHIFT_5
270 select SYS_CACHE_SHIFT_6
277 select SYS_CACHE_SHIFT_5
278 select SYS_THUMB_BUILD
284 select SYS_ARM_CACHE_CP15
286 select SYS_CACHE_SHIFT_6
290 select SYS_CACHE_SHIFT_5
295 select SYS_CACHE_SHIFT_5
299 default "arm720t" if CPU_ARM720T
300 default "arm920t" if CPU_ARM920T
301 default "arm926ejs" if CPU_ARM926EJS
302 default "arm946es" if CPU_ARM946ES
303 default "arm1136" if CPU_ARM1136
304 default "arm1176" if CPU_ARM1176
305 default "armv7" if CPU_V7A
306 default "armv7" if CPU_V7R
307 default "armv7m" if CPU_V7M
308 default "pxa" if CPU_PXA
309 default "sa1100" if CPU_SA1100
310 default "armv8" if ARM64
314 default 4 if CPU_ARM720T
315 default 4 if CPU_ARM920T
316 default 5 if CPU_ARM926EJS
317 default 5 if CPU_ARM946ES
318 default 6 if CPU_ARM1136
319 default 6 if CPU_ARM1176
324 default 4 if CPU_SA1100
327 config SYS_CACHE_SHIFT_5
330 config SYS_CACHE_SHIFT_6
333 config SYS_CACHE_SHIFT_7
336 config SYS_CACHELINE_SIZE
338 default 128 if SYS_CACHE_SHIFT_7
339 default 64 if SYS_CACHE_SHIFT_6
340 default 32 if SYS_CACHE_SHIFT_5
343 bool "Enable ARCH_CPU_INIT"
345 Some architectures require a call to arch_cpu_init().
346 Say Y here to enable it
348 config SYS_ARCH_TIMER
349 bool "ARM Generic Timer support"
350 depends on CPU_V7A || ARM64
353 The ARM Generic Timer (aka arch-timer) provides an architected
354 interface to a timer source on an SoC.
355 It is mandatory for ARMv8 implementation and widely available
359 bool "Support for ARM SMC Calling Convention (SMCCC)"
360 depends on CPU_V7A || ARM64
363 Say Y here if you want to enable ARM SMC Calling Convention.
364 This should be enabled if U-Boot needs to communicate with system
365 firmware (for example, PSCI) according to SMCCC.
368 bool "support boot from semihosting"
370 In emulated environments, semihosting is a way for
371 the hosted environment to call out to the emulator to
372 retrieve files from the host machine.
374 config SYS_THUMB_BUILD
375 bool "Build U-Boot using the Thumb instruction set"
378 Use this flag to build U-Boot using the Thumb instruction set for
379 ARM architectures. Thumb instruction set provides better code
380 density. For ARM architectures that support Thumb2 this flag will
381 result in Thumb2 code generated by GCC.
383 config SPL_SYS_THUMB_BUILD
384 bool "Build SPL using the Thumb instruction set"
385 default y if SYS_THUMB_BUILD
386 depends on !ARM64 && SPL
388 Use this flag to build SPL using the Thumb instruction set for
389 ARM architectures. Thumb instruction set provides better code
390 density. For ARM architectures that support Thumb2 this flag will
391 result in Thumb2 code generated by GCC.
393 config TPL_SYS_THUMB_BUILD
394 bool "Build TPL using the Thumb instruction set"
395 default y if SYS_THUMB_BUILD
396 depends on TPL && !ARM64
398 Use this flag to build TPL using the Thumb instruction set for
399 ARM architectures. Thumb instruction set provides better code
400 density. For ARM architectures that support Thumb2 this flag will
401 result in Thumb2 code generated by GCC.
404 config SYS_L2CACHE_OFF
407 If SoC does not support L2CACHE or one does not want to enable
408 L2CACHE, choose this option.
410 config ENABLE_ARM_SOC_BOOT0_HOOK
411 bool "prepare BOOT0 header"
413 If the SoC's BOOT0 requires a header area filled with (magic)
414 values, then choose this option, and create a file included as
415 <asm/arch/boot0.h> which contains the required assembler code.
417 config ARM_CORTEX_CPU_IS_UP
421 config USE_ARCH_MEMCPY
422 bool "Use an assembly optimized implementation of memcpy"
426 Enable the generation of an optimized version of memcpy.
427 Such an implementation may be faster under some conditions
428 but may increase the binary size.
430 config SPL_USE_ARCH_MEMCPY
431 bool "Use an assembly optimized implementation of memcpy for SPL"
432 default y if USE_ARCH_MEMCPY
433 depends on !ARM64 && SPL
435 Enable the generation of an optimized version of memcpy.
436 Such an implementation may be faster under some conditions
437 but may increase the binary size.
439 config TPL_USE_ARCH_MEMCPY
440 bool "Use an assembly optimized implementation of memcpy for TPL"
441 default y if USE_ARCH_MEMCPY
442 depends on !ARM64 && TPL
444 Enable the generation of an optimized version of memcpy.
445 Such an implementation may be faster under some conditions
446 but may increase the binary size.
448 config USE_ARCH_MEMSET
449 bool "Use an assembly optimized implementation of memset"
453 Enable the generation of an optimized version of memset.
454 Such an implementation may be faster under some conditions
455 but may increase the binary size.
457 config SPL_USE_ARCH_MEMSET
458 bool "Use an assembly optimized implementation of memset for SPL"
459 default y if USE_ARCH_MEMSET
460 depends on !ARM64 && SPL
462 Enable the generation of an optimized version of memset.
463 Such an implementation may be faster under some conditions
464 but may increase the binary size.
466 config TPL_USE_ARCH_MEMSET
467 bool "Use an assembly optimized implementation of memset for TPL"
468 default y if USE_ARCH_MEMSET
469 depends on !ARM64 && TPL
471 Enable the generation of an optimized version of memset.
472 Such an implementation may be faster under some conditions
473 but may increase the binary size.
475 config SET_STACK_SIZE
476 bool "Enable an option to set max stack size that can be used"
477 default y if ARCH_VERSAL || ARCH_ZYNQMP
479 This will enable an option to set max stack size that can be
483 hex "Define max stack size that can be used by U-Boot"
484 depends on SET_STACK_SIZE
485 default 0x4000000 if ARCH_VERSAL || ARCH_ZYNQMP
487 Define Max stack size that can be used by U-Boot so that the
488 initrd_high will be calculated as base stack pointer minus this
491 config ARM64_SUPPORT_AARCH32
492 bool "ARM64 system support AArch32 execution state"
494 default y if !TARGET_THUNDERX_88XX
496 This ARM64 system supports AArch32 execution state.
499 prompt "Target select"
504 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
506 config TARGET_EDB93XX
507 bool "Support edb93xx"
511 config TARGET_ASPENITE
512 bool "Support aspenite"
516 bool "Support gplugd"
524 Support for TI's DaVinci platform.
527 bool "Marvell Kirkwood"
528 select ARCH_MISC_INIT
529 select BOARD_EARLY_INIT_F
533 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
553 config TARGET_SPEAR300
554 bool "Support spear300"
555 select BOARD_EARLY_INIT_F
560 config TARGET_SPEAR310
561 bool "Support spear310"
562 select BOARD_EARLY_INIT_F
567 config TARGET_SPEAR320
568 bool "Support spear320"
569 select BOARD_EARLY_INIT_F
574 config TARGET_SPEAR600
575 bool "Support spear600"
576 select BOARD_EARLY_INIT_F
581 config TARGET_STV0991
582 bool "Support stv0991"
595 select BOARD_LATE_INIT
600 config TARGET_WOODBURN
601 bool "Support woodburn"
604 config TARGET_WOODBURN_SD
605 bool "Support woodburn_sd"
613 config TARGET_MX35PDK
614 bool "Support mx35pdk"
615 select BOARD_LATE_INIT
619 bool "Broadcom BCM283X family"
625 select SERIAL_SEARCH_ALL
630 bool "Broadcom BCM63158 family"
636 bool "Broadcom BCM6858 family"
641 config TARGET_VEXPRESS_CA15_TC2
642 bool "Support vexpress_ca15_tc2"
644 select CPU_V7_HAS_NONSEC
645 select CPU_V7_HAS_VIRT
649 bool "Broadcom BCM7XXX family"
653 select OF_PRIOR_STAGE
656 This enables support for Broadcom ARM-based set-top box
657 chipsets, including the 7445 family of chips.
659 config TARGET_VEXPRESS_CA5X2
660 bool "Support vexpress_ca5x2"
664 config TARGET_VEXPRESS_CA9X4
665 bool "Support vexpress_ca9x4"
669 config TARGET_BCM23550_W1D
670 bool "Support bcm23550_w1d"
675 config TARGET_BCM28155_AP
676 bool "Support bcm28155_ap"
681 config TARGET_BCMCYGNUS
682 bool "Support bcmcygnus"
685 imply BCM_SF2_ETH_GMAC
693 bool "Support bcmnsp"
697 bool "Support Broadcom Northstar2"
700 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
701 ARMv8 Cortex-A57 processors targeting a broad range of networking
705 bool "Samsung EXYNOS"
714 imply SYS_THUMB_BUILD
719 bool "Samsung S5PC1XX"
728 bool "Calxeda Highbank"
732 config ARCH_INTEGRATOR
733 bool "ARM Ltd. Integrator family"
744 select SYS_ARCH_TIMER
745 select SYS_THUMB_BUILD
751 bool "Texas Instruments' K3 Architecture"
756 config ARCH_OMAP2PLUS
759 select SPL_BOARD_INIT if SPL
760 select SPL_STACK_R if SPL
766 imply DISTRO_DEFAULTS
768 Support for the Meson SoC family developed by Amlogic Inc.,
769 targeted at media players and tablet computers. We currently
770 support the S905 (GXBaby) 64-bit SoC.
778 select SPL_LIBCOMMON_SUPPORT if SPL
779 select SPL_LIBGENERIC_SUPPORT if SPL
780 select SPL_OF_CONTROL if SPL
783 Support for the MediaTek SoCs family developed by MediaTek Inc.
784 Please refer to doc/README.mediatek for more information.
787 bool "NXP LPC32xx platform"
797 bool "NXP i.MX8 platform"
801 select ENABLE_ARM_SOC_BOOT0_HOOK
804 bool "NXP i.MX8M platform"
811 bool "NXP i.MXRT platform"
819 bool "NXP i.MX23 family"
830 bool "NXP i.MX28 family"
836 bool "NXP i.MX31 family"
842 select ROM_UNIFIED_SECTIONS
844 imply SYS_THUMB_BUILD
848 select ARCH_MISC_INIT
849 select BOARD_EARLY_INIT_F
851 select SYS_FSL_HAS_SEC if IMX_HAB
852 select SYS_FSL_SEC_COMPAT_4
853 select SYS_FSL_SEC_LE
855 imply SYS_THUMB_BUILD
860 select SYS_FSL_HAS_SEC if IMX_HAB
861 select SYS_FSL_SEC_COMPAT_4
862 select SYS_FSL_SEC_LE
864 imply SYS_THUMB_BUILD
868 default "arch/arm/mach-omap2/u-boot-spl.lds"
873 select BOARD_EARLY_INIT_F
878 bool "Actions Semi OWL SoCs"
886 bool "QEMU Virtual Platform"
887 select ARCH_SUPPORT_TFABOOT
897 bool "Renesas ARM SoCs"
898 select BOARD_EARLY_INIT_F if !RZA1
903 imply SYS_THUMB_BUILD
904 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
906 config TARGET_S32V234EVB
907 bool "Support s32v234evb"
909 select SYS_FSL_ERRATUM_ESDHC111
911 config ARCH_SNAPDRAGON
912 bool "Qualcomm Snapdragon SoCs"
925 bool "Altera SOCFPGA family"
926 select ARCH_EARLY_INIT_R
927 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
928 select ARM64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
929 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
932 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
934 select SPL_DM_RESET if DM_RESET
936 select SPL_LIBCOMMON_SUPPORT
937 select SPL_LIBGENERIC_SUPPORT
938 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
939 select SPL_OF_CONTROL
940 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
941 select SPL_SERIAL_SUPPORT
943 select SPL_WATCHDOG_SUPPORT
946 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
948 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
949 select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
958 imply SPL_LIBDISK_SUPPORT
959 imply SPL_MMC_SUPPORT
960 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
961 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
962 imply SPL_SPI_FLASH_SUPPORT
963 imply SPL_SPI_SUPPORT
967 bool "Support sunxi (Allwinner) SoCs"
970 select CMD_MMC if MMC
971 select CMD_USB if DISTRO_DEFAULTS
978 select DM_SCSI if SCSI
980 select DM_USB if DISTRO_DEFAULTS
981 select OF_BOARD_SETUP
984 select SPECIFY_CONSOLE_INDEX
985 select SPL_STACK_R if SPL
986 select SPL_SYS_MALLOC_SIMPLE if SPL
987 select SPL_SYS_THUMB_BUILD if !ARM64
990 select SYS_THUMB_BUILD if !ARM64
991 select USB if DISTRO_DEFAULTS
992 select USB_KEYBOARD if DISTRO_DEFAULTS
993 select USB_STORAGE if DISTRO_DEFAULTS
994 select SPL_USE_TINY_PRINTF
997 imply CMD_UBI if MTD_RAW_NAND
998 imply DISTRO_DEFAULTS
1001 imply OF_LIBFDT_OVERLAY
1002 imply PRE_CONSOLE_BUFFER
1003 imply SPL_GPIO_SUPPORT
1004 imply SPL_LIBCOMMON_SUPPORT
1005 imply SPL_LIBGENERIC_SUPPORT
1006 imply SPL_MMC_SUPPORT if MMC
1007 imply SPL_POWER_SUPPORT
1008 imply SPL_SERIAL_SUPPORT
1012 bool "Support Xilinx Versal Platform"
1016 select DM_ETH if NET
1017 select DM_MMC if MMC
1020 imply BOARD_LATE_INIT
1023 bool "Freescale Vybrid"
1025 select SYS_FSL_ERRATUM_ESDHC111
1030 bool "Xilinx Zynq based platform"
1035 select DM_ETH if NET
1036 select DM_MMC if MMC
1040 select DM_USB if USB
1043 select SPL_BOARD_INIT if SPL
1044 select SPL_CLK if SPL
1045 select SPL_DM if SPL
1046 select SPL_OF_CONTROL if SPL
1047 select SPL_SEPARATE_BSS if SPL
1049 imply ARCH_EARLY_INIT_R
1050 imply BOARD_LATE_INIT
1056 config ARCH_ZYNQMP_R5
1057 bool "Xilinx ZynqMP R5 based platform"
1061 select DM_ETH if NET
1062 select DM_MMC if MMC
1069 bool "Xilinx ZynqMP based platform"
1073 select DM_ETH if NET
1075 select DM_MMC if MMC
1077 select DM_SPI if SPI
1078 select DM_SPI_FLASH if DM_SPI
1079 select DM_USB if USB
1082 select SPL_BOARD_INIT if SPL
1083 select SPL_CLK if SPL
1084 select SPL_DM_MAILBOX if SPL
1085 select SPL_FIRMWARE if SPL
1086 select SPL_SEPARATE_BSS if SPL
1089 imply BOARD_LATE_INIT
1097 imply DISTRO_DEFAULTS
1100 config TARGET_VEXPRESS64_AEMV8A
1101 bool "Support vexpress_aemv8a"
1105 config TARGET_VEXPRESS64_BASE_FVP
1106 bool "Support Versatile Express ARMv8a FVP BASE model"
1111 config TARGET_VEXPRESS64_JUNO
1112 bool "Support Versatile Express Juno Development Platform"
1116 config TARGET_LS2080A_EMU
1117 bool "Support ls2080a_emu"
1119 select ARCH_MISC_INIT
1121 select ARMV8_MULTIENTRY
1122 select FSL_DDR_SYNC_REFRESH
1124 Support for Freescale LS2080A_EMU platform.
1125 The LS2080A Development System (EMULATOR) is a pre-silicon
1126 development platform that supports the QorIQ LS2080A
1127 Layerscape Architecture processor.
1129 config TARGET_LS2080A_SIMU
1130 bool "Support ls2080a_simu"
1132 select ARCH_MISC_INIT
1134 select ARMV8_MULTIENTRY
1135 select BOARD_LATE_INIT
1137 Support for Freescale LS2080A_SIMU platform.
1138 The LS2080A Development System (QDS) is a pre silicon
1139 development platform that supports the QorIQ LS2080A
1140 Layerscape Architecture processor.
1142 config TARGET_LS1088AQDS
1143 bool "Support ls1088aqds"
1145 select ARCH_MISC_INIT
1147 select ARMV8_MULTIENTRY
1148 select ARCH_SUPPORT_TFABOOT
1149 select BOARD_LATE_INIT
1151 select FSL_DDR_INTERACTIVE if !SD_BOOT
1153 Support for NXP LS1088AQDS platform.
1154 The LS1088A Development System (QDS) is a high-performance
1155 development platform that supports the QorIQ LS1088A
1156 Layerscape Architecture processor.
1158 config TARGET_LS2080AQDS
1159 bool "Support ls2080aqds"
1161 select ARCH_MISC_INIT
1163 select ARMV8_MULTIENTRY
1164 select ARCH_SUPPORT_TFABOOT
1165 select BOARD_LATE_INIT
1170 select FSL_DDR_INTERACTIVE if !SPL
1172 Support for Freescale LS2080AQDS platform.
1173 The LS2080A Development System (QDS) is a high-performance
1174 development platform that supports the QorIQ LS2080A
1175 Layerscape Architecture processor.
1177 config TARGET_LS2080ARDB
1178 bool "Support ls2080ardb"
1180 select ARCH_MISC_INIT
1182 select ARMV8_MULTIENTRY
1183 select ARCH_SUPPORT_TFABOOT
1184 select BOARD_LATE_INIT
1187 select FSL_DDR_INTERACTIVE if !SPL
1191 Support for Freescale LS2080ARDB platform.
1192 The LS2080A Reference design board (RDB) is a high-performance
1193 development platform that supports the QorIQ LS2080A
1194 Layerscape Architecture processor.
1196 config TARGET_LS2081ARDB
1197 bool "Support ls2081ardb"
1199 select ARCH_MISC_INIT
1201 select ARMV8_MULTIENTRY
1202 select BOARD_LATE_INIT
1205 Support for Freescale LS2081ARDB platform.
1206 The LS2081A Reference design board (RDB) is a high-performance
1207 development platform that supports the QorIQ LS2081A/LS2041A
1208 Layerscape Architecture processor.
1210 config TARGET_LX2160ARDB
1211 bool "Support lx2160ardb"
1213 select ARCH_MISC_INIT
1215 select ARMV8_MULTIENTRY
1216 select ARCH_SUPPORT_TFABOOT
1217 select BOARD_LATE_INIT
1219 Support for NXP LX2160ARDB platform.
1220 The lx2160ardb (LX2160A Reference design board (RDB)
1221 is a high-performance development platform that supports the
1222 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1224 config TARGET_LX2160AQDS
1225 bool "Support lx2160aqds"
1227 select ARCH_MISC_INIT
1229 select ARMV8_MULTIENTRY
1230 select ARCH_SUPPORT_TFABOOT
1231 select BOARD_LATE_INIT
1233 Support for NXP LX2160AQDS platform.
1234 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1235 is a high-performance development platform that supports the
1236 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1239 bool "Support HiKey 96boards Consumer Edition Platform"
1246 select SPECIFY_CONSOLE_INDEX
1249 Support for HiKey 96boards platform. It features a HI6220
1250 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1252 config TARGET_HIKEY960
1253 bool "Support HiKey960 96boards Consumer Edition Platform"
1261 Support for HiKey960 96boards platform. It features a HI3660
1262 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1264 config TARGET_POPLAR
1265 bool "Support Poplar 96boards Enterprise Edition Platform"
1274 Support for Poplar 96boards EE platform. It features a HI3798cv200
1275 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1276 making it capable of running any commercial set-top solution based on
1279 config TARGET_LS1012AQDS
1280 bool "Support ls1012aqds"
1283 select ARCH_SUPPORT_TFABOOT
1284 select BOARD_LATE_INIT
1286 Support for Freescale LS1012AQDS platform.
1287 The LS1012A Development System (QDS) is a high-performance
1288 development platform that supports the QorIQ LS1012A
1289 Layerscape Architecture processor.
1291 config TARGET_LS1012ARDB
1292 bool "Support ls1012ardb"
1295 select ARCH_SUPPORT_TFABOOT
1296 select BOARD_LATE_INIT
1300 Support for Freescale LS1012ARDB platform.
1301 The LS1012A Reference design board (RDB) is a high-performance
1302 development platform that supports the QorIQ LS1012A
1303 Layerscape Architecture processor.
1305 config TARGET_LS1012A2G5RDB
1306 bool "Support ls1012a2g5rdb"
1309 select ARCH_SUPPORT_TFABOOT
1310 select BOARD_LATE_INIT
1313 Support for Freescale LS1012A2G5RDB platform.
1314 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1315 development platform that supports the QorIQ LS1012A
1316 Layerscape Architecture processor.
1318 config TARGET_LS1012AFRWY
1319 bool "Support ls1012afrwy"
1322 select ARCH_SUPPORT_TFABOOT
1323 select BOARD_LATE_INIT
1327 Support for Freescale LS1012AFRWY platform.
1328 The LS1012A FRWY board (FRWY) is a high-performance
1329 development platform that supports the QorIQ LS1012A
1330 Layerscape Architecture processor.
1332 config TARGET_LS1012AFRDM
1333 bool "Support ls1012afrdm"
1336 select ARCH_SUPPORT_TFABOOT
1338 Support for Freescale LS1012AFRDM platform.
1339 The LS1012A Freedom board (FRDM) is a high-performance
1340 development platform that supports the QorIQ LS1012A
1341 Layerscape Architecture processor.
1343 config TARGET_LS1028AQDS
1344 bool "Support ls1028aqds"
1347 select ARMV8_MULTIENTRY
1348 select ARCH_SUPPORT_TFABOOT
1349 select BOARD_LATE_INIT
1350 select ARCH_MISC_INIT
1352 Support for Freescale LS1028AQDS platform
1353 The LS1028A Development System (QDS) is a high-performance
1354 development platform that supports the QorIQ LS1028A
1355 Layerscape Architecture processor.
1357 config TARGET_LS1028ARDB
1358 bool "Support ls1028ardb"
1361 select ARMV8_MULTIENTRY
1362 select ARCH_SUPPORT_TFABOOT
1364 Support for Freescale LS1028ARDB platform
1365 The LS1028A Development System (RDB) is a high-performance
1366 development platform that supports the QorIQ LS1028A
1367 Layerscape Architecture processor.
1369 config TARGET_LS1088ARDB
1370 bool "Support ls1088ardb"
1372 select ARCH_MISC_INIT
1374 select ARMV8_MULTIENTRY
1375 select ARCH_SUPPORT_TFABOOT
1376 select BOARD_LATE_INIT
1378 select FSL_DDR_INTERACTIVE if !SD_BOOT
1380 Support for NXP LS1088ARDB platform.
1381 The LS1088A Reference design board (RDB) is a high-performance
1382 development platform that supports the QorIQ LS1088A
1383 Layerscape Architecture processor.
1385 config TARGET_LS1021AQDS
1386 bool "Support ls1021aqds"
1388 select ARCH_SUPPORT_PSCI
1389 select BOARD_EARLY_INIT_F
1390 select BOARD_LATE_INIT
1392 select CPU_V7_HAS_NONSEC
1393 select CPU_V7_HAS_VIRT
1394 select LS1_DEEP_SLEEP
1397 select FSL_DDR_INTERACTIVE
1400 config TARGET_LS1021ATWR
1401 bool "Support ls1021atwr"
1403 select ARCH_SUPPORT_PSCI
1404 select BOARD_EARLY_INIT_F
1405 select BOARD_LATE_INIT
1407 select CPU_V7_HAS_NONSEC
1408 select CPU_V7_HAS_VIRT
1409 select LS1_DEEP_SLEEP
1413 config TARGET_LS1021ATSN
1414 bool "Support ls1021atsn"
1416 select ARCH_SUPPORT_PSCI
1417 select BOARD_EARLY_INIT_F
1418 select BOARD_LATE_INIT
1420 select CPU_V7_HAS_NONSEC
1421 select CPU_V7_HAS_VIRT
1422 select LS1_DEEP_SLEEP
1426 config TARGET_LS1021AIOT
1427 bool "Support ls1021aiot"
1429 select ARCH_SUPPORT_PSCI
1430 select BOARD_LATE_INIT
1432 select CPU_V7_HAS_NONSEC
1433 select CPU_V7_HAS_VIRT
1437 Support for Freescale LS1021AIOT platform.
1438 The LS1021A Freescale board (IOT) is a high-performance
1439 development platform that supports the QorIQ LS1021A
1440 Layerscape Architecture processor.
1442 config TARGET_LS1043AQDS
1443 bool "Support ls1043aqds"
1446 select ARMV8_MULTIENTRY
1447 select ARCH_SUPPORT_TFABOOT
1448 select BOARD_EARLY_INIT_F
1449 select BOARD_LATE_INIT
1451 select FSL_DDR_INTERACTIVE if !SPL
1455 Support for Freescale LS1043AQDS platform.
1457 config TARGET_LS1043ARDB
1458 bool "Support ls1043ardb"
1461 select ARMV8_MULTIENTRY
1462 select ARCH_SUPPORT_TFABOOT
1463 select BOARD_EARLY_INIT_F
1464 select BOARD_LATE_INIT
1467 Support for Freescale LS1043ARDB platform.
1469 config TARGET_LS1046AQDS
1470 bool "Support ls1046aqds"
1473 select ARMV8_MULTIENTRY
1474 select ARCH_SUPPORT_TFABOOT
1475 select BOARD_EARLY_INIT_F
1476 select BOARD_LATE_INIT
1477 select DM_SPI_FLASH if DM_SPI
1479 select FSL_DDR_BIST if !SPL
1480 select FSL_DDR_INTERACTIVE if !SPL
1481 select FSL_DDR_INTERACTIVE if !SPL
1484 Support for Freescale LS1046AQDS platform.
1485 The LS1046A Development System (QDS) is a high-performance
1486 development platform that supports the QorIQ LS1046A
1487 Layerscape Architecture processor.
1489 config TARGET_LS1046ARDB
1490 bool "Support ls1046ardb"
1493 select ARMV8_MULTIENTRY
1494 select ARCH_SUPPORT_TFABOOT
1495 select BOARD_EARLY_INIT_F
1496 select BOARD_LATE_INIT
1497 select DM_SPI_FLASH if DM_SPI
1498 select POWER_MC34VR500
1501 select FSL_DDR_INTERACTIVE if !SPL
1504 Support for Freescale LS1046ARDB platform.
1505 The LS1046A Reference Design Board (RDB) is a high-performance
1506 development platform that supports the QorIQ LS1046A
1507 Layerscape Architecture processor.
1509 config TARGET_LS1046AFRWY
1510 bool "Support ls1046afrwy"
1513 select ARMV8_MULTIENTRY
1514 select ARCH_SUPPORT_TFABOOT
1515 select BOARD_EARLY_INIT_F
1516 select BOARD_LATE_INIT
1517 select DM_SPI_FLASH if DM_SPI
1520 Support for Freescale LS1046AFRWY platform.
1521 The LS1046A Freeway Board (FRWY) is a high-performance
1522 development platform that supports the QorIQ LS1046A
1523 Layerscape Architecture processor.
1525 config TARGET_COLIBRI_PXA270
1526 bool "Support colibri_pxa270"
1529 config ARCH_UNIPHIER
1530 bool "Socionext UniPhier SoCs"
1531 select BOARD_LATE_INIT
1539 select OF_BOARD_SETUP
1543 select SPL_BOARD_INIT if SPL
1544 select SPL_DM if SPL
1545 select SPL_LIBCOMMON_SUPPORT if SPL
1546 select SPL_LIBGENERIC_SUPPORT if SPL
1547 select SPL_OF_CONTROL if SPL
1548 select SPL_PINCTRL if SPL
1551 imply DISTRO_DEFAULTS
1554 Support for UniPhier SoC family developed by Socionext Inc.
1555 (formerly, System LSI Business Division of Panasonic Corporation)
1558 bool "Support STMicroelectronics STM32 MCU with cortex M"
1565 bool "Support STMicrolectronics SoCs"
1574 Support for STMicroelectronics STiH407/10 SoC family.
1575 This SoC is used on Linaro 96Board STiH410-B2260
1578 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1579 select ARCH_MISC_INIT
1580 select BOARD_LATE_INIT
1589 select OF_SYSTEM_SETUP
1595 select SYS_THUMB_BUILD
1599 imply OF_LIBFDT_OVERLAY
1600 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1603 Support for STM32MP SoC family developed by STMicroelectronics,
1604 MPUs based on ARM cortex A core
1605 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1606 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1608 SPL is the unsecure FSBL for the basic boot chain.
1610 config ARCH_ROCKCHIP
1611 bool "Support Rockchip SoCs"
1622 select DM_USB if USB
1623 select ENABLE_ARM_SOC_BOOT0_HOOK
1626 select SPL_DM if SPL
1628 select SYS_THUMB_BUILD if !ARM64
1631 imply DEBUG_UART_BOARD_INIT
1632 imply DISTRO_DEFAULTS
1634 imply SARADC_ROCKCHIP
1636 imply SPL_SYS_MALLOC_SIMPLE
1639 imply USB_FUNCTION_FASTBOOT
1641 config TARGET_THUNDERX_88XX
1642 bool "Support ThunderX 88xx"
1646 select SYS_CACHE_SHIFT_7
1649 bool "Support Aspeed SoCs"
1654 config TARGET_DURIAN
1655 bool "Support Phytium Durian Platform"
1658 Support for durian platform.
1659 It has 2GB Sdram, uart and pcie.
1663 config ARCH_SUPPORT_TFABOOT
1667 bool "Support for booting from TF-A"
1668 depends on ARCH_SUPPORT_TFABOOT
1671 Enabling this will make a U-Boot binary that is capable of being
1672 booted via TF-A (Trusted Firmware for Cortex-A).
1674 config TI_SECURE_DEVICE
1675 bool "HS Device Type Support"
1676 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1678 If a high secure (HS) device type is being used, this config
1679 must be set. This option impacts various aspects of the
1680 build system (to create signed boot images that can be
1681 authenticated) and the code. See the doc/README.ti-secure
1682 file for further details.
1684 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1685 config ISW_ENTRY_ADDR
1686 hex "Address in memory or XIP address of bootloader entry point"
1687 default 0x402F4000 if AM43XX
1688 default 0x402F0400 if AM33XX
1689 default 0x40301350 if OMAP54XX
1691 After any reset, the boot ROM searches the boot media for a valid
1692 boot image. For non-XIP devices, the ROM then copies the image into
1693 internal memory. For all boot modes, after the ROM processes the
1694 boot image it eventually computes the entry point address depending
1695 on the device type (secure/non-secure), boot media (xip/non-xip) and
1699 source "arch/arm/mach-aspeed/Kconfig"
1701 source "arch/arm/mach-at91/Kconfig"
1703 source "arch/arm/mach-bcm283x/Kconfig"
1705 source "arch/arm/mach-bcmstb/Kconfig"
1707 source "arch/arm/mach-davinci/Kconfig"
1709 source "arch/arm/mach-exynos/Kconfig"
1711 source "arch/arm/mach-highbank/Kconfig"
1713 source "arch/arm/mach-integrator/Kconfig"
1715 source "arch/arm/mach-k3/Kconfig"
1717 source "arch/arm/mach-keystone/Kconfig"
1719 source "arch/arm/mach-kirkwood/Kconfig"
1721 source "arch/arm/cpu/arm926ejs/lpc32xx/Kconfig"
1723 source "arch/arm/mach-mvebu/Kconfig"
1725 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1727 source "arch/arm/mach-imx/mx2/Kconfig"
1729 source "arch/arm/mach-imx/mx3/Kconfig"
1731 source "arch/arm/mach-imx/mx5/Kconfig"
1733 source "arch/arm/mach-imx/mx6/Kconfig"
1735 source "arch/arm/mach-imx/mx7/Kconfig"
1737 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1739 source "arch/arm/mach-imx/imx8/Kconfig"
1741 source "arch/arm/mach-imx/imx8m/Kconfig"
1743 source "arch/arm/mach-imx/imxrt/Kconfig"
1745 source "arch/arm/mach-imx/mxs/Kconfig"
1747 source "arch/arm/mach-omap2/Kconfig"
1749 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1751 source "arch/arm/mach-orion5x/Kconfig"
1753 source "arch/arm/mach-owl/Kconfig"
1755 source "arch/arm/mach-rmobile/Kconfig"
1757 source "arch/arm/mach-meson/Kconfig"
1759 source "arch/arm/mach-mediatek/Kconfig"
1761 source "arch/arm/mach-qemu/Kconfig"
1763 source "arch/arm/mach-rockchip/Kconfig"
1765 source "arch/arm/mach-s5pc1xx/Kconfig"
1767 source "arch/arm/mach-snapdragon/Kconfig"
1769 source "arch/arm/mach-socfpga/Kconfig"
1771 source "arch/arm/mach-sti/Kconfig"
1773 source "arch/arm/mach-stm32/Kconfig"
1775 source "arch/arm/mach-stm32mp/Kconfig"
1777 source "arch/arm/mach-sunxi/Kconfig"
1779 source "arch/arm/mach-tegra/Kconfig"
1781 source "arch/arm/mach-uniphier/Kconfig"
1783 source "arch/arm/cpu/armv7/vf610/Kconfig"
1785 source "arch/arm/mach-zynq/Kconfig"
1787 source "arch/arm/mach-zynqmp/Kconfig"
1789 source "arch/arm/mach-versal/Kconfig"
1791 source "arch/arm/mach-zynqmp-r5/Kconfig"
1793 source "arch/arm/cpu/armv7/Kconfig"
1795 source "arch/arm/cpu/armv8/Kconfig"
1797 source "arch/arm/mach-imx/Kconfig"
1799 source "board/bosch/shc/Kconfig"
1800 source "board/bosch/guardian/Kconfig"
1801 source "board/CarMediaLab/flea3/Kconfig"
1802 source "board/Marvell/aspenite/Kconfig"
1803 source "board/Marvell/gplugd/Kconfig"
1804 source "board/armadeus/apf27/Kconfig"
1805 source "board/armltd/vexpress/Kconfig"
1806 source "board/armltd/vexpress64/Kconfig"
1807 source "board/broadcom/bcm23550_w1d/Kconfig"
1808 source "board/broadcom/bcm28155_ap/Kconfig"
1809 source "board/broadcom/bcm963158/Kconfig"
1810 source "board/broadcom/bcm968580xref/Kconfig"
1811 source "board/broadcom/bcmcygnus/Kconfig"
1812 source "board/broadcom/bcmnsp/Kconfig"
1813 source "board/broadcom/bcmns2/Kconfig"
1814 source "board/cavium/thunderx/Kconfig"
1815 source "board/cirrus/edb93xx/Kconfig"
1816 source "board/eets/pdu001/Kconfig"
1817 source "board/emulation/qemu-arm/Kconfig"
1818 source "board/freescale/ls2080a/Kconfig"
1819 source "board/freescale/ls2080aqds/Kconfig"
1820 source "board/freescale/ls2080ardb/Kconfig"
1821 source "board/freescale/ls1088a/Kconfig"
1822 source "board/freescale/ls1028a/Kconfig"
1823 source "board/freescale/ls1021aqds/Kconfig"
1824 source "board/freescale/ls1043aqds/Kconfig"
1825 source "board/freescale/ls1021atwr/Kconfig"
1826 source "board/freescale/ls1021atsn/Kconfig"
1827 source "board/freescale/ls1021aiot/Kconfig"
1828 source "board/freescale/ls1046aqds/Kconfig"
1829 source "board/freescale/ls1043ardb/Kconfig"
1830 source "board/freescale/ls1046ardb/Kconfig"
1831 source "board/freescale/ls1046afrwy/Kconfig"
1832 source "board/freescale/ls1012aqds/Kconfig"
1833 source "board/freescale/ls1012ardb/Kconfig"
1834 source "board/freescale/ls1012afrdm/Kconfig"
1835 source "board/freescale/lx2160a/Kconfig"
1836 source "board/freescale/mx35pdk/Kconfig"
1837 source "board/freescale/s32v234evb/Kconfig"
1838 source "board/grinn/chiliboard/Kconfig"
1839 source "board/gumstix/pepper/Kconfig"
1840 source "board/hisilicon/hikey/Kconfig"
1841 source "board/hisilicon/hikey960/Kconfig"
1842 source "board/hisilicon/poplar/Kconfig"
1843 source "board/isee/igep003x/Kconfig"
1844 source "board/phytec/pcm051/Kconfig"
1845 source "board/silica/pengwyn/Kconfig"
1846 source "board/spear/spear300/Kconfig"
1847 source "board/spear/spear310/Kconfig"
1848 source "board/spear/spear320/Kconfig"
1849 source "board/spear/spear600/Kconfig"
1850 source "board/spear/x600/Kconfig"
1851 source "board/st/stv0991/Kconfig"
1852 source "board/tcl/sl50/Kconfig"
1853 source "board/ucRobotics/bubblegum_96/Kconfig"
1854 source "board/birdland/bav335x/Kconfig"
1855 source "board/toradex/colibri_pxa270/Kconfig"
1856 source "board/variscite/dart_6ul/Kconfig"
1857 source "board/vscom/baltos/Kconfig"
1858 source "board/woodburn/Kconfig"
1859 source "board/xilinx/Kconfig"
1860 source "board/xilinx/zynq/Kconfig"
1861 source "board/xilinx/zynqmp/Kconfig"
1862 source "board/phytium/durian/Kconfig"
1864 source "arch/arm/Kconfig.debug"
1869 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
1870 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
1871 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64