1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 bool "Enable support for CRC32 instruction"
17 ARMv8 implements dedicated crc32 instruction for crc32 calculation.
18 This is faster than software crc32 calculation. This instruction may
19 not be present on all ARMv8.0, but is always present on ARMv8.1 and
22 config POSITION_INDEPENDENT
23 bool "Generate position-independent pre-relocation code"
24 depends on ARM64 || CPU_V7A
26 U-Boot expects to be linked to a specific hard-coded address, and to
27 be loaded to and run from that address. This option lifts that
28 restriction, thus allowing the code to be loaded to and executed from
29 almost any 4K aligned address. This logic relies on the relocation
30 information that is embedded in the binary to support U-Boot
31 relocating itself to the top-of-RAM later during execution.
33 config INIT_SP_RELATIVE
34 bool "Specify the early stack pointer relative to the .bss section"
36 default n if ARCH_QEMU
37 default y if POSITION_INDEPENDENT
39 U-Boot typically uses a hard-coded value for the stack pointer
40 before relocation. Enable this option to instead calculate the
41 initial SP at run-time. This is useful to avoid hard-coding addresses
42 into U-Boot, so that it can be loaded and executed at arbitrary
43 addresses and thus avoid using arbitrary addresses at runtime.
45 If this option is enabled, the early stack pointer is set to
46 &_bss_start with a offset value added. The offset is specified by
47 SYS_INIT_SP_BSS_OFFSET.
49 config SYS_INIT_SP_BSS_OFFSET
50 int "Early stack offset from the .bss base address"
52 depends on INIT_SP_RELATIVE
55 This option's value is the offset added to &_bss_start in order to
56 calculate the stack pointer. This offset should be large enough so
57 that the early malloc region, global data (gd), and early stack usage
58 do not overlap any appended DTB.
60 config LINUX_KERNEL_IMAGE_HEADER
64 Place a Linux kernel image header at the start of the U-Boot binary.
65 The format of the header is described in the Linux kernel source at
66 Documentation/arm64/booting.txt. This feature is useful since the
67 image header reports the amount of memory (BSS and similar) that
68 U-Boot needs to use, but which isn't part of the binary.
70 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
71 depends on LINUX_KERNEL_IMAGE_HEADER
74 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
75 TEXT_OFFSET value written to the Linux kernel image header.
87 ARM GICV3 Interrupt translation service (ITS).
88 Basic support for programming locality specific peripheral
89 interrupts (LPI) configuration tables and enable LPI tables.
90 LPI configuration table can be used by u-boot or Linux.
91 ARM GICV3 has limitation, once the LPI table is enabled, LPI
92 configuration table can not be re-programmed, unless GICV3 reset.
98 config DMA_ADDR_T_64BIT
108 config GPIO_EXTRA_HEADER
111 # Used for compatibility with asm files copied from the kernel
112 config ARM_ASM_UNIFIED
116 # Used for compatibility with asm files copied from the kernel
120 config SYS_ICACHE_OFF
121 bool "Do not enable icache"
123 Do not enable instruction cache in U-Boot.
125 config SPL_SYS_ICACHE_OFF
126 bool "Do not enable icache in SPL"
128 default SYS_ICACHE_OFF
130 Do not enable instruction cache in SPL.
132 config SYS_DCACHE_OFF
133 bool "Do not enable dcache"
135 Do not enable data cache in U-Boot.
137 config SPL_SYS_DCACHE_OFF
138 bool "Do not enable dcache in SPL"
140 default SYS_DCACHE_OFF
142 Do not enable data cache in SPL.
144 config SYS_ARM_CACHE_CP15
145 bool "CP15 based cache enabling support"
147 Select this if your processor suports enabling caches by using
151 bool "MMU-based Paged Memory Management Support"
152 select SYS_ARM_CACHE_CP15
154 Select if you want MMU-based virtualised addressing space
155 support via paged memory management.
158 bool 'Use the ARM v7 PMSA Compliant MPU'
160 Some ARM systems without an MMU have instead a Memory Protection
161 Unit (MPU) that defines the type and permissions for regions of
163 If your CPU has an MPU then you should choose 'y' here unless you
164 know that you do not want to use the MPU.
166 # If set, the workarounds for these ARM errata are applied early during U-Boot
167 # startup. Note that in general these options force the workarounds to be
168 # applied; no CPU-type/version detection exists, unlike the similar options in
169 # the Linux kernel. Do not set these options unless they apply! Also note that
170 # the following can be machine-specific errata. These do have ability to
171 # provide rudimentary version and machine-specific checks, but expect no
173 # CONFIG_ARM_ERRATA_430973
174 # CONFIG_ARM_ERRATA_454179
175 # CONFIG_ARM_ERRATA_621766
176 # CONFIG_ARM_ERRATA_798870
177 # CONFIG_ARM_ERRATA_801819
178 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
179 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
181 config ARM_ERRATA_430973
184 config ARM_ERRATA_454179
187 config ARM_ERRATA_621766
190 config ARM_ERRATA_716044
193 config ARM_ERRATA_725233
196 config ARM_ERRATA_742230
199 config ARM_ERRATA_743622
202 config ARM_ERRATA_751472
205 config ARM_ERRATA_761320
208 config ARM_ERRATA_773022
211 config ARM_ERRATA_774769
214 config ARM_ERRATA_794072
217 config ARM_ERRATA_798870
220 config ARM_ERRATA_801819
223 config ARM_ERRATA_826974
226 config ARM_ERRATA_828024
229 config ARM_ERRATA_829520
232 config ARM_ERRATA_833069
235 config ARM_ERRATA_833471
238 config ARM_ERRATA_845369
241 config ARM_ERRATA_852421
244 config ARM_ERRATA_852423
247 config ARM_ERRATA_855873
250 config ARM_CORTEX_A8_CVE_2017_5715
253 config ARM_CORTEX_A15_CVE_2017_5715
258 select SYS_CACHE_SHIFT_5
263 select SYS_CACHE_SHIFT_5
268 select SYS_CACHE_SHIFT_5
273 select SYS_CACHE_SHIFT_5
278 select SYS_CACHE_SHIFT_5
284 select SYS_CACHE_SHIFT_5
291 select SYS_CACHE_SHIFT_6
298 select SYS_CACHE_SHIFT_5
299 select SYS_THUMB_BUILD
305 select SYS_ARM_CACHE_CP15
307 select SYS_CACHE_SHIFT_6
311 select SYS_CACHE_SHIFT_5
320 select SYS_CACHE_SHIFT_5
324 default "arm720t" if CPU_ARM720T
325 default "arm920t" if CPU_ARM920T
326 default "arm926ejs" if CPU_ARM926EJS
327 default "arm946es" if CPU_ARM946ES
328 default "arm1136" if CPU_ARM1136
329 default "arm1176" if CPU_ARM1176
330 default "armv7" if CPU_V7A
331 default "armv7" if CPU_V7R
332 default "armv7m" if CPU_V7M
333 default "pxa" if CPU_PXA
334 default "sa1100" if CPU_SA1100
335 default "armv8" if ARM64
339 default 4 if CPU_ARM720T
340 default 4 if CPU_ARM920T
341 default 5 if CPU_ARM926EJS
342 default 5 if CPU_ARM946ES
343 default 6 if CPU_ARM1136
344 default 6 if CPU_ARM1176
349 default 4 if CPU_SA1100
353 prompt "Select the ARM data write cache policy"
354 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
356 default SYS_ARM_CACHE_WRITEBACK
358 config SYS_ARM_CACHE_WRITEBACK
359 bool "Write-back (WB)"
361 A write updates the cache only and marks the cache line as dirty.
362 External memory is updated only when the line is evicted or explicitly
365 config SYS_ARM_CACHE_WRITETHROUGH
366 bool "Write-through (WT)"
368 A write updates both the cache and the external memory system.
369 This does not mark the cache line as dirty.
371 config SYS_ARM_CACHE_WRITEALLOC
372 bool "Write allocation (WA)"
374 A cache line is allocated on a write miss. This means that executing a
375 store instruction on the processor might cause a burst read to occur.
376 There is a linefill to obtain the data for the cache line, before the
381 bool "Enable ARCH_CPU_INIT"
383 Some architectures require a call to arch_cpu_init().
384 Say Y here to enable it
386 config SYS_ARCH_TIMER
387 bool "ARM Generic Timer support"
388 depends on CPU_V7A || ARM64
391 The ARM Generic Timer (aka arch-timer) provides an architected
392 interface to a timer source on an SoC.
393 It is mandatory for ARMv8 implementation and widely available
397 bool "Support for ARM SMC Calling Convention (SMCCC)"
398 depends on CPU_V7A || ARM64
401 Say Y here if you want to enable ARM SMC Calling Convention.
402 This should be enabled if U-Boot needs to communicate with system
403 firmware (for example, PSCI) according to SMCCC.
406 bool "support boot from semihosting"
408 In emulated environments, semihosting is a way for
409 the hosted environment to call out to the emulator to
410 retrieve files from the host machine.
412 config SYS_THUMB_BUILD
413 bool "Build U-Boot using the Thumb instruction set"
416 Use this flag to build U-Boot using the Thumb instruction set for
417 ARM architectures. Thumb instruction set provides better code
418 density. For ARM architectures that support Thumb2 this flag will
419 result in Thumb2 code generated by GCC.
421 config SPL_SYS_THUMB_BUILD
422 bool "Build SPL using the Thumb instruction set"
423 default y if SYS_THUMB_BUILD
424 depends on !ARM64 && SPL
426 Use this flag to build SPL using the Thumb instruction set for
427 ARM architectures. Thumb instruction set provides better code
428 density. For ARM architectures that support Thumb2 this flag will
429 result in Thumb2 code generated by GCC.
431 config TPL_SYS_THUMB_BUILD
432 bool "Build TPL using the Thumb instruction set"
433 default y if SYS_THUMB_BUILD
434 depends on TPL && !ARM64
436 Use this flag to build TPL using the Thumb instruction set for
437 ARM architectures. Thumb instruction set provides better code
438 density. For ARM architectures that support Thumb2 this flag will
439 result in Thumb2 code generated by GCC.
442 config SYS_L2CACHE_OFF
445 If SoC does not support L2CACHE or one does not want to enable
446 L2CACHE, choose this option.
448 config ENABLE_ARM_SOC_BOOT0_HOOK
449 bool "prepare BOOT0 header"
451 If the SoC's BOOT0 requires a header area filled with (magic)
452 values, then choose this option, and create a file included as
453 <asm/arch/boot0.h> which contains the required assembler code.
455 config USE_ARCH_MEMCPY
456 bool "Use an assembly optimized implementation of memcpy"
458 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
460 Enable the generation of an optimized version of memcpy.
461 Such an implementation may be faster under some conditions
462 but may increase the binary size.
464 config SPL_USE_ARCH_MEMCPY
465 bool "Use an assembly optimized implementation of memcpy for SPL"
466 default y if USE_ARCH_MEMCPY
469 Enable the generation of an optimized version of memcpy.
470 Such an implementation may be faster under some conditions
471 but may increase the binary size.
473 config TPL_USE_ARCH_MEMCPY
474 bool "Use an assembly optimized implementation of memcpy for TPL"
475 default y if USE_ARCH_MEMCPY
478 Enable the generation of an optimized version of memcpy.
479 Such an implementation may be faster under some conditions
480 but may increase the binary size.
482 config USE_ARCH_MEMMOVE
483 bool "Use an assembly optimized implementation of memmove" if !ARM64
484 default USE_ARCH_MEMCPY if ARM64
487 Enable the generation of an optimized version of memmove.
488 Such an implementation may be faster under some conditions
489 but may increase the binary size.
491 config SPL_USE_ARCH_MEMMOVE
492 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
493 default SPL_USE_ARCH_MEMCPY if ARM64
494 depends on SPL && ARM64
496 Enable the generation of an optimized version of memmove.
497 Such an implementation may be faster under some conditions
498 but may increase the binary size.
500 config TPL_USE_ARCH_MEMMOVE
501 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
502 default TPL_USE_ARCH_MEMCPY if ARM64
503 depends on TPL && ARM64
505 Enable the generation of an optimized version of memmove.
506 Such an implementation may be faster under some conditions
507 but may increase the binary size.
509 config USE_ARCH_MEMSET
510 bool "Use an assembly optimized implementation of memset"
512 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
514 Enable the generation of an optimized version of memset.
515 Such an implementation may be faster under some conditions
516 but may increase the binary size.
518 config SPL_USE_ARCH_MEMSET
519 bool "Use an assembly optimized implementation of memset for SPL"
520 default y if USE_ARCH_MEMSET
523 Enable the generation of an optimized version of memset.
524 Such an implementation may be faster under some conditions
525 but may increase the binary size.
527 config TPL_USE_ARCH_MEMSET
528 bool "Use an assembly optimized implementation of memset for TPL"
529 default y if USE_ARCH_MEMSET
532 Enable the generation of an optimized version of memset.
533 Such an implementation may be faster under some conditions
534 but may increase the binary size.
536 config ARM64_SUPPORT_AARCH32
537 bool "ARM64 system support AArch32 execution state"
539 default y if !TARGET_THUNDERX_88XX
541 This ARM64 system supports AArch32 execution state.
544 prompt "Target select"
549 select GPIO_EXTRA_HEADER
550 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
551 select SPL_SEPARATE_BSS if SPL
556 select GPIO_EXTRA_HEADER
557 select SPL_DM_SPI if SPL
560 Support for TI's DaVinci platform.
563 bool "Marvell Kirkwood"
564 select ARCH_MISC_INIT
565 select BOARD_EARLY_INIT_F
567 select GPIO_EXTRA_HEADER
570 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
576 select GPIO_EXTRA_HEADER
577 select SPL_DM_SPI if SPL
578 select SPL_DM_SPI_FLASH if SPL
587 select GPIO_EXTRA_HEADER
589 config TARGET_STV0991
590 bool "Support stv0991"
596 select GPIO_EXTRA_HEADER
603 bool "Broadcom BCM283X family"
607 select GPIO_EXTRA_HEADER
610 select SERIAL_SEARCH_ALL
615 bool "Broadcom BCM63158 family"
621 bool "Broadcom BCM6753 family"
628 bool "Broadcom BCM68360 family"
634 bool "Broadcom BCM6858 family"
640 bool "Broadcom BCM7XXX family"
643 select GPIO_EXTRA_HEADER
646 imply OF_HAS_PRIOR_STAGE
648 This enables support for Broadcom ARM-based set-top box
649 chipsets, including the 7445 family of chips.
651 config TARGET_VEXPRESS_CA9X4
652 bool "Support vexpress_ca9x4"
656 config TARGET_BCMCYGNUS
657 bool "Support bcmcygnus"
659 select GPIO_EXTRA_HEADER
661 imply BCM_SF2_ETH_GMAC
669 bool "Support Broadcom Northstar2"
671 select GPIO_EXTRA_HEADER
673 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
674 ARMv8 Cortex-A57 processors targeting a broad range of networking
678 bool "Support Broadcom NS3"
680 select BOARD_LATE_INIT
682 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
683 ARMv8 Cortex-A72 processors targeting a broad range of networking
687 bool "Samsung EXYNOS"
697 select GPIO_EXTRA_HEADER
698 imply SYS_THUMB_BUILD
703 bool "Samsung S5PC1XX"
709 select GPIO_EXTRA_HEADER
713 bool "Calxeda Highbank"
724 imply OF_HAS_PRIOR_STAGE
726 config ARCH_INTEGRATOR
727 bool "ARM Ltd. Integrator family"
730 select GPIO_EXTRA_HEADER
735 bool "Qualcomm IPQ40xx SoCs"
741 select GPIO_EXTRA_HEADER
754 select GPIO_EXTRA_HEADER
756 select SYS_ARCH_TIMER
757 select SYS_THUMB_BUILD
763 bool "Texas Instruments' K3 Architecture"
768 config ARCH_OMAP2PLUS
771 select GPIO_EXTRA_HEADER
772 select SPL_BOARD_INIT if SPL
773 select SPL_STACK_R if SPL
775 imply TI_SYSC if DM && OF_CONTROL
781 select GPIO_EXTRA_HEADER
782 imply DISTRO_DEFAULTS
785 Support for the Meson SoC family developed by Amlogic Inc.,
786 targeted at media players and tablet computers. We currently
787 support the S905 (GXBaby) 64-bit SoC.
792 select GPIO_EXTRA_HEADER
795 select SPL_LIBCOMMON_SUPPORT if SPL
796 select SPL_LIBGENERIC_SUPPORT if SPL
797 select SPL_OF_CONTROL if SPL
800 Support for the MediaTek SoCs family developed by MediaTek Inc.
801 Please refer to doc/README.mediatek for more information.
804 bool "NXP LPC32xx platform"
809 select GPIO_EXTRA_HEADER
815 bool "NXP i.MX8 platform"
818 select GPIO_EXTRA_HEADER
821 select ENABLE_ARM_SOC_BOOT0_HOOK
825 bool "NXP i.MX8M platform"
827 select GPIO_EXTRA_HEADER
829 select SYS_FSL_HAS_SEC if IMX_HAB
830 select SYS_FSL_SEC_COMPAT_4
831 select SYS_FSL_SEC_LE
839 bool "NXP i.MX8ULP platform"
845 select GPIO_EXTRA_HEADER
850 bool "NXP i.MXRT platform"
854 select GPIO_EXTRA_HEADER
860 bool "NXP i.MX23 family"
862 select GPIO_EXTRA_HEADER
868 bool "NXP i.MX28 family"
870 select GPIO_EXTRA_HEADER
876 bool "NXP i.MX31 family"
878 select GPIO_EXTRA_HEADER
883 select BOARD_POSTCLK_INIT
885 select GPIO_EXTRA_HEADER
887 select SYS_FSL_HAS_SEC if IMX_HAB
888 select SYS_FSL_SEC_COMPAT_4
889 select SYS_FSL_SEC_LE
890 select ROM_UNIFIED_SECTIONS
892 imply SYS_THUMB_BUILD
896 select ARCH_MISC_INIT
898 select GPIO_EXTRA_HEADER
900 select SYS_FSL_HAS_SEC if IMX_HAB
901 select SYS_FSL_SEC_COMPAT_4
902 select SYS_FSL_SEC_LE
903 imply BOARD_EARLY_INIT_F
905 imply SYS_THUMB_BUILD
909 select BOARD_POSTCLK_INIT
911 select GPIO_EXTRA_HEADER
913 select SYS_FSL_HAS_SEC
914 select SYS_FSL_SEC_COMPAT_4
915 select SYS_FSL_SEC_LE
917 imply SYS_THUMB_BUILD
921 default "arch/arm/mach-omap2/u-boot-spl.lds"
926 select BOARD_EARLY_INIT_F
928 select GPIO_EXTRA_HEADER
933 bool "Nexell S5P4418/S5P6818 SoC"
934 select ENABLE_ARM_SOC_BOOT0_HOOK
936 select GPIO_EXTRA_HEADER
954 select LINUX_KERNEL_IMAGE_HEADER
957 select POSITION_INDEPENDENT
963 select SYSRESET_WATCHDOG
964 select SYSRESET_WATCHDOG_AUTO
968 imply DISTRO_DEFAULTS
969 imply OF_HAS_PRIOR_STAGE
972 bool "Actions Semi OWL SoCs"
976 select GPIO_EXTRA_HEADER
981 select SYS_RELOC_GD_ENV_ADDR
985 bool "QEMU Virtual Platform"
994 imply OF_HAS_PRIOR_STAGE
997 bool "Renesas ARM SoCs"
1000 select GPIO_EXTRA_HEADER
1001 imply BOARD_EARLY_INIT_F
1004 imply SYS_THUMB_BUILD
1005 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
1007 config ARCH_SNAPDRAGON
1008 bool "Qualcomm Snapdragon SoCs"
1013 select GPIO_EXTRA_HEADER
1022 bool "Altera SOCFPGA family"
1023 select ARCH_EARLY_INIT_R
1024 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
1025 select ARM64 if TARGET_SOCFPGA_SOC64
1026 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1030 select GPIO_EXTRA_HEADER
1031 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1033 select SPL_DM_RESET if DM_RESET
1034 select SPL_DM_SERIAL
1035 select SPL_LIBCOMMON_SUPPORT
1036 select SPL_LIBGENERIC_SUPPORT
1037 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
1038 select SPL_OF_CONTROL
1039 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1045 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1047 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1048 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1058 imply SPL_DM_SPI_FLASH
1059 imply SPL_LIBDISK_SUPPORT
1061 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1062 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1063 imply SPL_SPI_FLASH_SUPPORT
1068 bool "Support sunxi (Allwinner) SoCs"
1071 select CMD_MMC if MMC
1072 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1077 select DM_I2C if I2C
1078 select DM_SPI if SPI
1079 select DM_SPI_FLASH if SPI
1081 select DM_MMC if MMC
1082 select DM_SCSI if SCSI
1084 select GPIO_EXTRA_HEADER
1085 select OF_BOARD_SETUP
1088 select SPECIFY_CONSOLE_INDEX
1089 select SPL_SEPARATE_BSS if SPL
1090 select SPL_STACK_R if SPL
1091 select SPL_SYS_MALLOC_SIMPLE if SPL
1092 select SPL_SYS_THUMB_BUILD if !ARM64
1095 select SYS_THUMB_BUILD if !ARM64
1096 select USB if DISTRO_DEFAULTS
1097 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1098 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1099 select SPL_USE_TINY_PRINTF
1101 select SYS_RELOC_GD_ENV_ADDR
1102 imply BOARD_LATE_INIT
1105 imply CMD_UBI if MTD_RAW_NAND
1106 imply DISTRO_DEFAULTS
1109 imply OF_LIBFDT_OVERLAY
1110 imply PRE_CONSOLE_BUFFER
1112 imply SPL_LIBCOMMON_SUPPORT
1113 imply SPL_LIBGENERIC_SUPPORT
1114 imply SPL_MMC if MMC
1118 imply SYSRESET_WATCHDOG
1119 imply SYSRESET_WATCHDOG_AUTO
1124 bool "ST-Ericsson U8500 Series"
1128 select DM_MMC if MMC
1130 select DM_USB_GADGET if DM_USB
1134 imply AB8500_USB_PHY
1135 imply ARM_PL180_MMCI
1140 imply NOMADIK_MTU_TIMER
1145 imply SYS_THUMB_BUILD
1146 imply SYSRESET_SYSCON
1149 bool "Support Xilinx Versal Platform"
1153 select DM_ETH if NET
1154 select DM_MMC if MMC
1159 imply BOARD_LATE_INIT
1160 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1163 bool "Freescale Vybrid"
1165 select GPIO_EXTRA_HEADER
1167 select SYS_FSL_ERRATUM_ESDHC111
1172 bool "Xilinx Zynq based platform"
1176 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1178 select DM_ETH if NET
1179 select DM_MMC if MMC
1185 select SPL_BOARD_INIT if SPL
1186 select SPL_CLK if SPL
1187 select SPL_DM if SPL
1188 select SPL_DM_SPI if SPL
1189 select SPL_DM_SPI_FLASH if SPL
1190 select SPL_OF_CONTROL if SPL
1191 select SPL_SEPARATE_BSS if SPL
1193 imply ARCH_EARLY_INIT_R
1194 imply BOARD_LATE_INIT
1198 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1201 config ARCH_ZYNQMP_R5
1202 bool "Xilinx ZynqMP R5 based platform"
1206 select DM_ETH if NET
1207 select DM_MMC if MMC
1214 bool "Xilinx ZynqMP based platform"
1218 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1219 select DM_ETH if NET
1221 select DM_MMC if MMC
1223 select DM_SPI if SPI
1224 select DM_SPI_FLASH if DM_SPI
1228 select SPL_BOARD_INIT if SPL
1229 select SPL_CLK if SPL
1230 select SPL_DM if SPL
1231 select SPL_DM_SPI if SPI && SPL_DM
1232 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1233 select SPL_DM_MAILBOX if SPL
1234 imply SPL_FIRMWARE if SPL
1235 select SPL_SEPARATE_BSS if SPL
1239 imply BOARD_LATE_INIT
1241 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1245 imply ZYNQMP_GPIO_MODEPIN if DM_GPIO && USB
1249 select GPIO_EXTRA_HEADER
1250 imply DISTRO_DEFAULTS
1253 config ARCH_VEXPRESS64
1254 bool "Support ARMv8 Arm Ltd. VExpress based boards and models"
1262 select MTD_NOR_FLASH if MTD
1263 select FLASH_CFI_DRIVER if MTD
1264 select ENV_IS_IN_FLASH if MTD
1266 config TARGET_TOTAL_COMPUTE
1267 bool "Support Total Compute Platform"
1275 config TARGET_LS2080A_EMU
1276 bool "Support ls2080a_emu"
1279 select ARMV8_MULTIENTRY
1280 select FSL_DDR_SYNC_REFRESH
1281 select GPIO_EXTRA_HEADER
1283 Support for Freescale LS2080A_EMU platform.
1284 The LS2080A Development System (EMULATOR) is a pre-silicon
1285 development platform that supports the QorIQ LS2080A
1286 Layerscape Architecture processor.
1288 config TARGET_LS1088AQDS
1289 bool "Support ls1088aqds"
1292 select ARMV8_MULTIENTRY
1293 select ARCH_SUPPORT_TFABOOT
1294 select BOARD_LATE_INIT
1295 select GPIO_EXTRA_HEADER
1297 select FSL_DDR_INTERACTIVE if !SD_BOOT
1299 Support for NXP LS1088AQDS platform.
1300 The LS1088A Development System (QDS) is a high-performance
1301 development platform that supports the QorIQ LS1088A
1302 Layerscape Architecture processor.
1304 config TARGET_LS2080AQDS
1305 bool "Support ls2080aqds"
1308 select ARMV8_MULTIENTRY
1309 select ARCH_SUPPORT_TFABOOT
1310 select BOARD_LATE_INIT
1311 select GPIO_EXTRA_HEADER
1316 select FSL_DDR_INTERACTIVE if !SPL
1318 Support for Freescale LS2080AQDS platform.
1319 The LS2080A Development System (QDS) is a high-performance
1320 development platform that supports the QorIQ LS2080A
1321 Layerscape Architecture processor.
1323 config TARGET_LS2080ARDB
1324 bool "Support ls2080ardb"
1327 select ARMV8_MULTIENTRY
1328 select ARCH_SUPPORT_TFABOOT
1329 select BOARD_LATE_INIT
1332 select FSL_DDR_INTERACTIVE if !SPL
1333 select GPIO_EXTRA_HEADER
1337 Support for Freescale LS2080ARDB platform.
1338 The LS2080A Reference design board (RDB) is a high-performance
1339 development platform that supports the QorIQ LS2080A
1340 Layerscape Architecture processor.
1342 config TARGET_LS2081ARDB
1343 bool "Support ls2081ardb"
1346 select ARMV8_MULTIENTRY
1347 select BOARD_LATE_INIT
1348 select GPIO_EXTRA_HEADER
1351 Support for Freescale LS2081ARDB platform.
1352 The LS2081A Reference design board (RDB) is a high-performance
1353 development platform that supports the QorIQ LS2081A/LS2041A
1354 Layerscape Architecture processor.
1356 config TARGET_LX2160ARDB
1357 bool "Support lx2160ardb"
1360 select ARMV8_MULTIENTRY
1361 select ARCH_SUPPORT_TFABOOT
1362 select BOARD_LATE_INIT
1363 select GPIO_EXTRA_HEADER
1365 Support for NXP LX2160ARDB platform.
1366 The lx2160ardb (LX2160A Reference design board (RDB)
1367 is a high-performance development platform that supports the
1368 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1370 config TARGET_LX2160AQDS
1371 bool "Support lx2160aqds"
1374 select ARMV8_MULTIENTRY
1375 select ARCH_SUPPORT_TFABOOT
1376 select BOARD_LATE_INIT
1377 select GPIO_EXTRA_HEADER
1379 Support for NXP LX2160AQDS platform.
1380 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1381 is a high-performance development platform that supports the
1382 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1384 config TARGET_LX2162AQDS
1385 bool "Support lx2162aqds"
1387 select ARCH_MISC_INIT
1389 select ARMV8_MULTIENTRY
1390 select ARCH_SUPPORT_TFABOOT
1391 select BOARD_LATE_INIT
1392 select GPIO_EXTRA_HEADER
1394 Support for NXP LX2162AQDS platform.
1395 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1398 bool "Support HiKey 96boards Consumer Edition Platform"
1403 select GPIO_EXTRA_HEADER
1406 select SPECIFY_CONSOLE_INDEX
1409 Support for HiKey 96boards platform. It features a HI6220
1410 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1412 config TARGET_HIKEY960
1413 bool "Support HiKey960 96boards Consumer Edition Platform"
1417 select GPIO_EXTRA_HEADER
1422 Support for HiKey960 96boards platform. It features a HI3660
1423 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1425 config TARGET_POPLAR
1426 bool "Support Poplar 96boards Enterprise Edition Platform"
1430 select GPIO_EXTRA_HEADER
1435 Support for Poplar 96boards EE platform. It features a HI3798cv200
1436 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1437 making it capable of running any commercial set-top solution based on
1440 config TARGET_LS1012AQDS
1441 bool "Support ls1012aqds"
1444 select ARCH_SUPPORT_TFABOOT
1445 select BOARD_LATE_INIT
1446 select GPIO_EXTRA_HEADER
1448 Support for Freescale LS1012AQDS platform.
1449 The LS1012A Development System (QDS) is a high-performance
1450 development platform that supports the QorIQ LS1012A
1451 Layerscape Architecture processor.
1453 config TARGET_LS1012ARDB
1454 bool "Support ls1012ardb"
1457 select ARCH_SUPPORT_TFABOOT
1458 select BOARD_LATE_INIT
1459 select GPIO_EXTRA_HEADER
1463 Support for Freescale LS1012ARDB platform.
1464 The LS1012A Reference design board (RDB) is a high-performance
1465 development platform that supports the QorIQ LS1012A
1466 Layerscape Architecture processor.
1468 config TARGET_LS1012A2G5RDB
1469 bool "Support ls1012a2g5rdb"
1472 select ARCH_SUPPORT_TFABOOT
1473 select BOARD_LATE_INIT
1474 select GPIO_EXTRA_HEADER
1477 Support for Freescale LS1012A2G5RDB platform.
1478 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1479 development platform that supports the QorIQ LS1012A
1480 Layerscape Architecture processor.
1482 config TARGET_LS1012AFRWY
1483 bool "Support ls1012afrwy"
1486 select ARCH_SUPPORT_TFABOOT
1487 select BOARD_LATE_INIT
1488 select GPIO_EXTRA_HEADER
1492 Support for Freescale LS1012AFRWY platform.
1493 The LS1012A FRWY board (FRWY) is a high-performance
1494 development platform that supports the QorIQ LS1012A
1495 Layerscape Architecture processor.
1497 config TARGET_LS1012AFRDM
1498 bool "Support ls1012afrdm"
1501 select ARCH_SUPPORT_TFABOOT
1502 select GPIO_EXTRA_HEADER
1504 Support for Freescale LS1012AFRDM platform.
1505 The LS1012A Freedom board (FRDM) is a high-performance
1506 development platform that supports the QorIQ LS1012A
1507 Layerscape Architecture processor.
1509 config TARGET_LS1028AQDS
1510 bool "Support ls1028aqds"
1513 select ARMV8_MULTIENTRY
1514 select ARCH_SUPPORT_TFABOOT
1515 select BOARD_LATE_INIT
1516 select GPIO_EXTRA_HEADER
1518 Support for Freescale LS1028AQDS platform
1519 The LS1028A Development System (QDS) is a high-performance
1520 development platform that supports the QorIQ LS1028A
1521 Layerscape Architecture processor.
1523 config TARGET_LS1028ARDB
1524 bool "Support ls1028ardb"
1527 select ARMV8_MULTIENTRY
1528 select ARCH_SUPPORT_TFABOOT
1529 select BOARD_LATE_INIT
1530 select GPIO_EXTRA_HEADER
1532 Support for Freescale LS1028ARDB platform
1533 The LS1028A Development System (RDB) is a high-performance
1534 development platform that supports the QorIQ LS1028A
1535 Layerscape Architecture processor.
1537 config TARGET_LS1088ARDB
1538 bool "Support ls1088ardb"
1541 select ARMV8_MULTIENTRY
1542 select ARCH_SUPPORT_TFABOOT
1543 select BOARD_LATE_INIT
1545 select FSL_DDR_INTERACTIVE if !SD_BOOT
1546 select GPIO_EXTRA_HEADER
1548 Support for NXP LS1088ARDB platform.
1549 The LS1088A Reference design board (RDB) is a high-performance
1550 development platform that supports the QorIQ LS1088A
1551 Layerscape Architecture processor.
1553 config TARGET_LS1021AQDS
1554 bool "Support ls1021aqds"
1556 select ARCH_SUPPORT_PSCI
1557 select BOARD_EARLY_INIT_F
1558 select BOARD_LATE_INIT
1560 select CPU_V7_HAS_NONSEC
1561 select CPU_V7_HAS_VIRT
1562 select LS1_DEEP_SLEEP
1565 select FSL_DDR_INTERACTIVE
1566 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1567 select GPIO_EXTRA_HEADER
1568 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1571 config TARGET_LS1021ATWR
1572 bool "Support ls1021atwr"
1574 select ARCH_SUPPORT_PSCI
1575 select BOARD_EARLY_INIT_F
1576 select BOARD_LATE_INIT
1578 select CPU_V7_HAS_NONSEC
1579 select CPU_V7_HAS_VIRT
1580 select LS1_DEEP_SLEEP
1582 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1583 select GPIO_EXTRA_HEADER
1586 config TARGET_PG_WCOM_SELI8
1587 bool "Support Hitachi-Powergrids SELI8 service unit card"
1589 select ARCH_SUPPORT_PSCI
1590 select BOARD_EARLY_INIT_F
1591 select BOARD_LATE_INIT
1593 select CPU_V7_HAS_NONSEC
1594 select CPU_V7_HAS_VIRT
1596 select FSL_DDR_INTERACTIVE
1597 select GPIO_EXTRA_HEADER
1601 Support for Hitachi-Powergrids SELI8 service unit card.
1602 SELI8 is a QorIQ LS1021a based service unit card used
1603 in XMC20 and FOX615 product families.
1605 config TARGET_PG_WCOM_EXPU1
1606 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1608 select ARCH_SUPPORT_PSCI
1609 select BOARD_EARLY_INIT_F
1610 select BOARD_LATE_INIT
1612 select CPU_V7_HAS_NONSEC
1613 select CPU_V7_HAS_VIRT
1615 select FSL_DDR_INTERACTIVE
1619 Support for Hitachi-Powergrids EXPU1 service unit card.
1620 EXPU1 is a QorIQ LS1021a based service unit card used
1621 in XMC20 and FOX615 product families.
1623 config TARGET_LS1021ATSN
1624 bool "Support ls1021atsn"
1626 select ARCH_SUPPORT_PSCI
1627 select BOARD_EARLY_INIT_F
1628 select BOARD_LATE_INIT
1630 select CPU_V7_HAS_NONSEC
1631 select CPU_V7_HAS_VIRT
1632 select LS1_DEEP_SLEEP
1634 select GPIO_EXTRA_HEADER
1637 config TARGET_LS1021AIOT
1638 bool "Support ls1021aiot"
1640 select ARCH_SUPPORT_PSCI
1641 select BOARD_LATE_INIT
1643 select CPU_V7_HAS_NONSEC
1644 select CPU_V7_HAS_VIRT
1646 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1647 select GPIO_EXTRA_HEADER
1650 Support for Freescale LS1021AIOT platform.
1651 The LS1021A Freescale board (IOT) is a high-performance
1652 development platform that supports the QorIQ LS1021A
1653 Layerscape Architecture processor.
1655 config TARGET_LS1043AQDS
1656 bool "Support ls1043aqds"
1659 select ARMV8_MULTIENTRY
1660 select ARCH_SUPPORT_TFABOOT
1661 select BOARD_EARLY_INIT_F
1662 select BOARD_LATE_INIT
1664 select FSL_DDR_INTERACTIVE if !SPL
1665 select FSL_DSPI if !SPL_NO_DSPI
1666 select DM_SPI_FLASH if FSL_DSPI
1667 select GPIO_EXTRA_HEADER
1671 Support for Freescale LS1043AQDS platform.
1673 config TARGET_LS1043ARDB
1674 bool "Support ls1043ardb"
1677 select ARMV8_MULTIENTRY
1678 select ARCH_SUPPORT_TFABOOT
1679 select BOARD_EARLY_INIT_F
1680 select BOARD_LATE_INIT
1682 select FSL_DSPI if !SPL_NO_DSPI
1683 select DM_SPI_FLASH if FSL_DSPI
1684 select GPIO_EXTRA_HEADER
1686 Support for Freescale LS1043ARDB platform.
1688 config TARGET_LS1046AQDS
1689 bool "Support ls1046aqds"
1692 select ARMV8_MULTIENTRY
1693 select ARCH_SUPPORT_TFABOOT
1694 select BOARD_EARLY_INIT_F
1695 select BOARD_LATE_INIT
1696 select DM_SPI_FLASH if DM_SPI
1698 select FSL_DDR_BIST if !SPL
1699 select FSL_DDR_INTERACTIVE if !SPL
1700 select FSL_DDR_INTERACTIVE if !SPL
1701 select GPIO_EXTRA_HEADER
1704 Support for Freescale LS1046AQDS platform.
1705 The LS1046A Development System (QDS) is a high-performance
1706 development platform that supports the QorIQ LS1046A
1707 Layerscape Architecture processor.
1709 config TARGET_LS1046ARDB
1710 bool "Support ls1046ardb"
1713 select ARMV8_MULTIENTRY
1714 select ARCH_SUPPORT_TFABOOT
1715 select BOARD_EARLY_INIT_F
1716 select BOARD_LATE_INIT
1717 select DM_SPI_FLASH if DM_SPI
1718 select POWER_MC34VR500
1721 select FSL_DDR_INTERACTIVE if !SPL
1722 select GPIO_EXTRA_HEADER
1725 Support for Freescale LS1046ARDB platform.
1726 The LS1046A Reference Design Board (RDB) is a high-performance
1727 development platform that supports the QorIQ LS1046A
1728 Layerscape Architecture processor.
1730 config TARGET_LS1046AFRWY
1731 bool "Support ls1046afrwy"
1734 select ARMV8_MULTIENTRY
1735 select ARCH_SUPPORT_TFABOOT
1736 select BOARD_EARLY_INIT_F
1737 select BOARD_LATE_INIT
1738 select DM_SPI_FLASH if DM_SPI
1739 select GPIO_EXTRA_HEADER
1742 Support for Freescale LS1046AFRWY platform.
1743 The LS1046A Freeway Board (FRWY) is a high-performance
1744 development platform that supports the QorIQ LS1046A
1745 Layerscape Architecture processor.
1751 select ARMV8_MULTIENTRY
1767 select GPIO_EXTRA_HEADER
1768 select SPL_DM if SPL
1769 select SPL_DM_SPI if SPL
1770 select SPL_DM_SPI_FLASH if SPL
1771 select SPL_DM_I2C if SPL
1772 select SPL_DM_MMC if SPL
1773 select SPL_DM_SERIAL if SPL
1775 Support for Kontron SMARC-sAL28 board.
1778 bool "Support ten64"
1780 select ARCH_MISC_INIT
1782 select ARMV8_MULTIENTRY
1783 select ARCH_SUPPORT_TFABOOT
1784 select BOARD_LATE_INIT
1786 select FSL_DDR_INTERACTIVE if !SD_BOOT
1787 select GPIO_EXTRA_HEADER
1789 Support for Traverse Technologies Ten64 board, based
1792 config TARGET_COLIBRI_PXA270
1793 bool "Support colibri_pxa270"
1795 select GPIO_EXTRA_HEADER
1797 config ARCH_UNIPHIER
1798 bool "Socionext UniPhier SoCs"
1799 select BOARD_LATE_INIT
1808 select OF_BOARD_SETUP
1812 select SPL_BOARD_INIT if SPL
1813 select SPL_DM if SPL
1814 select SPL_LIBCOMMON_SUPPORT if SPL
1815 select SPL_LIBGENERIC_SUPPORT if SPL
1816 select SPL_OF_CONTROL if SPL
1817 select SPL_PINCTRL if SPL
1820 imply DISTRO_DEFAULTS
1823 Support for UniPhier SoC family developed by Socionext Inc.
1824 (formerly, System LSI Business Division of Panasonic Corporation)
1826 config ARCH_SYNQUACER
1827 bool "Socionext SynQuacer SoCs"
1833 select SYSRESET_PSCI
1836 Support for SynQuacer SoC family developed by Socionext Inc.
1837 This SoC is used on 96boards EE DeveloperBox.
1840 bool "Support STMicroelectronics STM32 MCU with cortex M"
1847 bool "Support STMicrolectronics SoCs"
1856 Support for STMicroelectronics STiH407/10 SoC family.
1857 This SoC is used on Linaro 96Board STiH410-B2260
1860 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1861 select ARCH_MISC_INIT
1862 select ARCH_SUPPORT_TFABOOT
1863 select BOARD_LATE_INIT
1872 select OF_SYSTEM_SETUP
1878 select SYS_THUMB_BUILD
1882 imply OF_LIBFDT_OVERLAY
1883 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1887 Support for STM32MP SoC family developed by STMicroelectronics,
1888 MPUs based on ARM cortex A core
1889 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1890 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1892 SPL is the unsecure FSBL for the basic boot chain.
1894 config ARCH_ROCKCHIP
1895 bool "Support Rockchip SoCs"
1897 select BINMAN if SPL_OPTEE || (SPL && !ARM64)
1907 select ENABLE_ARM_SOC_BOOT0_HOOK
1910 select SPL_DM if SPL
1911 select SPL_DM_SPI if SPL
1912 select SPL_DM_SPI_FLASH if SPL
1914 select SYS_THUMB_BUILD if !ARM64
1917 imply DEBUG_UART_BOARD_INIT
1918 imply DISTRO_DEFAULTS
1920 imply SARADC_ROCKCHIP
1922 imply SPL_SYS_MALLOC_SIMPLE
1925 imply USB_FUNCTION_FASTBOOT
1927 config ARCH_OCTEONTX
1928 bool "Support OcteonTX SoCs"
1931 select GPIO_EXTRA_HEADER
1935 select BOARD_LATE_INIT
1936 select SYS_CACHE_SHIFT_7
1937 select SYS_PCI_64BIT if PCI
1938 imply OF_HAS_PRIOR_STAGE
1940 config ARCH_OCTEONTX2
1941 bool "Support OcteonTX2 SoCs"
1944 select GPIO_EXTRA_HEADER
1948 select BOARD_LATE_INIT
1949 select SYS_CACHE_SHIFT_7
1950 select SYS_PCI_64BIT if PCI
1951 imply OF_HAS_PRIOR_STAGE
1953 config TARGET_THUNDERX_88XX
1954 bool "Support ThunderX 88xx"
1956 select GPIO_EXTRA_HEADER
1959 select SYS_CACHE_SHIFT_7
1962 bool "Support Aspeed SoCs"
1967 config TARGET_DURIAN
1968 bool "Support Phytium Durian Platform"
1970 select GPIO_EXTRA_HEADER
1972 Support for durian platform.
1973 It has 2GB Sdram, uart and pcie.
1975 config TARGET_POMELO
1976 bool "Support Phytium Pomelo Platform"
1988 select DM_ETH if NET
1991 Support for pomelo platform.
1992 It has 8GB Sdram, uart and pcie.
1994 config TARGET_PRESIDIO_ASIC
1995 bool "Support Cortina Presidio ASIC Platform"
1999 config TARGET_XENGUEST_ARM64
2000 bool "Xen guest ARM64"
2004 select LINUX_KERNEL_IMAGE_HEADER
2007 imply OF_HAS_PRIOR_STAGE
2011 config SUPPORT_PASSING_ATAGS
2012 bool "Support pre-devicetree ATAG-based booting"
2014 imply SETUP_MEMORY_TAGS
2016 Support for booting older Linux kernels, using ATAGs rather than
2017 passing a devicetree. This is option is rarely used, and the
2018 semantics are defined at
2019 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
2021 config SETUP_MEMORY_TAGS
2022 bool "Pass memory size information via ATAG"
2023 depends on SUPPORT_PASSING_ATAGS
2026 bool "Pass Linux kernel cmdline via ATAG"
2027 depends on SUPPORT_PASSING_ATAGS
2030 bool "Pass initrd starting point and size via ATAG"
2031 depends on SUPPORT_PASSING_ATAGS
2034 bool "Pass system revision via ATAG"
2035 depends on SUPPORT_PASSING_ATAGS
2038 bool "Pass system serial number via ATAG"
2039 depends on SUPPORT_PASSING_ATAGS
2041 config STATIC_MACH_TYPE
2042 bool "Statically define the Machine ID number"
2044 When booting via ATAGs, enable this option if we know the correct
2045 machine ID number to use at compile time. Some systems will be
2046 passed the number dynamically by whatever loads U-Boot.
2049 int "Machine ID number"
2050 depends on STATIC_MACH_TYPE
2052 When booting via ATAGs, the machine type must be passed as a number.
2053 For the full list see https://www.arm.linux.org.uk/developer/machines
2055 config ARCH_SUPPORT_TFABOOT
2059 bool "Support for booting from TF-A"
2060 depends on ARCH_SUPPORT_TFABOOT
2062 Some platforms support the setup of secure registers (for instance
2063 for CPU errata handling) or provide secure services like PSCI.
2064 Those services could also be provided by other firmware parts
2065 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
2066 does not need to (and cannot) execute this code.
2067 Enabling this option will make a U-Boot binary that is relying
2068 on other firmware layers to provide secure functionality.
2070 config TI_SECURE_DEVICE
2071 bool "HS Device Type Support"
2072 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2074 If a high secure (HS) device type is being used, this config
2075 must be set. This option impacts various aspects of the
2076 build system (to create signed boot images that can be
2077 authenticated) and the code. See the doc/README.ti-secure
2078 file for further details.
2080 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
2081 config ISW_ENTRY_ADDR
2082 hex "Address in memory or XIP address of bootloader entry point"
2083 default 0x402F4000 if AM43XX
2084 default 0x402F0400 if AM33XX
2085 default 0x40301350 if OMAP54XX
2087 After any reset, the boot ROM searches the boot media for a valid
2088 boot image. For non-XIP devices, the ROM then copies the image into
2089 internal memory. For all boot modes, after the ROM processes the
2090 boot image it eventually computes the entry point address depending
2091 on the device type (secure/non-secure), boot media (xip/non-xip) and
2095 config SYS_KWD_CONFIG
2096 string "kwbimage config file path"
2097 depends on ARCH_KIRKWOOD || ARCH_MVEBU
2098 default "arch/arm/mach-mvebu/kwbimage.cfg"
2100 Path within the source directory to the kwbimage.cfg file to use
2101 when packaging the U-Boot image for use.
2103 source "arch/arm/mach-apple/Kconfig"
2105 source "arch/arm/mach-aspeed/Kconfig"
2107 source "arch/arm/mach-at91/Kconfig"
2109 source "arch/arm/mach-bcm283x/Kconfig"
2111 source "arch/arm/mach-bcmstb/Kconfig"
2113 source "arch/arm/mach-davinci/Kconfig"
2115 source "arch/arm/mach-exynos/Kconfig"
2117 source "arch/arm/mach-highbank/Kconfig"
2119 source "arch/arm/mach-integrator/Kconfig"
2121 source "arch/arm/mach-ipq40xx/Kconfig"
2123 source "arch/arm/mach-k3/Kconfig"
2125 source "arch/arm/mach-keystone/Kconfig"
2127 source "arch/arm/mach-kirkwood/Kconfig"
2129 source "arch/arm/mach-lpc32xx/Kconfig"
2131 source "arch/arm/mach-mvebu/Kconfig"
2133 source "arch/arm/mach-octeontx/Kconfig"
2135 source "arch/arm/mach-octeontx2/Kconfig"
2137 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2139 source "arch/arm/mach-imx/mx3/Kconfig"
2141 source "arch/arm/mach-imx/mx5/Kconfig"
2143 source "arch/arm/mach-imx/mx6/Kconfig"
2145 source "arch/arm/mach-imx/mx7/Kconfig"
2147 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2149 source "arch/arm/mach-imx/imx8/Kconfig"
2151 source "arch/arm/mach-imx/imx8m/Kconfig"
2153 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2155 source "arch/arm/mach-imx/imxrt/Kconfig"
2157 source "arch/arm/mach-imx/mxs/Kconfig"
2159 source "arch/arm/mach-omap2/Kconfig"
2161 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2163 source "arch/arm/mach-orion5x/Kconfig"
2165 source "arch/arm/mach-owl/Kconfig"
2167 source "arch/arm/mach-rmobile/Kconfig"
2169 source "arch/arm/mach-meson/Kconfig"
2171 source "arch/arm/mach-mediatek/Kconfig"
2173 source "arch/arm/mach-qemu/Kconfig"
2175 source "arch/arm/mach-rockchip/Kconfig"
2177 source "arch/arm/mach-s5pc1xx/Kconfig"
2179 source "arch/arm/mach-snapdragon/Kconfig"
2181 source "arch/arm/mach-socfpga/Kconfig"
2183 source "arch/arm/mach-sti/Kconfig"
2185 source "arch/arm/mach-stm32/Kconfig"
2187 source "arch/arm/mach-stm32mp/Kconfig"
2189 source "arch/arm/mach-sunxi/Kconfig"
2191 source "arch/arm/mach-tegra/Kconfig"
2193 source "arch/arm/mach-u8500/Kconfig"
2195 source "arch/arm/mach-uniphier/Kconfig"
2197 source "arch/arm/cpu/armv7/vf610/Kconfig"
2199 source "arch/arm/mach-zynq/Kconfig"
2201 source "arch/arm/mach-zynqmp/Kconfig"
2203 source "arch/arm/mach-versal/Kconfig"
2205 source "arch/arm/mach-zynqmp-r5/Kconfig"
2207 source "arch/arm/cpu/armv7/Kconfig"
2209 source "arch/arm/cpu/armv8/Kconfig"
2211 source "arch/arm/mach-imx/Kconfig"
2213 source "arch/arm/mach-nexell/Kconfig"
2215 source "board/armltd/total_compute/Kconfig"
2217 source "board/bosch/shc/Kconfig"
2218 source "board/bosch/guardian/Kconfig"
2219 source "board/Marvell/octeontx/Kconfig"
2220 source "board/Marvell/octeontx2/Kconfig"
2221 source "board/armltd/vexpress/Kconfig"
2222 source "board/armltd/vexpress64/Kconfig"
2223 source "board/cortina/presidio-asic/Kconfig"
2224 source "board/broadcom/bcm963158/Kconfig"
2225 source "board/broadcom/bcm96753ref/Kconfig"
2226 source "board/broadcom/bcm968360bg/Kconfig"
2227 source "board/broadcom/bcm968580xref/Kconfig"
2228 source "board/broadcom/bcmns3/Kconfig"
2229 source "board/cavium/thunderx/Kconfig"
2230 source "board/eets/pdu001/Kconfig"
2231 source "board/emulation/qemu-arm/Kconfig"
2232 source "board/freescale/ls2080aqds/Kconfig"
2233 source "board/freescale/ls2080ardb/Kconfig"
2234 source "board/freescale/ls1088a/Kconfig"
2235 source "board/freescale/ls1028a/Kconfig"
2236 source "board/freescale/ls1021aqds/Kconfig"
2237 source "board/freescale/ls1043aqds/Kconfig"
2238 source "board/freescale/ls1021atwr/Kconfig"
2239 source "board/freescale/ls1021atsn/Kconfig"
2240 source "board/freescale/ls1021aiot/Kconfig"
2241 source "board/freescale/ls1046aqds/Kconfig"
2242 source "board/freescale/ls1043ardb/Kconfig"
2243 source "board/freescale/ls1046ardb/Kconfig"
2244 source "board/freescale/ls1046afrwy/Kconfig"
2245 source "board/freescale/ls1012aqds/Kconfig"
2246 source "board/freescale/ls1012ardb/Kconfig"
2247 source "board/freescale/ls1012afrdm/Kconfig"
2248 source "board/freescale/lx2160a/Kconfig"
2249 source "board/grinn/chiliboard/Kconfig"
2250 source "board/hisilicon/hikey/Kconfig"
2251 source "board/hisilicon/hikey960/Kconfig"
2252 source "board/hisilicon/poplar/Kconfig"
2253 source "board/isee/igep003x/Kconfig"
2254 source "board/kontron/sl28/Kconfig"
2255 source "board/myir/mys_6ulx/Kconfig"
2256 source "board/seeed/npi_imx6ull/Kconfig"
2257 source "board/socionext/developerbox/Kconfig"
2258 source "board/st/stv0991/Kconfig"
2259 source "board/tcl/sl50/Kconfig"
2260 source "board/toradex/colibri_pxa270/Kconfig"
2261 source "board/traverse/ten64/Kconfig"
2262 source "board/variscite/dart_6ul/Kconfig"
2263 source "board/vscom/baltos/Kconfig"
2264 source "board/phytium/durian/Kconfig"
2265 source "board/phytium/pomelo/Kconfig"
2266 source "board/xen/xenguest_arm64/Kconfig"
2268 source "arch/arm/Kconfig.debug"
2273 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2274 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2275 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64