1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed from
19 almost any 4K aligned address. This logic relies on the relocation
20 information that is embedded in the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
25 default n if ARCH_QEMU
26 default y if POSITION_INDEPENDENT
28 U-Boot typically uses a hard-coded value for the stack pointer
29 before relocation. Enable this option to instead calculate the
30 initial SP at run-time. This is useful to avoid hard-coding addresses
31 into U-Boot, so that it can be loaded and executed at arbitrary
32 addresses and thus avoid using arbitrary addresses at runtime.
34 If this option is enabled, the early stack pointer is set to
35 &_bss_start with a offset value added. The offset is specified by
36 SYS_INIT_SP_BSS_OFFSET.
38 config SYS_INIT_SP_BSS_OFFSET
39 int "Early stack offset from the .bss base address"
40 depends on INIT_SP_RELATIVE
43 This option's value is the offset added to &_bss_start in order to
44 calculate the stack pointer. This offset should be large enough so
45 that the early malloc region, global data (gd), and early stack usage
46 do not overlap any appended DTB.
48 config LINUX_KERNEL_IMAGE_HEADER
51 Place a Linux kernel image header at the start of the U-Boot binary.
52 The format of the header is described in the Linux kernel source at
53 Documentation/arm64/booting.txt. This feature is useful since the
54 image header reports the amount of memory (BSS and similar) that
55 U-Boot needs to use, but which isn't part of the binary.
57 if LINUX_KERNEL_IMAGE_HEADER
58 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
61 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
62 TEXT_OFFSET value written to the Linux kernel image header.
72 ARM GICV3 Interrupt translation service (ITS).
73 Basic support for programming locality specific peripheral
74 interrupts (LPI) configuration tables and enable LPI tables.
75 LPI configuration table can be used by u-boot or Linux.
76 ARM GICV3 has limitation, once the LPI table is enabled, LPI
77 configuration table can not be re-programmed, unless GICV3 reset.
83 config DMA_ADDR_T_64BIT
93 # Used for compatibility with asm files copied from the kernel
94 config ARM_ASM_UNIFIED
98 # Used for compatibility with asm files copied from the kernel
102 config SYS_ICACHE_OFF
103 bool "Do not enable icache"
106 Do not enable instruction cache in U-Boot.
108 config SPL_SYS_ICACHE_OFF
109 bool "Do not enable icache in SPL"
111 default SYS_ICACHE_OFF
113 Do not enable instruction cache in SPL.
115 config SYS_DCACHE_OFF
116 bool "Do not enable dcache"
119 Do not enable data cache in U-Boot.
121 config SPL_SYS_DCACHE_OFF
122 bool "Do not enable dcache in SPL"
124 default SYS_DCACHE_OFF
126 Do not enable data cache in SPL.
128 config SYS_ARM_CACHE_CP15
129 bool "CP15 based cache enabling support"
131 Select this if your processor suports enabling caches by using
135 bool "MMU-based Paged Memory Management Support"
136 select SYS_ARM_CACHE_CP15
138 Select if you want MMU-based virtualised addressing space
139 support via paged memory management.
142 bool 'Use the ARM v7 PMSA Compliant MPU'
144 Some ARM systems without an MMU have instead a Memory Protection
145 Unit (MPU) that defines the type and permissions for regions of
147 If your CPU has an MPU then you should choose 'y' here unless you
148 know that you do not want to use the MPU.
150 # If set, the workarounds for these ARM errata are applied early during U-Boot
151 # startup. Note that in general these options force the workarounds to be
152 # applied; no CPU-type/version detection exists, unlike the similar options in
153 # the Linux kernel. Do not set these options unless they apply! Also note that
154 # the following can be machine-specific errata. These do have ability to
155 # provide rudimentary version and machine-specific checks, but expect no
157 # CONFIG_ARM_ERRATA_430973
158 # CONFIG_ARM_ERRATA_454179
159 # CONFIG_ARM_ERRATA_621766
160 # CONFIG_ARM_ERRATA_798870
161 # CONFIG_ARM_ERRATA_801819
162 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
163 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
165 config ARM_ERRATA_430973
168 config ARM_ERRATA_454179
171 config ARM_ERRATA_621766
174 config ARM_ERRATA_716044
177 config ARM_ERRATA_725233
180 config ARM_ERRATA_742230
183 config ARM_ERRATA_743622
186 config ARM_ERRATA_751472
189 config ARM_ERRATA_761320
192 config ARM_ERRATA_773022
195 config ARM_ERRATA_774769
198 config ARM_ERRATA_794072
201 config ARM_ERRATA_798870
204 config ARM_ERRATA_801819
207 config ARM_ERRATA_826974
210 config ARM_ERRATA_828024
213 config ARM_ERRATA_829520
216 config ARM_ERRATA_833069
219 config ARM_ERRATA_833471
222 config ARM_ERRATA_845369
225 config ARM_ERRATA_852421
228 config ARM_ERRATA_852423
231 config ARM_ERRATA_855873
234 config ARM_CORTEX_A8_CVE_2017_5715
237 config ARM_CORTEX_A15_CVE_2017_5715
242 select SYS_CACHE_SHIFT_5
247 select SYS_CACHE_SHIFT_5
252 select SYS_CACHE_SHIFT_5
257 select SYS_CACHE_SHIFT_5
262 select SYS_CACHE_SHIFT_5
268 select SYS_CACHE_SHIFT_5
275 select SYS_CACHE_SHIFT_6
282 select SYS_CACHE_SHIFT_5
283 select SYS_THUMB_BUILD
289 select SYS_ARM_CACHE_CP15
291 select SYS_CACHE_SHIFT_6
295 select SYS_CACHE_SHIFT_5
300 select SYS_CACHE_SHIFT_5
304 default "arm720t" if CPU_ARM720T
305 default "arm920t" if CPU_ARM920T
306 default "arm926ejs" if CPU_ARM926EJS
307 default "arm946es" if CPU_ARM946ES
308 default "arm1136" if CPU_ARM1136
309 default "arm1176" if CPU_ARM1176
310 default "armv7" if CPU_V7A
311 default "armv7" if CPU_V7R
312 default "armv7m" if CPU_V7M
313 default "pxa" if CPU_PXA
314 default "sa1100" if CPU_SA1100
315 default "armv8" if ARM64
319 default 4 if CPU_ARM720T
320 default 4 if CPU_ARM920T
321 default 5 if CPU_ARM926EJS
322 default 5 if CPU_ARM946ES
323 default 6 if CPU_ARM1136
324 default 6 if CPU_ARM1176
329 default 4 if CPU_SA1100
332 config SYS_CACHE_SHIFT_5
335 config SYS_CACHE_SHIFT_6
338 config SYS_CACHE_SHIFT_7
341 config SYS_CACHELINE_SIZE
343 default 128 if SYS_CACHE_SHIFT_7
344 default 64 if SYS_CACHE_SHIFT_6
345 default 32 if SYS_CACHE_SHIFT_5
348 prompt "Select the ARM data write cache policy"
349 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
351 default SYS_ARM_CACHE_WRITEBACK
353 config SYS_ARM_CACHE_WRITEBACK
354 bool "Write-back (WB)"
356 A write updates the cache only and marks the cache line as dirty.
357 External memory is updated only when the line is evicted or explicitly
360 config SYS_ARM_CACHE_WRITETHROUGH
361 bool "Write-through (WT)"
363 A write updates both the cache and the external memory system.
364 This does not mark the cache line as dirty.
366 config SYS_ARM_CACHE_WRITEALLOC
367 bool "Write allocation (WA)"
369 A cache line is allocated on a write miss. This means that executing a
370 store instruction on the processor might cause a burst read to occur.
371 There is a linefill to obtain the data for the cache line, before the
376 bool "Enable ARCH_CPU_INIT"
378 Some architectures require a call to arch_cpu_init().
379 Say Y here to enable it
381 config SYS_ARCH_TIMER
382 bool "ARM Generic Timer support"
383 depends on CPU_V7A || ARM64
386 The ARM Generic Timer (aka arch-timer) provides an architected
387 interface to a timer source on an SoC.
388 It is mandatory for ARMv8 implementation and widely available
392 bool "Support for ARM SMC Calling Convention (SMCCC)"
393 depends on CPU_V7A || ARM64
396 Say Y here if you want to enable ARM SMC Calling Convention.
397 This should be enabled if U-Boot needs to communicate with system
398 firmware (for example, PSCI) according to SMCCC.
401 bool "support boot from semihosting"
403 In emulated environments, semihosting is a way for
404 the hosted environment to call out to the emulator to
405 retrieve files from the host machine.
407 config SYS_THUMB_BUILD
408 bool "Build U-Boot using the Thumb instruction set"
411 Use this flag to build U-Boot using the Thumb instruction set for
412 ARM architectures. Thumb instruction set provides better code
413 density. For ARM architectures that support Thumb2 this flag will
414 result in Thumb2 code generated by GCC.
416 config SPL_SYS_THUMB_BUILD
417 bool "Build SPL using the Thumb instruction set"
418 default y if SYS_THUMB_BUILD
419 depends on !ARM64 && SPL
421 Use this flag to build SPL using the Thumb instruction set for
422 ARM architectures. Thumb instruction set provides better code
423 density. For ARM architectures that support Thumb2 this flag will
424 result in Thumb2 code generated by GCC.
426 config TPL_SYS_THUMB_BUILD
427 bool "Build TPL using the Thumb instruction set"
428 default y if SYS_THUMB_BUILD
429 depends on TPL && !ARM64
431 Use this flag to build TPL using the Thumb instruction set for
432 ARM architectures. Thumb instruction set provides better code
433 density. For ARM architectures that support Thumb2 this flag will
434 result in Thumb2 code generated by GCC.
437 config SYS_L2CACHE_OFF
440 If SoC does not support L2CACHE or one does not want to enable
441 L2CACHE, choose this option.
443 config ENABLE_ARM_SOC_BOOT0_HOOK
444 bool "prepare BOOT0 header"
446 If the SoC's BOOT0 requires a header area filled with (magic)
447 values, then choose this option, and create a file included as
448 <asm/arch/boot0.h> which contains the required assembler code.
450 config ARM_CORTEX_CPU_IS_UP
454 config USE_ARCH_MEMCPY
455 bool "Use an assembly optimized implementation of memcpy"
459 Enable the generation of an optimized version of memcpy.
460 Such an implementation may be faster under some conditions
461 but may increase the binary size.
463 config SPL_USE_ARCH_MEMCPY
464 bool "Use an assembly optimized implementation of memcpy for SPL"
465 default y if USE_ARCH_MEMCPY
466 depends on !ARM64 && SPL
468 Enable the generation of an optimized version of memcpy.
469 Such an implementation may be faster under some conditions
470 but may increase the binary size.
472 config TPL_USE_ARCH_MEMCPY
473 bool "Use an assembly optimized implementation of memcpy for TPL"
474 default y if USE_ARCH_MEMCPY
475 depends on !ARM64 && TPL
477 Enable the generation of an optimized version of memcpy.
478 Such an implementation may be faster under some conditions
479 but may increase the binary size.
481 config USE_ARCH_MEMSET
482 bool "Use an assembly optimized implementation of memset"
486 Enable the generation of an optimized version of memset.
487 Such an implementation may be faster under some conditions
488 but may increase the binary size.
490 config SPL_USE_ARCH_MEMSET
491 bool "Use an assembly optimized implementation of memset for SPL"
492 default y if USE_ARCH_MEMSET
493 depends on !ARM64 && SPL
495 Enable the generation of an optimized version of memset.
496 Such an implementation may be faster under some conditions
497 but may increase the binary size.
499 config TPL_USE_ARCH_MEMSET
500 bool "Use an assembly optimized implementation of memset for TPL"
501 default y if USE_ARCH_MEMSET
502 depends on !ARM64 && TPL
504 Enable the generation of an optimized version of memset.
505 Such an implementation may be faster under some conditions
506 but may increase the binary size.
508 config ARM64_SUPPORT_AARCH32
509 bool "ARM64 system support AArch32 execution state"
511 default y if !TARGET_THUNDERX_88XX
513 This ARM64 system supports AArch32 execution state.
516 prompt "Target select"
521 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
522 select SPL_SEPARATE_BSS if SPL
524 config TARGET_EDB93XX
525 bool "Support edb93xx"
529 config TARGET_ASPENITE
530 bool "Support aspenite"
534 bool "Support gplugd"
540 select SPL_DM_SPI if SPL
543 Support for TI's DaVinci platform.
546 bool "Marvell Kirkwood"
547 select ARCH_MISC_INIT
548 select BOARD_EARLY_INIT_F
552 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
558 select SPL_DM_SPI if SPL
559 select SPL_DM_SPI_FLASH if SPL
569 config TARGET_SPEAR300
570 bool "Support spear300"
571 select BOARD_EARLY_INIT_F
576 config TARGET_SPEAR310
577 bool "Support spear310"
578 select BOARD_EARLY_INIT_F
583 config TARGET_SPEAR320
584 bool "Support spear320"
585 select BOARD_EARLY_INIT_F
590 config TARGET_SPEAR600
591 bool "Support spear600"
592 select BOARD_EARLY_INIT_F
597 config TARGET_STV0991
598 bool "Support stv0991"
611 select BOARD_LATE_INIT
621 bool "Broadcom BCM283X family"
627 select SERIAL_SEARCH_ALL
632 bool "Broadcom BCM63158 family"
638 bool "Broadcom BCM68360 family"
644 bool "Broadcom BCM6858 family"
650 bool "Broadcom BCM7XXX family"
654 select OF_PRIOR_STAGE
657 This enables support for Broadcom ARM-based set-top box
658 chipsets, including the 7445 family of chips.
660 config TARGET_BCMCYGNUS
661 bool "Support bcmcygnus"
664 imply BCM_SF2_ETH_GMAC
672 bool "Support Broadcom Northstar2"
675 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
676 ARMv8 Cortex-A57 processors targeting a broad range of networking
680 bool "Support Broadcom NS3"
682 select BOARD_LATE_INIT
684 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
685 ARMv8 Cortex-A72 processors targeting a broad range of networking
689 bool "Samsung EXYNOS"
698 imply SYS_THUMB_BUILD
703 bool "Samsung S5PC1XX"
712 bool "Calxeda Highbank"
716 config ARCH_INTEGRATOR
717 bool "ARM Ltd. Integrator family"
724 bool "Qualcomm IPQ40xx SoCs"
742 select SYS_ARCH_TIMER
743 select SYS_THUMB_BUILD
749 bool "Texas Instruments' K3 Architecture"
754 config ARCH_OMAP2PLUS
757 select SPL_BOARD_INIT if SPL
758 select SPL_STACK_R if SPL
760 imply TI_SYSC if DM && OF_CONTROL
765 imply DISTRO_DEFAULTS
768 Support for the Meson SoC family developed by Amlogic Inc.,
769 targeted at media players and tablet computers. We currently
770 support the S905 (GXBaby) 64-bit SoC.
777 select SPL_LIBCOMMON_SUPPORT if SPL
778 select SPL_LIBGENERIC_SUPPORT if SPL
779 select SPL_OF_CONTROL if SPL
782 Support for the MediaTek SoCs family developed by MediaTek Inc.
783 Please refer to doc/README.mediatek for more information.
786 bool "NXP LPC32xx platform"
796 bool "NXP i.MX8 platform"
800 select ENABLE_ARM_SOC_BOOT0_HOOK
803 bool "NXP i.MX8M platform"
805 select SYS_FSL_HAS_SEC if IMX_HAB
806 select SYS_FSL_SEC_COMPAT_4
807 select SYS_FSL_SEC_LE
813 bool "NXP i.MXRT platform"
821 bool "NXP i.MX23 family"
832 bool "NXP i.MX28 family"
838 bool "NXP i.MX31 family"
844 select SYS_FSL_HAS_SEC if IMX_HAB
845 select SYS_FSL_SEC_COMPAT_4
846 select SYS_FSL_SEC_LE
847 select ROM_UNIFIED_SECTIONS
849 imply SYS_THUMB_BUILD
853 select ARCH_MISC_INIT
855 select SYS_FSL_HAS_SEC if IMX_HAB
856 select SYS_FSL_SEC_COMPAT_4
857 select SYS_FSL_SEC_LE
858 imply BOARD_EARLY_INIT_F
860 imply SYS_THUMB_BUILD
865 select SYS_FSL_HAS_SEC
866 select SYS_FSL_SEC_COMPAT_4
867 select SYS_FSL_SEC_LE
869 imply SYS_THUMB_BUILD
873 default "arch/arm/mach-omap2/u-boot-spl.lds"
878 select BOARD_EARLY_INIT_F
883 bool "Nexell S5P4418/S5P6818 SoC"
884 select ENABLE_ARM_SOC_BOOT0_HOOK
888 bool "Actions Semi OWL SoCs"
896 select SYS_RELOC_GD_ENV_ADDR
900 bool "QEMU Virtual Platform"
911 bool "Renesas ARM SoCs"
914 imply BOARD_EARLY_INIT_F
917 imply SYS_THUMB_BUILD
918 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
920 config ARCH_SNAPDRAGON
921 bool "Qualcomm Snapdragon SoCs"
934 bool "Altera SOCFPGA family"
935 select ARCH_EARLY_INIT_R
936 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
937 select ARM64 if TARGET_SOCFPGA_SOC64
938 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
941 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
943 select SPL_DM_RESET if DM_RESET
945 select SPL_LIBCOMMON_SUPPORT
946 select SPL_LIBGENERIC_SUPPORT
947 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
948 select SPL_OF_CONTROL
949 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
950 select SPL_SERIAL_SUPPORT
952 select SPL_WATCHDOG_SUPPORT
955 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
957 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
958 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
968 imply SPL_DM_SPI_FLASH
969 imply SPL_LIBDISK_SUPPORT
970 imply SPL_MMC_SUPPORT
971 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
972 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
973 imply SPL_SPI_FLASH_SUPPORT
974 imply SPL_SPI_SUPPORT
978 bool "Support sunxi (Allwinner) SoCs"
981 select CMD_MMC if MMC
982 select CMD_USB if DISTRO_DEFAULTS
989 select DM_SCSI if SCSI
991 select DM_USB if DISTRO_DEFAULTS
992 select OF_BOARD_SETUP
995 select SPECIFY_CONSOLE_INDEX
996 select SPL_STACK_R if SPL
997 select SPL_SYS_MALLOC_SIMPLE if SPL
998 select SPL_SYS_THUMB_BUILD if !ARM64
1001 select SYS_THUMB_BUILD if !ARM64
1002 select USB if DISTRO_DEFAULTS
1003 select USB_KEYBOARD if DISTRO_DEFAULTS
1004 select USB_STORAGE if DISTRO_DEFAULTS
1005 select SPL_USE_TINY_PRINTF
1007 select SYS_RELOC_GD_ENV_ADDR
1008 imply BOARD_LATE_INIT
1011 imply CMD_UBI if MTD_RAW_NAND
1012 imply DISTRO_DEFAULTS
1015 imply OF_LIBFDT_OVERLAY
1016 imply PRE_CONSOLE_BUFFER
1017 imply SPL_GPIO_SUPPORT
1018 imply SPL_LIBCOMMON_SUPPORT
1019 imply SPL_LIBGENERIC_SUPPORT
1020 imply SPL_MMC_SUPPORT if MMC
1021 imply SPL_POWER_SUPPORT
1022 imply SPL_SERIAL_SUPPORT
1026 bool "ST-Ericsson U8500 Series"
1030 select DM_MMC if MMC
1032 select DM_USB if USB
1036 imply ARM_PL180_MMCI
1038 imply NOMADIK_MTU_TIMER
1041 imply SYSRESET_SYSCON
1044 bool "Support Xilinx Versal Platform"
1048 select DM_ETH if NET
1049 select DM_MMC if MMC
1052 imply BOARD_LATE_INIT
1053 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1056 bool "Freescale Vybrid"
1058 select SYS_FSL_ERRATUM_ESDHC111
1063 bool "Xilinx Zynq based platform"
1068 select DM_ETH if NET
1069 select DM_MMC if MMC
1073 select DM_USB if USB
1076 select SPL_BOARD_INIT if SPL
1077 select SPL_CLK if SPL
1078 select SPL_DM if SPL
1079 select SPL_DM_SPI if SPL
1080 select SPL_DM_SPI_FLASH if SPL
1081 select SPL_OF_CONTROL if SPL
1082 select SPL_SEPARATE_BSS if SPL
1084 imply ARCH_EARLY_INIT_R
1085 imply BOARD_LATE_INIT
1089 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1092 config ARCH_ZYNQMP_R5
1093 bool "Xilinx ZynqMP R5 based platform"
1097 select DM_ETH if NET
1098 select DM_MMC if MMC
1105 bool "Xilinx ZynqMP based platform"
1109 select DM_ETH if NET
1111 select DM_MMC if MMC
1113 select DM_SPI if SPI
1114 select DM_SPI_FLASH if DM_SPI
1115 select DM_USB if USB
1118 select SPL_BOARD_INIT if SPL
1119 select SPL_CLK if SPL
1120 select SPL_DM if SPL
1121 select SPL_DM_SPI if SPI && SPL_DM
1122 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1123 select SPL_DM_MAILBOX if SPL
1124 select SPL_FIRMWARE if SPL
1125 select SPL_SEPARATE_BSS if SPL
1128 imply BOARD_LATE_INIT
1130 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1137 imply DISTRO_DEFAULTS
1140 config TARGET_VEXPRESS64_AEMV8A
1141 bool "Support vexpress_aemv8a"
1145 config TARGET_VEXPRESS64_BASE_FVP
1146 bool "Support Versatile Express ARMv8a FVP BASE model"
1151 config TARGET_VEXPRESS64_JUNO
1152 bool "Support Versatile Express Juno Development Platform"
1167 config TARGET_TOTAL_COMPUTE
1168 bool "Support Total Compute Platform"
1176 config TARGET_LS2080A_EMU
1177 bool "Support ls2080a_emu"
1180 select ARMV8_MULTIENTRY
1181 select FSL_DDR_SYNC_REFRESH
1183 Support for Freescale LS2080A_EMU platform.
1184 The LS2080A Development System (EMULATOR) is a pre-silicon
1185 development platform that supports the QorIQ LS2080A
1186 Layerscape Architecture processor.
1188 config TARGET_LS1088AQDS
1189 bool "Support ls1088aqds"
1192 select ARMV8_MULTIENTRY
1193 select ARCH_SUPPORT_TFABOOT
1194 select BOARD_LATE_INIT
1196 select FSL_DDR_INTERACTIVE if !SD_BOOT
1198 Support for NXP LS1088AQDS platform.
1199 The LS1088A Development System (QDS) is a high-performance
1200 development platform that supports the QorIQ LS1088A
1201 Layerscape Architecture processor.
1203 config TARGET_LS2080AQDS
1204 bool "Support ls2080aqds"
1207 select ARMV8_MULTIENTRY
1208 select ARCH_SUPPORT_TFABOOT
1209 select BOARD_LATE_INIT
1214 select FSL_DDR_INTERACTIVE if !SPL
1216 Support for Freescale LS2080AQDS platform.
1217 The LS2080A Development System (QDS) is a high-performance
1218 development platform that supports the QorIQ LS2080A
1219 Layerscape Architecture processor.
1221 config TARGET_LS2080ARDB
1222 bool "Support ls2080ardb"
1225 select ARMV8_MULTIENTRY
1226 select ARCH_SUPPORT_TFABOOT
1227 select BOARD_LATE_INIT
1230 select FSL_DDR_INTERACTIVE if !SPL
1234 Support for Freescale LS2080ARDB platform.
1235 The LS2080A Reference design board (RDB) is a high-performance
1236 development platform that supports the QorIQ LS2080A
1237 Layerscape Architecture processor.
1239 config TARGET_LS2081ARDB
1240 bool "Support ls2081ardb"
1243 select ARMV8_MULTIENTRY
1244 select BOARD_LATE_INIT
1247 Support for Freescale LS2081ARDB platform.
1248 The LS2081A Reference design board (RDB) is a high-performance
1249 development platform that supports the QorIQ LS2081A/LS2041A
1250 Layerscape Architecture processor.
1252 config TARGET_LX2160ARDB
1253 bool "Support lx2160ardb"
1256 select ARMV8_MULTIENTRY
1257 select ARCH_SUPPORT_TFABOOT
1258 select BOARD_LATE_INIT
1260 Support for NXP LX2160ARDB platform.
1261 The lx2160ardb (LX2160A Reference design board (RDB)
1262 is a high-performance development platform that supports the
1263 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1265 config TARGET_LX2160AQDS
1266 bool "Support lx2160aqds"
1269 select ARMV8_MULTIENTRY
1270 select ARCH_SUPPORT_TFABOOT
1271 select BOARD_LATE_INIT
1273 Support for NXP LX2160AQDS platform.
1274 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1275 is a high-performance development platform that supports the
1276 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1278 config TARGET_LX2162AQDS
1279 bool "Support lx2162aqds"
1281 select ARCH_MISC_INIT
1283 select ARMV8_MULTIENTRY
1284 select ARCH_SUPPORT_TFABOOT
1285 select BOARD_LATE_INIT
1287 Support for NXP LX2162AQDS platform.
1288 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1291 bool "Support HiKey 96boards Consumer Edition Platform"
1298 select SPECIFY_CONSOLE_INDEX
1301 Support for HiKey 96boards platform. It features a HI6220
1302 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1304 config TARGET_HIKEY960
1305 bool "Support HiKey960 96boards Consumer Edition Platform"
1313 Support for HiKey960 96boards platform. It features a HI3660
1314 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1316 config TARGET_POPLAR
1317 bool "Support Poplar 96boards Enterprise Edition Platform"
1326 Support for Poplar 96boards EE platform. It features a HI3798cv200
1327 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1328 making it capable of running any commercial set-top solution based on
1331 config TARGET_LS1012AQDS
1332 bool "Support ls1012aqds"
1335 select ARCH_SUPPORT_TFABOOT
1336 select BOARD_LATE_INIT
1338 Support for Freescale LS1012AQDS platform.
1339 The LS1012A Development System (QDS) is a high-performance
1340 development platform that supports the QorIQ LS1012A
1341 Layerscape Architecture processor.
1343 config TARGET_LS1012ARDB
1344 bool "Support ls1012ardb"
1347 select ARCH_SUPPORT_TFABOOT
1348 select BOARD_LATE_INIT
1352 Support for Freescale LS1012ARDB platform.
1353 The LS1012A Reference design board (RDB) is a high-performance
1354 development platform that supports the QorIQ LS1012A
1355 Layerscape Architecture processor.
1357 config TARGET_LS1012A2G5RDB
1358 bool "Support ls1012a2g5rdb"
1361 select ARCH_SUPPORT_TFABOOT
1362 select BOARD_LATE_INIT
1365 Support for Freescale LS1012A2G5RDB platform.
1366 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1367 development platform that supports the QorIQ LS1012A
1368 Layerscape Architecture processor.
1370 config TARGET_LS1012AFRWY
1371 bool "Support ls1012afrwy"
1374 select ARCH_SUPPORT_TFABOOT
1375 select BOARD_LATE_INIT
1379 Support for Freescale LS1012AFRWY platform.
1380 The LS1012A FRWY board (FRWY) is a high-performance
1381 development platform that supports the QorIQ LS1012A
1382 Layerscape Architecture processor.
1384 config TARGET_LS1012AFRDM
1385 bool "Support ls1012afrdm"
1388 select ARCH_SUPPORT_TFABOOT
1390 Support for Freescale LS1012AFRDM platform.
1391 The LS1012A Freedom board (FRDM) is a high-performance
1392 development platform that supports the QorIQ LS1012A
1393 Layerscape Architecture processor.
1395 config TARGET_LS1028AQDS
1396 bool "Support ls1028aqds"
1399 select ARMV8_MULTIENTRY
1400 select ARCH_SUPPORT_TFABOOT
1401 select BOARD_LATE_INIT
1403 Support for Freescale LS1028AQDS platform
1404 The LS1028A Development System (QDS) is a high-performance
1405 development platform that supports the QorIQ LS1028A
1406 Layerscape Architecture processor.
1408 config TARGET_LS1028ARDB
1409 bool "Support ls1028ardb"
1412 select ARMV8_MULTIENTRY
1413 select ARCH_SUPPORT_TFABOOT
1414 select BOARD_LATE_INIT
1416 Support for Freescale LS1028ARDB platform
1417 The LS1028A Development System (RDB) is a high-performance
1418 development platform that supports the QorIQ LS1028A
1419 Layerscape Architecture processor.
1421 config TARGET_LS1088ARDB
1422 bool "Support ls1088ardb"
1425 select ARMV8_MULTIENTRY
1426 select ARCH_SUPPORT_TFABOOT
1427 select BOARD_LATE_INIT
1429 select FSL_DDR_INTERACTIVE if !SD_BOOT
1431 Support for NXP LS1088ARDB platform.
1432 The LS1088A Reference design board (RDB) is a high-performance
1433 development platform that supports the QorIQ LS1088A
1434 Layerscape Architecture processor.
1436 config TARGET_LS1021AQDS
1437 bool "Support ls1021aqds"
1439 select ARCH_SUPPORT_PSCI
1440 select BOARD_EARLY_INIT_F
1441 select BOARD_LATE_INIT
1443 select CPU_V7_HAS_NONSEC
1444 select CPU_V7_HAS_VIRT
1445 select LS1_DEEP_SLEEP
1448 select FSL_DDR_INTERACTIVE
1449 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1450 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1453 config TARGET_LS1021ATWR
1454 bool "Support ls1021atwr"
1456 select ARCH_SUPPORT_PSCI
1457 select BOARD_EARLY_INIT_F
1458 select BOARD_LATE_INIT
1460 select CPU_V7_HAS_NONSEC
1461 select CPU_V7_HAS_VIRT
1462 select LS1_DEEP_SLEEP
1464 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1467 config TARGET_PG_WCOM_SELI8
1468 bool "Support Hitachi-Powergrids SELI8 service unit card"
1470 select ARCH_SUPPORT_PSCI
1471 select BOARD_EARLY_INIT_F
1472 select BOARD_LATE_INIT
1474 select CPU_V7_HAS_NONSEC
1475 select CPU_V7_HAS_VIRT
1477 select FSL_DDR_INTERACTIVE
1481 Support for Hitachi-Powergrids SELI8 service unit card.
1482 SELI8 is a QorIQ LS1021a based service unit card used
1483 in XMC20 and FOX615 product families.
1485 config TARGET_LS1021ATSN
1486 bool "Support ls1021atsn"
1488 select ARCH_SUPPORT_PSCI
1489 select BOARD_EARLY_INIT_F
1490 select BOARD_LATE_INIT
1492 select CPU_V7_HAS_NONSEC
1493 select CPU_V7_HAS_VIRT
1494 select LS1_DEEP_SLEEP
1498 config TARGET_LS1021AIOT
1499 bool "Support ls1021aiot"
1501 select ARCH_SUPPORT_PSCI
1502 select BOARD_LATE_INIT
1504 select CPU_V7_HAS_NONSEC
1505 select CPU_V7_HAS_VIRT
1507 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1510 Support for Freescale LS1021AIOT platform.
1511 The LS1021A Freescale board (IOT) is a high-performance
1512 development platform that supports the QorIQ LS1021A
1513 Layerscape Architecture processor.
1515 config TARGET_LS1043AQDS
1516 bool "Support ls1043aqds"
1519 select ARMV8_MULTIENTRY
1520 select ARCH_SUPPORT_TFABOOT
1521 select BOARD_EARLY_INIT_F
1522 select BOARD_LATE_INIT
1524 select FSL_DDR_INTERACTIVE if !SPL
1525 select FSL_DSPI if !SPL_NO_DSPI
1526 select DM_SPI_FLASH if FSL_DSPI
1530 Support for Freescale LS1043AQDS platform.
1532 config TARGET_LS1043ARDB
1533 bool "Support ls1043ardb"
1536 select ARMV8_MULTIENTRY
1537 select ARCH_SUPPORT_TFABOOT
1538 select BOARD_EARLY_INIT_F
1539 select BOARD_LATE_INIT
1541 select FSL_DSPI if !SPL_NO_DSPI
1542 select DM_SPI_FLASH if FSL_DSPI
1544 Support for Freescale LS1043ARDB platform.
1546 config TARGET_LS1046AQDS
1547 bool "Support ls1046aqds"
1550 select ARMV8_MULTIENTRY
1551 select ARCH_SUPPORT_TFABOOT
1552 select BOARD_EARLY_INIT_F
1553 select BOARD_LATE_INIT
1554 select DM_SPI_FLASH if DM_SPI
1556 select FSL_DDR_BIST if !SPL
1557 select FSL_DDR_INTERACTIVE if !SPL
1558 select FSL_DDR_INTERACTIVE if !SPL
1561 Support for Freescale LS1046AQDS platform.
1562 The LS1046A Development System (QDS) is a high-performance
1563 development platform that supports the QorIQ LS1046A
1564 Layerscape Architecture processor.
1566 config TARGET_LS1046ARDB
1567 bool "Support ls1046ardb"
1570 select ARMV8_MULTIENTRY
1571 select ARCH_SUPPORT_TFABOOT
1572 select BOARD_EARLY_INIT_F
1573 select BOARD_LATE_INIT
1574 select DM_SPI_FLASH if DM_SPI
1575 select POWER_MC34VR500
1578 select FSL_DDR_INTERACTIVE if !SPL
1581 Support for Freescale LS1046ARDB platform.
1582 The LS1046A Reference Design Board (RDB) is a high-performance
1583 development platform that supports the QorIQ LS1046A
1584 Layerscape Architecture processor.
1586 config TARGET_LS1046AFRWY
1587 bool "Support ls1046afrwy"
1590 select ARMV8_MULTIENTRY
1591 select ARCH_SUPPORT_TFABOOT
1592 select BOARD_EARLY_INIT_F
1593 select BOARD_LATE_INIT
1594 select DM_SPI_FLASH if DM_SPI
1597 Support for Freescale LS1046AFRWY platform.
1598 The LS1046A Freeway Board (FRWY) is a high-performance
1599 development platform that supports the QorIQ LS1046A
1600 Layerscape Architecture processor.
1606 select ARMV8_MULTIENTRY
1623 select SPL_DM if SPL
1624 select SPL_DM_SPI if SPL
1625 select SPL_DM_SPI_FLASH if SPL
1626 select SPL_DM_I2C if SPL
1627 select SPL_DM_MMC if SPL
1628 select SPL_DM_SERIAL if SPL
1630 Support for Kontron SMARC-sAL28 board.
1632 config TARGET_COLIBRI_PXA270
1633 bool "Support colibri_pxa270"
1636 config ARCH_UNIPHIER
1637 bool "Socionext UniPhier SoCs"
1638 select BOARD_LATE_INIT
1648 select OF_BOARD_SETUP
1652 select SPL_BOARD_INIT if SPL
1653 select SPL_DM if SPL
1654 select SPL_LIBCOMMON_SUPPORT if SPL
1655 select SPL_LIBGENERIC_SUPPORT if SPL
1656 select SPL_OF_CONTROL if SPL
1657 select SPL_PINCTRL if SPL
1660 imply DISTRO_DEFAULTS
1663 Support for UniPhier SoC family developed by Socionext Inc.
1664 (formerly, System LSI Business Division of Panasonic Corporation)
1667 bool "Support STMicroelectronics STM32 MCU with cortex M"
1674 bool "Support STMicrolectronics SoCs"
1683 Support for STMicroelectronics STiH407/10 SoC family.
1684 This SoC is used on Linaro 96Board STiH410-B2260
1687 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1688 select ARCH_MISC_INIT
1689 select ARCH_SUPPORT_TFABOOT
1690 select BOARD_LATE_INIT
1699 select OF_SYSTEM_SETUP
1705 select SYS_THUMB_BUILD
1709 imply OF_LIBFDT_OVERLAY
1710 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1713 Support for STM32MP SoC family developed by STMicroelectronics,
1714 MPUs based on ARM cortex A core
1715 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1716 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1718 SPL is the unsecure FSBL for the basic boot chain.
1720 config ARCH_ROCKCHIP
1721 bool "Support Rockchip SoCs"
1723 select BINMAN if SPL_OPTEE
1733 select DM_USB if USB
1734 select ENABLE_ARM_SOC_BOOT0_HOOK
1737 select SPL_DM if SPL
1738 select SPL_DM_SPI if SPL
1739 select SPL_DM_SPI_FLASH if SPL
1741 select SYS_THUMB_BUILD if !ARM64
1744 imply DEBUG_UART_BOARD_INIT
1745 imply DISTRO_DEFAULTS
1747 imply SARADC_ROCKCHIP
1749 imply SPL_SYS_MALLOC_SIMPLE
1752 imply USB_FUNCTION_FASTBOOT
1754 config ARCH_OCTEONTX
1755 bool "Support OcteonTX SoCs"
1761 select BOARD_LATE_INIT
1762 select SYS_CACHE_SHIFT_7
1764 config ARCH_OCTEONTX2
1765 bool "Support OcteonTX2 SoCs"
1771 select BOARD_LATE_INIT
1772 select SYS_CACHE_SHIFT_7
1774 config TARGET_THUNDERX_88XX
1775 bool "Support ThunderX 88xx"
1779 select SYS_CACHE_SHIFT_7
1782 bool "Support Aspeed SoCs"
1787 config TARGET_DURIAN
1788 bool "Support Phytium Durian Platform"
1791 Support for durian platform.
1792 It has 2GB Sdram, uart and pcie.
1794 config TARGET_PRESIDIO_ASIC
1795 bool "Support Cortina Presidio ASIC Platform"
1798 config TARGET_XENGUEST_ARM64
1799 bool "Xen guest ARM64"
1803 select LINUX_KERNEL_IMAGE_HEADER
1808 config ARCH_SUPPORT_TFABOOT
1812 bool "Support for booting from TF-A"
1813 depends on ARCH_SUPPORT_TFABOOT
1816 Some platforms support the setup of secure registers (for instance
1817 for CPU errata handling) or provide secure services like PSCI.
1818 Those services could also be provided by other firmware parts
1819 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
1820 does not need to (and cannot) execute this code.
1821 Enabling this option will make a U-Boot binary that is relying
1822 on other firmware layers to provide secure functionality.
1824 config TI_SECURE_DEVICE
1825 bool "HS Device Type Support"
1826 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1828 If a high secure (HS) device type is being used, this config
1829 must be set. This option impacts various aspects of the
1830 build system (to create signed boot images that can be
1831 authenticated) and the code. See the doc/README.ti-secure
1832 file for further details.
1834 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1835 config ISW_ENTRY_ADDR
1836 hex "Address in memory or XIP address of bootloader entry point"
1837 default 0x402F4000 if AM43XX
1838 default 0x402F0400 if AM33XX
1839 default 0x40301350 if OMAP54XX
1841 After any reset, the boot ROM searches the boot media for a valid
1842 boot image. For non-XIP devices, the ROM then copies the image into
1843 internal memory. For all boot modes, after the ROM processes the
1844 boot image it eventually computes the entry point address depending
1845 on the device type (secure/non-secure), boot media (xip/non-xip) and
1849 source "arch/arm/mach-aspeed/Kconfig"
1851 source "arch/arm/mach-at91/Kconfig"
1853 source "arch/arm/mach-bcm283x/Kconfig"
1855 source "arch/arm/mach-bcmstb/Kconfig"
1857 source "arch/arm/mach-davinci/Kconfig"
1859 source "arch/arm/mach-exynos/Kconfig"
1861 source "arch/arm/mach-highbank/Kconfig"
1863 source "arch/arm/mach-integrator/Kconfig"
1865 source "arch/arm/mach-ipq40xx/Kconfig"
1867 source "arch/arm/mach-k3/Kconfig"
1869 source "arch/arm/mach-keystone/Kconfig"
1871 source "arch/arm/mach-kirkwood/Kconfig"
1873 source "arch/arm/mach-lpc32xx/Kconfig"
1875 source "arch/arm/mach-mvebu/Kconfig"
1877 source "arch/arm/mach-octeontx/Kconfig"
1879 source "arch/arm/mach-octeontx2/Kconfig"
1881 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1883 source "arch/arm/mach-imx/mx2/Kconfig"
1885 source "arch/arm/mach-imx/mx3/Kconfig"
1887 source "arch/arm/mach-imx/mx5/Kconfig"
1889 source "arch/arm/mach-imx/mx6/Kconfig"
1891 source "arch/arm/mach-imx/mx7/Kconfig"
1893 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1895 source "arch/arm/mach-imx/imx8/Kconfig"
1897 source "arch/arm/mach-imx/imx8m/Kconfig"
1899 source "arch/arm/mach-imx/imxrt/Kconfig"
1901 source "arch/arm/mach-imx/mxs/Kconfig"
1903 source "arch/arm/mach-omap2/Kconfig"
1905 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1907 source "arch/arm/mach-orion5x/Kconfig"
1909 source "arch/arm/mach-owl/Kconfig"
1911 source "arch/arm/mach-rmobile/Kconfig"
1913 source "arch/arm/mach-meson/Kconfig"
1915 source "arch/arm/mach-mediatek/Kconfig"
1917 source "arch/arm/mach-qemu/Kconfig"
1919 source "arch/arm/mach-rockchip/Kconfig"
1921 source "arch/arm/mach-s5pc1xx/Kconfig"
1923 source "arch/arm/mach-snapdragon/Kconfig"
1925 source "arch/arm/mach-socfpga/Kconfig"
1927 source "arch/arm/mach-sti/Kconfig"
1929 source "arch/arm/mach-stm32/Kconfig"
1931 source "arch/arm/mach-stm32mp/Kconfig"
1933 source "arch/arm/mach-sunxi/Kconfig"
1935 source "arch/arm/mach-tegra/Kconfig"
1937 source "arch/arm/mach-u8500/Kconfig"
1939 source "arch/arm/mach-uniphier/Kconfig"
1941 source "arch/arm/cpu/armv7/vf610/Kconfig"
1943 source "arch/arm/mach-zynq/Kconfig"
1945 source "arch/arm/mach-zynqmp/Kconfig"
1947 source "arch/arm/mach-versal/Kconfig"
1949 source "arch/arm/mach-zynqmp-r5/Kconfig"
1951 source "arch/arm/cpu/armv7/Kconfig"
1953 source "arch/arm/cpu/armv8/Kconfig"
1955 source "arch/arm/mach-imx/Kconfig"
1957 source "arch/arm/mach-nexell/Kconfig"
1959 source "board/armltd/total_compute/Kconfig"
1961 source "board/bosch/shc/Kconfig"
1962 source "board/bosch/guardian/Kconfig"
1963 source "board/CarMediaLab/flea3/Kconfig"
1964 source "board/Marvell/aspenite/Kconfig"
1965 source "board/Marvell/gplugd/Kconfig"
1966 source "board/Marvell/octeontx/Kconfig"
1967 source "board/Marvell/octeontx2/Kconfig"
1968 source "board/armltd/vexpress64/Kconfig"
1969 source "board/cortina/presidio-asic/Kconfig"
1970 source "board/broadcom/bcm963158/Kconfig"
1971 source "board/broadcom/bcm968360bg/Kconfig"
1972 source "board/broadcom/bcm968580xref/Kconfig"
1973 source "board/broadcom/bcmns3/Kconfig"
1974 source "board/cavium/thunderx/Kconfig"
1975 source "board/cirrus/edb93xx/Kconfig"
1976 source "board/eets/pdu001/Kconfig"
1977 source "board/emulation/qemu-arm/Kconfig"
1978 source "board/freescale/ls2080aqds/Kconfig"
1979 source "board/freescale/ls2080ardb/Kconfig"
1980 source "board/freescale/ls1088a/Kconfig"
1981 source "board/freescale/ls1028a/Kconfig"
1982 source "board/freescale/ls1021aqds/Kconfig"
1983 source "board/freescale/ls1043aqds/Kconfig"
1984 source "board/freescale/ls1021atwr/Kconfig"
1985 source "board/freescale/ls1021atsn/Kconfig"
1986 source "board/freescale/ls1021aiot/Kconfig"
1987 source "board/freescale/ls1046aqds/Kconfig"
1988 source "board/freescale/ls1043ardb/Kconfig"
1989 source "board/freescale/ls1046ardb/Kconfig"
1990 source "board/freescale/ls1046afrwy/Kconfig"
1991 source "board/freescale/ls1012aqds/Kconfig"
1992 source "board/freescale/ls1012ardb/Kconfig"
1993 source "board/freescale/ls1012afrdm/Kconfig"
1994 source "board/freescale/lx2160a/Kconfig"
1995 source "board/grinn/chiliboard/Kconfig"
1996 source "board/hisilicon/hikey/Kconfig"
1997 source "board/hisilicon/hikey960/Kconfig"
1998 source "board/hisilicon/poplar/Kconfig"
1999 source "board/isee/igep003x/Kconfig"
2000 source "board/kontron/sl28/Kconfig"
2001 source "board/myir/mys_6ulx/Kconfig"
2002 source "board/spear/spear300/Kconfig"
2003 source "board/spear/spear310/Kconfig"
2004 source "board/spear/spear320/Kconfig"
2005 source "board/spear/spear600/Kconfig"
2006 source "board/spear/x600/Kconfig"
2007 source "board/st/stv0991/Kconfig"
2008 source "board/tcl/sl50/Kconfig"
2009 source "board/toradex/colibri_pxa270/Kconfig"
2010 source "board/variscite/dart_6ul/Kconfig"
2011 source "board/vscom/baltos/Kconfig"
2012 source "board/phytium/durian/Kconfig"
2013 source "board/xen/xenguest_arm64/Kconfig"
2014 source "board/keymile/Kconfig"
2016 source "arch/arm/Kconfig.debug"
2021 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2022 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2023 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64