1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed from
19 almost any 4K aligned address. This logic relies on the relocation
20 information that is embedded in the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
25 default n if ARCH_QEMU
26 default y if POSITION_INDEPENDENT
28 U-Boot typically uses a hard-coded value for the stack pointer
29 before relocation. Enable this option to instead calculate the
30 initial SP at run-time. This is useful to avoid hard-coding addresses
31 into U-Boot, so that it can be loaded and executed at arbitrary
32 addresses and thus avoid using arbitrary addresses at runtime.
34 If this option is enabled, the early stack pointer is set to
35 &_bss_start with a offset value added. The offset is specified by
36 SYS_INIT_SP_BSS_OFFSET.
38 config SYS_INIT_SP_BSS_OFFSET
39 int "Early stack offset from the .bss base address"
40 depends on INIT_SP_RELATIVE
43 This option's value is the offset added to &_bss_start in order to
44 calculate the stack pointer. This offset should be large enough so
45 that the early malloc region, global data (gd), and early stack usage
46 do not overlap any appended DTB.
48 config LINUX_KERNEL_IMAGE_HEADER
51 Place a Linux kernel image header at the start of the U-Boot binary.
52 The format of the header is described in the Linux kernel source at
53 Documentation/arm64/booting.txt. This feature is useful since the
54 image header reports the amount of memory (BSS and similar) that
55 U-Boot needs to use, but which isn't part of the binary.
57 if LINUX_KERNEL_IMAGE_HEADER
58 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
61 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
62 TEXT_OFFSET value written to the Linux kernel image header.
78 ARM GICV3 Interrupt translation service (ITS).
79 Basic support for programming locality specific peripheral
80 interrupts (LPI) configuration tables and enable LPI tables.
81 LPI configuration table can be used by u-boot or Linux.
82 ARM GICV3 has limitation, once the LPI table is enabled, LPI
83 configuration table can not be re-programmed, unless GICV3 reset.
89 config DMA_ADDR_T_64BIT
99 config GPIO_EXTRA_HEADER
102 # Used for compatibility with asm files copied from the kernel
103 config ARM_ASM_UNIFIED
107 # Used for compatibility with asm files copied from the kernel
111 config SYS_ICACHE_OFF
112 bool "Do not enable icache"
114 Do not enable instruction cache in U-Boot.
116 config SPL_SYS_ICACHE_OFF
117 bool "Do not enable icache in SPL"
119 default SYS_ICACHE_OFF
121 Do not enable instruction cache in SPL.
123 config SYS_DCACHE_OFF
124 bool "Do not enable dcache"
126 Do not enable data cache in U-Boot.
128 config SPL_SYS_DCACHE_OFF
129 bool "Do not enable dcache in SPL"
131 default SYS_DCACHE_OFF
133 Do not enable data cache in SPL.
135 config SYS_ARM_CACHE_CP15
136 bool "CP15 based cache enabling support"
138 Select this if your processor suports enabling caches by using
142 bool "MMU-based Paged Memory Management Support"
143 select SYS_ARM_CACHE_CP15
145 Select if you want MMU-based virtualised addressing space
146 support via paged memory management.
149 bool 'Use the ARM v7 PMSA Compliant MPU'
151 Some ARM systems without an MMU have instead a Memory Protection
152 Unit (MPU) that defines the type and permissions for regions of
154 If your CPU has an MPU then you should choose 'y' here unless you
155 know that you do not want to use the MPU.
157 # If set, the workarounds for these ARM errata are applied early during U-Boot
158 # startup. Note that in general these options force the workarounds to be
159 # applied; no CPU-type/version detection exists, unlike the similar options in
160 # the Linux kernel. Do not set these options unless they apply! Also note that
161 # the following can be machine-specific errata. These do have ability to
162 # provide rudimentary version and machine-specific checks, but expect no
164 # CONFIG_ARM_ERRATA_430973
165 # CONFIG_ARM_ERRATA_454179
166 # CONFIG_ARM_ERRATA_621766
167 # CONFIG_ARM_ERRATA_798870
168 # CONFIG_ARM_ERRATA_801819
169 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
170 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
172 config ARM_ERRATA_430973
175 config ARM_ERRATA_454179
178 config ARM_ERRATA_621766
181 config ARM_ERRATA_716044
184 config ARM_ERRATA_725233
187 config ARM_ERRATA_742230
190 config ARM_ERRATA_743622
193 config ARM_ERRATA_751472
196 config ARM_ERRATA_761320
199 config ARM_ERRATA_773022
202 config ARM_ERRATA_774769
205 config ARM_ERRATA_794072
208 config ARM_ERRATA_798870
211 config ARM_ERRATA_801819
214 config ARM_ERRATA_826974
217 config ARM_ERRATA_828024
220 config ARM_ERRATA_829520
223 config ARM_ERRATA_833069
226 config ARM_ERRATA_833471
229 config ARM_ERRATA_845369
232 config ARM_ERRATA_852421
235 config ARM_ERRATA_852423
238 config ARM_ERRATA_855873
241 config ARM_CORTEX_A8_CVE_2017_5715
244 config ARM_CORTEX_A15_CVE_2017_5715
249 select SYS_CACHE_SHIFT_5
254 select SYS_CACHE_SHIFT_5
259 select SYS_CACHE_SHIFT_5
264 select SYS_CACHE_SHIFT_5
269 select SYS_CACHE_SHIFT_5
275 select SYS_CACHE_SHIFT_5
282 select SYS_CACHE_SHIFT_6
289 select SYS_CACHE_SHIFT_5
290 select SYS_THUMB_BUILD
296 select SYS_ARM_CACHE_CP15
298 select SYS_CACHE_SHIFT_6
302 select SYS_CACHE_SHIFT_5
307 select SYS_CACHE_SHIFT_5
311 default "arm720t" if CPU_ARM720T
312 default "arm920t" if CPU_ARM920T
313 default "arm926ejs" if CPU_ARM926EJS
314 default "arm946es" if CPU_ARM946ES
315 default "arm1136" if CPU_ARM1136
316 default "arm1176" if CPU_ARM1176
317 default "armv7" if CPU_V7A
318 default "armv7" if CPU_V7R
319 default "armv7m" if CPU_V7M
320 default "pxa" if CPU_PXA
321 default "sa1100" if CPU_SA1100
322 default "armv8" if ARM64
326 default 4 if CPU_ARM720T
327 default 4 if CPU_ARM920T
328 default 5 if CPU_ARM926EJS
329 default 5 if CPU_ARM946ES
330 default 6 if CPU_ARM1136
331 default 6 if CPU_ARM1176
336 default 4 if CPU_SA1100
340 prompt "Select the ARM data write cache policy"
341 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
343 default SYS_ARM_CACHE_WRITEBACK
345 config SYS_ARM_CACHE_WRITEBACK
346 bool "Write-back (WB)"
348 A write updates the cache only and marks the cache line as dirty.
349 External memory is updated only when the line is evicted or explicitly
352 config SYS_ARM_CACHE_WRITETHROUGH
353 bool "Write-through (WT)"
355 A write updates both the cache and the external memory system.
356 This does not mark the cache line as dirty.
358 config SYS_ARM_CACHE_WRITEALLOC
359 bool "Write allocation (WA)"
361 A cache line is allocated on a write miss. This means that executing a
362 store instruction on the processor might cause a burst read to occur.
363 There is a linefill to obtain the data for the cache line, before the
368 bool "Enable ARCH_CPU_INIT"
370 Some architectures require a call to arch_cpu_init().
371 Say Y here to enable it
373 config SYS_ARCH_TIMER
374 bool "ARM Generic Timer support"
375 depends on CPU_V7A || ARM64
378 The ARM Generic Timer (aka arch-timer) provides an architected
379 interface to a timer source on an SoC.
380 It is mandatory for ARMv8 implementation and widely available
384 bool "Support for ARM SMC Calling Convention (SMCCC)"
385 depends on CPU_V7A || ARM64
388 Say Y here if you want to enable ARM SMC Calling Convention.
389 This should be enabled if U-Boot needs to communicate with system
390 firmware (for example, PSCI) according to SMCCC.
393 bool "support boot from semihosting"
395 In emulated environments, semihosting is a way for
396 the hosted environment to call out to the emulator to
397 retrieve files from the host machine.
399 config SYS_THUMB_BUILD
400 bool "Build U-Boot using the Thumb instruction set"
403 Use this flag to build U-Boot using the Thumb instruction set for
404 ARM architectures. Thumb instruction set provides better code
405 density. For ARM architectures that support Thumb2 this flag will
406 result in Thumb2 code generated by GCC.
408 config SPL_SYS_THUMB_BUILD
409 bool "Build SPL using the Thumb instruction set"
410 default y if SYS_THUMB_BUILD
411 depends on !ARM64 && SPL
413 Use this flag to build SPL using the Thumb instruction set for
414 ARM architectures. Thumb instruction set provides better code
415 density. For ARM architectures that support Thumb2 this flag will
416 result in Thumb2 code generated by GCC.
418 config TPL_SYS_THUMB_BUILD
419 bool "Build TPL using the Thumb instruction set"
420 default y if SYS_THUMB_BUILD
421 depends on TPL && !ARM64
423 Use this flag to build TPL using the Thumb instruction set for
424 ARM architectures. Thumb instruction set provides better code
425 density. For ARM architectures that support Thumb2 this flag will
426 result in Thumb2 code generated by GCC.
429 config SYS_L2CACHE_OFF
432 If SoC does not support L2CACHE or one does not want to enable
433 L2CACHE, choose this option.
435 config ENABLE_ARM_SOC_BOOT0_HOOK
436 bool "prepare BOOT0 header"
438 If the SoC's BOOT0 requires a header area filled with (magic)
439 values, then choose this option, and create a file included as
440 <asm/arch/boot0.h> which contains the required assembler code.
442 config ARM_CORTEX_CPU_IS_UP
445 config USE_ARCH_MEMCPY
446 bool "Use an assembly optimized implementation of memcpy"
450 Enable the generation of an optimized version of memcpy.
451 Such an implementation may be faster under some conditions
452 but may increase the binary size.
454 config SPL_USE_ARCH_MEMCPY
455 bool "Use an assembly optimized implementation of memcpy for SPL"
456 default y if USE_ARCH_MEMCPY
457 depends on !ARM64 && SPL
459 Enable the generation of an optimized version of memcpy.
460 Such an implementation may be faster under some conditions
461 but may increase the binary size.
463 config TPL_USE_ARCH_MEMCPY
464 bool "Use an assembly optimized implementation of memcpy for TPL"
465 default y if USE_ARCH_MEMCPY
466 depends on !ARM64 && TPL
468 Enable the generation of an optimized version of memcpy.
469 Such an implementation may be faster under some conditions
470 but may increase the binary size.
472 config USE_ARCH_MEMSET
473 bool "Use an assembly optimized implementation of memset"
477 Enable the generation of an optimized version of memset.
478 Such an implementation may be faster under some conditions
479 but may increase the binary size.
481 config SPL_USE_ARCH_MEMSET
482 bool "Use an assembly optimized implementation of memset for SPL"
483 default y if USE_ARCH_MEMSET
484 depends on !ARM64 && SPL
486 Enable the generation of an optimized version of memset.
487 Such an implementation may be faster under some conditions
488 but may increase the binary size.
490 config TPL_USE_ARCH_MEMSET
491 bool "Use an assembly optimized implementation of memset for TPL"
492 default y if USE_ARCH_MEMSET
493 depends on !ARM64 && TPL
495 Enable the generation of an optimized version of memset.
496 Such an implementation may be faster under some conditions
497 but may increase the binary size.
499 config ARM64_SUPPORT_AARCH32
500 bool "ARM64 system support AArch32 execution state"
502 default y if !TARGET_THUNDERX_88XX
504 This ARM64 system supports AArch32 execution state.
507 prompt "Target select"
512 select GPIO_EXTRA_HEADER
513 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
514 select SPL_SEPARATE_BSS if SPL
516 config TARGET_ASPENITE
517 bool "Support aspenite"
519 select GPIO_EXTRA_HEADER
524 select GPIO_EXTRA_HEADER
525 select SPL_DM_SPI if SPL
528 Support for TI's DaVinci platform.
531 bool "Marvell Kirkwood"
532 select ARCH_MISC_INIT
533 select BOARD_EARLY_INIT_F
535 select GPIO_EXTRA_HEADER
538 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
544 select GPIO_EXTRA_HEADER
545 select SPL_DM_SPI if SPL
546 select SPL_DM_SPI_FLASH if SPL
555 select GPIO_EXTRA_HEADER
557 config TARGET_STV0991
558 bool "Support stv0991"
564 select GPIO_EXTRA_HEADER
573 select GPIO_EXTRA_HEADER
576 bool "Broadcom BCM283X family"
580 select GPIO_EXTRA_HEADER
583 select SERIAL_SEARCH_ALL
588 bool "Broadcom BCM63158 family"
594 bool "Broadcom BCM68360 family"
600 bool "Broadcom BCM6858 family"
606 bool "Broadcom BCM7XXX family"
609 select GPIO_EXTRA_HEADER
611 select OF_PRIOR_STAGE
614 This enables support for Broadcom ARM-based set-top box
615 chipsets, including the 7445 family of chips.
617 config TARGET_BCMCYGNUS
618 bool "Support bcmcygnus"
620 select GPIO_EXTRA_HEADER
622 imply BCM_SF2_ETH_GMAC
630 bool "Support Broadcom Northstar2"
632 select GPIO_EXTRA_HEADER
634 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
635 ARMv8 Cortex-A57 processors targeting a broad range of networking
639 bool "Support Broadcom NS3"
641 select BOARD_LATE_INIT
643 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
644 ARMv8 Cortex-A72 processors targeting a broad range of networking
648 bool "Samsung EXYNOS"
658 select GPIO_EXTRA_HEADER
659 imply SYS_THUMB_BUILD
664 bool "Samsung S5PC1XX"
670 select GPIO_EXTRA_HEADER
674 bool "Calxeda Highbank"
687 config ARCH_INTEGRATOR
688 bool "ARM Ltd. Integrator family"
691 select GPIO_EXTRA_HEADER
696 bool "Qualcomm IPQ40xx SoCs"
702 select GPIO_EXTRA_HEADER
715 select GPIO_EXTRA_HEADER
717 select SYS_ARCH_TIMER
718 select SYS_THUMB_BUILD
724 bool "Texas Instruments' K3 Architecture"
729 config ARCH_OMAP2PLUS
732 select GPIO_EXTRA_HEADER
733 select SPL_BOARD_INIT if SPL
734 select SPL_STACK_R if SPL
736 imply TI_SYSC if DM && OF_CONTROL
741 select GPIO_EXTRA_HEADER
742 imply DISTRO_DEFAULTS
745 Support for the Meson SoC family developed by Amlogic Inc.,
746 targeted at media players and tablet computers. We currently
747 support the S905 (GXBaby) 64-bit SoC.
752 select GPIO_EXTRA_HEADER
755 select SPL_LIBCOMMON_SUPPORT if SPL
756 select SPL_LIBGENERIC_SUPPORT if SPL
757 select SPL_OF_CONTROL if SPL
760 Support for the MediaTek SoCs family developed by MediaTek Inc.
761 Please refer to doc/README.mediatek for more information.
764 bool "NXP LPC32xx platform"
769 select GPIO_EXTRA_HEADER
775 bool "NXP i.MX8 platform"
778 select GPIO_EXTRA_HEADER
781 select ENABLE_ARM_SOC_BOOT0_HOOK
784 bool "NXP i.MX8M platform"
786 select GPIO_EXTRA_HEADER
788 select SYS_FSL_HAS_SEC if IMX_HAB
789 select SYS_FSL_SEC_COMPAT_4
790 select SYS_FSL_SEC_LE
797 bool "NXP i.MX8ULP platform"
803 select GPIO_EXTRA_HEADER
807 bool "NXP i.MXRT platform"
811 select GPIO_EXTRA_HEADER
817 bool "NXP i.MX23 family"
819 select GPIO_EXTRA_HEADER
827 select GPIO_EXTRA_HEADER
832 bool "NXP i.MX28 family"
834 select GPIO_EXTRA_HEADER
840 bool "NXP i.MX31 family"
842 select GPIO_EXTRA_HEADER
848 select GPIO_EXTRA_HEADER
850 select SYS_FSL_HAS_SEC if IMX_HAB
851 select SYS_FSL_SEC_COMPAT_4
852 select SYS_FSL_SEC_LE
853 select ROM_UNIFIED_SECTIONS
855 imply SYS_THUMB_BUILD
859 select ARCH_MISC_INIT
861 select GPIO_EXTRA_HEADER
863 select SYS_FSL_HAS_SEC if IMX_HAB
864 select SYS_FSL_SEC_COMPAT_4
865 select SYS_FSL_SEC_LE
866 imply BOARD_EARLY_INIT_F
868 imply SYS_THUMB_BUILD
873 select GPIO_EXTRA_HEADER
875 select SYS_FSL_HAS_SEC
876 select SYS_FSL_SEC_COMPAT_4
877 select SYS_FSL_SEC_LE
879 imply SYS_THUMB_BUILD
883 default "arch/arm/mach-omap2/u-boot-spl.lds"
888 select BOARD_EARLY_INIT_F
890 select GPIO_EXTRA_HEADER
895 bool "Nexell S5P4418/S5P6818 SoC"
896 select ENABLE_ARM_SOC_BOOT0_HOOK
898 select GPIO_EXTRA_HEADER
901 bool "Actions Semi OWL SoCs"
905 select GPIO_EXTRA_HEADER
910 select SYS_RELOC_GD_ENV_ADDR
914 bool "QEMU Virtual Platform"
925 bool "Renesas ARM SoCs"
928 select GPIO_EXTRA_HEADER
929 imply BOARD_EARLY_INIT_F
932 imply SYS_THUMB_BUILD
933 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
935 config ARCH_SNAPDRAGON
936 bool "Qualcomm Snapdragon SoCs"
941 select GPIO_EXTRA_HEADER
950 bool "Altera SOCFPGA family"
951 select ARCH_EARLY_INIT_R
952 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
953 select ARM64 if TARGET_SOCFPGA_SOC64
954 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
958 select GPIO_EXTRA_HEADER
959 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
961 select SPL_DM_RESET if DM_RESET
963 select SPL_LIBCOMMON_SUPPORT
964 select SPL_LIBGENERIC_SUPPORT
965 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
966 select SPL_OF_CONTROL
967 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
968 select SPL_SERIAL_SUPPORT
973 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
975 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
976 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
986 imply SPL_DM_SPI_FLASH
987 imply SPL_LIBDISK_SUPPORT
988 imply SPL_MMC_SUPPORT
989 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
990 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
991 imply SPL_SPI_FLASH_SUPPORT
992 imply SPL_SPI_SUPPORT
996 bool "Support sunxi (Allwinner) SoCs"
999 select CMD_MMC if MMC
1000 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1006 select DM_MMC if MMC
1007 select DM_SCSI if SCSI
1009 select GPIO_EXTRA_HEADER
1010 select OF_BOARD_SETUP
1013 select SPECIFY_CONSOLE_INDEX
1014 select SPL_STACK_R if SPL
1015 select SPL_SYS_MALLOC_SIMPLE if SPL
1016 select SPL_SYS_THUMB_BUILD if !ARM64
1019 select SYS_THUMB_BUILD if !ARM64
1020 select USB if DISTRO_DEFAULTS
1021 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1022 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1023 select SPL_USE_TINY_PRINTF
1025 select SYS_RELOC_GD_ENV_ADDR
1026 imply BOARD_LATE_INIT
1029 imply CMD_UBI if MTD_RAW_NAND
1030 imply DISTRO_DEFAULTS
1033 imply OF_LIBFDT_OVERLAY
1034 imply PRE_CONSOLE_BUFFER
1036 imply SPL_LIBCOMMON_SUPPORT
1037 imply SPL_LIBGENERIC_SUPPORT
1038 imply SPL_MMC_SUPPORT if MMC
1040 imply SPL_SERIAL_SUPPORT
1044 bool "ST-Ericsson U8500 Series"
1048 select DM_MMC if MMC
1050 select DM_USB_GADGET if DM_USB
1054 imply AB8500_USB_PHY
1055 imply ARM_PL180_MMCI
1060 imply NOMADIK_MTU_TIMER
1065 imply SYS_THUMB_BUILD
1066 imply SYSRESET_SYSCON
1069 bool "Support Xilinx Versal Platform"
1073 select DM_ETH if NET
1074 select DM_MMC if MMC
1077 select GPIO_EXTRA_HEADER
1080 imply BOARD_LATE_INIT
1081 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1084 bool "Freescale Vybrid"
1086 select GPIO_EXTRA_HEADER
1088 select SYS_FSL_ERRATUM_ESDHC111
1093 bool "Xilinx Zynq based platform"
1098 select DM_ETH if NET
1099 select DM_MMC if MMC
1103 select GPIO_EXTRA_HEADER
1106 select SPL_BOARD_INIT if SPL
1107 select SPL_CLK if SPL
1108 select SPL_DM if SPL
1109 select SPL_DM_SPI if SPL
1110 select SPL_DM_SPI_FLASH if SPL
1111 select SPL_OF_CONTROL if SPL
1112 select SPL_SEPARATE_BSS if SPL
1114 imply ARCH_EARLY_INIT_R
1115 imply BOARD_LATE_INIT
1119 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1122 config ARCH_ZYNQMP_R5
1123 bool "Xilinx ZynqMP R5 based platform"
1127 select DM_ETH if NET
1128 select DM_MMC if MMC
1130 select GPIO_EXTRA_HEADER
1136 bool "Xilinx ZynqMP based platform"
1140 select DM_ETH if NET
1142 select DM_MMC if MMC
1144 select DM_SPI if SPI
1145 select DM_SPI_FLASH if DM_SPI
1148 select GPIO_EXTRA_HEADER
1150 select SPL_BOARD_INIT if SPL
1151 select SPL_CLK if SPL
1152 select SPL_DM if SPL
1153 select SPL_DM_SPI if SPI && SPL_DM
1154 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1155 select SPL_DM_MAILBOX if SPL
1156 select SPL_FIRMWARE if SPL
1157 select SPL_SEPARATE_BSS if SPL
1161 imply BOARD_LATE_INIT
1163 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1170 select GPIO_EXTRA_HEADER
1171 imply DISTRO_DEFAULTS
1174 config TARGET_VEXPRESS64_AEMV8A
1175 bool "Support vexpress_aemv8a"
1177 select GPIO_EXTRA_HEADER
1180 config TARGET_VEXPRESS64_BASE_FVP
1181 bool "Support Versatile Express ARMv8a FVP BASE model"
1183 select GPIO_EXTRA_HEADER
1187 config TARGET_VEXPRESS64_JUNO
1188 bool "Support Versatile Express Juno Development Platform"
1190 select GPIO_EXTRA_HEADER
1203 config TARGET_TOTAL_COMPUTE
1204 bool "Support Total Compute Platform"
1212 config TARGET_LS2080A_EMU
1213 bool "Support ls2080a_emu"
1216 select ARMV8_MULTIENTRY
1217 select FSL_DDR_SYNC_REFRESH
1218 select GPIO_EXTRA_HEADER
1220 Support for Freescale LS2080A_EMU platform.
1221 The LS2080A Development System (EMULATOR) is a pre-silicon
1222 development platform that supports the QorIQ LS2080A
1223 Layerscape Architecture processor.
1225 config TARGET_LS1088AQDS
1226 bool "Support ls1088aqds"
1229 select ARMV8_MULTIENTRY
1230 select ARCH_SUPPORT_TFABOOT
1231 select BOARD_LATE_INIT
1232 select GPIO_EXTRA_HEADER
1234 select FSL_DDR_INTERACTIVE if !SD_BOOT
1236 Support for NXP LS1088AQDS platform.
1237 The LS1088A Development System (QDS) is a high-performance
1238 development platform that supports the QorIQ LS1088A
1239 Layerscape Architecture processor.
1241 config TARGET_LS2080AQDS
1242 bool "Support ls2080aqds"
1245 select ARMV8_MULTIENTRY
1246 select ARCH_SUPPORT_TFABOOT
1247 select BOARD_LATE_INIT
1248 select GPIO_EXTRA_HEADER
1253 select FSL_DDR_INTERACTIVE if !SPL
1255 Support for Freescale LS2080AQDS platform.
1256 The LS2080A Development System (QDS) is a high-performance
1257 development platform that supports the QorIQ LS2080A
1258 Layerscape Architecture processor.
1260 config TARGET_LS2080ARDB
1261 bool "Support ls2080ardb"
1264 select ARMV8_MULTIENTRY
1265 select ARCH_SUPPORT_TFABOOT
1266 select BOARD_LATE_INIT
1269 select FSL_DDR_INTERACTIVE if !SPL
1270 select GPIO_EXTRA_HEADER
1274 Support for Freescale LS2080ARDB platform.
1275 The LS2080A Reference design board (RDB) is a high-performance
1276 development platform that supports the QorIQ LS2080A
1277 Layerscape Architecture processor.
1279 config TARGET_LS2081ARDB
1280 bool "Support ls2081ardb"
1283 select ARMV8_MULTIENTRY
1284 select BOARD_LATE_INIT
1285 select GPIO_EXTRA_HEADER
1288 Support for Freescale LS2081ARDB platform.
1289 The LS2081A Reference design board (RDB) is a high-performance
1290 development platform that supports the QorIQ LS2081A/LS2041A
1291 Layerscape Architecture processor.
1293 config TARGET_LX2160ARDB
1294 bool "Support lx2160ardb"
1297 select ARMV8_MULTIENTRY
1298 select ARCH_SUPPORT_TFABOOT
1299 select BOARD_LATE_INIT
1300 select GPIO_EXTRA_HEADER
1302 Support for NXP LX2160ARDB platform.
1303 The lx2160ardb (LX2160A Reference design board (RDB)
1304 is a high-performance development platform that supports the
1305 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1307 config TARGET_LX2160AQDS
1308 bool "Support lx2160aqds"
1311 select ARMV8_MULTIENTRY
1312 select ARCH_SUPPORT_TFABOOT
1313 select BOARD_LATE_INIT
1314 select GPIO_EXTRA_HEADER
1316 Support for NXP LX2160AQDS platform.
1317 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1318 is a high-performance development platform that supports the
1319 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1321 config TARGET_LX2162AQDS
1322 bool "Support lx2162aqds"
1324 select ARCH_MISC_INIT
1326 select ARMV8_MULTIENTRY
1327 select ARCH_SUPPORT_TFABOOT
1328 select BOARD_LATE_INIT
1329 select GPIO_EXTRA_HEADER
1331 Support for NXP LX2162AQDS platform.
1332 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1335 bool "Support HiKey 96boards Consumer Edition Platform"
1340 select GPIO_EXTRA_HEADER
1343 select SPECIFY_CONSOLE_INDEX
1346 Support for HiKey 96boards platform. It features a HI6220
1347 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1349 config TARGET_HIKEY960
1350 bool "Support HiKey960 96boards Consumer Edition Platform"
1354 select GPIO_EXTRA_HEADER
1359 Support for HiKey960 96boards platform. It features a HI3660
1360 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1362 config TARGET_POPLAR
1363 bool "Support Poplar 96boards Enterprise Edition Platform"
1367 select GPIO_EXTRA_HEADER
1372 Support for Poplar 96boards EE platform. It features a HI3798cv200
1373 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1374 making it capable of running any commercial set-top solution based on
1377 config TARGET_LS1012AQDS
1378 bool "Support ls1012aqds"
1381 select ARCH_SUPPORT_TFABOOT
1382 select BOARD_LATE_INIT
1383 select GPIO_EXTRA_HEADER
1385 Support for Freescale LS1012AQDS platform.
1386 The LS1012A Development System (QDS) is a high-performance
1387 development platform that supports the QorIQ LS1012A
1388 Layerscape Architecture processor.
1390 config TARGET_LS1012ARDB
1391 bool "Support ls1012ardb"
1394 select ARCH_SUPPORT_TFABOOT
1395 select BOARD_LATE_INIT
1396 select GPIO_EXTRA_HEADER
1400 Support for Freescale LS1012ARDB platform.
1401 The LS1012A Reference design board (RDB) is a high-performance
1402 development platform that supports the QorIQ LS1012A
1403 Layerscape Architecture processor.
1405 config TARGET_LS1012A2G5RDB
1406 bool "Support ls1012a2g5rdb"
1409 select ARCH_SUPPORT_TFABOOT
1410 select BOARD_LATE_INIT
1411 select GPIO_EXTRA_HEADER
1414 Support for Freescale LS1012A2G5RDB platform.
1415 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1416 development platform that supports the QorIQ LS1012A
1417 Layerscape Architecture processor.
1419 config TARGET_LS1012AFRWY
1420 bool "Support ls1012afrwy"
1423 select ARCH_SUPPORT_TFABOOT
1424 select BOARD_LATE_INIT
1425 select GPIO_EXTRA_HEADER
1429 Support for Freescale LS1012AFRWY platform.
1430 The LS1012A FRWY board (FRWY) is a high-performance
1431 development platform that supports the QorIQ LS1012A
1432 Layerscape Architecture processor.
1434 config TARGET_LS1012AFRDM
1435 bool "Support ls1012afrdm"
1438 select ARCH_SUPPORT_TFABOOT
1439 select GPIO_EXTRA_HEADER
1441 Support for Freescale LS1012AFRDM platform.
1442 The LS1012A Freedom board (FRDM) is a high-performance
1443 development platform that supports the QorIQ LS1012A
1444 Layerscape Architecture processor.
1446 config TARGET_LS1028AQDS
1447 bool "Support ls1028aqds"
1450 select ARMV8_MULTIENTRY
1451 select ARCH_SUPPORT_TFABOOT
1452 select BOARD_LATE_INIT
1453 select GPIO_EXTRA_HEADER
1455 Support for Freescale LS1028AQDS platform
1456 The LS1028A Development System (QDS) is a high-performance
1457 development platform that supports the QorIQ LS1028A
1458 Layerscape Architecture processor.
1460 config TARGET_LS1028ARDB
1461 bool "Support ls1028ardb"
1464 select ARMV8_MULTIENTRY
1465 select ARCH_SUPPORT_TFABOOT
1466 select BOARD_LATE_INIT
1467 select GPIO_EXTRA_HEADER
1469 Support for Freescale LS1028ARDB platform
1470 The LS1028A Development System (RDB) is a high-performance
1471 development platform that supports the QorIQ LS1028A
1472 Layerscape Architecture processor.
1474 config TARGET_LS1088ARDB
1475 bool "Support ls1088ardb"
1478 select ARMV8_MULTIENTRY
1479 select ARCH_SUPPORT_TFABOOT
1480 select BOARD_LATE_INIT
1482 select FSL_DDR_INTERACTIVE if !SD_BOOT
1483 select GPIO_EXTRA_HEADER
1485 Support for NXP LS1088ARDB platform.
1486 The LS1088A Reference design board (RDB) is a high-performance
1487 development platform that supports the QorIQ LS1088A
1488 Layerscape Architecture processor.
1490 config TARGET_LS1021AQDS
1491 bool "Support ls1021aqds"
1493 select ARCH_SUPPORT_PSCI
1494 select BOARD_EARLY_INIT_F
1495 select BOARD_LATE_INIT
1497 select CPU_V7_HAS_NONSEC
1498 select CPU_V7_HAS_VIRT
1499 select LS1_DEEP_SLEEP
1502 select FSL_DDR_INTERACTIVE
1503 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1504 select GPIO_EXTRA_HEADER
1505 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1508 config TARGET_LS1021ATWR
1509 bool "Support ls1021atwr"
1511 select ARCH_SUPPORT_PSCI
1512 select BOARD_EARLY_INIT_F
1513 select BOARD_LATE_INIT
1515 select CPU_V7_HAS_NONSEC
1516 select CPU_V7_HAS_VIRT
1517 select LS1_DEEP_SLEEP
1519 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1520 select GPIO_EXTRA_HEADER
1523 config TARGET_PG_WCOM_SELI8
1524 bool "Support Hitachi-Powergrids SELI8 service unit card"
1526 select ARCH_SUPPORT_PSCI
1527 select BOARD_EARLY_INIT_F
1528 select BOARD_LATE_INIT
1530 select CPU_V7_HAS_NONSEC
1531 select CPU_V7_HAS_VIRT
1533 select FSL_DDR_INTERACTIVE
1534 select GPIO_EXTRA_HEADER
1538 Support for Hitachi-Powergrids SELI8 service unit card.
1539 SELI8 is a QorIQ LS1021a based service unit card used
1540 in XMC20 and FOX615 product families.
1542 config TARGET_PG_WCOM_EXPU1
1543 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1545 select ARCH_SUPPORT_PSCI
1546 select BOARD_EARLY_INIT_F
1547 select BOARD_LATE_INIT
1549 select CPU_V7_HAS_NONSEC
1550 select CPU_V7_HAS_VIRT
1552 select FSL_DDR_INTERACTIVE
1556 Support for Hitachi-Powergrids EXPU1 service unit card.
1557 EXPU1 is a QorIQ LS1021a based service unit card used
1558 in XMC20 and FOX615 product families.
1560 config TARGET_LS1021ATSN
1561 bool "Support ls1021atsn"
1563 select ARCH_SUPPORT_PSCI
1564 select BOARD_EARLY_INIT_F
1565 select BOARD_LATE_INIT
1567 select CPU_V7_HAS_NONSEC
1568 select CPU_V7_HAS_VIRT
1569 select LS1_DEEP_SLEEP
1571 select GPIO_EXTRA_HEADER
1574 config TARGET_LS1021AIOT
1575 bool "Support ls1021aiot"
1577 select ARCH_SUPPORT_PSCI
1578 select BOARD_LATE_INIT
1580 select CPU_V7_HAS_NONSEC
1581 select CPU_V7_HAS_VIRT
1583 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1584 select GPIO_EXTRA_HEADER
1587 Support for Freescale LS1021AIOT platform.
1588 The LS1021A Freescale board (IOT) is a high-performance
1589 development platform that supports the QorIQ LS1021A
1590 Layerscape Architecture processor.
1592 config TARGET_LS1043AQDS
1593 bool "Support ls1043aqds"
1596 select ARMV8_MULTIENTRY
1597 select ARCH_SUPPORT_TFABOOT
1598 select BOARD_EARLY_INIT_F
1599 select BOARD_LATE_INIT
1601 select FSL_DDR_INTERACTIVE if !SPL
1602 select FSL_DSPI if !SPL_NO_DSPI
1603 select DM_SPI_FLASH if FSL_DSPI
1604 select GPIO_EXTRA_HEADER
1608 Support for Freescale LS1043AQDS platform.
1610 config TARGET_LS1043ARDB
1611 bool "Support ls1043ardb"
1614 select ARMV8_MULTIENTRY
1615 select ARCH_SUPPORT_TFABOOT
1616 select BOARD_EARLY_INIT_F
1617 select BOARD_LATE_INIT
1619 select FSL_DSPI if !SPL_NO_DSPI
1620 select DM_SPI_FLASH if FSL_DSPI
1621 select GPIO_EXTRA_HEADER
1623 Support for Freescale LS1043ARDB platform.
1625 config TARGET_LS1046AQDS
1626 bool "Support ls1046aqds"
1629 select ARMV8_MULTIENTRY
1630 select ARCH_SUPPORT_TFABOOT
1631 select BOARD_EARLY_INIT_F
1632 select BOARD_LATE_INIT
1633 select DM_SPI_FLASH if DM_SPI
1635 select FSL_DDR_BIST if !SPL
1636 select FSL_DDR_INTERACTIVE if !SPL
1637 select FSL_DDR_INTERACTIVE if !SPL
1638 select GPIO_EXTRA_HEADER
1641 Support for Freescale LS1046AQDS platform.
1642 The LS1046A Development System (QDS) is a high-performance
1643 development platform that supports the QorIQ LS1046A
1644 Layerscape Architecture processor.
1646 config TARGET_LS1046ARDB
1647 bool "Support ls1046ardb"
1650 select ARMV8_MULTIENTRY
1651 select ARCH_SUPPORT_TFABOOT
1652 select BOARD_EARLY_INIT_F
1653 select BOARD_LATE_INIT
1654 select DM_SPI_FLASH if DM_SPI
1655 select POWER_MC34VR500
1658 select FSL_DDR_INTERACTIVE if !SPL
1659 select GPIO_EXTRA_HEADER
1662 Support for Freescale LS1046ARDB platform.
1663 The LS1046A Reference Design Board (RDB) is a high-performance
1664 development platform that supports the QorIQ LS1046A
1665 Layerscape Architecture processor.
1667 config TARGET_LS1046AFRWY
1668 bool "Support ls1046afrwy"
1671 select ARMV8_MULTIENTRY
1672 select ARCH_SUPPORT_TFABOOT
1673 select BOARD_EARLY_INIT_F
1674 select BOARD_LATE_INIT
1675 select DM_SPI_FLASH if DM_SPI
1676 select GPIO_EXTRA_HEADER
1679 Support for Freescale LS1046AFRWY platform.
1680 The LS1046A Freeway Board (FRWY) is a high-performance
1681 development platform that supports the QorIQ LS1046A
1682 Layerscape Architecture processor.
1688 select ARMV8_MULTIENTRY
1704 select GPIO_EXTRA_HEADER
1705 select SPL_DM if SPL
1706 select SPL_DM_SPI if SPL
1707 select SPL_DM_SPI_FLASH if SPL
1708 select SPL_DM_I2C if SPL
1709 select SPL_DM_MMC if SPL
1710 select SPL_DM_SERIAL if SPL
1712 Support for Kontron SMARC-sAL28 board.
1714 config TARGET_COLIBRI_PXA270
1715 bool "Support colibri_pxa270"
1717 select GPIO_EXTRA_HEADER
1719 config ARCH_UNIPHIER
1720 bool "Socionext UniPhier SoCs"
1721 select BOARD_LATE_INIT
1730 select OF_BOARD_SETUP
1734 select SPL_BOARD_INIT if SPL
1735 select SPL_DM if SPL
1736 select SPL_LIBCOMMON_SUPPORT if SPL
1737 select SPL_LIBGENERIC_SUPPORT if SPL
1738 select SPL_OF_CONTROL if SPL
1739 select SPL_PINCTRL if SPL
1742 imply DISTRO_DEFAULTS
1745 Support for UniPhier SoC family developed by Socionext Inc.
1746 (formerly, System LSI Business Division of Panasonic Corporation)
1748 config ARCH_SYNQUACER
1749 bool "Socionext SynQuacer SoCs"
1755 select SYSRESET_PSCI
1758 Support for SynQuacer SoC family developed by Socionext Inc.
1759 This SoC is used on 96boards EE DeveloperBox.
1762 bool "Support STMicroelectronics STM32 MCU with cortex M"
1766 select GPIO_EXTRA_HEADER
1770 bool "Support STMicrolectronics SoCs"
1779 Support for STMicroelectronics STiH407/10 SoC family.
1780 This SoC is used on Linaro 96Board STiH410-B2260
1783 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1784 select ARCH_MISC_INIT
1785 select ARCH_SUPPORT_TFABOOT
1786 select BOARD_LATE_INIT
1792 select GPIO_EXTRA_HEADER
1796 select OF_SYSTEM_SETUP
1802 select SYS_THUMB_BUILD
1806 imply OF_LIBFDT_OVERLAY
1807 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1810 Support for STM32MP SoC family developed by STMicroelectronics,
1811 MPUs based on ARM cortex A core
1812 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1813 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1815 SPL is the unsecure FSBL for the basic boot chain.
1817 config ARCH_ROCKCHIP
1818 bool "Support Rockchip SoCs"
1820 select BINMAN if SPL_OPTEE || (SPL && !ARM64)
1830 select ENABLE_ARM_SOC_BOOT0_HOOK
1833 select SPL_DM if SPL
1834 select SPL_DM_SPI if SPL
1835 select SPL_DM_SPI_FLASH if SPL
1837 select SYS_THUMB_BUILD if !ARM64
1840 imply DEBUG_UART_BOARD_INIT
1841 imply DISTRO_DEFAULTS
1843 imply SARADC_ROCKCHIP
1845 imply SPL_SYS_MALLOC_SIMPLE
1848 imply USB_FUNCTION_FASTBOOT
1850 config ARCH_OCTEONTX
1851 bool "Support OcteonTX SoCs"
1854 select GPIO_EXTRA_HEADER
1858 select BOARD_LATE_INIT
1859 select SYS_CACHE_SHIFT_7
1861 config ARCH_OCTEONTX2
1862 bool "Support OcteonTX2 SoCs"
1865 select GPIO_EXTRA_HEADER
1869 select BOARD_LATE_INIT
1870 select SYS_CACHE_SHIFT_7
1872 config TARGET_THUNDERX_88XX
1873 bool "Support ThunderX 88xx"
1875 select GPIO_EXTRA_HEADER
1878 select SYS_CACHE_SHIFT_7
1881 bool "Support Aspeed SoCs"
1886 config TARGET_DURIAN
1887 bool "Support Phytium Durian Platform"
1889 select GPIO_EXTRA_HEADER
1891 Support for durian platform.
1892 It has 2GB Sdram, uart and pcie.
1894 config TARGET_PRESIDIO_ASIC
1895 bool "Support Cortina Presidio ASIC Platform"
1899 config TARGET_XENGUEST_ARM64
1900 bool "Xen guest ARM64"
1904 select LINUX_KERNEL_IMAGE_HEADER
1909 config ARCH_SUPPORT_TFABOOT
1913 bool "Support for booting from TF-A"
1914 depends on ARCH_SUPPORT_TFABOOT
1916 Some platforms support the setup of secure registers (for instance
1917 for CPU errata handling) or provide secure services like PSCI.
1918 Those services could also be provided by other firmware parts
1919 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
1920 does not need to (and cannot) execute this code.
1921 Enabling this option will make a U-Boot binary that is relying
1922 on other firmware layers to provide secure functionality.
1924 config TI_SECURE_DEVICE
1925 bool "HS Device Type Support"
1926 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1928 If a high secure (HS) device type is being used, this config
1929 must be set. This option impacts various aspects of the
1930 build system (to create signed boot images that can be
1931 authenticated) and the code. See the doc/README.ti-secure
1932 file for further details.
1934 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1935 config ISW_ENTRY_ADDR
1936 hex "Address in memory or XIP address of bootloader entry point"
1937 default 0x402F4000 if AM43XX
1938 default 0x402F0400 if AM33XX
1939 default 0x40301350 if OMAP54XX
1941 After any reset, the boot ROM searches the boot media for a valid
1942 boot image. For non-XIP devices, the ROM then copies the image into
1943 internal memory. For all boot modes, after the ROM processes the
1944 boot image it eventually computes the entry point address depending
1945 on the device type (secure/non-secure), boot media (xip/non-xip) and
1949 source "arch/arm/mach-aspeed/Kconfig"
1951 source "arch/arm/mach-at91/Kconfig"
1953 source "arch/arm/mach-bcm283x/Kconfig"
1955 source "arch/arm/mach-bcmstb/Kconfig"
1957 source "arch/arm/mach-davinci/Kconfig"
1959 source "arch/arm/mach-exynos/Kconfig"
1961 source "arch/arm/mach-highbank/Kconfig"
1963 source "arch/arm/mach-integrator/Kconfig"
1965 source "arch/arm/mach-ipq40xx/Kconfig"
1967 source "arch/arm/mach-k3/Kconfig"
1969 source "arch/arm/mach-keystone/Kconfig"
1971 source "arch/arm/mach-kirkwood/Kconfig"
1973 source "arch/arm/mach-lpc32xx/Kconfig"
1975 source "arch/arm/mach-mvebu/Kconfig"
1977 source "arch/arm/mach-octeontx/Kconfig"
1979 source "arch/arm/mach-octeontx2/Kconfig"
1981 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1983 source "arch/arm/mach-imx/mx2/Kconfig"
1985 source "arch/arm/mach-imx/mx3/Kconfig"
1987 source "arch/arm/mach-imx/mx5/Kconfig"
1989 source "arch/arm/mach-imx/mx6/Kconfig"
1991 source "arch/arm/mach-imx/mx7/Kconfig"
1993 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1995 source "arch/arm/mach-imx/imx8/Kconfig"
1997 source "arch/arm/mach-imx/imx8m/Kconfig"
1999 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2001 source "arch/arm/mach-imx/imxrt/Kconfig"
2003 source "arch/arm/mach-imx/mxs/Kconfig"
2005 source "arch/arm/mach-omap2/Kconfig"
2007 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2009 source "arch/arm/mach-orion5x/Kconfig"
2011 source "arch/arm/mach-owl/Kconfig"
2013 source "arch/arm/mach-rmobile/Kconfig"
2015 source "arch/arm/mach-meson/Kconfig"
2017 source "arch/arm/mach-mediatek/Kconfig"
2019 source "arch/arm/mach-qemu/Kconfig"
2021 source "arch/arm/mach-rockchip/Kconfig"
2023 source "arch/arm/mach-s5pc1xx/Kconfig"
2025 source "arch/arm/mach-snapdragon/Kconfig"
2027 source "arch/arm/mach-socfpga/Kconfig"
2029 source "arch/arm/mach-sti/Kconfig"
2031 source "arch/arm/mach-stm32/Kconfig"
2033 source "arch/arm/mach-stm32mp/Kconfig"
2035 source "arch/arm/mach-sunxi/Kconfig"
2037 source "arch/arm/mach-tegra/Kconfig"
2039 source "arch/arm/mach-u8500/Kconfig"
2041 source "arch/arm/mach-uniphier/Kconfig"
2043 source "arch/arm/cpu/armv7/vf610/Kconfig"
2045 source "arch/arm/mach-zynq/Kconfig"
2047 source "arch/arm/mach-zynqmp/Kconfig"
2049 source "arch/arm/mach-versal/Kconfig"
2051 source "arch/arm/mach-zynqmp-r5/Kconfig"
2053 source "arch/arm/cpu/armv7/Kconfig"
2055 source "arch/arm/cpu/armv8/Kconfig"
2057 source "arch/arm/mach-imx/Kconfig"
2059 source "arch/arm/mach-nexell/Kconfig"
2061 source "board/armltd/total_compute/Kconfig"
2063 source "board/bosch/shc/Kconfig"
2064 source "board/bosch/guardian/Kconfig"
2065 source "board/CarMediaLab/flea3/Kconfig"
2066 source "board/Marvell/aspenite/Kconfig"
2067 source "board/Marvell/octeontx/Kconfig"
2068 source "board/Marvell/octeontx2/Kconfig"
2069 source "board/armltd/vexpress64/Kconfig"
2070 source "board/cortina/presidio-asic/Kconfig"
2071 source "board/broadcom/bcm963158/Kconfig"
2072 source "board/broadcom/bcm968360bg/Kconfig"
2073 source "board/broadcom/bcm968580xref/Kconfig"
2074 source "board/broadcom/bcmns3/Kconfig"
2075 source "board/cavium/thunderx/Kconfig"
2076 source "board/eets/pdu001/Kconfig"
2077 source "board/emulation/qemu-arm/Kconfig"
2078 source "board/freescale/ls2080aqds/Kconfig"
2079 source "board/freescale/ls2080ardb/Kconfig"
2080 source "board/freescale/ls1088a/Kconfig"
2081 source "board/freescale/ls1028a/Kconfig"
2082 source "board/freescale/ls1021aqds/Kconfig"
2083 source "board/freescale/ls1043aqds/Kconfig"
2084 source "board/freescale/ls1021atwr/Kconfig"
2085 source "board/freescale/ls1021atsn/Kconfig"
2086 source "board/freescale/ls1021aiot/Kconfig"
2087 source "board/freescale/ls1046aqds/Kconfig"
2088 source "board/freescale/ls1043ardb/Kconfig"
2089 source "board/freescale/ls1046ardb/Kconfig"
2090 source "board/freescale/ls1046afrwy/Kconfig"
2091 source "board/freescale/ls1012aqds/Kconfig"
2092 source "board/freescale/ls1012ardb/Kconfig"
2093 source "board/freescale/ls1012afrdm/Kconfig"
2094 source "board/freescale/lx2160a/Kconfig"
2095 source "board/grinn/chiliboard/Kconfig"
2096 source "board/hisilicon/hikey/Kconfig"
2097 source "board/hisilicon/hikey960/Kconfig"
2098 source "board/hisilicon/poplar/Kconfig"
2099 source "board/isee/igep003x/Kconfig"
2100 source "board/kontron/sl28/Kconfig"
2101 source "board/myir/mys_6ulx/Kconfig"
2102 source "board/seeed/npi_imx6ull/Kconfig"
2103 source "board/socionext/developerbox/Kconfig"
2104 source "board/st/stv0991/Kconfig"
2105 source "board/tcl/sl50/Kconfig"
2106 source "board/toradex/colibri_pxa270/Kconfig"
2107 source "board/variscite/dart_6ul/Kconfig"
2108 source "board/vscom/baltos/Kconfig"
2109 source "board/phytium/durian/Kconfig"
2110 source "board/xen/xenguest_arm64/Kconfig"
2111 source "board/keymile/Kconfig"
2113 source "arch/arm/Kconfig.debug"
2118 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2119 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2120 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64