1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 bool "Enable support for CRC32 instruction"
17 ARMv8 implements dedicated crc32 instruction for crc32 calculation.
18 This is faster than software crc32 calculation. This instruction may
19 not be present on all ARMv8.0, but is always present on ARMv8.1 and
22 config POSITION_INDEPENDENT
23 bool "Generate position-independent pre-relocation code"
24 depends on ARM64 || CPU_V7A
26 U-Boot expects to be linked to a specific hard-coded address, and to
27 be loaded to and run from that address. This option lifts that
28 restriction, thus allowing the code to be loaded to and executed from
29 almost any 4K aligned address. This logic relies on the relocation
30 information that is embedded in the binary to support U-Boot
31 relocating itself to the top-of-RAM later during execution.
33 config INIT_SP_RELATIVE
34 bool "Specify the early stack pointer relative to the .bss section"
36 default n if ARCH_QEMU
37 default y if POSITION_INDEPENDENT
39 U-Boot typically uses a hard-coded value for the stack pointer
40 before relocation. Enable this option to instead calculate the
41 initial SP at run-time. This is useful to avoid hard-coding addresses
42 into U-Boot, so that it can be loaded and executed at arbitrary
43 addresses and thus avoid using arbitrary addresses at runtime.
45 If this option is enabled, the early stack pointer is set to
46 &_bss_start with a offset value added. The offset is specified by
47 SYS_INIT_SP_BSS_OFFSET.
49 config SYS_INIT_SP_BSS_OFFSET
50 int "Early stack offset from the .bss base address"
52 depends on INIT_SP_RELATIVE
55 This option's value is the offset added to &_bss_start in order to
56 calculate the stack pointer. This offset should be large enough so
57 that the early malloc region, global data (gd), and early stack usage
58 do not overlap any appended DTB.
60 config LINUX_KERNEL_IMAGE_HEADER
64 Place a Linux kernel image header at the start of the U-Boot binary.
65 The format of the header is described in the Linux kernel source at
66 Documentation/arm64/booting.txt. This feature is useful since the
67 image header reports the amount of memory (BSS and similar) that
68 U-Boot needs to use, but which isn't part of the binary.
70 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
71 depends on LINUX_KERNEL_IMAGE_HEADER
74 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
75 TEXT_OFFSET value written to the Linux kernel image header.
87 ARM GICV3 Interrupt translation service (ITS).
88 Basic support for programming locality specific peripheral
89 interrupts (LPI) configuration tables and enable LPI tables.
90 LPI configuration table can be used by u-boot or Linux.
91 ARM GICV3 has limitation, once the LPI table is enabled, LPI
92 configuration table can not be re-programmed, unless GICV3 reset.
98 config DMA_ADDR_T_64BIT
108 config GPIO_EXTRA_HEADER
111 # Used for compatibility with asm files copied from the kernel
112 config ARM_ASM_UNIFIED
116 # Used for compatibility with asm files copied from the kernel
120 config SYS_ICACHE_OFF
121 bool "Do not enable icache"
123 Do not enable instruction cache in U-Boot.
125 config SPL_SYS_ICACHE_OFF
126 bool "Do not enable icache in SPL"
128 default SYS_ICACHE_OFF
130 Do not enable instruction cache in SPL.
132 config SYS_DCACHE_OFF
133 bool "Do not enable dcache"
135 Do not enable data cache in U-Boot.
137 config SPL_SYS_DCACHE_OFF
138 bool "Do not enable dcache in SPL"
140 default SYS_DCACHE_OFF
142 Do not enable data cache in SPL.
144 config SYS_ARM_CACHE_CP15
145 bool "CP15 based cache enabling support"
147 Select this if your processor suports enabling caches by using
151 bool "MMU-based Paged Memory Management Support"
152 select SYS_ARM_CACHE_CP15
154 Select if you want MMU-based virtualised addressing space
155 support via paged memory management.
158 bool 'Use the ARM v7 PMSA Compliant MPU'
160 Some ARM systems without an MMU have instead a Memory Protection
161 Unit (MPU) that defines the type and permissions for regions of
163 If your CPU has an MPU then you should choose 'y' here unless you
164 know that you do not want to use the MPU.
166 # If set, the workarounds for these ARM errata are applied early during U-Boot
167 # startup. Note that in general these options force the workarounds to be
168 # applied; no CPU-type/version detection exists, unlike the similar options in
169 # the Linux kernel. Do not set these options unless they apply! Also note that
170 # the following can be machine-specific errata. These do have ability to
171 # provide rudimentary version and machine-specific checks, but expect no
173 # CONFIG_ARM_ERRATA_430973
174 # CONFIG_ARM_ERRATA_454179
175 # CONFIG_ARM_ERRATA_621766
176 # CONFIG_ARM_ERRATA_798870
177 # CONFIG_ARM_ERRATA_801819
178 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
179 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
181 config ARM_ERRATA_430973
184 config ARM_ERRATA_454179
187 config ARM_ERRATA_621766
190 config ARM_ERRATA_716044
193 config ARM_ERRATA_725233
196 config ARM_ERRATA_742230
199 config ARM_ERRATA_743622
202 config ARM_ERRATA_751472
205 config ARM_ERRATA_761320
208 config ARM_ERRATA_773022
211 config ARM_ERRATA_774769
214 config ARM_ERRATA_794072
217 config ARM_ERRATA_798870
220 config ARM_ERRATA_801819
223 config ARM_ERRATA_826974
226 config ARM_ERRATA_828024
229 config ARM_ERRATA_829520
232 config ARM_ERRATA_833069
235 config ARM_ERRATA_833471
238 config ARM_ERRATA_845369
241 config ARM_ERRATA_852421
244 config ARM_ERRATA_852423
247 config ARM_ERRATA_855873
250 config ARM_CORTEX_A8_CVE_2017_5715
253 config ARM_CORTEX_A15_CVE_2017_5715
258 select SYS_CACHE_SHIFT_5
263 select SYS_CACHE_SHIFT_5
268 select SYS_CACHE_SHIFT_5
273 select SYS_CACHE_SHIFT_5
278 select SYS_CACHE_SHIFT_5
284 select SYS_CACHE_SHIFT_5
291 select SYS_CACHE_SHIFT_6
298 select SYS_CACHE_SHIFT_5
299 select SYS_THUMB_BUILD
305 select SYS_ARM_CACHE_CP15
307 select SYS_CACHE_SHIFT_6
311 select SYS_CACHE_SHIFT_5
320 select SYS_CACHE_SHIFT_5
324 default "arm720t" if CPU_ARM720T
325 default "arm920t" if CPU_ARM920T
326 default "arm926ejs" if CPU_ARM926EJS
327 default "arm946es" if CPU_ARM946ES
328 default "arm1136" if CPU_ARM1136
329 default "arm1176" if CPU_ARM1176
330 default "armv7" if CPU_V7A
331 default "armv7" if CPU_V7R
332 default "armv7m" if CPU_V7M
333 default "pxa" if CPU_PXA
334 default "sa1100" if CPU_SA1100
335 default "armv8" if ARM64
339 default 4 if CPU_ARM720T
340 default 4 if CPU_ARM920T
341 default 5 if CPU_ARM926EJS
342 default 5 if CPU_ARM946ES
343 default 6 if CPU_ARM1136
344 default 6 if CPU_ARM1176
349 default 4 if CPU_SA1100
353 prompt "Select the ARM data write cache policy"
354 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
356 default SYS_ARM_CACHE_WRITEBACK
358 config SYS_ARM_CACHE_WRITEBACK
359 bool "Write-back (WB)"
361 A write updates the cache only and marks the cache line as dirty.
362 External memory is updated only when the line is evicted or explicitly
365 config SYS_ARM_CACHE_WRITETHROUGH
366 bool "Write-through (WT)"
368 A write updates both the cache and the external memory system.
369 This does not mark the cache line as dirty.
371 config SYS_ARM_CACHE_WRITEALLOC
372 bool "Write allocation (WA)"
374 A cache line is allocated on a write miss. This means that executing a
375 store instruction on the processor might cause a burst read to occur.
376 There is a linefill to obtain the data for the cache line, before the
381 bool "Enable ARCH_CPU_INIT"
383 Some architectures require a call to arch_cpu_init().
384 Say Y here to enable it
386 config SYS_ARCH_TIMER
387 bool "ARM Generic Timer support"
388 depends on CPU_V7A || ARM64
391 The ARM Generic Timer (aka arch-timer) provides an architected
392 interface to a timer source on an SoC.
393 It is mandatory for ARMv8 implementation and widely available
397 bool "Support for ARM SMC Calling Convention (SMCCC)"
398 depends on CPU_V7A || ARM64
401 Say Y here if you want to enable ARM SMC Calling Convention.
402 This should be enabled if U-Boot needs to communicate with system
403 firmware (for example, PSCI) according to SMCCC.
406 bool "support boot from semihosting"
408 In emulated environments, semihosting is a way for
409 the hosted environment to call out to the emulator to
410 retrieve files from the host machine.
412 config SYS_THUMB_BUILD
413 bool "Build U-Boot using the Thumb instruction set"
416 Use this flag to build U-Boot using the Thumb instruction set for
417 ARM architectures. Thumb instruction set provides better code
418 density. For ARM architectures that support Thumb2 this flag will
419 result in Thumb2 code generated by GCC.
421 config SPL_SYS_THUMB_BUILD
422 bool "Build SPL using the Thumb instruction set"
423 default y if SYS_THUMB_BUILD
424 depends on !ARM64 && SPL
426 Use this flag to build SPL using the Thumb instruction set for
427 ARM architectures. Thumb instruction set provides better code
428 density. For ARM architectures that support Thumb2 this flag will
429 result in Thumb2 code generated by GCC.
431 config TPL_SYS_THUMB_BUILD
432 bool "Build TPL using the Thumb instruction set"
433 default y if SYS_THUMB_BUILD
434 depends on TPL && !ARM64
436 Use this flag to build TPL using the Thumb instruction set for
437 ARM architectures. Thumb instruction set provides better code
438 density. For ARM architectures that support Thumb2 this flag will
439 result in Thumb2 code generated by GCC.
442 config SYS_L2CACHE_OFF
445 If SoC does not support L2CACHE or one does not want to enable
446 L2CACHE, choose this option.
448 config ENABLE_ARM_SOC_BOOT0_HOOK
449 bool "prepare BOOT0 header"
451 If the SoC's BOOT0 requires a header area filled with (magic)
452 values, then choose this option, and create a file included as
453 <asm/arch/boot0.h> which contains the required assembler code.
455 config USE_ARCH_MEMCPY
456 bool "Use an assembly optimized implementation of memcpy"
458 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
460 Enable the generation of an optimized version of memcpy.
461 Such an implementation may be faster under some conditions
462 but may increase the binary size.
464 config SPL_USE_ARCH_MEMCPY
465 bool "Use an assembly optimized implementation of memcpy for SPL"
466 default y if USE_ARCH_MEMCPY
469 Enable the generation of an optimized version of memcpy.
470 Such an implementation may be faster under some conditions
471 but may increase the binary size.
473 config TPL_USE_ARCH_MEMCPY
474 bool "Use an assembly optimized implementation of memcpy for TPL"
475 default y if USE_ARCH_MEMCPY
478 Enable the generation of an optimized version of memcpy.
479 Such an implementation may be faster under some conditions
480 but may increase the binary size.
482 config USE_ARCH_MEMMOVE
483 bool "Use an assembly optimized implementation of memmove" if !ARM64
484 default USE_ARCH_MEMCPY if ARM64
487 Enable the generation of an optimized version of memmove.
488 Such an implementation may be faster under some conditions
489 but may increase the binary size.
491 config SPL_USE_ARCH_MEMMOVE
492 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
493 default SPL_USE_ARCH_MEMCPY if ARM64
494 depends on SPL && ARM64
496 Enable the generation of an optimized version of memmove.
497 Such an implementation may be faster under some conditions
498 but may increase the binary size.
500 config TPL_USE_ARCH_MEMMOVE
501 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
502 default TPL_USE_ARCH_MEMCPY if ARM64
503 depends on TPL && ARM64
505 Enable the generation of an optimized version of memmove.
506 Such an implementation may be faster under some conditions
507 but may increase the binary size.
509 config USE_ARCH_MEMSET
510 bool "Use an assembly optimized implementation of memset"
512 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
514 Enable the generation of an optimized version of memset.
515 Such an implementation may be faster under some conditions
516 but may increase the binary size.
518 config SPL_USE_ARCH_MEMSET
519 bool "Use an assembly optimized implementation of memset for SPL"
520 default y if USE_ARCH_MEMSET
523 Enable the generation of an optimized version of memset.
524 Such an implementation may be faster under some conditions
525 but may increase the binary size.
527 config TPL_USE_ARCH_MEMSET
528 bool "Use an assembly optimized implementation of memset for TPL"
529 default y if USE_ARCH_MEMSET
532 Enable the generation of an optimized version of memset.
533 Such an implementation may be faster under some conditions
534 but may increase the binary size.
536 config ARM64_SUPPORT_AARCH32
537 bool "ARM64 system support AArch32 execution state"
539 default y if !TARGET_THUNDERX_88XX
541 This ARM64 system supports AArch32 execution state.
544 prompt "Target select"
549 select GPIO_EXTRA_HEADER
550 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
551 select SPL_SEPARATE_BSS if SPL
556 select GPIO_EXTRA_HEADER
557 select SPL_DM_SPI if SPL
560 Support for TI's DaVinci platform.
563 bool "Marvell Kirkwood"
564 select ARCH_MISC_INIT
565 select BOARD_EARLY_INIT_F
567 select GPIO_EXTRA_HEADER
570 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
576 select GPIO_EXTRA_HEADER
577 select SPL_DM_SPI if SPL
578 select SPL_DM_SPI_FLASH if SPL
587 select GPIO_EXTRA_HEADER
589 config TARGET_STV0991
590 bool "Support stv0991"
596 select GPIO_EXTRA_HEADER
603 bool "Broadcom BCM283X family"
607 select GPIO_EXTRA_HEADER
610 select SERIAL_SEARCH_ALL
615 bool "Broadcom BCM63158 family"
621 bool "Broadcom BCM68360 family"
627 bool "Broadcom BCM6858 family"
633 bool "Broadcom BCM7XXX family"
636 select GPIO_EXTRA_HEADER
639 imply OF_HAS_PRIOR_STAGE
641 This enables support for Broadcom ARM-based set-top box
642 chipsets, including the 7445 family of chips.
644 config TARGET_VEXPRESS_CA9X4
645 bool "Support vexpress_ca9x4"
649 config TARGET_BCMCYGNUS
650 bool "Support bcmcygnus"
652 select GPIO_EXTRA_HEADER
654 imply BCM_SF2_ETH_GMAC
662 bool "Support Broadcom Northstar2"
664 select GPIO_EXTRA_HEADER
666 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
667 ARMv8 Cortex-A57 processors targeting a broad range of networking
671 bool "Support Broadcom NS3"
673 select BOARD_LATE_INIT
675 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
676 ARMv8 Cortex-A72 processors targeting a broad range of networking
680 bool "Samsung EXYNOS"
690 select GPIO_EXTRA_HEADER
691 imply SYS_THUMB_BUILD
696 bool "Samsung S5PC1XX"
702 select GPIO_EXTRA_HEADER
706 bool "Calxeda Highbank"
717 imply OF_HAS_PRIOR_STAGE
719 config ARCH_INTEGRATOR
720 bool "ARM Ltd. Integrator family"
723 select GPIO_EXTRA_HEADER
728 bool "Qualcomm IPQ40xx SoCs"
734 select GPIO_EXTRA_HEADER
747 select GPIO_EXTRA_HEADER
749 select SYS_ARCH_TIMER
750 select SYS_THUMB_BUILD
756 bool "Texas Instruments' K3 Architecture"
761 config ARCH_OMAP2PLUS
764 select GPIO_EXTRA_HEADER
765 select SPL_BOARD_INIT if SPL
766 select SPL_STACK_R if SPL
768 imply TI_SYSC if DM && OF_CONTROL
773 select GPIO_EXTRA_HEADER
774 imply DISTRO_DEFAULTS
777 Support for the Meson SoC family developed by Amlogic Inc.,
778 targeted at media players and tablet computers. We currently
779 support the S905 (GXBaby) 64-bit SoC.
784 select GPIO_EXTRA_HEADER
787 select SPL_LIBCOMMON_SUPPORT if SPL
788 select SPL_LIBGENERIC_SUPPORT if SPL
789 select SPL_OF_CONTROL if SPL
792 Support for the MediaTek SoCs family developed by MediaTek Inc.
793 Please refer to doc/README.mediatek for more information.
796 bool "NXP LPC32xx platform"
801 select GPIO_EXTRA_HEADER
807 bool "NXP i.MX8 platform"
810 select GPIO_EXTRA_HEADER
813 select ENABLE_ARM_SOC_BOOT0_HOOK
816 bool "NXP i.MX8M platform"
818 select GPIO_EXTRA_HEADER
820 select SYS_FSL_HAS_SEC if IMX_HAB
821 select SYS_FSL_SEC_COMPAT_4
822 select SYS_FSL_SEC_LE
829 bool "NXP i.MX8ULP platform"
835 select GPIO_EXTRA_HEADER
839 bool "NXP i.MXRT platform"
843 select GPIO_EXTRA_HEADER
849 bool "NXP i.MX23 family"
851 select GPIO_EXTRA_HEADER
857 bool "NXP i.MX28 family"
859 select GPIO_EXTRA_HEADER
865 bool "NXP i.MX31 family"
867 select GPIO_EXTRA_HEADER
873 select GPIO_EXTRA_HEADER
875 select SYS_FSL_HAS_SEC if IMX_HAB
876 select SYS_FSL_SEC_COMPAT_4
877 select SYS_FSL_SEC_LE
878 select ROM_UNIFIED_SECTIONS
880 imply SYS_THUMB_BUILD
884 select ARCH_MISC_INIT
886 select GPIO_EXTRA_HEADER
888 select SYS_FSL_HAS_SEC if IMX_HAB
889 select SYS_FSL_SEC_COMPAT_4
890 select SYS_FSL_SEC_LE
891 imply BOARD_EARLY_INIT_F
893 imply SYS_THUMB_BUILD
898 select GPIO_EXTRA_HEADER
900 select SYS_FSL_HAS_SEC
901 select SYS_FSL_SEC_COMPAT_4
902 select SYS_FSL_SEC_LE
904 imply SYS_THUMB_BUILD
908 default "arch/arm/mach-omap2/u-boot-spl.lds"
913 select BOARD_EARLY_INIT_F
915 select GPIO_EXTRA_HEADER
920 bool "Nexell S5P4418/S5P6818 SoC"
921 select ENABLE_ARM_SOC_BOOT0_HOOK
923 select GPIO_EXTRA_HEADER
938 select LINUX_KERNEL_IMAGE_HEADER
941 select POSITION_INDEPENDENT
946 select SYSRESET_WATCHDOG
947 select SYSRESET_WATCHDOG_AUTO
951 imply DISTRO_DEFAULTS
952 imply OF_HAS_PRIOR_STAGE
955 bool "Actions Semi OWL SoCs"
959 select GPIO_EXTRA_HEADER
964 select SYS_RELOC_GD_ENV_ADDR
968 bool "QEMU Virtual Platform"
977 imply OF_HAS_PRIOR_STAGE
980 bool "Renesas ARM SoCs"
983 select GPIO_EXTRA_HEADER
984 imply BOARD_EARLY_INIT_F
987 imply SYS_THUMB_BUILD
988 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
990 config ARCH_SNAPDRAGON
991 bool "Qualcomm Snapdragon SoCs"
996 select GPIO_EXTRA_HEADER
1005 bool "Altera SOCFPGA family"
1006 select ARCH_EARLY_INIT_R
1007 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
1008 select ARM64 if TARGET_SOCFPGA_SOC64
1009 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1013 select GPIO_EXTRA_HEADER
1014 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1016 select SPL_DM_RESET if DM_RESET
1017 select SPL_DM_SERIAL
1018 select SPL_LIBCOMMON_SUPPORT
1019 select SPL_LIBGENERIC_SUPPORT
1020 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
1021 select SPL_OF_CONTROL
1022 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1028 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1030 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1031 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1041 imply SPL_DM_SPI_FLASH
1042 imply SPL_LIBDISK_SUPPORT
1044 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1045 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1046 imply SPL_SPI_FLASH_SUPPORT
1051 bool "Support sunxi (Allwinner) SoCs"
1054 select CMD_MMC if MMC
1055 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1060 select DM_I2C if I2C
1062 select DM_MMC if MMC
1063 select DM_SCSI if SCSI
1065 select GPIO_EXTRA_HEADER
1066 select OF_BOARD_SETUP
1069 select SPECIFY_CONSOLE_INDEX
1070 select SPL_SEPARATE_BSS if SPL
1071 select SPL_STACK_R if SPL
1072 select SPL_SYS_MALLOC_SIMPLE if SPL
1073 select SPL_SYS_THUMB_BUILD if !ARM64
1076 select SYS_THUMB_BUILD if !ARM64
1077 select USB if DISTRO_DEFAULTS
1078 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1079 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1080 select SPL_USE_TINY_PRINTF
1082 select SYS_RELOC_GD_ENV_ADDR
1083 imply BOARD_LATE_INIT
1086 imply CMD_UBI if MTD_RAW_NAND
1087 imply DISTRO_DEFAULTS
1090 imply OF_LIBFDT_OVERLAY
1091 imply PRE_CONSOLE_BUFFER
1093 imply SPL_LIBCOMMON_SUPPORT
1094 imply SPL_LIBGENERIC_SUPPORT
1095 imply SPL_MMC if MMC
1099 imply SYSRESET_WATCHDOG
1100 imply SYSRESET_WATCHDOG_AUTO
1105 bool "ST-Ericsson U8500 Series"
1109 select DM_MMC if MMC
1111 select DM_USB_GADGET if DM_USB
1115 imply AB8500_USB_PHY
1116 imply ARM_PL180_MMCI
1121 imply NOMADIK_MTU_TIMER
1126 imply SYS_THUMB_BUILD
1127 imply SYSRESET_SYSCON
1130 bool "Support Xilinx Versal Platform"
1134 select DM_ETH if NET
1135 select DM_MMC if MMC
1138 select GPIO_EXTRA_HEADER
1141 imply BOARD_LATE_INIT
1142 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1145 bool "Freescale Vybrid"
1147 select GPIO_EXTRA_HEADER
1149 select SYS_FSL_ERRATUM_ESDHC111
1154 bool "Xilinx Zynq based platform"
1159 select DM_ETH if NET
1160 select DM_MMC if MMC
1164 select GPIO_EXTRA_HEADER
1167 select SPL_BOARD_INIT if SPL
1168 select SPL_CLK if SPL
1169 select SPL_DM if SPL
1170 select SPL_DM_SPI if SPL
1171 select SPL_DM_SPI_FLASH if SPL
1172 select SPL_OF_CONTROL if SPL
1173 select SPL_SEPARATE_BSS if SPL
1175 imply ARCH_EARLY_INIT_R
1176 imply BOARD_LATE_INIT
1180 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1183 config ARCH_ZYNQMP_R5
1184 bool "Xilinx ZynqMP R5 based platform"
1188 select DM_ETH if NET
1189 select DM_MMC if MMC
1191 select GPIO_EXTRA_HEADER
1197 bool "Xilinx ZynqMP based platform"
1201 select DM_ETH if NET
1203 select DM_MMC if MMC
1205 select DM_SPI if SPI
1206 select DM_SPI_FLASH if DM_SPI
1209 select GPIO_EXTRA_HEADER
1211 select SPL_BOARD_INIT if SPL
1212 select SPL_CLK if SPL
1213 select SPL_DM if SPL
1214 select SPL_DM_SPI if SPI && SPL_DM
1215 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1216 select SPL_DM_MAILBOX if SPL
1217 imply SPL_FIRMWARE if SPL
1218 select SPL_SEPARATE_BSS if SPL
1222 imply BOARD_LATE_INIT
1224 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1228 imply ZYNQMP_GPIO_MODEPIN if DM_GPIO && USB
1232 select GPIO_EXTRA_HEADER
1233 imply DISTRO_DEFAULTS
1236 config TARGET_VEXPRESS64_AEMV8A
1237 bool "Support vexpress_aemv8a"
1239 select GPIO_EXTRA_HEADER
1242 config TARGET_VEXPRESS64_BASE_FVP
1243 bool "Support Versatile Express ARMv8a FVP BASE model"
1245 select GPIO_EXTRA_HEADER
1249 config TARGET_VEXPRESS64_JUNO
1250 bool "Support Versatile Express Juno Development Platform"
1252 select GPIO_EXTRA_HEADER
1263 imply OF_HAS_PRIOR_STAGE
1265 config TARGET_TOTAL_COMPUTE
1266 bool "Support Total Compute Platform"
1274 config TARGET_LS2080A_EMU
1275 bool "Support ls2080a_emu"
1278 select ARMV8_MULTIENTRY
1279 select FSL_DDR_SYNC_REFRESH
1280 select GPIO_EXTRA_HEADER
1282 Support for Freescale LS2080A_EMU platform.
1283 The LS2080A Development System (EMULATOR) is a pre-silicon
1284 development platform that supports the QorIQ LS2080A
1285 Layerscape Architecture processor.
1287 config TARGET_LS1088AQDS
1288 bool "Support ls1088aqds"
1291 select ARMV8_MULTIENTRY
1292 select ARCH_SUPPORT_TFABOOT
1293 select BOARD_LATE_INIT
1294 select GPIO_EXTRA_HEADER
1296 select FSL_DDR_INTERACTIVE if !SD_BOOT
1298 Support for NXP LS1088AQDS platform.
1299 The LS1088A Development System (QDS) is a high-performance
1300 development platform that supports the QorIQ LS1088A
1301 Layerscape Architecture processor.
1303 config TARGET_LS2080AQDS
1304 bool "Support ls2080aqds"
1307 select ARMV8_MULTIENTRY
1308 select ARCH_SUPPORT_TFABOOT
1309 select BOARD_LATE_INIT
1310 select GPIO_EXTRA_HEADER
1315 select FSL_DDR_INTERACTIVE if !SPL
1317 Support for Freescale LS2080AQDS platform.
1318 The LS2080A Development System (QDS) is a high-performance
1319 development platform that supports the QorIQ LS2080A
1320 Layerscape Architecture processor.
1322 config TARGET_LS2080ARDB
1323 bool "Support ls2080ardb"
1326 select ARMV8_MULTIENTRY
1327 select ARCH_SUPPORT_TFABOOT
1328 select BOARD_LATE_INIT
1331 select FSL_DDR_INTERACTIVE if !SPL
1332 select GPIO_EXTRA_HEADER
1336 Support for Freescale LS2080ARDB platform.
1337 The LS2080A Reference design board (RDB) is a high-performance
1338 development platform that supports the QorIQ LS2080A
1339 Layerscape Architecture processor.
1341 config TARGET_LS2081ARDB
1342 bool "Support ls2081ardb"
1345 select ARMV8_MULTIENTRY
1346 select BOARD_LATE_INIT
1347 select GPIO_EXTRA_HEADER
1350 Support for Freescale LS2081ARDB platform.
1351 The LS2081A Reference design board (RDB) is a high-performance
1352 development platform that supports the QorIQ LS2081A/LS2041A
1353 Layerscape Architecture processor.
1355 config TARGET_LX2160ARDB
1356 bool "Support lx2160ardb"
1359 select ARMV8_MULTIENTRY
1360 select ARCH_SUPPORT_TFABOOT
1361 select BOARD_LATE_INIT
1362 select GPIO_EXTRA_HEADER
1364 Support for NXP LX2160ARDB platform.
1365 The lx2160ardb (LX2160A Reference design board (RDB)
1366 is a high-performance development platform that supports the
1367 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1369 config TARGET_LX2160AQDS
1370 bool "Support lx2160aqds"
1373 select ARMV8_MULTIENTRY
1374 select ARCH_SUPPORT_TFABOOT
1375 select BOARD_LATE_INIT
1376 select GPIO_EXTRA_HEADER
1378 Support for NXP LX2160AQDS platform.
1379 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1380 is a high-performance development platform that supports the
1381 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1383 config TARGET_LX2162AQDS
1384 bool "Support lx2162aqds"
1386 select ARCH_MISC_INIT
1388 select ARMV8_MULTIENTRY
1389 select ARCH_SUPPORT_TFABOOT
1390 select BOARD_LATE_INIT
1391 select GPIO_EXTRA_HEADER
1393 Support for NXP LX2162AQDS platform.
1394 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1397 bool "Support HiKey 96boards Consumer Edition Platform"
1402 select GPIO_EXTRA_HEADER
1405 select SPECIFY_CONSOLE_INDEX
1408 Support for HiKey 96boards platform. It features a HI6220
1409 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1411 config TARGET_HIKEY960
1412 bool "Support HiKey960 96boards Consumer Edition Platform"
1416 select GPIO_EXTRA_HEADER
1421 Support for HiKey960 96boards platform. It features a HI3660
1422 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1424 config TARGET_POPLAR
1425 bool "Support Poplar 96boards Enterprise Edition Platform"
1429 select GPIO_EXTRA_HEADER
1434 Support for Poplar 96boards EE platform. It features a HI3798cv200
1435 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1436 making it capable of running any commercial set-top solution based on
1439 config TARGET_LS1012AQDS
1440 bool "Support ls1012aqds"
1443 select ARCH_SUPPORT_TFABOOT
1444 select BOARD_LATE_INIT
1445 select GPIO_EXTRA_HEADER
1447 Support for Freescale LS1012AQDS platform.
1448 The LS1012A Development System (QDS) is a high-performance
1449 development platform that supports the QorIQ LS1012A
1450 Layerscape Architecture processor.
1452 config TARGET_LS1012ARDB
1453 bool "Support ls1012ardb"
1456 select ARCH_SUPPORT_TFABOOT
1457 select BOARD_LATE_INIT
1458 select GPIO_EXTRA_HEADER
1462 Support for Freescale LS1012ARDB platform.
1463 The LS1012A Reference design board (RDB) is a high-performance
1464 development platform that supports the QorIQ LS1012A
1465 Layerscape Architecture processor.
1467 config TARGET_LS1012A2G5RDB
1468 bool "Support ls1012a2g5rdb"
1471 select ARCH_SUPPORT_TFABOOT
1472 select BOARD_LATE_INIT
1473 select GPIO_EXTRA_HEADER
1476 Support for Freescale LS1012A2G5RDB platform.
1477 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1478 development platform that supports the QorIQ LS1012A
1479 Layerscape Architecture processor.
1481 config TARGET_LS1012AFRWY
1482 bool "Support ls1012afrwy"
1485 select ARCH_SUPPORT_TFABOOT
1486 select BOARD_LATE_INIT
1487 select GPIO_EXTRA_HEADER
1491 Support for Freescale LS1012AFRWY platform.
1492 The LS1012A FRWY board (FRWY) is a high-performance
1493 development platform that supports the QorIQ LS1012A
1494 Layerscape Architecture processor.
1496 config TARGET_LS1012AFRDM
1497 bool "Support ls1012afrdm"
1500 select ARCH_SUPPORT_TFABOOT
1501 select GPIO_EXTRA_HEADER
1503 Support for Freescale LS1012AFRDM platform.
1504 The LS1012A Freedom board (FRDM) is a high-performance
1505 development platform that supports the QorIQ LS1012A
1506 Layerscape Architecture processor.
1508 config TARGET_LS1028AQDS
1509 bool "Support ls1028aqds"
1512 select ARMV8_MULTIENTRY
1513 select ARCH_SUPPORT_TFABOOT
1514 select BOARD_LATE_INIT
1515 select GPIO_EXTRA_HEADER
1517 Support for Freescale LS1028AQDS platform
1518 The LS1028A Development System (QDS) is a high-performance
1519 development platform that supports the QorIQ LS1028A
1520 Layerscape Architecture processor.
1522 config TARGET_LS1028ARDB
1523 bool "Support ls1028ardb"
1526 select ARMV8_MULTIENTRY
1527 select ARCH_SUPPORT_TFABOOT
1528 select BOARD_LATE_INIT
1529 select GPIO_EXTRA_HEADER
1531 Support for Freescale LS1028ARDB platform
1532 The LS1028A Development System (RDB) is a high-performance
1533 development platform that supports the QorIQ LS1028A
1534 Layerscape Architecture processor.
1536 config TARGET_LS1088ARDB
1537 bool "Support ls1088ardb"
1540 select ARMV8_MULTIENTRY
1541 select ARCH_SUPPORT_TFABOOT
1542 select BOARD_LATE_INIT
1544 select FSL_DDR_INTERACTIVE if !SD_BOOT
1545 select GPIO_EXTRA_HEADER
1547 Support for NXP LS1088ARDB platform.
1548 The LS1088A Reference design board (RDB) is a high-performance
1549 development platform that supports the QorIQ LS1088A
1550 Layerscape Architecture processor.
1552 config TARGET_LS1021AQDS
1553 bool "Support ls1021aqds"
1555 select ARCH_SUPPORT_PSCI
1556 select BOARD_EARLY_INIT_F
1557 select BOARD_LATE_INIT
1559 select CPU_V7_HAS_NONSEC
1560 select CPU_V7_HAS_VIRT
1561 select LS1_DEEP_SLEEP
1564 select FSL_DDR_INTERACTIVE
1565 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1566 select GPIO_EXTRA_HEADER
1567 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1570 config TARGET_LS1021ATWR
1571 bool "Support ls1021atwr"
1573 select ARCH_SUPPORT_PSCI
1574 select BOARD_EARLY_INIT_F
1575 select BOARD_LATE_INIT
1577 select CPU_V7_HAS_NONSEC
1578 select CPU_V7_HAS_VIRT
1579 select LS1_DEEP_SLEEP
1581 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1582 select GPIO_EXTRA_HEADER
1585 config TARGET_PG_WCOM_SELI8
1586 bool "Support Hitachi-Powergrids SELI8 service unit card"
1588 select ARCH_SUPPORT_PSCI
1589 select BOARD_EARLY_INIT_F
1590 select BOARD_LATE_INIT
1592 select CPU_V7_HAS_NONSEC
1593 select CPU_V7_HAS_VIRT
1595 select FSL_DDR_INTERACTIVE
1596 select GPIO_EXTRA_HEADER
1600 Support for Hitachi-Powergrids SELI8 service unit card.
1601 SELI8 is a QorIQ LS1021a based service unit card used
1602 in XMC20 and FOX615 product families.
1604 config TARGET_PG_WCOM_EXPU1
1605 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1607 select ARCH_SUPPORT_PSCI
1608 select BOARD_EARLY_INIT_F
1609 select BOARD_LATE_INIT
1611 select CPU_V7_HAS_NONSEC
1612 select CPU_V7_HAS_VIRT
1614 select FSL_DDR_INTERACTIVE
1618 Support for Hitachi-Powergrids EXPU1 service unit card.
1619 EXPU1 is a QorIQ LS1021a based service unit card used
1620 in XMC20 and FOX615 product families.
1622 config TARGET_LS1021ATSN
1623 bool "Support ls1021atsn"
1625 select ARCH_SUPPORT_PSCI
1626 select BOARD_EARLY_INIT_F
1627 select BOARD_LATE_INIT
1629 select CPU_V7_HAS_NONSEC
1630 select CPU_V7_HAS_VIRT
1631 select LS1_DEEP_SLEEP
1633 select GPIO_EXTRA_HEADER
1636 config TARGET_LS1021AIOT
1637 bool "Support ls1021aiot"
1639 select ARCH_SUPPORT_PSCI
1640 select BOARD_LATE_INIT
1642 select CPU_V7_HAS_NONSEC
1643 select CPU_V7_HAS_VIRT
1645 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1646 select GPIO_EXTRA_HEADER
1649 Support for Freescale LS1021AIOT platform.
1650 The LS1021A Freescale board (IOT) is a high-performance
1651 development platform that supports the QorIQ LS1021A
1652 Layerscape Architecture processor.
1654 config TARGET_LS1043AQDS
1655 bool "Support ls1043aqds"
1658 select ARMV8_MULTIENTRY
1659 select ARCH_SUPPORT_TFABOOT
1660 select BOARD_EARLY_INIT_F
1661 select BOARD_LATE_INIT
1663 select FSL_DDR_INTERACTIVE if !SPL
1664 select FSL_DSPI if !SPL_NO_DSPI
1665 select DM_SPI_FLASH if FSL_DSPI
1666 select GPIO_EXTRA_HEADER
1670 Support for Freescale LS1043AQDS platform.
1672 config TARGET_LS1043ARDB
1673 bool "Support ls1043ardb"
1676 select ARMV8_MULTIENTRY
1677 select ARCH_SUPPORT_TFABOOT
1678 select BOARD_EARLY_INIT_F
1679 select BOARD_LATE_INIT
1681 select FSL_DSPI if !SPL_NO_DSPI
1682 select DM_SPI_FLASH if FSL_DSPI
1683 select GPIO_EXTRA_HEADER
1685 Support for Freescale LS1043ARDB platform.
1687 config TARGET_LS1046AQDS
1688 bool "Support ls1046aqds"
1691 select ARMV8_MULTIENTRY
1692 select ARCH_SUPPORT_TFABOOT
1693 select BOARD_EARLY_INIT_F
1694 select BOARD_LATE_INIT
1695 select DM_SPI_FLASH if DM_SPI
1697 select FSL_DDR_BIST if !SPL
1698 select FSL_DDR_INTERACTIVE if !SPL
1699 select FSL_DDR_INTERACTIVE if !SPL
1700 select GPIO_EXTRA_HEADER
1703 Support for Freescale LS1046AQDS platform.
1704 The LS1046A Development System (QDS) is a high-performance
1705 development platform that supports the QorIQ LS1046A
1706 Layerscape Architecture processor.
1708 config TARGET_LS1046ARDB
1709 bool "Support ls1046ardb"
1712 select ARMV8_MULTIENTRY
1713 select ARCH_SUPPORT_TFABOOT
1714 select BOARD_EARLY_INIT_F
1715 select BOARD_LATE_INIT
1716 select DM_SPI_FLASH if DM_SPI
1717 select POWER_MC34VR500
1720 select FSL_DDR_INTERACTIVE if !SPL
1721 select GPIO_EXTRA_HEADER
1724 Support for Freescale LS1046ARDB platform.
1725 The LS1046A Reference Design Board (RDB) is a high-performance
1726 development platform that supports the QorIQ LS1046A
1727 Layerscape Architecture processor.
1729 config TARGET_LS1046AFRWY
1730 bool "Support ls1046afrwy"
1733 select ARMV8_MULTIENTRY
1734 select ARCH_SUPPORT_TFABOOT
1735 select BOARD_EARLY_INIT_F
1736 select BOARD_LATE_INIT
1737 select DM_SPI_FLASH if DM_SPI
1738 select GPIO_EXTRA_HEADER
1741 Support for Freescale LS1046AFRWY platform.
1742 The LS1046A Freeway Board (FRWY) is a high-performance
1743 development platform that supports the QorIQ LS1046A
1744 Layerscape Architecture processor.
1750 select ARMV8_MULTIENTRY
1766 select GPIO_EXTRA_HEADER
1767 select SPL_DM if SPL
1768 select SPL_DM_SPI if SPL
1769 select SPL_DM_SPI_FLASH if SPL
1770 select SPL_DM_I2C if SPL
1771 select SPL_DM_MMC if SPL
1772 select SPL_DM_SERIAL if SPL
1774 Support for Kontron SMARC-sAL28 board.
1777 bool "Support ten64"
1779 select ARCH_MISC_INIT
1781 select ARMV8_MULTIENTRY
1782 select ARCH_SUPPORT_TFABOOT
1783 select BOARD_LATE_INIT
1785 select FSL_DDR_INTERACTIVE if !SD_BOOT
1786 select GPIO_EXTRA_HEADER
1788 Support for Traverse Technologies Ten64 board, based
1791 config TARGET_COLIBRI_PXA270
1792 bool "Support colibri_pxa270"
1794 select GPIO_EXTRA_HEADER
1796 config ARCH_UNIPHIER
1797 bool "Socionext UniPhier SoCs"
1798 select BOARD_LATE_INIT
1807 select OF_BOARD_SETUP
1811 select SPL_BOARD_INIT if SPL
1812 select SPL_DM if SPL
1813 select SPL_LIBCOMMON_SUPPORT if SPL
1814 select SPL_LIBGENERIC_SUPPORT if SPL
1815 select SPL_OF_CONTROL if SPL
1816 select SPL_PINCTRL if SPL
1819 imply DISTRO_DEFAULTS
1822 Support for UniPhier SoC family developed by Socionext Inc.
1823 (formerly, System LSI Business Division of Panasonic Corporation)
1825 config ARCH_SYNQUACER
1826 bool "Socionext SynQuacer SoCs"
1832 select SYSRESET_PSCI
1835 Support for SynQuacer SoC family developed by Socionext Inc.
1836 This SoC is used on 96boards EE DeveloperBox.
1839 bool "Support STMicroelectronics STM32 MCU with cortex M"
1846 bool "Support STMicrolectronics SoCs"
1855 Support for STMicroelectronics STiH407/10 SoC family.
1856 This SoC is used on Linaro 96Board STiH410-B2260
1859 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1860 select ARCH_MISC_INIT
1861 select ARCH_SUPPORT_TFABOOT
1862 select BOARD_LATE_INIT
1871 select OF_SYSTEM_SETUP
1877 select SYS_THUMB_BUILD
1881 imply OF_LIBFDT_OVERLAY
1882 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1886 Support for STM32MP SoC family developed by STMicroelectronics,
1887 MPUs based on ARM cortex A core
1888 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1889 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1891 SPL is the unsecure FSBL for the basic boot chain.
1893 config ARCH_ROCKCHIP
1894 bool "Support Rockchip SoCs"
1896 select BINMAN if SPL_OPTEE || (SPL && !ARM64)
1906 select ENABLE_ARM_SOC_BOOT0_HOOK
1909 select SPL_DM if SPL
1910 select SPL_DM_SPI if SPL
1911 select SPL_DM_SPI_FLASH if SPL
1913 select SYS_THUMB_BUILD if !ARM64
1916 imply DEBUG_UART_BOARD_INIT
1917 imply DISTRO_DEFAULTS
1919 imply SARADC_ROCKCHIP
1921 imply SPL_SYS_MALLOC_SIMPLE
1924 imply USB_FUNCTION_FASTBOOT
1926 config ARCH_OCTEONTX
1927 bool "Support OcteonTX SoCs"
1930 select GPIO_EXTRA_HEADER
1934 select BOARD_LATE_INIT
1935 select SYS_CACHE_SHIFT_7
1936 select SYS_PCI_64BIT if PCI
1937 imply OF_HAS_PRIOR_STAGE
1939 config ARCH_OCTEONTX2
1940 bool "Support OcteonTX2 SoCs"
1943 select GPIO_EXTRA_HEADER
1947 select BOARD_LATE_INIT
1948 select SYS_CACHE_SHIFT_7
1949 select SYS_PCI_64BIT if PCI
1950 imply OF_HAS_PRIOR_STAGE
1952 config TARGET_THUNDERX_88XX
1953 bool "Support ThunderX 88xx"
1955 select GPIO_EXTRA_HEADER
1958 select SYS_CACHE_SHIFT_7
1961 bool "Support Aspeed SoCs"
1966 config TARGET_DURIAN
1967 bool "Support Phytium Durian Platform"
1969 select GPIO_EXTRA_HEADER
1971 Support for durian platform.
1972 It has 2GB Sdram, uart and pcie.
1974 config TARGET_PRESIDIO_ASIC
1975 bool "Support Cortina Presidio ASIC Platform"
1979 config TARGET_XENGUEST_ARM64
1980 bool "Xen guest ARM64"
1984 select LINUX_KERNEL_IMAGE_HEADER
1987 imply OF_HAS_PRIOR_STAGE
1991 config SUPPORT_PASSING_ATAGS
1992 bool "Support pre-devicetree ATAG-based booting"
1994 imply SETUP_MEMORY_TAGS
1996 Support for booting older Linux kernels, using ATAGs rather than
1997 passing a devicetree. This is option is rarely used, and the
1998 semantics are defined at
1999 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
2001 config SETUP_MEMORY_TAGS
2002 bool "Pass memory size information via ATAG"
2003 depends on SUPPORT_PASSING_ATAGS
2006 bool "Pass Linux kernel cmdline via ATAG"
2007 depends on SUPPORT_PASSING_ATAGS
2010 bool "Pass initrd starting point and size via ATAG"
2011 depends on SUPPORT_PASSING_ATAGS
2014 bool "Pass system revision via ATAG"
2015 depends on SUPPORT_PASSING_ATAGS
2018 bool "Pass system serial number via ATAG"
2019 depends on SUPPORT_PASSING_ATAGS
2021 config STATIC_MACH_TYPE
2022 bool "Statically define the Machine ID number"
2024 When booting via ATAGs, enable this option if we know the correct
2025 machine ID number to use at compile time. Some systems will be
2026 passed the number dynamically by whatever loads U-Boot.
2029 int "Machine ID number"
2030 depends on STATIC_MACH_TYPE
2032 When booting via ATAGs, the machine type must be passed as a number.
2033 For the full list see https://www.arm.linux.org.uk/developer/machines
2035 config ARCH_SUPPORT_TFABOOT
2039 bool "Support for booting from TF-A"
2040 depends on ARCH_SUPPORT_TFABOOT
2042 Some platforms support the setup of secure registers (for instance
2043 for CPU errata handling) or provide secure services like PSCI.
2044 Those services could also be provided by other firmware parts
2045 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
2046 does not need to (and cannot) execute this code.
2047 Enabling this option will make a U-Boot binary that is relying
2048 on other firmware layers to provide secure functionality.
2050 config TI_SECURE_DEVICE
2051 bool "HS Device Type Support"
2052 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2054 If a high secure (HS) device type is being used, this config
2055 must be set. This option impacts various aspects of the
2056 build system (to create signed boot images that can be
2057 authenticated) and the code. See the doc/README.ti-secure
2058 file for further details.
2060 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
2061 config ISW_ENTRY_ADDR
2062 hex "Address in memory or XIP address of bootloader entry point"
2063 default 0x402F4000 if AM43XX
2064 default 0x402F0400 if AM33XX
2065 default 0x40301350 if OMAP54XX
2067 After any reset, the boot ROM searches the boot media for a valid
2068 boot image. For non-XIP devices, the ROM then copies the image into
2069 internal memory. For all boot modes, after the ROM processes the
2070 boot image it eventually computes the entry point address depending
2071 on the device type (secure/non-secure), boot media (xip/non-xip) and
2075 config SYS_KWD_CONFIG
2076 string "kwbimage config file path"
2077 depends on ARCH_KIRKWOOD || ARCH_MVEBU
2078 default "arch/arm/mach-mvebu/kwbimage.cfg"
2080 Path within the source directory to the kwbimage.cfg file to use
2081 when packaging the U-Boot image for use.
2083 source "arch/arm/mach-apple/Kconfig"
2085 source "arch/arm/mach-aspeed/Kconfig"
2087 source "arch/arm/mach-at91/Kconfig"
2089 source "arch/arm/mach-bcm283x/Kconfig"
2091 source "arch/arm/mach-bcmstb/Kconfig"
2093 source "arch/arm/mach-davinci/Kconfig"
2095 source "arch/arm/mach-exynos/Kconfig"
2097 source "arch/arm/mach-highbank/Kconfig"
2099 source "arch/arm/mach-integrator/Kconfig"
2101 source "arch/arm/mach-ipq40xx/Kconfig"
2103 source "arch/arm/mach-k3/Kconfig"
2105 source "arch/arm/mach-keystone/Kconfig"
2107 source "arch/arm/mach-kirkwood/Kconfig"
2109 source "arch/arm/mach-lpc32xx/Kconfig"
2111 source "arch/arm/mach-mvebu/Kconfig"
2113 source "arch/arm/mach-octeontx/Kconfig"
2115 source "arch/arm/mach-octeontx2/Kconfig"
2117 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2119 source "arch/arm/mach-imx/mx3/Kconfig"
2121 source "arch/arm/mach-imx/mx5/Kconfig"
2123 source "arch/arm/mach-imx/mx6/Kconfig"
2125 source "arch/arm/mach-imx/mx7/Kconfig"
2127 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2129 source "arch/arm/mach-imx/imx8/Kconfig"
2131 source "arch/arm/mach-imx/imx8m/Kconfig"
2133 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2135 source "arch/arm/mach-imx/imxrt/Kconfig"
2137 source "arch/arm/mach-imx/mxs/Kconfig"
2139 source "arch/arm/mach-omap2/Kconfig"
2141 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2143 source "arch/arm/mach-orion5x/Kconfig"
2145 source "arch/arm/mach-owl/Kconfig"
2147 source "arch/arm/mach-rmobile/Kconfig"
2149 source "arch/arm/mach-meson/Kconfig"
2151 source "arch/arm/mach-mediatek/Kconfig"
2153 source "arch/arm/mach-qemu/Kconfig"
2155 source "arch/arm/mach-rockchip/Kconfig"
2157 source "arch/arm/mach-s5pc1xx/Kconfig"
2159 source "arch/arm/mach-snapdragon/Kconfig"
2161 source "arch/arm/mach-socfpga/Kconfig"
2163 source "arch/arm/mach-sti/Kconfig"
2165 source "arch/arm/mach-stm32/Kconfig"
2167 source "arch/arm/mach-stm32mp/Kconfig"
2169 source "arch/arm/mach-sunxi/Kconfig"
2171 source "arch/arm/mach-tegra/Kconfig"
2173 source "arch/arm/mach-u8500/Kconfig"
2175 source "arch/arm/mach-uniphier/Kconfig"
2177 source "arch/arm/cpu/armv7/vf610/Kconfig"
2179 source "arch/arm/mach-zynq/Kconfig"
2181 source "arch/arm/mach-zynqmp/Kconfig"
2183 source "arch/arm/mach-versal/Kconfig"
2185 source "arch/arm/mach-zynqmp-r5/Kconfig"
2187 source "arch/arm/cpu/armv7/Kconfig"
2189 source "arch/arm/cpu/armv8/Kconfig"
2191 source "arch/arm/mach-imx/Kconfig"
2193 source "arch/arm/mach-nexell/Kconfig"
2195 source "board/armltd/total_compute/Kconfig"
2197 source "board/bosch/shc/Kconfig"
2198 source "board/bosch/guardian/Kconfig"
2199 source "board/Marvell/octeontx/Kconfig"
2200 source "board/Marvell/octeontx2/Kconfig"
2201 source "board/armltd/vexpress/Kconfig"
2202 source "board/armltd/vexpress64/Kconfig"
2203 source "board/cortina/presidio-asic/Kconfig"
2204 source "board/broadcom/bcm963158/Kconfig"
2205 source "board/broadcom/bcm968360bg/Kconfig"
2206 source "board/broadcom/bcm968580xref/Kconfig"
2207 source "board/broadcom/bcmns3/Kconfig"
2208 source "board/cavium/thunderx/Kconfig"
2209 source "board/eets/pdu001/Kconfig"
2210 source "board/emulation/qemu-arm/Kconfig"
2211 source "board/freescale/ls2080aqds/Kconfig"
2212 source "board/freescale/ls2080ardb/Kconfig"
2213 source "board/freescale/ls1088a/Kconfig"
2214 source "board/freescale/ls1028a/Kconfig"
2215 source "board/freescale/ls1021aqds/Kconfig"
2216 source "board/freescale/ls1043aqds/Kconfig"
2217 source "board/freescale/ls1021atwr/Kconfig"
2218 source "board/freescale/ls1021atsn/Kconfig"
2219 source "board/freescale/ls1021aiot/Kconfig"
2220 source "board/freescale/ls1046aqds/Kconfig"
2221 source "board/freescale/ls1043ardb/Kconfig"
2222 source "board/freescale/ls1046ardb/Kconfig"
2223 source "board/freescale/ls1046afrwy/Kconfig"
2224 source "board/freescale/ls1012aqds/Kconfig"
2225 source "board/freescale/ls1012ardb/Kconfig"
2226 source "board/freescale/ls1012afrdm/Kconfig"
2227 source "board/freescale/lx2160a/Kconfig"
2228 source "board/grinn/chiliboard/Kconfig"
2229 source "board/hisilicon/hikey/Kconfig"
2230 source "board/hisilicon/hikey960/Kconfig"
2231 source "board/hisilicon/poplar/Kconfig"
2232 source "board/isee/igep003x/Kconfig"
2233 source "board/kontron/sl28/Kconfig"
2234 source "board/myir/mys_6ulx/Kconfig"
2235 source "board/seeed/npi_imx6ull/Kconfig"
2236 source "board/socionext/developerbox/Kconfig"
2237 source "board/st/stv0991/Kconfig"
2238 source "board/tcl/sl50/Kconfig"
2239 source "board/toradex/colibri_pxa270/Kconfig"
2240 source "board/traverse/ten64/Kconfig"
2241 source "board/variscite/dart_6ul/Kconfig"
2242 source "board/vscom/baltos/Kconfig"
2243 source "board/phytium/durian/Kconfig"
2244 source "board/xen/xenguest_arm64/Kconfig"
2245 source "board/keymile/Kconfig"
2247 source "arch/arm/Kconfig.debug"
2252 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2253 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2254 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64