1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed from
19 almost any 4K aligned address. This logic relies on the relocation
20 information that is embedded in the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
25 default n if ARCH_QEMU
26 default y if POSITION_INDEPENDENT
28 U-Boot typically uses a hard-coded value for the stack pointer
29 before relocation. Enable this option to instead calculate the
30 initial SP at run-time. This is useful to avoid hard-coding addresses
31 into U-Boot, so that it can be loaded and executed at arbitrary
32 addresses and thus avoid using arbitrary addresses at runtime.
34 If this option is enabled, the early stack pointer is set to
35 &_bss_start with a offset value added. The offset is specified by
36 SYS_INIT_SP_BSS_OFFSET.
38 config SYS_INIT_SP_BSS_OFFSET
39 int "Early stack offset from the .bss base address"
40 depends on INIT_SP_RELATIVE
43 This option's value is the offset added to &_bss_start in order to
44 calculate the stack pointer. This offset should be large enough so
45 that the early malloc region, global data (gd), and early stack usage
46 do not overlap any appended DTB.
48 config LINUX_KERNEL_IMAGE_HEADER
51 Place a Linux kernel image header at the start of the U-Boot binary.
52 The format of the header is described in the Linux kernel source at
53 Documentation/arm64/booting.txt. This feature is useful since the
54 image header reports the amount of memory (BSS and similar) that
55 U-Boot needs to use, but which isn't part of the binary.
57 if LINUX_KERNEL_IMAGE_HEADER
58 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
61 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
62 TEXT_OFFSET value written to the Linux kernel image header.
78 ARM GICV3 Interrupt translation service (ITS).
79 Basic support for programming locality specific peripheral
80 interrupts (LPI) configuration tables and enable LPI tables.
81 LPI configuration table can be used by u-boot or Linux.
82 ARM GICV3 has limitation, once the LPI table is enabled, LPI
83 configuration table can not be re-programmed, unless GICV3 reset.
89 config DMA_ADDR_T_64BIT
99 config GPIO_EXTRA_HEADER
102 # Used for compatibility with asm files copied from the kernel
103 config ARM_ASM_UNIFIED
107 # Used for compatibility with asm files copied from the kernel
111 config SYS_ICACHE_OFF
112 bool "Do not enable icache"
115 Do not enable instruction cache in U-Boot.
117 config SPL_SYS_ICACHE_OFF
118 bool "Do not enable icache in SPL"
120 default SYS_ICACHE_OFF
122 Do not enable instruction cache in SPL.
124 config SYS_DCACHE_OFF
125 bool "Do not enable dcache"
128 Do not enable data cache in U-Boot.
130 config SPL_SYS_DCACHE_OFF
131 bool "Do not enable dcache in SPL"
133 default SYS_DCACHE_OFF
135 Do not enable data cache in SPL.
137 config SYS_ARM_CACHE_CP15
138 bool "CP15 based cache enabling support"
140 Select this if your processor suports enabling caches by using
144 bool "MMU-based Paged Memory Management Support"
145 select SYS_ARM_CACHE_CP15
147 Select if you want MMU-based virtualised addressing space
148 support via paged memory management.
151 bool 'Use the ARM v7 PMSA Compliant MPU'
153 Some ARM systems without an MMU have instead a Memory Protection
154 Unit (MPU) that defines the type and permissions for regions of
156 If your CPU has an MPU then you should choose 'y' here unless you
157 know that you do not want to use the MPU.
159 # If set, the workarounds for these ARM errata are applied early during U-Boot
160 # startup. Note that in general these options force the workarounds to be
161 # applied; no CPU-type/version detection exists, unlike the similar options in
162 # the Linux kernel. Do not set these options unless they apply! Also note that
163 # the following can be machine-specific errata. These do have ability to
164 # provide rudimentary version and machine-specific checks, but expect no
166 # CONFIG_ARM_ERRATA_430973
167 # CONFIG_ARM_ERRATA_454179
168 # CONFIG_ARM_ERRATA_621766
169 # CONFIG_ARM_ERRATA_798870
170 # CONFIG_ARM_ERRATA_801819
171 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
172 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
174 config ARM_ERRATA_430973
177 config ARM_ERRATA_454179
180 config ARM_ERRATA_621766
183 config ARM_ERRATA_716044
186 config ARM_ERRATA_725233
189 config ARM_ERRATA_742230
192 config ARM_ERRATA_743622
195 config ARM_ERRATA_751472
198 config ARM_ERRATA_761320
201 config ARM_ERRATA_773022
204 config ARM_ERRATA_774769
207 config ARM_ERRATA_794072
210 config ARM_ERRATA_798870
213 config ARM_ERRATA_801819
216 config ARM_ERRATA_826974
219 config ARM_ERRATA_828024
222 config ARM_ERRATA_829520
225 config ARM_ERRATA_833069
228 config ARM_ERRATA_833471
231 config ARM_ERRATA_845369
234 config ARM_ERRATA_852421
237 config ARM_ERRATA_852423
240 config ARM_ERRATA_855873
243 config ARM_CORTEX_A8_CVE_2017_5715
246 config ARM_CORTEX_A15_CVE_2017_5715
251 select SYS_CACHE_SHIFT_5
256 select SYS_CACHE_SHIFT_5
261 select SYS_CACHE_SHIFT_5
266 select SYS_CACHE_SHIFT_5
271 select SYS_CACHE_SHIFT_5
277 select SYS_CACHE_SHIFT_5
284 select SYS_CACHE_SHIFT_6
291 select SYS_CACHE_SHIFT_5
292 select SYS_THUMB_BUILD
298 select SYS_ARM_CACHE_CP15
300 select SYS_CACHE_SHIFT_6
304 select SYS_CACHE_SHIFT_5
309 select SYS_CACHE_SHIFT_5
313 default "arm720t" if CPU_ARM720T
314 default "arm920t" if CPU_ARM920T
315 default "arm926ejs" if CPU_ARM926EJS
316 default "arm946es" if CPU_ARM946ES
317 default "arm1136" if CPU_ARM1136
318 default "arm1176" if CPU_ARM1176
319 default "armv7" if CPU_V7A
320 default "armv7" if CPU_V7R
321 default "armv7m" if CPU_V7M
322 default "pxa" if CPU_PXA
323 default "sa1100" if CPU_SA1100
324 default "armv8" if ARM64
328 default 4 if CPU_ARM720T
329 default 4 if CPU_ARM920T
330 default 5 if CPU_ARM926EJS
331 default 5 if CPU_ARM946ES
332 default 6 if CPU_ARM1136
333 default 6 if CPU_ARM1176
338 default 4 if CPU_SA1100
341 config SYS_CACHE_SHIFT_5
344 config SYS_CACHE_SHIFT_6
347 config SYS_CACHE_SHIFT_7
350 config SYS_CACHELINE_SIZE
352 default 128 if SYS_CACHE_SHIFT_7
353 default 64 if SYS_CACHE_SHIFT_6
354 default 32 if SYS_CACHE_SHIFT_5
357 prompt "Select the ARM data write cache policy"
358 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
360 default SYS_ARM_CACHE_WRITEBACK
362 config SYS_ARM_CACHE_WRITEBACK
363 bool "Write-back (WB)"
365 A write updates the cache only and marks the cache line as dirty.
366 External memory is updated only when the line is evicted or explicitly
369 config SYS_ARM_CACHE_WRITETHROUGH
370 bool "Write-through (WT)"
372 A write updates both the cache and the external memory system.
373 This does not mark the cache line as dirty.
375 config SYS_ARM_CACHE_WRITEALLOC
376 bool "Write allocation (WA)"
378 A cache line is allocated on a write miss. This means that executing a
379 store instruction on the processor might cause a burst read to occur.
380 There is a linefill to obtain the data for the cache line, before the
385 bool "Enable ARCH_CPU_INIT"
387 Some architectures require a call to arch_cpu_init().
388 Say Y here to enable it
390 config SYS_ARCH_TIMER
391 bool "ARM Generic Timer support"
392 depends on CPU_V7A || ARM64
395 The ARM Generic Timer (aka arch-timer) provides an architected
396 interface to a timer source on an SoC.
397 It is mandatory for ARMv8 implementation and widely available
401 bool "Support for ARM SMC Calling Convention (SMCCC)"
402 depends on CPU_V7A || ARM64
405 Say Y here if you want to enable ARM SMC Calling Convention.
406 This should be enabled if U-Boot needs to communicate with system
407 firmware (for example, PSCI) according to SMCCC.
410 bool "support boot from semihosting"
412 In emulated environments, semihosting is a way for
413 the hosted environment to call out to the emulator to
414 retrieve files from the host machine.
416 config SYS_THUMB_BUILD
417 bool "Build U-Boot using the Thumb instruction set"
420 Use this flag to build U-Boot using the Thumb instruction set for
421 ARM architectures. Thumb instruction set provides better code
422 density. For ARM architectures that support Thumb2 this flag will
423 result in Thumb2 code generated by GCC.
425 config SPL_SYS_THUMB_BUILD
426 bool "Build SPL using the Thumb instruction set"
427 default y if SYS_THUMB_BUILD
428 depends on !ARM64 && SPL
430 Use this flag to build SPL using the Thumb instruction set for
431 ARM architectures. Thumb instruction set provides better code
432 density. For ARM architectures that support Thumb2 this flag will
433 result in Thumb2 code generated by GCC.
435 config TPL_SYS_THUMB_BUILD
436 bool "Build TPL using the Thumb instruction set"
437 default y if SYS_THUMB_BUILD
438 depends on TPL && !ARM64
440 Use this flag to build TPL using the Thumb instruction set for
441 ARM architectures. Thumb instruction set provides better code
442 density. For ARM architectures that support Thumb2 this flag will
443 result in Thumb2 code generated by GCC.
446 config SYS_L2CACHE_OFF
449 If SoC does not support L2CACHE or one does not want to enable
450 L2CACHE, choose this option.
452 config ENABLE_ARM_SOC_BOOT0_HOOK
453 bool "prepare BOOT0 header"
455 If the SoC's BOOT0 requires a header area filled with (magic)
456 values, then choose this option, and create a file included as
457 <asm/arch/boot0.h> which contains the required assembler code.
459 config ARM_CORTEX_CPU_IS_UP
463 config USE_ARCH_MEMCPY
464 bool "Use an assembly optimized implementation of memcpy"
468 Enable the generation of an optimized version of memcpy.
469 Such an implementation may be faster under some conditions
470 but may increase the binary size.
472 config SPL_USE_ARCH_MEMCPY
473 bool "Use an assembly optimized implementation of memcpy for SPL"
474 default y if USE_ARCH_MEMCPY
475 depends on !ARM64 && SPL
477 Enable the generation of an optimized version of memcpy.
478 Such an implementation may be faster under some conditions
479 but may increase the binary size.
481 config TPL_USE_ARCH_MEMCPY
482 bool "Use an assembly optimized implementation of memcpy for TPL"
483 default y if USE_ARCH_MEMCPY
484 depends on !ARM64 && TPL
486 Enable the generation of an optimized version of memcpy.
487 Such an implementation may be faster under some conditions
488 but may increase the binary size.
490 config USE_ARCH_MEMSET
491 bool "Use an assembly optimized implementation of memset"
495 Enable the generation of an optimized version of memset.
496 Such an implementation may be faster under some conditions
497 but may increase the binary size.
499 config SPL_USE_ARCH_MEMSET
500 bool "Use an assembly optimized implementation of memset for SPL"
501 default y if USE_ARCH_MEMSET
502 depends on !ARM64 && SPL
504 Enable the generation of an optimized version of memset.
505 Such an implementation may be faster under some conditions
506 but may increase the binary size.
508 config TPL_USE_ARCH_MEMSET
509 bool "Use an assembly optimized implementation of memset for TPL"
510 default y if USE_ARCH_MEMSET
511 depends on !ARM64 && TPL
513 Enable the generation of an optimized version of memset.
514 Such an implementation may be faster under some conditions
515 but may increase the binary size.
517 config ARM64_SUPPORT_AARCH32
518 bool "ARM64 system support AArch32 execution state"
520 default y if !TARGET_THUNDERX_88XX
522 This ARM64 system supports AArch32 execution state.
525 prompt "Target select"
530 select GPIO_EXTRA_HEADER
531 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
532 select SPL_SEPARATE_BSS if SPL
534 config TARGET_ASPENITE
535 bool "Support aspenite"
537 select GPIO_EXTRA_HEADER
542 select GPIO_EXTRA_HEADER
543 select SPL_DM_SPI if SPL
546 Support for TI's DaVinci platform.
549 bool "Marvell Kirkwood"
550 select ARCH_MISC_INIT
551 select BOARD_EARLY_INIT_F
553 select GPIO_EXTRA_HEADER
556 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
562 select GPIO_EXTRA_HEADER
563 select SPL_DM_SPI if SPL
564 select SPL_DM_SPI_FLASH if SPL
573 select GPIO_EXTRA_HEADER
575 config TARGET_STV0991
576 bool "Support stv0991"
582 select GPIO_EXTRA_HEADER
591 select GPIO_EXTRA_HEADER
594 bool "Broadcom BCM283X family"
598 select GPIO_EXTRA_HEADER
601 select SERIAL_SEARCH_ALL
606 bool "Broadcom BCM63158 family"
612 bool "Broadcom BCM68360 family"
618 bool "Broadcom BCM6858 family"
624 bool "Broadcom BCM7XXX family"
627 select GPIO_EXTRA_HEADER
629 select OF_PRIOR_STAGE
632 This enables support for Broadcom ARM-based set-top box
633 chipsets, including the 7445 family of chips.
635 config TARGET_BCMCYGNUS
636 bool "Support bcmcygnus"
638 select GPIO_EXTRA_HEADER
640 imply BCM_SF2_ETH_GMAC
648 bool "Support Broadcom Northstar2"
650 select GPIO_EXTRA_HEADER
652 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
653 ARMv8 Cortex-A57 processors targeting a broad range of networking
657 bool "Support Broadcom NS3"
659 select BOARD_LATE_INIT
661 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
662 ARMv8 Cortex-A72 processors targeting a broad range of networking
666 bool "Samsung EXYNOS"
676 select GPIO_EXTRA_HEADER
677 imply SYS_THUMB_BUILD
682 bool "Samsung S5PC1XX"
688 select GPIO_EXTRA_HEADER
692 bool "Calxeda Highbank"
705 config ARCH_INTEGRATOR
706 bool "ARM Ltd. Integrator family"
709 select GPIO_EXTRA_HEADER
714 bool "Qualcomm IPQ40xx SoCs"
720 select GPIO_EXTRA_HEADER
733 select GPIO_EXTRA_HEADER
735 select SYS_ARCH_TIMER
736 select SYS_THUMB_BUILD
742 bool "Texas Instruments' K3 Architecture"
747 config ARCH_OMAP2PLUS
750 select GPIO_EXTRA_HEADER
751 select SPL_BOARD_INIT if SPL
752 select SPL_STACK_R if SPL
754 imply TI_SYSC if DM && OF_CONTROL
759 select GPIO_EXTRA_HEADER
760 imply DISTRO_DEFAULTS
763 Support for the Meson SoC family developed by Amlogic Inc.,
764 targeted at media players and tablet computers. We currently
765 support the S905 (GXBaby) 64-bit SoC.
770 select GPIO_EXTRA_HEADER
773 select SPL_LIBCOMMON_SUPPORT if SPL
774 select SPL_LIBGENERIC_SUPPORT if SPL
775 select SPL_OF_CONTROL if SPL
778 Support for the MediaTek SoCs family developed by MediaTek Inc.
779 Please refer to doc/README.mediatek for more information.
782 bool "NXP LPC32xx platform"
787 select GPIO_EXTRA_HEADER
793 bool "NXP i.MX8 platform"
796 select GPIO_EXTRA_HEADER
798 select ENABLE_ARM_SOC_BOOT0_HOOK
801 bool "NXP i.MX8M platform"
803 select GPIO_EXTRA_HEADER
804 select SYS_FSL_HAS_SEC if IMX_HAB
805 select SYS_FSL_SEC_COMPAT_4
806 select SYS_FSL_SEC_LE
813 bool "NXP i.MX8ULP platform"
818 select GPIO_EXTRA_HEADER
822 bool "NXP i.MXRT platform"
826 select GPIO_EXTRA_HEADER
831 bool "NXP i.MX23 family"
833 select GPIO_EXTRA_HEADER
840 select GPIO_EXTRA_HEADER
844 bool "NXP i.MX28 family"
846 select GPIO_EXTRA_HEADER
851 bool "NXP i.MX31 family"
853 select GPIO_EXTRA_HEADER
858 select GPIO_EXTRA_HEADER
859 select SYS_FSL_HAS_SEC if IMX_HAB
860 select SYS_FSL_SEC_COMPAT_4
861 select SYS_FSL_SEC_LE
862 select ROM_UNIFIED_SECTIONS
864 imply SYS_THUMB_BUILD
868 select ARCH_MISC_INIT
870 select GPIO_EXTRA_HEADER
871 select SYS_FSL_HAS_SEC if IMX_HAB
872 select SYS_FSL_SEC_COMPAT_4
873 select SYS_FSL_SEC_LE
874 imply BOARD_EARLY_INIT_F
876 imply SYS_THUMB_BUILD
881 select GPIO_EXTRA_HEADER
882 select SYS_FSL_HAS_SEC
883 select SYS_FSL_SEC_COMPAT_4
884 select SYS_FSL_SEC_LE
886 imply SYS_THUMB_BUILD
890 default "arch/arm/mach-omap2/u-boot-spl.lds"
895 select BOARD_EARLY_INIT_F
897 select GPIO_EXTRA_HEADER
901 bool "Nexell S5P4418/S5P6818 SoC"
902 select ENABLE_ARM_SOC_BOOT0_HOOK
904 select GPIO_EXTRA_HEADER
907 bool "Actions Semi OWL SoCs"
911 select GPIO_EXTRA_HEADER
916 select SYS_RELOC_GD_ENV_ADDR
920 bool "QEMU Virtual Platform"
931 bool "Renesas ARM SoCs"
934 select GPIO_EXTRA_HEADER
935 imply BOARD_EARLY_INIT_F
938 imply SYS_THUMB_BUILD
939 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
941 config ARCH_SNAPDRAGON
942 bool "Qualcomm Snapdragon SoCs"
947 select GPIO_EXTRA_HEADER
956 bool "Altera SOCFPGA family"
957 select ARCH_EARLY_INIT_R
958 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
959 select ARM64 if TARGET_SOCFPGA_SOC64
960 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
964 select GPIO_EXTRA_HEADER
965 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
967 select SPL_DM_RESET if DM_RESET
969 select SPL_LIBCOMMON_SUPPORT
970 select SPL_LIBGENERIC_SUPPORT
971 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
972 select SPL_OF_CONTROL
973 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
974 select SPL_SERIAL_SUPPORT
979 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
981 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
982 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
992 imply SPL_DM_SPI_FLASH
993 imply SPL_LIBDISK_SUPPORT
994 imply SPL_MMC_SUPPORT
995 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
996 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
997 imply SPL_SPI_FLASH_SUPPORT
998 imply SPL_SPI_SUPPORT
1002 bool "Support sunxi (Allwinner) SoCs"
1005 select CMD_MMC if MMC
1006 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1012 select DM_MMC if MMC
1013 select DM_SCSI if SCSI
1015 select GPIO_EXTRA_HEADER
1016 select OF_BOARD_SETUP
1019 select SPECIFY_CONSOLE_INDEX
1020 select SPL_STACK_R if SPL
1021 select SPL_SYS_MALLOC_SIMPLE if SPL
1022 select SPL_SYS_THUMB_BUILD if !ARM64
1025 select SYS_THUMB_BUILD if !ARM64
1026 select USB if DISTRO_DEFAULTS
1027 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1028 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1029 select SPL_USE_TINY_PRINTF
1031 select SYS_RELOC_GD_ENV_ADDR
1032 imply BOARD_LATE_INIT
1035 imply CMD_UBI if MTD_RAW_NAND
1036 imply DISTRO_DEFAULTS
1039 imply OF_LIBFDT_OVERLAY
1040 imply PRE_CONSOLE_BUFFER
1042 imply SPL_LIBCOMMON_SUPPORT
1043 imply SPL_LIBGENERIC_SUPPORT
1044 imply SPL_MMC_SUPPORT if MMC
1046 imply SPL_SERIAL_SUPPORT
1050 bool "ST-Ericsson U8500 Series"
1054 select DM_MMC if MMC
1059 imply ARM_PL180_MMCI
1061 imply NOMADIK_MTU_TIMER
1064 imply SYSRESET_SYSCON
1067 bool "Support Xilinx Versal Platform"
1071 select DM_ETH if NET
1072 select DM_MMC if MMC
1075 select GPIO_EXTRA_HEADER
1078 imply BOARD_LATE_INIT
1079 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1082 bool "Freescale Vybrid"
1084 select GPIO_EXTRA_HEADER
1085 select SYS_FSL_ERRATUM_ESDHC111
1090 bool "Xilinx Zynq based platform"
1095 select DM_ETH if NET
1096 select DM_MMC if MMC
1100 select GPIO_EXTRA_HEADER
1103 select SPL_BOARD_INIT if SPL
1104 select SPL_CLK if SPL
1105 select SPL_DM if SPL
1106 select SPL_DM_SPI if SPL
1107 select SPL_DM_SPI_FLASH if SPL
1108 select SPL_OF_CONTROL if SPL
1109 select SPL_SEPARATE_BSS if SPL
1111 imply ARCH_EARLY_INIT_R
1112 imply BOARD_LATE_INIT
1116 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1119 config ARCH_ZYNQMP_R5
1120 bool "Xilinx ZynqMP R5 based platform"
1124 select DM_ETH if NET
1125 select DM_MMC if MMC
1127 select GPIO_EXTRA_HEADER
1133 bool "Xilinx ZynqMP based platform"
1137 select DM_ETH if NET
1139 select DM_MMC if MMC
1141 select DM_SPI if SPI
1142 select DM_SPI_FLASH if DM_SPI
1145 select GPIO_EXTRA_HEADER
1147 select SPL_BOARD_INIT if SPL
1148 select SPL_CLK if SPL
1149 select SPL_DM if SPL
1150 select SPL_DM_SPI if SPI && SPL_DM
1151 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1152 select SPL_DM_MAILBOX if SPL
1153 select SPL_FIRMWARE if SPL
1154 select SPL_SEPARATE_BSS if SPL
1158 imply BOARD_LATE_INIT
1160 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1167 select GPIO_EXTRA_HEADER
1168 imply DISTRO_DEFAULTS
1171 config TARGET_VEXPRESS64_AEMV8A
1172 bool "Support vexpress_aemv8a"
1174 select GPIO_EXTRA_HEADER
1177 config TARGET_VEXPRESS64_BASE_FVP
1178 bool "Support Versatile Express ARMv8a FVP BASE model"
1180 select GPIO_EXTRA_HEADER
1184 config TARGET_VEXPRESS64_JUNO
1185 bool "Support Versatile Express Juno Development Platform"
1187 select GPIO_EXTRA_HEADER
1200 config TARGET_TOTAL_COMPUTE
1201 bool "Support Total Compute Platform"
1209 config TARGET_LS2080A_EMU
1210 bool "Support ls2080a_emu"
1213 select ARMV8_MULTIENTRY
1214 select FSL_DDR_SYNC_REFRESH
1215 select GPIO_EXTRA_HEADER
1217 Support for Freescale LS2080A_EMU platform.
1218 The LS2080A Development System (EMULATOR) is a pre-silicon
1219 development platform that supports the QorIQ LS2080A
1220 Layerscape Architecture processor.
1222 config TARGET_LS1088AQDS
1223 bool "Support ls1088aqds"
1226 select ARMV8_MULTIENTRY
1227 select ARCH_SUPPORT_TFABOOT
1228 select BOARD_LATE_INIT
1229 select GPIO_EXTRA_HEADER
1231 select FSL_DDR_INTERACTIVE if !SD_BOOT
1233 Support for NXP LS1088AQDS platform.
1234 The LS1088A Development System (QDS) is a high-performance
1235 development platform that supports the QorIQ LS1088A
1236 Layerscape Architecture processor.
1238 config TARGET_LS2080AQDS
1239 bool "Support ls2080aqds"
1242 select ARMV8_MULTIENTRY
1243 select ARCH_SUPPORT_TFABOOT
1244 select BOARD_LATE_INIT
1245 select GPIO_EXTRA_HEADER
1250 select FSL_DDR_INTERACTIVE if !SPL
1252 Support for Freescale LS2080AQDS platform.
1253 The LS2080A Development System (QDS) is a high-performance
1254 development platform that supports the QorIQ LS2080A
1255 Layerscape Architecture processor.
1257 config TARGET_LS2080ARDB
1258 bool "Support ls2080ardb"
1261 select ARMV8_MULTIENTRY
1262 select ARCH_SUPPORT_TFABOOT
1263 select BOARD_LATE_INIT
1266 select FSL_DDR_INTERACTIVE if !SPL
1267 select GPIO_EXTRA_HEADER
1271 Support for Freescale LS2080ARDB platform.
1272 The LS2080A Reference design board (RDB) is a high-performance
1273 development platform that supports the QorIQ LS2080A
1274 Layerscape Architecture processor.
1276 config TARGET_LS2081ARDB
1277 bool "Support ls2081ardb"
1280 select ARMV8_MULTIENTRY
1281 select BOARD_LATE_INIT
1282 select GPIO_EXTRA_HEADER
1285 Support for Freescale LS2081ARDB platform.
1286 The LS2081A Reference design board (RDB) is a high-performance
1287 development platform that supports the QorIQ LS2081A/LS2041A
1288 Layerscape Architecture processor.
1290 config TARGET_LX2160ARDB
1291 bool "Support lx2160ardb"
1294 select ARMV8_MULTIENTRY
1295 select ARCH_SUPPORT_TFABOOT
1296 select BOARD_LATE_INIT
1297 select GPIO_EXTRA_HEADER
1299 Support for NXP LX2160ARDB platform.
1300 The lx2160ardb (LX2160A Reference design board (RDB)
1301 is a high-performance development platform that supports the
1302 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1304 config TARGET_LX2160AQDS
1305 bool "Support lx2160aqds"
1308 select ARMV8_MULTIENTRY
1309 select ARCH_SUPPORT_TFABOOT
1310 select BOARD_LATE_INIT
1311 select GPIO_EXTRA_HEADER
1313 Support for NXP LX2160AQDS platform.
1314 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1315 is a high-performance development platform that supports the
1316 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1318 config TARGET_LX2162AQDS
1319 bool "Support lx2162aqds"
1321 select ARCH_MISC_INIT
1323 select ARMV8_MULTIENTRY
1324 select ARCH_SUPPORT_TFABOOT
1325 select BOARD_LATE_INIT
1326 select GPIO_EXTRA_HEADER
1328 Support for NXP LX2162AQDS platform.
1329 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1332 bool "Support HiKey 96boards Consumer Edition Platform"
1337 select GPIO_EXTRA_HEADER
1340 select SPECIFY_CONSOLE_INDEX
1343 Support for HiKey 96boards platform. It features a HI6220
1344 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1346 config TARGET_HIKEY960
1347 bool "Support HiKey960 96boards Consumer Edition Platform"
1351 select GPIO_EXTRA_HEADER
1356 Support for HiKey960 96boards platform. It features a HI3660
1357 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1359 config TARGET_POPLAR
1360 bool "Support Poplar 96boards Enterprise Edition Platform"
1364 select GPIO_EXTRA_HEADER
1369 Support for Poplar 96boards EE platform. It features a HI3798cv200
1370 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1371 making it capable of running any commercial set-top solution based on
1374 config TARGET_LS1012AQDS
1375 bool "Support ls1012aqds"
1378 select ARCH_SUPPORT_TFABOOT
1379 select BOARD_LATE_INIT
1380 select GPIO_EXTRA_HEADER
1382 Support for Freescale LS1012AQDS platform.
1383 The LS1012A Development System (QDS) is a high-performance
1384 development platform that supports the QorIQ LS1012A
1385 Layerscape Architecture processor.
1387 config TARGET_LS1012ARDB
1388 bool "Support ls1012ardb"
1391 select ARCH_SUPPORT_TFABOOT
1392 select BOARD_LATE_INIT
1393 select GPIO_EXTRA_HEADER
1397 Support for Freescale LS1012ARDB platform.
1398 The LS1012A Reference design board (RDB) is a high-performance
1399 development platform that supports the QorIQ LS1012A
1400 Layerscape Architecture processor.
1402 config TARGET_LS1012A2G5RDB
1403 bool "Support ls1012a2g5rdb"
1406 select ARCH_SUPPORT_TFABOOT
1407 select BOARD_LATE_INIT
1408 select GPIO_EXTRA_HEADER
1411 Support for Freescale LS1012A2G5RDB platform.
1412 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1413 development platform that supports the QorIQ LS1012A
1414 Layerscape Architecture processor.
1416 config TARGET_LS1012AFRWY
1417 bool "Support ls1012afrwy"
1420 select ARCH_SUPPORT_TFABOOT
1421 select BOARD_LATE_INIT
1422 select GPIO_EXTRA_HEADER
1426 Support for Freescale LS1012AFRWY platform.
1427 The LS1012A FRWY board (FRWY) is a high-performance
1428 development platform that supports the QorIQ LS1012A
1429 Layerscape Architecture processor.
1431 config TARGET_LS1012AFRDM
1432 bool "Support ls1012afrdm"
1435 select ARCH_SUPPORT_TFABOOT
1436 select GPIO_EXTRA_HEADER
1438 Support for Freescale LS1012AFRDM platform.
1439 The LS1012A Freedom board (FRDM) is a high-performance
1440 development platform that supports the QorIQ LS1012A
1441 Layerscape Architecture processor.
1443 config TARGET_LS1028AQDS
1444 bool "Support ls1028aqds"
1447 select ARMV8_MULTIENTRY
1448 select ARCH_SUPPORT_TFABOOT
1449 select BOARD_LATE_INIT
1450 select GPIO_EXTRA_HEADER
1452 Support for Freescale LS1028AQDS platform
1453 The LS1028A Development System (QDS) is a high-performance
1454 development platform that supports the QorIQ LS1028A
1455 Layerscape Architecture processor.
1457 config TARGET_LS1028ARDB
1458 bool "Support ls1028ardb"
1461 select ARMV8_MULTIENTRY
1462 select ARCH_SUPPORT_TFABOOT
1463 select BOARD_LATE_INIT
1464 select GPIO_EXTRA_HEADER
1466 Support for Freescale LS1028ARDB platform
1467 The LS1028A Development System (RDB) is a high-performance
1468 development platform that supports the QorIQ LS1028A
1469 Layerscape Architecture processor.
1471 config TARGET_LS1088ARDB
1472 bool "Support ls1088ardb"
1475 select ARMV8_MULTIENTRY
1476 select ARCH_SUPPORT_TFABOOT
1477 select BOARD_LATE_INIT
1479 select FSL_DDR_INTERACTIVE if !SD_BOOT
1480 select GPIO_EXTRA_HEADER
1482 Support for NXP LS1088ARDB platform.
1483 The LS1088A Reference design board (RDB) is a high-performance
1484 development platform that supports the QorIQ LS1088A
1485 Layerscape Architecture processor.
1487 config TARGET_LS1021AQDS
1488 bool "Support ls1021aqds"
1490 select ARCH_SUPPORT_PSCI
1491 select BOARD_EARLY_INIT_F
1492 select BOARD_LATE_INIT
1494 select CPU_V7_HAS_NONSEC
1495 select CPU_V7_HAS_VIRT
1496 select LS1_DEEP_SLEEP
1499 select FSL_DDR_INTERACTIVE
1500 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1501 select GPIO_EXTRA_HEADER
1502 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1505 config TARGET_LS1021ATWR
1506 bool "Support ls1021atwr"
1508 select ARCH_SUPPORT_PSCI
1509 select BOARD_EARLY_INIT_F
1510 select BOARD_LATE_INIT
1512 select CPU_V7_HAS_NONSEC
1513 select CPU_V7_HAS_VIRT
1514 select LS1_DEEP_SLEEP
1516 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1517 select GPIO_EXTRA_HEADER
1520 config TARGET_PG_WCOM_SELI8
1521 bool "Support Hitachi-Powergrids SELI8 service unit card"
1523 select ARCH_SUPPORT_PSCI
1524 select BOARD_EARLY_INIT_F
1525 select BOARD_LATE_INIT
1527 select CPU_V7_HAS_NONSEC
1528 select CPU_V7_HAS_VIRT
1530 select FSL_DDR_INTERACTIVE
1531 select GPIO_EXTRA_HEADER
1535 Support for Hitachi-Powergrids SELI8 service unit card.
1536 SELI8 is a QorIQ LS1021a based service unit card used
1537 in XMC20 and FOX615 product families.
1539 config TARGET_PG_WCOM_EXPU1
1540 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1542 select ARCH_SUPPORT_PSCI
1543 select BOARD_EARLY_INIT_F
1544 select BOARD_LATE_INIT
1546 select CPU_V7_HAS_NONSEC
1547 select CPU_V7_HAS_VIRT
1549 select FSL_DDR_INTERACTIVE
1553 Support for Hitachi-Powergrids EXPU1 service unit card.
1554 EXPU1 is a QorIQ LS1021a based service unit card used
1555 in XMC20 and FOX615 product families.
1557 config TARGET_LS1021ATSN
1558 bool "Support ls1021atsn"
1560 select ARCH_SUPPORT_PSCI
1561 select BOARD_EARLY_INIT_F
1562 select BOARD_LATE_INIT
1564 select CPU_V7_HAS_NONSEC
1565 select CPU_V7_HAS_VIRT
1566 select LS1_DEEP_SLEEP
1568 select GPIO_EXTRA_HEADER
1571 config TARGET_LS1021AIOT
1572 bool "Support ls1021aiot"
1574 select ARCH_SUPPORT_PSCI
1575 select BOARD_LATE_INIT
1577 select CPU_V7_HAS_NONSEC
1578 select CPU_V7_HAS_VIRT
1580 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1581 select GPIO_EXTRA_HEADER
1584 Support for Freescale LS1021AIOT platform.
1585 The LS1021A Freescale board (IOT) is a high-performance
1586 development platform that supports the QorIQ LS1021A
1587 Layerscape Architecture processor.
1589 config TARGET_LS1043AQDS
1590 bool "Support ls1043aqds"
1593 select ARMV8_MULTIENTRY
1594 select ARCH_SUPPORT_TFABOOT
1595 select BOARD_EARLY_INIT_F
1596 select BOARD_LATE_INIT
1598 select FSL_DDR_INTERACTIVE if !SPL
1599 select FSL_DSPI if !SPL_NO_DSPI
1600 select DM_SPI_FLASH if FSL_DSPI
1601 select GPIO_EXTRA_HEADER
1605 Support for Freescale LS1043AQDS platform.
1607 config TARGET_LS1043ARDB
1608 bool "Support ls1043ardb"
1611 select ARMV8_MULTIENTRY
1612 select ARCH_SUPPORT_TFABOOT
1613 select BOARD_EARLY_INIT_F
1614 select BOARD_LATE_INIT
1616 select FSL_DSPI if !SPL_NO_DSPI
1617 select DM_SPI_FLASH if FSL_DSPI
1618 select GPIO_EXTRA_HEADER
1620 Support for Freescale LS1043ARDB platform.
1622 config TARGET_LS1046AQDS
1623 bool "Support ls1046aqds"
1626 select ARMV8_MULTIENTRY
1627 select ARCH_SUPPORT_TFABOOT
1628 select BOARD_EARLY_INIT_F
1629 select BOARD_LATE_INIT
1630 select DM_SPI_FLASH if DM_SPI
1632 select FSL_DDR_BIST if !SPL
1633 select FSL_DDR_INTERACTIVE if !SPL
1634 select FSL_DDR_INTERACTIVE if !SPL
1635 select GPIO_EXTRA_HEADER
1638 Support for Freescale LS1046AQDS platform.
1639 The LS1046A Development System (QDS) is a high-performance
1640 development platform that supports the QorIQ LS1046A
1641 Layerscape Architecture processor.
1643 config TARGET_LS1046ARDB
1644 bool "Support ls1046ardb"
1647 select ARMV8_MULTIENTRY
1648 select ARCH_SUPPORT_TFABOOT
1649 select BOARD_EARLY_INIT_F
1650 select BOARD_LATE_INIT
1651 select DM_SPI_FLASH if DM_SPI
1652 select POWER_MC34VR500
1655 select FSL_DDR_INTERACTIVE if !SPL
1656 select GPIO_EXTRA_HEADER
1659 Support for Freescale LS1046ARDB platform.
1660 The LS1046A Reference Design Board (RDB) is a high-performance
1661 development platform that supports the QorIQ LS1046A
1662 Layerscape Architecture processor.
1664 config TARGET_LS1046AFRWY
1665 bool "Support ls1046afrwy"
1668 select ARMV8_MULTIENTRY
1669 select ARCH_SUPPORT_TFABOOT
1670 select BOARD_EARLY_INIT_F
1671 select BOARD_LATE_INIT
1672 select DM_SPI_FLASH if DM_SPI
1673 select GPIO_EXTRA_HEADER
1676 Support for Freescale LS1046AFRWY platform.
1677 The LS1046A Freeway Board (FRWY) is a high-performance
1678 development platform that supports the QorIQ LS1046A
1679 Layerscape Architecture processor.
1685 select ARMV8_MULTIENTRY
1701 select GPIO_EXTRA_HEADER
1702 select SPL_DM if SPL
1703 select SPL_DM_SPI if SPL
1704 select SPL_DM_SPI_FLASH if SPL
1705 select SPL_DM_I2C if SPL
1706 select SPL_DM_MMC if SPL
1707 select SPL_DM_SERIAL if SPL
1709 Support for Kontron SMARC-sAL28 board.
1711 config TARGET_COLIBRI_PXA270
1712 bool "Support colibri_pxa270"
1714 select GPIO_EXTRA_HEADER
1716 config ARCH_UNIPHIER
1717 bool "Socionext UniPhier SoCs"
1718 select BOARD_LATE_INIT
1727 select OF_BOARD_SETUP
1731 select SPL_BOARD_INIT if SPL
1732 select SPL_DM if SPL
1733 select SPL_LIBCOMMON_SUPPORT if SPL
1734 select SPL_LIBGENERIC_SUPPORT if SPL
1735 select SPL_OF_CONTROL if SPL
1736 select SPL_PINCTRL if SPL
1739 imply DISTRO_DEFAULTS
1742 Support for UniPhier SoC family developed by Socionext Inc.
1743 (formerly, System LSI Business Division of Panasonic Corporation)
1745 config ARCH_SYNQUACER
1746 bool "Socionext SynQuacer SoCs"
1752 select SYSRESET_PSCI
1755 Support for SynQuacer SoC family developed by Socionext Inc.
1756 This SoC is used on 96boards EE DeveloperBox.
1759 bool "Support STMicroelectronics STM32 MCU with cortex M"
1763 select GPIO_EXTRA_HEADER
1767 bool "Support STMicrolectronics SoCs"
1776 Support for STMicroelectronics STiH407/10 SoC family.
1777 This SoC is used on Linaro 96Board STiH410-B2260
1780 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1781 select ARCH_MISC_INIT
1782 select ARCH_SUPPORT_TFABOOT
1783 select BOARD_LATE_INIT
1789 select GPIO_EXTRA_HEADER
1793 select OF_SYSTEM_SETUP
1799 select SYS_THUMB_BUILD
1803 imply OF_LIBFDT_OVERLAY
1804 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1807 Support for STM32MP SoC family developed by STMicroelectronics,
1808 MPUs based on ARM cortex A core
1809 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1810 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1812 SPL is the unsecure FSBL for the basic boot chain.
1814 config ARCH_ROCKCHIP
1815 bool "Support Rockchip SoCs"
1817 select BINMAN if SPL_OPTEE || (SPL && !ARM64)
1827 select ENABLE_ARM_SOC_BOOT0_HOOK
1830 select SPL_DM if SPL
1831 select SPL_DM_SPI if SPL
1832 select SPL_DM_SPI_FLASH if SPL
1834 select SYS_THUMB_BUILD if !ARM64
1837 imply DEBUG_UART_BOARD_INIT
1838 imply DISTRO_DEFAULTS
1840 imply SARADC_ROCKCHIP
1842 imply SPL_SYS_MALLOC_SIMPLE
1845 imply USB_FUNCTION_FASTBOOT
1847 config ARCH_OCTEONTX
1848 bool "Support OcteonTX SoCs"
1851 select GPIO_EXTRA_HEADER
1855 select BOARD_LATE_INIT
1856 select SYS_CACHE_SHIFT_7
1858 config ARCH_OCTEONTX2
1859 bool "Support OcteonTX2 SoCs"
1862 select GPIO_EXTRA_HEADER
1866 select BOARD_LATE_INIT
1867 select SYS_CACHE_SHIFT_7
1869 config TARGET_THUNDERX_88XX
1870 bool "Support ThunderX 88xx"
1872 select GPIO_EXTRA_HEADER
1875 select SYS_CACHE_SHIFT_7
1878 bool "Support Aspeed SoCs"
1883 config TARGET_DURIAN
1884 bool "Support Phytium Durian Platform"
1886 select GPIO_EXTRA_HEADER
1888 Support for durian platform.
1889 It has 2GB Sdram, uart and pcie.
1891 config TARGET_PRESIDIO_ASIC
1892 bool "Support Cortina Presidio ASIC Platform"
1896 config TARGET_XENGUEST_ARM64
1897 bool "Xen guest ARM64"
1901 select LINUX_KERNEL_IMAGE_HEADER
1906 config ARCH_SUPPORT_TFABOOT
1910 bool "Support for booting from TF-A"
1911 depends on ARCH_SUPPORT_TFABOOT
1914 Some platforms support the setup of secure registers (for instance
1915 for CPU errata handling) or provide secure services like PSCI.
1916 Those services could also be provided by other firmware parts
1917 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
1918 does not need to (and cannot) execute this code.
1919 Enabling this option will make a U-Boot binary that is relying
1920 on other firmware layers to provide secure functionality.
1922 config TI_SECURE_DEVICE
1923 bool "HS Device Type Support"
1924 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1926 If a high secure (HS) device type is being used, this config
1927 must be set. This option impacts various aspects of the
1928 build system (to create signed boot images that can be
1929 authenticated) and the code. See the doc/README.ti-secure
1930 file for further details.
1932 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1933 config ISW_ENTRY_ADDR
1934 hex "Address in memory or XIP address of bootloader entry point"
1935 default 0x402F4000 if AM43XX
1936 default 0x402F0400 if AM33XX
1937 default 0x40301350 if OMAP54XX
1939 After any reset, the boot ROM searches the boot media for a valid
1940 boot image. For non-XIP devices, the ROM then copies the image into
1941 internal memory. For all boot modes, after the ROM processes the
1942 boot image it eventually computes the entry point address depending
1943 on the device type (secure/non-secure), boot media (xip/non-xip) and
1947 source "arch/arm/mach-aspeed/Kconfig"
1949 source "arch/arm/mach-at91/Kconfig"
1951 source "arch/arm/mach-bcm283x/Kconfig"
1953 source "arch/arm/mach-bcmstb/Kconfig"
1955 source "arch/arm/mach-davinci/Kconfig"
1957 source "arch/arm/mach-exynos/Kconfig"
1959 source "arch/arm/mach-highbank/Kconfig"
1961 source "arch/arm/mach-integrator/Kconfig"
1963 source "arch/arm/mach-ipq40xx/Kconfig"
1965 source "arch/arm/mach-k3/Kconfig"
1967 source "arch/arm/mach-keystone/Kconfig"
1969 source "arch/arm/mach-kirkwood/Kconfig"
1971 source "arch/arm/mach-lpc32xx/Kconfig"
1973 source "arch/arm/mach-mvebu/Kconfig"
1975 source "arch/arm/mach-octeontx/Kconfig"
1977 source "arch/arm/mach-octeontx2/Kconfig"
1979 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1981 source "arch/arm/mach-imx/mx2/Kconfig"
1983 source "arch/arm/mach-imx/mx3/Kconfig"
1985 source "arch/arm/mach-imx/mx5/Kconfig"
1987 source "arch/arm/mach-imx/mx6/Kconfig"
1989 source "arch/arm/mach-imx/mx7/Kconfig"
1991 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1993 source "arch/arm/mach-imx/imx8/Kconfig"
1995 source "arch/arm/mach-imx/imx8m/Kconfig"
1997 source "arch/arm/mach-imx/imx8ulp/Kconfig"
1999 source "arch/arm/mach-imx/imxrt/Kconfig"
2001 source "arch/arm/mach-imx/mxs/Kconfig"
2003 source "arch/arm/mach-omap2/Kconfig"
2005 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2007 source "arch/arm/mach-orion5x/Kconfig"
2009 source "arch/arm/mach-owl/Kconfig"
2011 source "arch/arm/mach-rmobile/Kconfig"
2013 source "arch/arm/mach-meson/Kconfig"
2015 source "arch/arm/mach-mediatek/Kconfig"
2017 source "arch/arm/mach-qemu/Kconfig"
2019 source "arch/arm/mach-rockchip/Kconfig"
2021 source "arch/arm/mach-s5pc1xx/Kconfig"
2023 source "arch/arm/mach-snapdragon/Kconfig"
2025 source "arch/arm/mach-socfpga/Kconfig"
2027 source "arch/arm/mach-sti/Kconfig"
2029 source "arch/arm/mach-stm32/Kconfig"
2031 source "arch/arm/mach-stm32mp/Kconfig"
2033 source "arch/arm/mach-sunxi/Kconfig"
2035 source "arch/arm/mach-tegra/Kconfig"
2037 source "arch/arm/mach-u8500/Kconfig"
2039 source "arch/arm/mach-uniphier/Kconfig"
2041 source "arch/arm/cpu/armv7/vf610/Kconfig"
2043 source "arch/arm/mach-zynq/Kconfig"
2045 source "arch/arm/mach-zynqmp/Kconfig"
2047 source "arch/arm/mach-versal/Kconfig"
2049 source "arch/arm/mach-zynqmp-r5/Kconfig"
2051 source "arch/arm/cpu/armv7/Kconfig"
2053 source "arch/arm/cpu/armv8/Kconfig"
2055 source "arch/arm/mach-imx/Kconfig"
2057 source "arch/arm/mach-nexell/Kconfig"
2059 source "board/armltd/total_compute/Kconfig"
2061 source "board/bosch/shc/Kconfig"
2062 source "board/bosch/guardian/Kconfig"
2063 source "board/CarMediaLab/flea3/Kconfig"
2064 source "board/Marvell/aspenite/Kconfig"
2065 source "board/Marvell/octeontx/Kconfig"
2066 source "board/Marvell/octeontx2/Kconfig"
2067 source "board/armltd/vexpress64/Kconfig"
2068 source "board/cortina/presidio-asic/Kconfig"
2069 source "board/broadcom/bcm963158/Kconfig"
2070 source "board/broadcom/bcm968360bg/Kconfig"
2071 source "board/broadcom/bcm968580xref/Kconfig"
2072 source "board/broadcom/bcmns3/Kconfig"
2073 source "board/cavium/thunderx/Kconfig"
2074 source "board/eets/pdu001/Kconfig"
2075 source "board/emulation/qemu-arm/Kconfig"
2076 source "board/freescale/ls2080aqds/Kconfig"
2077 source "board/freescale/ls2080ardb/Kconfig"
2078 source "board/freescale/ls1088a/Kconfig"
2079 source "board/freescale/ls1028a/Kconfig"
2080 source "board/freescale/ls1021aqds/Kconfig"
2081 source "board/freescale/ls1043aqds/Kconfig"
2082 source "board/freescale/ls1021atwr/Kconfig"
2083 source "board/freescale/ls1021atsn/Kconfig"
2084 source "board/freescale/ls1021aiot/Kconfig"
2085 source "board/freescale/ls1046aqds/Kconfig"
2086 source "board/freescale/ls1043ardb/Kconfig"
2087 source "board/freescale/ls1046ardb/Kconfig"
2088 source "board/freescale/ls1046afrwy/Kconfig"
2089 source "board/freescale/ls1012aqds/Kconfig"
2090 source "board/freescale/ls1012ardb/Kconfig"
2091 source "board/freescale/ls1012afrdm/Kconfig"
2092 source "board/freescale/lx2160a/Kconfig"
2093 source "board/grinn/chiliboard/Kconfig"
2094 source "board/hisilicon/hikey/Kconfig"
2095 source "board/hisilicon/hikey960/Kconfig"
2096 source "board/hisilicon/poplar/Kconfig"
2097 source "board/isee/igep003x/Kconfig"
2098 source "board/kontron/sl28/Kconfig"
2099 source "board/myir/mys_6ulx/Kconfig"
2100 source "board/seeed/npi_imx6ull/Kconfig"
2101 source "board/socionext/developerbox/Kconfig"
2102 source "board/st/stv0991/Kconfig"
2103 source "board/tcl/sl50/Kconfig"
2104 source "board/toradex/colibri_pxa270/Kconfig"
2105 source "board/variscite/dart_6ul/Kconfig"
2106 source "board/vscom/baltos/Kconfig"
2107 source "board/phytium/durian/Kconfig"
2108 source "board/xen/xenguest_arm64/Kconfig"
2109 source "board/keymile/Kconfig"
2111 source "arch/arm/Kconfig.debug"
2116 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2117 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2118 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64