1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed from
19 almost any 4K aligned address. This logic relies on the relocation
20 information that is embedded in the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
25 default n if ARCH_QEMU
26 default y if POSITION_INDEPENDENT
28 U-Boot typically uses a hard-coded value for the stack pointer
29 before relocation. Enable this option to instead calculate the
30 initial SP at run-time. This is useful to avoid hard-coding addresses
31 into U-Boot, so that it can be loaded and executed at arbitrary
32 addresses and thus avoid using arbitrary addresses at runtime.
34 If this option is enabled, the early stack pointer is set to
35 &_bss_start with a offset value added. The offset is specified by
36 SYS_INIT_SP_BSS_OFFSET.
38 config SYS_INIT_SP_BSS_OFFSET
39 int "Early stack offset from the .bss base address"
40 depends on INIT_SP_RELATIVE
43 This option's value is the offset added to &_bss_start in order to
44 calculate the stack pointer. This offset should be large enough so
45 that the early malloc region, global data (gd), and early stack usage
46 do not overlap any appended DTB.
48 config LINUX_KERNEL_IMAGE_HEADER
51 Place a Linux kernel image header at the start of the U-Boot binary.
52 The format of the header is described in the Linux kernel source at
53 Documentation/arm64/booting.txt. This feature is useful since the
54 image header reports the amount of memory (BSS and similar) that
55 U-Boot needs to use, but which isn't part of the binary.
57 if LINUX_KERNEL_IMAGE_HEADER
58 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
61 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
62 TEXT_OFFSET value written to the Linux kernel image header.
72 ARM GICV3 Interrupt translation service (ITS).
73 Basic support for programming locality specific peripheral
74 interrupts (LPI) configuration tables and enable LPI tables.
75 LPI configuration table can be used by u-boot or Linux.
76 ARM GICV3 has limitation, once the LPI table is enabled, LPI
77 configuration table can not be re-programmed, unless GICV3 reset.
83 config DMA_ADDR_T_64BIT
93 # Used for compatibility with asm files copied from the kernel
94 config ARM_ASM_UNIFIED
98 # Used for compatibility with asm files copied from the kernel
102 config SYS_ICACHE_OFF
103 bool "Do not enable icache"
106 Do not enable instruction cache in U-Boot.
108 config SPL_SYS_ICACHE_OFF
109 bool "Do not enable icache in SPL"
111 default SYS_ICACHE_OFF
113 Do not enable instruction cache in SPL.
115 config SYS_DCACHE_OFF
116 bool "Do not enable dcache"
119 Do not enable data cache in U-Boot.
121 config SPL_SYS_DCACHE_OFF
122 bool "Do not enable dcache in SPL"
124 default SYS_DCACHE_OFF
126 Do not enable data cache in SPL.
128 config SYS_ARM_CACHE_CP15
129 bool "CP15 based cache enabling support"
131 Select this if your processor suports enabling caches by using
135 bool "MMU-based Paged Memory Management Support"
136 select SYS_ARM_CACHE_CP15
138 Select if you want MMU-based virtualised addressing space
139 support via paged memory management.
142 bool 'Use the ARM v7 PMSA Compliant MPU'
144 Some ARM systems without an MMU have instead a Memory Protection
145 Unit (MPU) that defines the type and permissions for regions of
147 If your CPU has an MPU then you should choose 'y' here unless you
148 know that you do not want to use the MPU.
150 # If set, the workarounds for these ARM errata are applied early during U-Boot
151 # startup. Note that in general these options force the workarounds to be
152 # applied; no CPU-type/version detection exists, unlike the similar options in
153 # the Linux kernel. Do not set these options unless they apply! Also note that
154 # the following can be machine-specific errata. These do have ability to
155 # provide rudimentary version and machine-specific checks, but expect no
157 # CONFIG_ARM_ERRATA_430973
158 # CONFIG_ARM_ERRATA_454179
159 # CONFIG_ARM_ERRATA_621766
160 # CONFIG_ARM_ERRATA_798870
161 # CONFIG_ARM_ERRATA_801819
162 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
163 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
165 config ARM_ERRATA_430973
168 config ARM_ERRATA_454179
171 config ARM_ERRATA_621766
174 config ARM_ERRATA_716044
177 config ARM_ERRATA_725233
180 config ARM_ERRATA_742230
183 config ARM_ERRATA_743622
186 config ARM_ERRATA_751472
189 config ARM_ERRATA_761320
192 config ARM_ERRATA_773022
195 config ARM_ERRATA_774769
198 config ARM_ERRATA_794072
201 config ARM_ERRATA_798870
204 config ARM_ERRATA_801819
207 config ARM_ERRATA_826974
210 config ARM_ERRATA_828024
213 config ARM_ERRATA_829520
216 config ARM_ERRATA_833069
219 config ARM_ERRATA_833471
222 config ARM_ERRATA_845369
225 config ARM_ERRATA_852421
228 config ARM_ERRATA_852423
231 config ARM_ERRATA_855873
234 config ARM_CORTEX_A8_CVE_2017_5715
237 config ARM_CORTEX_A15_CVE_2017_5715
242 select SYS_CACHE_SHIFT_5
247 select SYS_CACHE_SHIFT_5
252 select SYS_CACHE_SHIFT_5
257 select SYS_CACHE_SHIFT_5
262 select SYS_CACHE_SHIFT_5
268 select SYS_CACHE_SHIFT_5
275 select SYS_CACHE_SHIFT_6
282 select SYS_CACHE_SHIFT_5
283 select SYS_THUMB_BUILD
289 select SYS_ARM_CACHE_CP15
291 select SYS_CACHE_SHIFT_6
295 select SYS_CACHE_SHIFT_5
300 select SYS_CACHE_SHIFT_5
304 default "arm720t" if CPU_ARM720T
305 default "arm920t" if CPU_ARM920T
306 default "arm926ejs" if CPU_ARM926EJS
307 default "arm946es" if CPU_ARM946ES
308 default "arm1136" if CPU_ARM1136
309 default "arm1176" if CPU_ARM1176
310 default "armv7" if CPU_V7A
311 default "armv7" if CPU_V7R
312 default "armv7m" if CPU_V7M
313 default "pxa" if CPU_PXA
314 default "sa1100" if CPU_SA1100
315 default "armv8" if ARM64
319 default 4 if CPU_ARM720T
320 default 4 if CPU_ARM920T
321 default 5 if CPU_ARM926EJS
322 default 5 if CPU_ARM946ES
323 default 6 if CPU_ARM1136
324 default 6 if CPU_ARM1176
329 default 4 if CPU_SA1100
332 config SYS_CACHE_SHIFT_5
335 config SYS_CACHE_SHIFT_6
338 config SYS_CACHE_SHIFT_7
341 config SYS_CACHELINE_SIZE
343 default 128 if SYS_CACHE_SHIFT_7
344 default 64 if SYS_CACHE_SHIFT_6
345 default 32 if SYS_CACHE_SHIFT_5
348 prompt "Select the ARM data write cache policy"
349 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
351 default SYS_ARM_CACHE_WRITEBACK
353 config SYS_ARM_CACHE_WRITEBACK
354 bool "Write-back (WB)"
356 A write updates the cache only and marks the cache line as dirty.
357 External memory is updated only when the line is evicted or explicitly
360 config SYS_ARM_CACHE_WRITETHROUGH
361 bool "Write-through (WT)"
363 A write updates both the cache and the external memory system.
364 This does not mark the cache line as dirty.
366 config SYS_ARM_CACHE_WRITEALLOC
367 bool "Write allocation (WA)"
369 A cache line is allocated on a write miss. This means that executing a
370 store instruction on the processor might cause a burst read to occur.
371 There is a linefill to obtain the data for the cache line, before the
376 bool "Enable ARCH_CPU_INIT"
378 Some architectures require a call to arch_cpu_init().
379 Say Y here to enable it
381 config SYS_ARCH_TIMER
382 bool "ARM Generic Timer support"
383 depends on CPU_V7A || ARM64
386 The ARM Generic Timer (aka arch-timer) provides an architected
387 interface to a timer source on an SoC.
388 It is mandatory for ARMv8 implementation and widely available
392 bool "Support for ARM SMC Calling Convention (SMCCC)"
393 depends on CPU_V7A || ARM64
396 Say Y here if you want to enable ARM SMC Calling Convention.
397 This should be enabled if U-Boot needs to communicate with system
398 firmware (for example, PSCI) according to SMCCC.
401 bool "support boot from semihosting"
403 In emulated environments, semihosting is a way for
404 the hosted environment to call out to the emulator to
405 retrieve files from the host machine.
407 config SYS_THUMB_BUILD
408 bool "Build U-Boot using the Thumb instruction set"
411 Use this flag to build U-Boot using the Thumb instruction set for
412 ARM architectures. Thumb instruction set provides better code
413 density. For ARM architectures that support Thumb2 this flag will
414 result in Thumb2 code generated by GCC.
416 config SPL_SYS_THUMB_BUILD
417 bool "Build SPL using the Thumb instruction set"
418 default y if SYS_THUMB_BUILD
419 depends on !ARM64 && SPL
421 Use this flag to build SPL using the Thumb instruction set for
422 ARM architectures. Thumb instruction set provides better code
423 density. For ARM architectures that support Thumb2 this flag will
424 result in Thumb2 code generated by GCC.
426 config TPL_SYS_THUMB_BUILD
427 bool "Build TPL using the Thumb instruction set"
428 default y if SYS_THUMB_BUILD
429 depends on TPL && !ARM64
431 Use this flag to build TPL using the Thumb instruction set for
432 ARM architectures. Thumb instruction set provides better code
433 density. For ARM architectures that support Thumb2 this flag will
434 result in Thumb2 code generated by GCC.
437 config SYS_L2CACHE_OFF
440 If SoC does not support L2CACHE or one does not want to enable
441 L2CACHE, choose this option.
443 config ENABLE_ARM_SOC_BOOT0_HOOK
444 bool "prepare BOOT0 header"
446 If the SoC's BOOT0 requires a header area filled with (magic)
447 values, then choose this option, and create a file included as
448 <asm/arch/boot0.h> which contains the required assembler code.
450 config ARM_CORTEX_CPU_IS_UP
454 config USE_ARCH_MEMCPY
455 bool "Use an assembly optimized implementation of memcpy"
459 Enable the generation of an optimized version of memcpy.
460 Such an implementation may be faster under some conditions
461 but may increase the binary size.
463 config SPL_USE_ARCH_MEMCPY
464 bool "Use an assembly optimized implementation of memcpy for SPL"
465 default y if USE_ARCH_MEMCPY
466 depends on !ARM64 && SPL
468 Enable the generation of an optimized version of memcpy.
469 Such an implementation may be faster under some conditions
470 but may increase the binary size.
472 config TPL_USE_ARCH_MEMCPY
473 bool "Use an assembly optimized implementation of memcpy for TPL"
474 default y if USE_ARCH_MEMCPY
475 depends on !ARM64 && TPL
477 Enable the generation of an optimized version of memcpy.
478 Such an implementation may be faster under some conditions
479 but may increase the binary size.
481 config USE_ARCH_MEMSET
482 bool "Use an assembly optimized implementation of memset"
486 Enable the generation of an optimized version of memset.
487 Such an implementation may be faster under some conditions
488 but may increase the binary size.
490 config SPL_USE_ARCH_MEMSET
491 bool "Use an assembly optimized implementation of memset for SPL"
492 default y if USE_ARCH_MEMSET
493 depends on !ARM64 && SPL
495 Enable the generation of an optimized version of memset.
496 Such an implementation may be faster under some conditions
497 but may increase the binary size.
499 config TPL_USE_ARCH_MEMSET
500 bool "Use an assembly optimized implementation of memset for TPL"
501 default y if USE_ARCH_MEMSET
502 depends on !ARM64 && TPL
504 Enable the generation of an optimized version of memset.
505 Such an implementation may be faster under some conditions
506 but may increase the binary size.
508 config ARM64_SUPPORT_AARCH32
509 bool "ARM64 system support AArch32 execution state"
511 default y if !TARGET_THUNDERX_88XX
513 This ARM64 system supports AArch32 execution state.
516 prompt "Target select"
521 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
522 select SPL_SEPARATE_BSS if SPL
524 config TARGET_EDB93XX
525 bool "Support edb93xx"
529 config TARGET_ASPENITE
530 bool "Support aspenite"
534 bool "Support gplugd"
540 select SPL_DM_SPI if SPL
543 Support for TI's DaVinci platform.
546 bool "Marvell Kirkwood"
547 select ARCH_MISC_INIT
548 select BOARD_EARLY_INIT_F
552 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
558 select SPL_DM_SPI if SPL
559 select SPL_DM_SPI_FLASH if SPL
569 config TARGET_SPEAR300
570 bool "Support spear300"
571 select BOARD_EARLY_INIT_F
576 config TARGET_SPEAR310
577 bool "Support spear310"
578 select BOARD_EARLY_INIT_F
583 config TARGET_SPEAR320
584 bool "Support spear320"
585 select BOARD_EARLY_INIT_F
590 config TARGET_SPEAR600
591 bool "Support spear600"
592 select BOARD_EARLY_INIT_F
597 config TARGET_STV0991
598 bool "Support stv0991"
611 select BOARD_LATE_INIT
621 bool "Broadcom BCM283X family"
627 select SERIAL_SEARCH_ALL
632 bool "Broadcom BCM63158 family"
638 bool "Broadcom BCM68360 family"
644 bool "Broadcom BCM6858 family"
650 bool "Broadcom BCM7XXX family"
654 select OF_PRIOR_STAGE
657 This enables support for Broadcom ARM-based set-top box
658 chipsets, including the 7445 family of chips.
660 config TARGET_BCMCYGNUS
661 bool "Support bcmcygnus"
664 imply BCM_SF2_ETH_GMAC
672 bool "Support Broadcom Northstar2"
675 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
676 ARMv8 Cortex-A57 processors targeting a broad range of networking
680 bool "Support Broadcom NS3"
682 select BOARD_LATE_INIT
684 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
685 ARMv8 Cortex-A72 processors targeting a broad range of networking
689 bool "Samsung EXYNOS"
698 imply SYS_THUMB_BUILD
703 bool "Samsung S5PC1XX"
712 bool "Calxeda Highbank"
723 config ARCH_INTEGRATOR
724 bool "ARM Ltd. Integrator family"
731 bool "Qualcomm IPQ40xx SoCs"
749 select SYS_ARCH_TIMER
750 select SYS_THUMB_BUILD
756 bool "Texas Instruments' K3 Architecture"
761 config ARCH_OMAP2PLUS
764 select SPL_BOARD_INIT if SPL
765 select SPL_STACK_R if SPL
767 imply TI_SYSC if DM && OF_CONTROL
772 imply DISTRO_DEFAULTS
775 Support for the Meson SoC family developed by Amlogic Inc.,
776 targeted at media players and tablet computers. We currently
777 support the S905 (GXBaby) 64-bit SoC.
784 select SPL_LIBCOMMON_SUPPORT if SPL
785 select SPL_LIBGENERIC_SUPPORT if SPL
786 select SPL_OF_CONTROL if SPL
789 Support for the MediaTek SoCs family developed by MediaTek Inc.
790 Please refer to doc/README.mediatek for more information.
793 bool "NXP LPC32xx platform"
803 bool "NXP i.MX8 platform"
807 select ENABLE_ARM_SOC_BOOT0_HOOK
810 bool "NXP i.MX8M platform"
812 select SYS_FSL_HAS_SEC if IMX_HAB
813 select SYS_FSL_SEC_COMPAT_4
814 select SYS_FSL_SEC_LE
820 bool "NXP i.MXRT platform"
828 bool "NXP i.MX23 family"
839 bool "NXP i.MX28 family"
845 bool "NXP i.MX31 family"
851 select SYS_FSL_HAS_SEC if IMX_HAB
852 select SYS_FSL_SEC_COMPAT_4
853 select SYS_FSL_SEC_LE
854 select ROM_UNIFIED_SECTIONS
856 imply SYS_THUMB_BUILD
860 select ARCH_MISC_INIT
862 select SYS_FSL_HAS_SEC if IMX_HAB
863 select SYS_FSL_SEC_COMPAT_4
864 select SYS_FSL_SEC_LE
865 imply BOARD_EARLY_INIT_F
867 imply SYS_THUMB_BUILD
872 select SYS_FSL_HAS_SEC
873 select SYS_FSL_SEC_COMPAT_4
874 select SYS_FSL_SEC_LE
876 imply SYS_THUMB_BUILD
880 default "arch/arm/mach-omap2/u-boot-spl.lds"
885 select BOARD_EARLY_INIT_F
890 bool "Nexell S5P4418/S5P6818 SoC"
891 select ENABLE_ARM_SOC_BOOT0_HOOK
895 bool "Actions Semi OWL SoCs"
903 select SYS_RELOC_GD_ENV_ADDR
907 bool "QEMU Virtual Platform"
918 bool "Renesas ARM SoCs"
921 imply BOARD_EARLY_INIT_F
924 imply SYS_THUMB_BUILD
925 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
927 config ARCH_SNAPDRAGON
928 bool "Qualcomm Snapdragon SoCs"
941 bool "Altera SOCFPGA family"
942 select ARCH_EARLY_INIT_R
943 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
944 select ARM64 if TARGET_SOCFPGA_SOC64
945 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
948 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
950 select SPL_DM_RESET if DM_RESET
952 select SPL_LIBCOMMON_SUPPORT
953 select SPL_LIBGENERIC_SUPPORT
954 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
955 select SPL_OF_CONTROL
956 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
957 select SPL_SERIAL_SUPPORT
959 select SPL_WATCHDOG_SUPPORT
962 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
964 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
965 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
975 imply SPL_DM_SPI_FLASH
976 imply SPL_LIBDISK_SUPPORT
977 imply SPL_MMC_SUPPORT
978 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
979 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
980 imply SPL_SPI_FLASH_SUPPORT
981 imply SPL_SPI_SUPPORT
985 bool "Support sunxi (Allwinner) SoCs"
988 select CMD_MMC if MMC
989 select CMD_USB if DISTRO_DEFAULTS
996 select DM_SCSI if SCSI
998 select DM_USB if DISTRO_DEFAULTS
999 select OF_BOARD_SETUP
1002 select SPECIFY_CONSOLE_INDEX
1003 select SPL_STACK_R if SPL
1004 select SPL_SYS_MALLOC_SIMPLE if SPL
1005 select SPL_SYS_THUMB_BUILD if !ARM64
1008 select SYS_THUMB_BUILD if !ARM64
1009 select USB if DISTRO_DEFAULTS
1010 select USB_KEYBOARD if DISTRO_DEFAULTS
1011 select USB_STORAGE if DISTRO_DEFAULTS
1012 select SPL_USE_TINY_PRINTF
1014 select SYS_RELOC_GD_ENV_ADDR
1015 imply BOARD_LATE_INIT
1018 imply CMD_UBI if MTD_RAW_NAND
1019 imply DISTRO_DEFAULTS
1022 imply OF_LIBFDT_OVERLAY
1023 imply PRE_CONSOLE_BUFFER
1024 imply SPL_GPIO_SUPPORT
1025 imply SPL_LIBCOMMON_SUPPORT
1026 imply SPL_LIBGENERIC_SUPPORT
1027 imply SPL_MMC_SUPPORT if MMC
1028 imply SPL_POWER_SUPPORT
1029 imply SPL_SERIAL_SUPPORT
1033 bool "ST-Ericsson U8500 Series"
1037 select DM_MMC if MMC
1039 select DM_USB if USB
1043 imply ARM_PL180_MMCI
1045 imply NOMADIK_MTU_TIMER
1048 imply SYSRESET_SYSCON
1051 bool "Support Xilinx Versal Platform"
1055 select DM_ETH if NET
1056 select DM_MMC if MMC
1059 imply BOARD_LATE_INIT
1060 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1063 bool "Freescale Vybrid"
1065 select SYS_FSL_ERRATUM_ESDHC111
1070 bool "Xilinx Zynq based platform"
1075 select DM_ETH if NET
1076 select DM_MMC if MMC
1080 select DM_USB if USB
1083 select SPL_BOARD_INIT if SPL
1084 select SPL_CLK if SPL
1085 select SPL_DM if SPL
1086 select SPL_DM_SPI if SPL
1087 select SPL_DM_SPI_FLASH if SPL
1088 select SPL_OF_CONTROL if SPL
1089 select SPL_SEPARATE_BSS if SPL
1091 imply ARCH_EARLY_INIT_R
1092 imply BOARD_LATE_INIT
1096 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1099 config ARCH_ZYNQMP_R5
1100 bool "Xilinx ZynqMP R5 based platform"
1104 select DM_ETH if NET
1105 select DM_MMC if MMC
1112 bool "Xilinx ZynqMP based platform"
1116 select DM_ETH if NET
1118 select DM_MMC if MMC
1120 select DM_SPI if SPI
1121 select DM_SPI_FLASH if DM_SPI
1122 select DM_USB if USB
1125 select SPL_BOARD_INIT if SPL
1126 select SPL_CLK if SPL
1127 select SPL_DM if SPL
1128 select SPL_DM_SPI if SPI && SPL_DM
1129 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1130 select SPL_DM_MAILBOX if SPL
1131 select SPL_FIRMWARE if SPL
1132 select SPL_SEPARATE_BSS if SPL
1135 imply BOARD_LATE_INIT
1137 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1144 imply DISTRO_DEFAULTS
1147 config TARGET_VEXPRESS64_AEMV8A
1148 bool "Support vexpress_aemv8a"
1152 config TARGET_VEXPRESS64_BASE_FVP
1153 bool "Support Versatile Express ARMv8a FVP BASE model"
1158 config TARGET_VEXPRESS64_JUNO
1159 bool "Support Versatile Express Juno Development Platform"
1174 config TARGET_TOTAL_COMPUTE
1175 bool "Support Total Compute Platform"
1183 config TARGET_LS2080A_EMU
1184 bool "Support ls2080a_emu"
1187 select ARMV8_MULTIENTRY
1188 select FSL_DDR_SYNC_REFRESH
1190 Support for Freescale LS2080A_EMU platform.
1191 The LS2080A Development System (EMULATOR) is a pre-silicon
1192 development platform that supports the QorIQ LS2080A
1193 Layerscape Architecture processor.
1195 config TARGET_LS1088AQDS
1196 bool "Support ls1088aqds"
1199 select ARMV8_MULTIENTRY
1200 select ARCH_SUPPORT_TFABOOT
1201 select BOARD_LATE_INIT
1203 select FSL_DDR_INTERACTIVE if !SD_BOOT
1205 Support for NXP LS1088AQDS platform.
1206 The LS1088A Development System (QDS) is a high-performance
1207 development platform that supports the QorIQ LS1088A
1208 Layerscape Architecture processor.
1210 config TARGET_LS2080AQDS
1211 bool "Support ls2080aqds"
1214 select ARMV8_MULTIENTRY
1215 select ARCH_SUPPORT_TFABOOT
1216 select BOARD_LATE_INIT
1221 select FSL_DDR_INTERACTIVE if !SPL
1223 Support for Freescale LS2080AQDS platform.
1224 The LS2080A Development System (QDS) is a high-performance
1225 development platform that supports the QorIQ LS2080A
1226 Layerscape Architecture processor.
1228 config TARGET_LS2080ARDB
1229 bool "Support ls2080ardb"
1232 select ARMV8_MULTIENTRY
1233 select ARCH_SUPPORT_TFABOOT
1234 select BOARD_LATE_INIT
1237 select FSL_DDR_INTERACTIVE if !SPL
1241 Support for Freescale LS2080ARDB platform.
1242 The LS2080A Reference design board (RDB) is a high-performance
1243 development platform that supports the QorIQ LS2080A
1244 Layerscape Architecture processor.
1246 config TARGET_LS2081ARDB
1247 bool "Support ls2081ardb"
1250 select ARMV8_MULTIENTRY
1251 select BOARD_LATE_INIT
1254 Support for Freescale LS2081ARDB platform.
1255 The LS2081A Reference design board (RDB) is a high-performance
1256 development platform that supports the QorIQ LS2081A/LS2041A
1257 Layerscape Architecture processor.
1259 config TARGET_LX2160ARDB
1260 bool "Support lx2160ardb"
1263 select ARMV8_MULTIENTRY
1264 select ARCH_SUPPORT_TFABOOT
1265 select BOARD_LATE_INIT
1267 Support for NXP LX2160ARDB platform.
1268 The lx2160ardb (LX2160A Reference design board (RDB)
1269 is a high-performance development platform that supports the
1270 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1272 config TARGET_LX2160AQDS
1273 bool "Support lx2160aqds"
1276 select ARMV8_MULTIENTRY
1277 select ARCH_SUPPORT_TFABOOT
1278 select BOARD_LATE_INIT
1280 Support for NXP LX2160AQDS platform.
1281 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1282 is a high-performance development platform that supports the
1283 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1285 config TARGET_LX2162AQDS
1286 bool "Support lx2162aqds"
1288 select ARCH_MISC_INIT
1290 select ARMV8_MULTIENTRY
1291 select ARCH_SUPPORT_TFABOOT
1292 select BOARD_LATE_INIT
1294 Support for NXP LX2162AQDS platform.
1295 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1298 bool "Support HiKey 96boards Consumer Edition Platform"
1305 select SPECIFY_CONSOLE_INDEX
1308 Support for HiKey 96boards platform. It features a HI6220
1309 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1311 config TARGET_HIKEY960
1312 bool "Support HiKey960 96boards Consumer Edition Platform"
1320 Support for HiKey960 96boards platform. It features a HI3660
1321 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1323 config TARGET_POPLAR
1324 bool "Support Poplar 96boards Enterprise Edition Platform"
1333 Support for Poplar 96boards EE platform. It features a HI3798cv200
1334 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1335 making it capable of running any commercial set-top solution based on
1338 config TARGET_LS1012AQDS
1339 bool "Support ls1012aqds"
1342 select ARCH_SUPPORT_TFABOOT
1343 select BOARD_LATE_INIT
1345 Support for Freescale LS1012AQDS platform.
1346 The LS1012A Development System (QDS) is a high-performance
1347 development platform that supports the QorIQ LS1012A
1348 Layerscape Architecture processor.
1350 config TARGET_LS1012ARDB
1351 bool "Support ls1012ardb"
1354 select ARCH_SUPPORT_TFABOOT
1355 select BOARD_LATE_INIT
1359 Support for Freescale LS1012ARDB platform.
1360 The LS1012A Reference design board (RDB) is a high-performance
1361 development platform that supports the QorIQ LS1012A
1362 Layerscape Architecture processor.
1364 config TARGET_LS1012A2G5RDB
1365 bool "Support ls1012a2g5rdb"
1368 select ARCH_SUPPORT_TFABOOT
1369 select BOARD_LATE_INIT
1372 Support for Freescale LS1012A2G5RDB platform.
1373 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1374 development platform that supports the QorIQ LS1012A
1375 Layerscape Architecture processor.
1377 config TARGET_LS1012AFRWY
1378 bool "Support ls1012afrwy"
1381 select ARCH_SUPPORT_TFABOOT
1382 select BOARD_LATE_INIT
1386 Support for Freescale LS1012AFRWY platform.
1387 The LS1012A FRWY board (FRWY) is a high-performance
1388 development platform that supports the QorIQ LS1012A
1389 Layerscape Architecture processor.
1391 config TARGET_LS1012AFRDM
1392 bool "Support ls1012afrdm"
1395 select ARCH_SUPPORT_TFABOOT
1397 Support for Freescale LS1012AFRDM platform.
1398 The LS1012A Freedom board (FRDM) is a high-performance
1399 development platform that supports the QorIQ LS1012A
1400 Layerscape Architecture processor.
1402 config TARGET_LS1028AQDS
1403 bool "Support ls1028aqds"
1406 select ARMV8_MULTIENTRY
1407 select ARCH_SUPPORT_TFABOOT
1408 select BOARD_LATE_INIT
1410 Support for Freescale LS1028AQDS platform
1411 The LS1028A Development System (QDS) is a high-performance
1412 development platform that supports the QorIQ LS1028A
1413 Layerscape Architecture processor.
1415 config TARGET_LS1028ARDB
1416 bool "Support ls1028ardb"
1419 select ARMV8_MULTIENTRY
1420 select ARCH_SUPPORT_TFABOOT
1421 select BOARD_LATE_INIT
1423 Support for Freescale LS1028ARDB platform
1424 The LS1028A Development System (RDB) is a high-performance
1425 development platform that supports the QorIQ LS1028A
1426 Layerscape Architecture processor.
1428 config TARGET_LS1088ARDB
1429 bool "Support ls1088ardb"
1432 select ARMV8_MULTIENTRY
1433 select ARCH_SUPPORT_TFABOOT
1434 select BOARD_LATE_INIT
1436 select FSL_DDR_INTERACTIVE if !SD_BOOT
1438 Support for NXP LS1088ARDB platform.
1439 The LS1088A Reference design board (RDB) is a high-performance
1440 development platform that supports the QorIQ LS1088A
1441 Layerscape Architecture processor.
1443 config TARGET_LS1021AQDS
1444 bool "Support ls1021aqds"
1446 select ARCH_SUPPORT_PSCI
1447 select BOARD_EARLY_INIT_F
1448 select BOARD_LATE_INIT
1450 select CPU_V7_HAS_NONSEC
1451 select CPU_V7_HAS_VIRT
1452 select LS1_DEEP_SLEEP
1455 select FSL_DDR_INTERACTIVE
1456 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1457 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1460 config TARGET_LS1021ATWR
1461 bool "Support ls1021atwr"
1463 select ARCH_SUPPORT_PSCI
1464 select BOARD_EARLY_INIT_F
1465 select BOARD_LATE_INIT
1467 select CPU_V7_HAS_NONSEC
1468 select CPU_V7_HAS_VIRT
1469 select LS1_DEEP_SLEEP
1471 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1474 config TARGET_PG_WCOM_SELI8
1475 bool "Support Hitachi-Powergrids SELI8 service unit card"
1477 select ARCH_SUPPORT_PSCI
1478 select BOARD_EARLY_INIT_F
1479 select BOARD_LATE_INIT
1481 select CPU_V7_HAS_NONSEC
1482 select CPU_V7_HAS_VIRT
1484 select FSL_DDR_INTERACTIVE
1488 Support for Hitachi-Powergrids SELI8 service unit card.
1489 SELI8 is a QorIQ LS1021a based service unit card used
1490 in XMC20 and FOX615 product families.
1492 config TARGET_LS1021ATSN
1493 bool "Support ls1021atsn"
1495 select ARCH_SUPPORT_PSCI
1496 select BOARD_EARLY_INIT_F
1497 select BOARD_LATE_INIT
1499 select CPU_V7_HAS_NONSEC
1500 select CPU_V7_HAS_VIRT
1501 select LS1_DEEP_SLEEP
1505 config TARGET_LS1021AIOT
1506 bool "Support ls1021aiot"
1508 select ARCH_SUPPORT_PSCI
1509 select BOARD_LATE_INIT
1511 select CPU_V7_HAS_NONSEC
1512 select CPU_V7_HAS_VIRT
1514 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1517 Support for Freescale LS1021AIOT platform.
1518 The LS1021A Freescale board (IOT) is a high-performance
1519 development platform that supports the QorIQ LS1021A
1520 Layerscape Architecture processor.
1522 config TARGET_LS1043AQDS
1523 bool "Support ls1043aqds"
1526 select ARMV8_MULTIENTRY
1527 select ARCH_SUPPORT_TFABOOT
1528 select BOARD_EARLY_INIT_F
1529 select BOARD_LATE_INIT
1531 select FSL_DDR_INTERACTIVE if !SPL
1532 select FSL_DSPI if !SPL_NO_DSPI
1533 select DM_SPI_FLASH if FSL_DSPI
1537 Support for Freescale LS1043AQDS platform.
1539 config TARGET_LS1043ARDB
1540 bool "Support ls1043ardb"
1543 select ARMV8_MULTIENTRY
1544 select ARCH_SUPPORT_TFABOOT
1545 select BOARD_EARLY_INIT_F
1546 select BOARD_LATE_INIT
1548 select FSL_DSPI if !SPL_NO_DSPI
1549 select DM_SPI_FLASH if FSL_DSPI
1551 Support for Freescale LS1043ARDB platform.
1553 config TARGET_LS1046AQDS
1554 bool "Support ls1046aqds"
1557 select ARMV8_MULTIENTRY
1558 select ARCH_SUPPORT_TFABOOT
1559 select BOARD_EARLY_INIT_F
1560 select BOARD_LATE_INIT
1561 select DM_SPI_FLASH if DM_SPI
1563 select FSL_DDR_BIST if !SPL
1564 select FSL_DDR_INTERACTIVE if !SPL
1565 select FSL_DDR_INTERACTIVE if !SPL
1568 Support for Freescale LS1046AQDS platform.
1569 The LS1046A Development System (QDS) is a high-performance
1570 development platform that supports the QorIQ LS1046A
1571 Layerscape Architecture processor.
1573 config TARGET_LS1046ARDB
1574 bool "Support ls1046ardb"
1577 select ARMV8_MULTIENTRY
1578 select ARCH_SUPPORT_TFABOOT
1579 select BOARD_EARLY_INIT_F
1580 select BOARD_LATE_INIT
1581 select DM_SPI_FLASH if DM_SPI
1582 select POWER_MC34VR500
1585 select FSL_DDR_INTERACTIVE if !SPL
1588 Support for Freescale LS1046ARDB platform.
1589 The LS1046A Reference Design Board (RDB) is a high-performance
1590 development platform that supports the QorIQ LS1046A
1591 Layerscape Architecture processor.
1593 config TARGET_LS1046AFRWY
1594 bool "Support ls1046afrwy"
1597 select ARMV8_MULTIENTRY
1598 select ARCH_SUPPORT_TFABOOT
1599 select BOARD_EARLY_INIT_F
1600 select BOARD_LATE_INIT
1601 select DM_SPI_FLASH if DM_SPI
1604 Support for Freescale LS1046AFRWY platform.
1605 The LS1046A Freeway Board (FRWY) is a high-performance
1606 development platform that supports the QorIQ LS1046A
1607 Layerscape Architecture processor.
1613 select ARMV8_MULTIENTRY
1630 select SPL_DM if SPL
1631 select SPL_DM_SPI if SPL
1632 select SPL_DM_SPI_FLASH if SPL
1633 select SPL_DM_I2C if SPL
1634 select SPL_DM_MMC if SPL
1635 select SPL_DM_SERIAL if SPL
1637 Support for Kontron SMARC-sAL28 board.
1639 config TARGET_COLIBRI_PXA270
1640 bool "Support colibri_pxa270"
1643 config ARCH_UNIPHIER
1644 bool "Socionext UniPhier SoCs"
1645 select BOARD_LATE_INIT
1655 select OF_BOARD_SETUP
1659 select SPL_BOARD_INIT if SPL
1660 select SPL_DM if SPL
1661 select SPL_LIBCOMMON_SUPPORT if SPL
1662 select SPL_LIBGENERIC_SUPPORT if SPL
1663 select SPL_OF_CONTROL if SPL
1664 select SPL_PINCTRL if SPL
1667 imply DISTRO_DEFAULTS
1670 Support for UniPhier SoC family developed by Socionext Inc.
1671 (formerly, System LSI Business Division of Panasonic Corporation)
1674 bool "Support STMicroelectronics STM32 MCU with cortex M"
1681 bool "Support STMicrolectronics SoCs"
1690 Support for STMicroelectronics STiH407/10 SoC family.
1691 This SoC is used on Linaro 96Board STiH410-B2260
1694 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1695 select ARCH_MISC_INIT
1696 select ARCH_SUPPORT_TFABOOT
1697 select BOARD_LATE_INIT
1706 select OF_SYSTEM_SETUP
1712 select SYS_THUMB_BUILD
1716 imply OF_LIBFDT_OVERLAY
1717 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1720 Support for STM32MP SoC family developed by STMicroelectronics,
1721 MPUs based on ARM cortex A core
1722 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1723 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1725 SPL is the unsecure FSBL for the basic boot chain.
1727 config ARCH_ROCKCHIP
1728 bool "Support Rockchip SoCs"
1730 select BINMAN if SPL_OPTEE
1740 select DM_USB if USB
1741 select ENABLE_ARM_SOC_BOOT0_HOOK
1744 select SPL_DM if SPL
1745 select SPL_DM_SPI if SPL
1746 select SPL_DM_SPI_FLASH if SPL
1748 select SYS_THUMB_BUILD if !ARM64
1751 imply DEBUG_UART_BOARD_INIT
1752 imply DISTRO_DEFAULTS
1754 imply SARADC_ROCKCHIP
1756 imply SPL_SYS_MALLOC_SIMPLE
1759 imply USB_FUNCTION_FASTBOOT
1761 config ARCH_OCTEONTX
1762 bool "Support OcteonTX SoCs"
1768 select BOARD_LATE_INIT
1769 select SYS_CACHE_SHIFT_7
1771 config ARCH_OCTEONTX2
1772 bool "Support OcteonTX2 SoCs"
1778 select BOARD_LATE_INIT
1779 select SYS_CACHE_SHIFT_7
1781 config TARGET_THUNDERX_88XX
1782 bool "Support ThunderX 88xx"
1786 select SYS_CACHE_SHIFT_7
1789 bool "Support Aspeed SoCs"
1794 config TARGET_DURIAN
1795 bool "Support Phytium Durian Platform"
1798 Support for durian platform.
1799 It has 2GB Sdram, uart and pcie.
1801 config TARGET_PRESIDIO_ASIC
1802 bool "Support Cortina Presidio ASIC Platform"
1805 config TARGET_XENGUEST_ARM64
1806 bool "Xen guest ARM64"
1810 select LINUX_KERNEL_IMAGE_HEADER
1815 config ARCH_SUPPORT_TFABOOT
1819 bool "Support for booting from TF-A"
1820 depends on ARCH_SUPPORT_TFABOOT
1823 Some platforms support the setup of secure registers (for instance
1824 for CPU errata handling) or provide secure services like PSCI.
1825 Those services could also be provided by other firmware parts
1826 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
1827 does not need to (and cannot) execute this code.
1828 Enabling this option will make a U-Boot binary that is relying
1829 on other firmware layers to provide secure functionality.
1831 config TI_SECURE_DEVICE
1832 bool "HS Device Type Support"
1833 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1835 If a high secure (HS) device type is being used, this config
1836 must be set. This option impacts various aspects of the
1837 build system (to create signed boot images that can be
1838 authenticated) and the code. See the doc/README.ti-secure
1839 file for further details.
1841 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1842 config ISW_ENTRY_ADDR
1843 hex "Address in memory or XIP address of bootloader entry point"
1844 default 0x402F4000 if AM43XX
1845 default 0x402F0400 if AM33XX
1846 default 0x40301350 if OMAP54XX
1848 After any reset, the boot ROM searches the boot media for a valid
1849 boot image. For non-XIP devices, the ROM then copies the image into
1850 internal memory. For all boot modes, after the ROM processes the
1851 boot image it eventually computes the entry point address depending
1852 on the device type (secure/non-secure), boot media (xip/non-xip) and
1856 source "arch/arm/mach-aspeed/Kconfig"
1858 source "arch/arm/mach-at91/Kconfig"
1860 source "arch/arm/mach-bcm283x/Kconfig"
1862 source "arch/arm/mach-bcmstb/Kconfig"
1864 source "arch/arm/mach-davinci/Kconfig"
1866 source "arch/arm/mach-exynos/Kconfig"
1868 source "arch/arm/mach-highbank/Kconfig"
1870 source "arch/arm/mach-integrator/Kconfig"
1872 source "arch/arm/mach-ipq40xx/Kconfig"
1874 source "arch/arm/mach-k3/Kconfig"
1876 source "arch/arm/mach-keystone/Kconfig"
1878 source "arch/arm/mach-kirkwood/Kconfig"
1880 source "arch/arm/mach-lpc32xx/Kconfig"
1882 source "arch/arm/mach-mvebu/Kconfig"
1884 source "arch/arm/mach-octeontx/Kconfig"
1886 source "arch/arm/mach-octeontx2/Kconfig"
1888 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1890 source "arch/arm/mach-imx/mx2/Kconfig"
1892 source "arch/arm/mach-imx/mx3/Kconfig"
1894 source "arch/arm/mach-imx/mx5/Kconfig"
1896 source "arch/arm/mach-imx/mx6/Kconfig"
1898 source "arch/arm/mach-imx/mx7/Kconfig"
1900 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1902 source "arch/arm/mach-imx/imx8/Kconfig"
1904 source "arch/arm/mach-imx/imx8m/Kconfig"
1906 source "arch/arm/mach-imx/imxrt/Kconfig"
1908 source "arch/arm/mach-imx/mxs/Kconfig"
1910 source "arch/arm/mach-omap2/Kconfig"
1912 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1914 source "arch/arm/mach-orion5x/Kconfig"
1916 source "arch/arm/mach-owl/Kconfig"
1918 source "arch/arm/mach-rmobile/Kconfig"
1920 source "arch/arm/mach-meson/Kconfig"
1922 source "arch/arm/mach-mediatek/Kconfig"
1924 source "arch/arm/mach-qemu/Kconfig"
1926 source "arch/arm/mach-rockchip/Kconfig"
1928 source "arch/arm/mach-s5pc1xx/Kconfig"
1930 source "arch/arm/mach-snapdragon/Kconfig"
1932 source "arch/arm/mach-socfpga/Kconfig"
1934 source "arch/arm/mach-sti/Kconfig"
1936 source "arch/arm/mach-stm32/Kconfig"
1938 source "arch/arm/mach-stm32mp/Kconfig"
1940 source "arch/arm/mach-sunxi/Kconfig"
1942 source "arch/arm/mach-tegra/Kconfig"
1944 source "arch/arm/mach-u8500/Kconfig"
1946 source "arch/arm/mach-uniphier/Kconfig"
1948 source "arch/arm/cpu/armv7/vf610/Kconfig"
1950 source "arch/arm/mach-zynq/Kconfig"
1952 source "arch/arm/mach-zynqmp/Kconfig"
1954 source "arch/arm/mach-versal/Kconfig"
1956 source "arch/arm/mach-zynqmp-r5/Kconfig"
1958 source "arch/arm/cpu/armv7/Kconfig"
1960 source "arch/arm/cpu/armv8/Kconfig"
1962 source "arch/arm/mach-imx/Kconfig"
1964 source "arch/arm/mach-nexell/Kconfig"
1966 source "board/armltd/total_compute/Kconfig"
1968 source "board/bosch/shc/Kconfig"
1969 source "board/bosch/guardian/Kconfig"
1970 source "board/CarMediaLab/flea3/Kconfig"
1971 source "board/Marvell/aspenite/Kconfig"
1972 source "board/Marvell/gplugd/Kconfig"
1973 source "board/Marvell/octeontx/Kconfig"
1974 source "board/Marvell/octeontx2/Kconfig"
1975 source "board/armltd/vexpress64/Kconfig"
1976 source "board/cortina/presidio-asic/Kconfig"
1977 source "board/broadcom/bcm963158/Kconfig"
1978 source "board/broadcom/bcm968360bg/Kconfig"
1979 source "board/broadcom/bcm968580xref/Kconfig"
1980 source "board/broadcom/bcmns3/Kconfig"
1981 source "board/cavium/thunderx/Kconfig"
1982 source "board/cirrus/edb93xx/Kconfig"
1983 source "board/eets/pdu001/Kconfig"
1984 source "board/emulation/qemu-arm/Kconfig"
1985 source "board/freescale/ls2080aqds/Kconfig"
1986 source "board/freescale/ls2080ardb/Kconfig"
1987 source "board/freescale/ls1088a/Kconfig"
1988 source "board/freescale/ls1028a/Kconfig"
1989 source "board/freescale/ls1021aqds/Kconfig"
1990 source "board/freescale/ls1043aqds/Kconfig"
1991 source "board/freescale/ls1021atwr/Kconfig"
1992 source "board/freescale/ls1021atsn/Kconfig"
1993 source "board/freescale/ls1021aiot/Kconfig"
1994 source "board/freescale/ls1046aqds/Kconfig"
1995 source "board/freescale/ls1043ardb/Kconfig"
1996 source "board/freescale/ls1046ardb/Kconfig"
1997 source "board/freescale/ls1046afrwy/Kconfig"
1998 source "board/freescale/ls1012aqds/Kconfig"
1999 source "board/freescale/ls1012ardb/Kconfig"
2000 source "board/freescale/ls1012afrdm/Kconfig"
2001 source "board/freescale/lx2160a/Kconfig"
2002 source "board/grinn/chiliboard/Kconfig"
2003 source "board/hisilicon/hikey/Kconfig"
2004 source "board/hisilicon/hikey960/Kconfig"
2005 source "board/hisilicon/poplar/Kconfig"
2006 source "board/isee/igep003x/Kconfig"
2007 source "board/kontron/sl28/Kconfig"
2008 source "board/myir/mys_6ulx/Kconfig"
2009 source "board/spear/spear300/Kconfig"
2010 source "board/spear/spear310/Kconfig"
2011 source "board/spear/spear320/Kconfig"
2012 source "board/spear/spear600/Kconfig"
2013 source "board/spear/x600/Kconfig"
2014 source "board/st/stv0991/Kconfig"
2015 source "board/tcl/sl50/Kconfig"
2016 source "board/toradex/colibri_pxa270/Kconfig"
2017 source "board/variscite/dart_6ul/Kconfig"
2018 source "board/vscom/baltos/Kconfig"
2019 source "board/phytium/durian/Kconfig"
2020 source "board/xen/xenguest_arm64/Kconfig"
2021 source "board/keymile/Kconfig"
2023 source "arch/arm/Kconfig.debug"
2028 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2029 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2030 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64