1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed from
19 almost any 4K aligned address. This logic relies on the relocation
20 information that is embedded in the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
25 default n if ARCH_QEMU
26 default y if POSITION_INDEPENDENT
28 U-Boot typically uses a hard-coded value for the stack pointer
29 before relocation. Enable this option to instead calculate the
30 initial SP at run-time. This is useful to avoid hard-coding addresses
31 into U-Boot, so that it can be loaded and executed at arbitrary
32 addresses and thus avoid using arbitrary addresses at runtime.
34 If this option is enabled, the early stack pointer is set to
35 &_bss_start with a offset value added. The offset is specified by
36 SYS_INIT_SP_BSS_OFFSET.
38 config SYS_INIT_SP_BSS_OFFSET
39 int "Early stack offset from the .bss base address"
40 depends on INIT_SP_RELATIVE
43 This option's value is the offset added to &_bss_start in order to
44 calculate the stack pointer. This offset should be large enough so
45 that the early malloc region, global data (gd), and early stack usage
46 do not overlap any appended DTB.
48 config LINUX_KERNEL_IMAGE_HEADER
51 Place a Linux kernel image header at the start of the U-Boot binary.
52 The format of the header is described in the Linux kernel source at
53 Documentation/arm64/booting.txt. This feature is useful since the
54 image header reports the amount of memory (BSS and similar) that
55 U-Boot needs to use, but which isn't part of the binary.
57 if LINUX_KERNEL_IMAGE_HEADER
58 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
61 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
62 TEXT_OFFSET value written to the Linux kernel image header.
78 ARM GICV3 Interrupt translation service (ITS).
79 Basic support for programming locality specific peripheral
80 interrupts (LPI) configuration tables and enable LPI tables.
81 LPI configuration table can be used by u-boot or Linux.
82 ARM GICV3 has limitation, once the LPI table is enabled, LPI
83 configuration table can not be re-programmed, unless GICV3 reset.
89 config DMA_ADDR_T_64BIT
99 config GPIO_EXTRA_HEADER
102 # Used for compatibility with asm files copied from the kernel
103 config ARM_ASM_UNIFIED
107 # Used for compatibility with asm files copied from the kernel
111 config SYS_ICACHE_OFF
112 bool "Do not enable icache"
115 Do not enable instruction cache in U-Boot.
117 config SPL_SYS_ICACHE_OFF
118 bool "Do not enable icache in SPL"
120 default SYS_ICACHE_OFF
122 Do not enable instruction cache in SPL.
124 config SYS_DCACHE_OFF
125 bool "Do not enable dcache"
128 Do not enable data cache in U-Boot.
130 config SPL_SYS_DCACHE_OFF
131 bool "Do not enable dcache in SPL"
133 default SYS_DCACHE_OFF
135 Do not enable data cache in SPL.
137 config SYS_ARM_CACHE_CP15
138 bool "CP15 based cache enabling support"
140 Select this if your processor suports enabling caches by using
144 bool "MMU-based Paged Memory Management Support"
145 select SYS_ARM_CACHE_CP15
147 Select if you want MMU-based virtualised addressing space
148 support via paged memory management.
151 bool 'Use the ARM v7 PMSA Compliant MPU'
153 Some ARM systems without an MMU have instead a Memory Protection
154 Unit (MPU) that defines the type and permissions for regions of
156 If your CPU has an MPU then you should choose 'y' here unless you
157 know that you do not want to use the MPU.
159 # If set, the workarounds for these ARM errata are applied early during U-Boot
160 # startup. Note that in general these options force the workarounds to be
161 # applied; no CPU-type/version detection exists, unlike the similar options in
162 # the Linux kernel. Do not set these options unless they apply! Also note that
163 # the following can be machine-specific errata. These do have ability to
164 # provide rudimentary version and machine-specific checks, but expect no
166 # CONFIG_ARM_ERRATA_430973
167 # CONFIG_ARM_ERRATA_454179
168 # CONFIG_ARM_ERRATA_621766
169 # CONFIG_ARM_ERRATA_798870
170 # CONFIG_ARM_ERRATA_801819
171 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
172 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
174 config ARM_ERRATA_430973
177 config ARM_ERRATA_454179
180 config ARM_ERRATA_621766
183 config ARM_ERRATA_716044
186 config ARM_ERRATA_725233
189 config ARM_ERRATA_742230
192 config ARM_ERRATA_743622
195 config ARM_ERRATA_751472
198 config ARM_ERRATA_761320
201 config ARM_ERRATA_773022
204 config ARM_ERRATA_774769
207 config ARM_ERRATA_794072
210 config ARM_ERRATA_798870
213 config ARM_ERRATA_801819
216 config ARM_ERRATA_826974
219 config ARM_ERRATA_828024
222 config ARM_ERRATA_829520
225 config ARM_ERRATA_833069
228 config ARM_ERRATA_833471
231 config ARM_ERRATA_845369
234 config ARM_ERRATA_852421
237 config ARM_ERRATA_852423
240 config ARM_ERRATA_855873
243 config ARM_CORTEX_A8_CVE_2017_5715
246 config ARM_CORTEX_A15_CVE_2017_5715
251 select SYS_CACHE_SHIFT_5
256 select SYS_CACHE_SHIFT_5
261 select SYS_CACHE_SHIFT_5
266 select SYS_CACHE_SHIFT_5
271 select SYS_CACHE_SHIFT_5
277 select SYS_CACHE_SHIFT_5
284 select SYS_CACHE_SHIFT_6
291 select SYS_CACHE_SHIFT_5
292 select SYS_THUMB_BUILD
298 select SYS_ARM_CACHE_CP15
300 select SYS_CACHE_SHIFT_6
304 select SYS_CACHE_SHIFT_5
309 select SYS_CACHE_SHIFT_5
313 default "arm720t" if CPU_ARM720T
314 default "arm920t" if CPU_ARM920T
315 default "arm926ejs" if CPU_ARM926EJS
316 default "arm946es" if CPU_ARM946ES
317 default "arm1136" if CPU_ARM1136
318 default "arm1176" if CPU_ARM1176
319 default "armv7" if CPU_V7A
320 default "armv7" if CPU_V7R
321 default "armv7m" if CPU_V7M
322 default "pxa" if CPU_PXA
323 default "sa1100" if CPU_SA1100
324 default "armv8" if ARM64
328 default 4 if CPU_ARM720T
329 default 4 if CPU_ARM920T
330 default 5 if CPU_ARM926EJS
331 default 5 if CPU_ARM946ES
332 default 6 if CPU_ARM1136
333 default 6 if CPU_ARM1176
338 default 4 if CPU_SA1100
341 config SYS_CACHE_SHIFT_5
344 config SYS_CACHE_SHIFT_6
347 config SYS_CACHE_SHIFT_7
350 config SYS_CACHELINE_SIZE
352 default 128 if SYS_CACHE_SHIFT_7
353 default 64 if SYS_CACHE_SHIFT_6
354 default 32 if SYS_CACHE_SHIFT_5
357 prompt "Select the ARM data write cache policy"
358 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
360 default SYS_ARM_CACHE_WRITEBACK
362 config SYS_ARM_CACHE_WRITEBACK
363 bool "Write-back (WB)"
365 A write updates the cache only and marks the cache line as dirty.
366 External memory is updated only when the line is evicted or explicitly
369 config SYS_ARM_CACHE_WRITETHROUGH
370 bool "Write-through (WT)"
372 A write updates both the cache and the external memory system.
373 This does not mark the cache line as dirty.
375 config SYS_ARM_CACHE_WRITEALLOC
376 bool "Write allocation (WA)"
378 A cache line is allocated on a write miss. This means that executing a
379 store instruction on the processor might cause a burst read to occur.
380 There is a linefill to obtain the data for the cache line, before the
385 bool "Enable ARCH_CPU_INIT"
387 Some architectures require a call to arch_cpu_init().
388 Say Y here to enable it
390 config SYS_ARCH_TIMER
391 bool "ARM Generic Timer support"
392 depends on CPU_V7A || ARM64
395 The ARM Generic Timer (aka arch-timer) provides an architected
396 interface to a timer source on an SoC.
397 It is mandatory for ARMv8 implementation and widely available
401 bool "Support for ARM SMC Calling Convention (SMCCC)"
402 depends on CPU_V7A || ARM64
405 Say Y here if you want to enable ARM SMC Calling Convention.
406 This should be enabled if U-Boot needs to communicate with system
407 firmware (for example, PSCI) according to SMCCC.
410 bool "support boot from semihosting"
412 In emulated environments, semihosting is a way for
413 the hosted environment to call out to the emulator to
414 retrieve files from the host machine.
416 config SYS_THUMB_BUILD
417 bool "Build U-Boot using the Thumb instruction set"
420 Use this flag to build U-Boot using the Thumb instruction set for
421 ARM architectures. Thumb instruction set provides better code
422 density. For ARM architectures that support Thumb2 this flag will
423 result in Thumb2 code generated by GCC.
425 config SPL_SYS_THUMB_BUILD
426 bool "Build SPL using the Thumb instruction set"
427 default y if SYS_THUMB_BUILD
428 depends on !ARM64 && SPL
430 Use this flag to build SPL using the Thumb instruction set for
431 ARM architectures. Thumb instruction set provides better code
432 density. For ARM architectures that support Thumb2 this flag will
433 result in Thumb2 code generated by GCC.
435 config TPL_SYS_THUMB_BUILD
436 bool "Build TPL using the Thumb instruction set"
437 default y if SYS_THUMB_BUILD
438 depends on TPL && !ARM64
440 Use this flag to build TPL using the Thumb instruction set for
441 ARM architectures. Thumb instruction set provides better code
442 density. For ARM architectures that support Thumb2 this flag will
443 result in Thumb2 code generated by GCC.
446 config SYS_L2CACHE_OFF
449 If SoC does not support L2CACHE or one does not want to enable
450 L2CACHE, choose this option.
452 config ENABLE_ARM_SOC_BOOT0_HOOK
453 bool "prepare BOOT0 header"
455 If the SoC's BOOT0 requires a header area filled with (magic)
456 values, then choose this option, and create a file included as
457 <asm/arch/boot0.h> which contains the required assembler code.
459 config ARM_CORTEX_CPU_IS_UP
463 config USE_ARCH_MEMCPY
464 bool "Use an assembly optimized implementation of memcpy"
468 Enable the generation of an optimized version of memcpy.
469 Such an implementation may be faster under some conditions
470 but may increase the binary size.
472 config SPL_USE_ARCH_MEMCPY
473 bool "Use an assembly optimized implementation of memcpy for SPL"
474 default y if USE_ARCH_MEMCPY
475 depends on !ARM64 && SPL
477 Enable the generation of an optimized version of memcpy.
478 Such an implementation may be faster under some conditions
479 but may increase the binary size.
481 config TPL_USE_ARCH_MEMCPY
482 bool "Use an assembly optimized implementation of memcpy for TPL"
483 default y if USE_ARCH_MEMCPY
484 depends on !ARM64 && TPL
486 Enable the generation of an optimized version of memcpy.
487 Such an implementation may be faster under some conditions
488 but may increase the binary size.
490 config USE_ARCH_MEMSET
491 bool "Use an assembly optimized implementation of memset"
495 Enable the generation of an optimized version of memset.
496 Such an implementation may be faster under some conditions
497 but may increase the binary size.
499 config SPL_USE_ARCH_MEMSET
500 bool "Use an assembly optimized implementation of memset for SPL"
501 default y if USE_ARCH_MEMSET
502 depends on !ARM64 && SPL
504 Enable the generation of an optimized version of memset.
505 Such an implementation may be faster under some conditions
506 but may increase the binary size.
508 config TPL_USE_ARCH_MEMSET
509 bool "Use an assembly optimized implementation of memset for TPL"
510 default y if USE_ARCH_MEMSET
511 depends on !ARM64 && TPL
513 Enable the generation of an optimized version of memset.
514 Such an implementation may be faster under some conditions
515 but may increase the binary size.
517 config ARM64_SUPPORT_AARCH32
518 bool "ARM64 system support AArch32 execution state"
520 default y if !TARGET_THUNDERX_88XX
522 This ARM64 system supports AArch32 execution state.
525 prompt "Target select"
530 select GPIO_EXTRA_HEADER
531 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
532 select SPL_SEPARATE_BSS if SPL
534 config TARGET_ASPENITE
535 bool "Support aspenite"
537 select GPIO_EXTRA_HEADER
542 select GPIO_EXTRA_HEADER
543 select SPL_DM_SPI if SPL
546 Support for TI's DaVinci platform.
549 bool "Marvell Kirkwood"
550 select ARCH_MISC_INIT
551 select BOARD_EARLY_INIT_F
553 select GPIO_EXTRA_HEADER
556 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
562 select GPIO_EXTRA_HEADER
563 select SPL_DM_SPI if SPL
564 select SPL_DM_SPI_FLASH if SPL
573 select GPIO_EXTRA_HEADER
575 config TARGET_STV0991
576 bool "Support stv0991"
582 select GPIO_EXTRA_HEADER
591 select GPIO_EXTRA_HEADER
594 bool "Broadcom BCM283X family"
598 select GPIO_EXTRA_HEADER
601 select SERIAL_SEARCH_ALL
606 bool "Broadcom BCM63158 family"
612 bool "Broadcom BCM68360 family"
618 bool "Broadcom BCM6858 family"
624 bool "Broadcom BCM7XXX family"
627 select GPIO_EXTRA_HEADER
629 select OF_PRIOR_STAGE
632 This enables support for Broadcom ARM-based set-top box
633 chipsets, including the 7445 family of chips.
635 config TARGET_BCMCYGNUS
636 bool "Support bcmcygnus"
638 select GPIO_EXTRA_HEADER
640 imply BCM_SF2_ETH_GMAC
648 bool "Support Broadcom Northstar2"
650 select GPIO_EXTRA_HEADER
652 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
653 ARMv8 Cortex-A57 processors targeting a broad range of networking
657 bool "Support Broadcom NS3"
659 select BOARD_LATE_INIT
661 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
662 ARMv8 Cortex-A72 processors targeting a broad range of networking
666 bool "Samsung EXYNOS"
676 select GPIO_EXTRA_HEADER
677 imply SYS_THUMB_BUILD
682 bool "Samsung S5PC1XX"
688 select GPIO_EXTRA_HEADER
692 bool "Calxeda Highbank"
705 config ARCH_INTEGRATOR
706 bool "ARM Ltd. Integrator family"
709 select GPIO_EXTRA_HEADER
714 bool "Qualcomm IPQ40xx SoCs"
720 select GPIO_EXTRA_HEADER
733 select GPIO_EXTRA_HEADER
735 select SYS_ARCH_TIMER
736 select SYS_THUMB_BUILD
742 bool "Texas Instruments' K3 Architecture"
747 config ARCH_OMAP2PLUS
750 select GPIO_EXTRA_HEADER
751 select SPL_BOARD_INIT if SPL
752 select SPL_STACK_R if SPL
754 imply TI_SYSC if DM && OF_CONTROL
759 select GPIO_EXTRA_HEADER
760 imply DISTRO_DEFAULTS
763 Support for the Meson SoC family developed by Amlogic Inc.,
764 targeted at media players and tablet computers. We currently
765 support the S905 (GXBaby) 64-bit SoC.
770 select GPIO_EXTRA_HEADER
773 select SPL_LIBCOMMON_SUPPORT if SPL
774 select SPL_LIBGENERIC_SUPPORT if SPL
775 select SPL_OF_CONTROL if SPL
778 Support for the MediaTek SoCs family developed by MediaTek Inc.
779 Please refer to doc/README.mediatek for more information.
782 bool "NXP LPC32xx platform"
787 select GPIO_EXTRA_HEADER
793 bool "NXP i.MX8 platform"
796 select GPIO_EXTRA_HEADER
799 select ENABLE_ARM_SOC_BOOT0_HOOK
802 bool "NXP i.MX8M platform"
804 select GPIO_EXTRA_HEADER
806 select SYS_FSL_HAS_SEC if IMX_HAB
807 select SYS_FSL_SEC_COMPAT_4
808 select SYS_FSL_SEC_LE
815 bool "NXP i.MX8ULP platform"
821 select GPIO_EXTRA_HEADER
825 bool "NXP i.MXRT platform"
829 select GPIO_EXTRA_HEADER
835 bool "NXP i.MX23 family"
837 select GPIO_EXTRA_HEADER
845 select GPIO_EXTRA_HEADER
850 bool "NXP i.MX28 family"
852 select GPIO_EXTRA_HEADER
858 bool "NXP i.MX31 family"
860 select GPIO_EXTRA_HEADER
866 select GPIO_EXTRA_HEADER
868 select SYS_FSL_HAS_SEC if IMX_HAB
869 select SYS_FSL_SEC_COMPAT_4
870 select SYS_FSL_SEC_LE
871 select ROM_UNIFIED_SECTIONS
873 imply SYS_THUMB_BUILD
877 select ARCH_MISC_INIT
879 select GPIO_EXTRA_HEADER
881 select SYS_FSL_HAS_SEC if IMX_HAB
882 select SYS_FSL_SEC_COMPAT_4
883 select SYS_FSL_SEC_LE
884 imply BOARD_EARLY_INIT_F
886 imply SYS_THUMB_BUILD
891 select GPIO_EXTRA_HEADER
893 select SYS_FSL_HAS_SEC
894 select SYS_FSL_SEC_COMPAT_4
895 select SYS_FSL_SEC_LE
897 imply SYS_THUMB_BUILD
901 default "arch/arm/mach-omap2/u-boot-spl.lds"
906 select BOARD_EARLY_INIT_F
908 select GPIO_EXTRA_HEADER
913 bool "Nexell S5P4418/S5P6818 SoC"
914 select ENABLE_ARM_SOC_BOOT0_HOOK
916 select GPIO_EXTRA_HEADER
919 bool "Actions Semi OWL SoCs"
923 select GPIO_EXTRA_HEADER
928 select SYS_RELOC_GD_ENV_ADDR
932 bool "QEMU Virtual Platform"
943 bool "Renesas ARM SoCs"
946 select GPIO_EXTRA_HEADER
947 imply BOARD_EARLY_INIT_F
950 imply SYS_THUMB_BUILD
951 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
953 config ARCH_SNAPDRAGON
954 bool "Qualcomm Snapdragon SoCs"
959 select GPIO_EXTRA_HEADER
968 bool "Altera SOCFPGA family"
969 select ARCH_EARLY_INIT_R
970 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
971 select ARM64 if TARGET_SOCFPGA_SOC64
972 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
976 select GPIO_EXTRA_HEADER
977 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
979 select SPL_DM_RESET if DM_RESET
981 select SPL_LIBCOMMON_SUPPORT
982 select SPL_LIBGENERIC_SUPPORT
983 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
984 select SPL_OF_CONTROL
985 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
986 select SPL_SERIAL_SUPPORT
991 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
993 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
994 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1004 imply SPL_DM_SPI_FLASH
1005 imply SPL_LIBDISK_SUPPORT
1006 imply SPL_MMC_SUPPORT
1007 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1008 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1009 imply SPL_SPI_FLASH_SUPPORT
1010 imply SPL_SPI_SUPPORT
1014 bool "Support sunxi (Allwinner) SoCs"
1017 select CMD_MMC if MMC
1018 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1024 select DM_MMC if MMC
1025 select DM_SCSI if SCSI
1027 select GPIO_EXTRA_HEADER
1028 select OF_BOARD_SETUP
1031 select SPECIFY_CONSOLE_INDEX
1032 select SPL_STACK_R if SPL
1033 select SPL_SYS_MALLOC_SIMPLE if SPL
1034 select SPL_SYS_THUMB_BUILD if !ARM64
1037 select SYS_THUMB_BUILD if !ARM64
1038 select USB if DISTRO_DEFAULTS
1039 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1040 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1041 select SPL_USE_TINY_PRINTF
1043 select SYS_RELOC_GD_ENV_ADDR
1044 imply BOARD_LATE_INIT
1047 imply CMD_UBI if MTD_RAW_NAND
1048 imply DISTRO_DEFAULTS
1051 imply OF_LIBFDT_OVERLAY
1052 imply PRE_CONSOLE_BUFFER
1054 imply SPL_LIBCOMMON_SUPPORT
1055 imply SPL_LIBGENERIC_SUPPORT
1056 imply SPL_MMC_SUPPORT if MMC
1058 imply SPL_SERIAL_SUPPORT
1062 bool "ST-Ericsson U8500 Series"
1066 select DM_MMC if MMC
1071 imply ARM_PL180_MMCI
1073 imply NOMADIK_MTU_TIMER
1076 imply SYSRESET_SYSCON
1079 bool "Support Xilinx Versal Platform"
1083 select DM_ETH if NET
1084 select DM_MMC if MMC
1087 select GPIO_EXTRA_HEADER
1090 imply BOARD_LATE_INIT
1091 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1094 bool "Freescale Vybrid"
1096 select GPIO_EXTRA_HEADER
1098 select SYS_FSL_ERRATUM_ESDHC111
1103 bool "Xilinx Zynq based platform"
1108 select DM_ETH if NET
1109 select DM_MMC if MMC
1113 select GPIO_EXTRA_HEADER
1116 select SPL_BOARD_INIT if SPL
1117 select SPL_CLK if SPL
1118 select SPL_DM if SPL
1119 select SPL_DM_SPI if SPL
1120 select SPL_DM_SPI_FLASH if SPL
1121 select SPL_OF_CONTROL if SPL
1122 select SPL_SEPARATE_BSS if SPL
1124 imply ARCH_EARLY_INIT_R
1125 imply BOARD_LATE_INIT
1129 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1132 config ARCH_ZYNQMP_R5
1133 bool "Xilinx ZynqMP R5 based platform"
1137 select DM_ETH if NET
1138 select DM_MMC if MMC
1140 select GPIO_EXTRA_HEADER
1146 bool "Xilinx ZynqMP based platform"
1150 select DM_ETH if NET
1152 select DM_MMC if MMC
1154 select DM_SPI if SPI
1155 select DM_SPI_FLASH if DM_SPI
1158 select GPIO_EXTRA_HEADER
1160 select SPL_BOARD_INIT if SPL
1161 select SPL_CLK if SPL
1162 select SPL_DM if SPL
1163 select SPL_DM_SPI if SPI && SPL_DM
1164 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1165 select SPL_DM_MAILBOX if SPL
1166 select SPL_FIRMWARE if SPL
1167 select SPL_SEPARATE_BSS if SPL
1171 imply BOARD_LATE_INIT
1173 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1180 select GPIO_EXTRA_HEADER
1181 imply DISTRO_DEFAULTS
1184 config TARGET_VEXPRESS64_AEMV8A
1185 bool "Support vexpress_aemv8a"
1187 select GPIO_EXTRA_HEADER
1190 config TARGET_VEXPRESS64_BASE_FVP
1191 bool "Support Versatile Express ARMv8a FVP BASE model"
1193 select GPIO_EXTRA_HEADER
1197 config TARGET_VEXPRESS64_JUNO
1198 bool "Support Versatile Express Juno Development Platform"
1200 select GPIO_EXTRA_HEADER
1213 config TARGET_TOTAL_COMPUTE
1214 bool "Support Total Compute Platform"
1222 config TARGET_LS2080A_EMU
1223 bool "Support ls2080a_emu"
1226 select ARMV8_MULTIENTRY
1227 select FSL_DDR_SYNC_REFRESH
1228 select GPIO_EXTRA_HEADER
1230 Support for Freescale LS2080A_EMU platform.
1231 The LS2080A Development System (EMULATOR) is a pre-silicon
1232 development platform that supports the QorIQ LS2080A
1233 Layerscape Architecture processor.
1235 config TARGET_LS1088AQDS
1236 bool "Support ls1088aqds"
1239 select ARMV8_MULTIENTRY
1240 select ARCH_SUPPORT_TFABOOT
1241 select BOARD_LATE_INIT
1242 select GPIO_EXTRA_HEADER
1244 select FSL_DDR_INTERACTIVE if !SD_BOOT
1246 Support for NXP LS1088AQDS platform.
1247 The LS1088A Development System (QDS) is a high-performance
1248 development platform that supports the QorIQ LS1088A
1249 Layerscape Architecture processor.
1251 config TARGET_LS2080AQDS
1252 bool "Support ls2080aqds"
1255 select ARMV8_MULTIENTRY
1256 select ARCH_SUPPORT_TFABOOT
1257 select BOARD_LATE_INIT
1258 select GPIO_EXTRA_HEADER
1263 select FSL_DDR_INTERACTIVE if !SPL
1265 Support for Freescale LS2080AQDS platform.
1266 The LS2080A Development System (QDS) is a high-performance
1267 development platform that supports the QorIQ LS2080A
1268 Layerscape Architecture processor.
1270 config TARGET_LS2080ARDB
1271 bool "Support ls2080ardb"
1274 select ARMV8_MULTIENTRY
1275 select ARCH_SUPPORT_TFABOOT
1276 select BOARD_LATE_INIT
1279 select FSL_DDR_INTERACTIVE if !SPL
1280 select GPIO_EXTRA_HEADER
1284 Support for Freescale LS2080ARDB platform.
1285 The LS2080A Reference design board (RDB) is a high-performance
1286 development platform that supports the QorIQ LS2080A
1287 Layerscape Architecture processor.
1289 config TARGET_LS2081ARDB
1290 bool "Support ls2081ardb"
1293 select ARMV8_MULTIENTRY
1294 select BOARD_LATE_INIT
1295 select GPIO_EXTRA_HEADER
1298 Support for Freescale LS2081ARDB platform.
1299 The LS2081A Reference design board (RDB) is a high-performance
1300 development platform that supports the QorIQ LS2081A/LS2041A
1301 Layerscape Architecture processor.
1303 config TARGET_LX2160ARDB
1304 bool "Support lx2160ardb"
1307 select ARMV8_MULTIENTRY
1308 select ARCH_SUPPORT_TFABOOT
1309 select BOARD_LATE_INIT
1310 select GPIO_EXTRA_HEADER
1312 Support for NXP LX2160ARDB platform.
1313 The lx2160ardb (LX2160A Reference design board (RDB)
1314 is a high-performance development platform that supports the
1315 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1317 config TARGET_LX2160AQDS
1318 bool "Support lx2160aqds"
1321 select ARMV8_MULTIENTRY
1322 select ARCH_SUPPORT_TFABOOT
1323 select BOARD_LATE_INIT
1324 select GPIO_EXTRA_HEADER
1326 Support for NXP LX2160AQDS platform.
1327 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1328 is a high-performance development platform that supports the
1329 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1331 config TARGET_LX2162AQDS
1332 bool "Support lx2162aqds"
1334 select ARCH_MISC_INIT
1336 select ARMV8_MULTIENTRY
1337 select ARCH_SUPPORT_TFABOOT
1338 select BOARD_LATE_INIT
1339 select GPIO_EXTRA_HEADER
1341 Support for NXP LX2162AQDS platform.
1342 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1345 bool "Support HiKey 96boards Consumer Edition Platform"
1350 select GPIO_EXTRA_HEADER
1353 select SPECIFY_CONSOLE_INDEX
1356 Support for HiKey 96boards platform. It features a HI6220
1357 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1359 config TARGET_HIKEY960
1360 bool "Support HiKey960 96boards Consumer Edition Platform"
1364 select GPIO_EXTRA_HEADER
1369 Support for HiKey960 96boards platform. It features a HI3660
1370 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1372 config TARGET_POPLAR
1373 bool "Support Poplar 96boards Enterprise Edition Platform"
1377 select GPIO_EXTRA_HEADER
1382 Support for Poplar 96boards EE platform. It features a HI3798cv200
1383 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1384 making it capable of running any commercial set-top solution based on
1387 config TARGET_LS1012AQDS
1388 bool "Support ls1012aqds"
1391 select ARCH_SUPPORT_TFABOOT
1392 select BOARD_LATE_INIT
1393 select GPIO_EXTRA_HEADER
1395 Support for Freescale LS1012AQDS platform.
1396 The LS1012A Development System (QDS) is a high-performance
1397 development platform that supports the QorIQ LS1012A
1398 Layerscape Architecture processor.
1400 config TARGET_LS1012ARDB
1401 bool "Support ls1012ardb"
1404 select ARCH_SUPPORT_TFABOOT
1405 select BOARD_LATE_INIT
1406 select GPIO_EXTRA_HEADER
1410 Support for Freescale LS1012ARDB platform.
1411 The LS1012A Reference design board (RDB) is a high-performance
1412 development platform that supports the QorIQ LS1012A
1413 Layerscape Architecture processor.
1415 config TARGET_LS1012A2G5RDB
1416 bool "Support ls1012a2g5rdb"
1419 select ARCH_SUPPORT_TFABOOT
1420 select BOARD_LATE_INIT
1421 select GPIO_EXTRA_HEADER
1424 Support for Freescale LS1012A2G5RDB platform.
1425 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1426 development platform that supports the QorIQ LS1012A
1427 Layerscape Architecture processor.
1429 config TARGET_LS1012AFRWY
1430 bool "Support ls1012afrwy"
1433 select ARCH_SUPPORT_TFABOOT
1434 select BOARD_LATE_INIT
1435 select GPIO_EXTRA_HEADER
1439 Support for Freescale LS1012AFRWY platform.
1440 The LS1012A FRWY board (FRWY) is a high-performance
1441 development platform that supports the QorIQ LS1012A
1442 Layerscape Architecture processor.
1444 config TARGET_LS1012AFRDM
1445 bool "Support ls1012afrdm"
1448 select ARCH_SUPPORT_TFABOOT
1449 select GPIO_EXTRA_HEADER
1451 Support for Freescale LS1012AFRDM platform.
1452 The LS1012A Freedom board (FRDM) is a high-performance
1453 development platform that supports the QorIQ LS1012A
1454 Layerscape Architecture processor.
1456 config TARGET_LS1028AQDS
1457 bool "Support ls1028aqds"
1460 select ARMV8_MULTIENTRY
1461 select ARCH_SUPPORT_TFABOOT
1462 select BOARD_LATE_INIT
1463 select GPIO_EXTRA_HEADER
1465 Support for Freescale LS1028AQDS platform
1466 The LS1028A Development System (QDS) is a high-performance
1467 development platform that supports the QorIQ LS1028A
1468 Layerscape Architecture processor.
1470 config TARGET_LS1028ARDB
1471 bool "Support ls1028ardb"
1474 select ARMV8_MULTIENTRY
1475 select ARCH_SUPPORT_TFABOOT
1476 select BOARD_LATE_INIT
1477 select GPIO_EXTRA_HEADER
1479 Support for Freescale LS1028ARDB platform
1480 The LS1028A Development System (RDB) is a high-performance
1481 development platform that supports the QorIQ LS1028A
1482 Layerscape Architecture processor.
1484 config TARGET_LS1088ARDB
1485 bool "Support ls1088ardb"
1488 select ARMV8_MULTIENTRY
1489 select ARCH_SUPPORT_TFABOOT
1490 select BOARD_LATE_INIT
1492 select FSL_DDR_INTERACTIVE if !SD_BOOT
1493 select GPIO_EXTRA_HEADER
1495 Support for NXP LS1088ARDB platform.
1496 The LS1088A Reference design board (RDB) is a high-performance
1497 development platform that supports the QorIQ LS1088A
1498 Layerscape Architecture processor.
1500 config TARGET_LS1021AQDS
1501 bool "Support ls1021aqds"
1503 select ARCH_SUPPORT_PSCI
1504 select BOARD_EARLY_INIT_F
1505 select BOARD_LATE_INIT
1507 select CPU_V7_HAS_NONSEC
1508 select CPU_V7_HAS_VIRT
1509 select LS1_DEEP_SLEEP
1512 select FSL_DDR_INTERACTIVE
1513 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1514 select GPIO_EXTRA_HEADER
1515 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1518 config TARGET_LS1021ATWR
1519 bool "Support ls1021atwr"
1521 select ARCH_SUPPORT_PSCI
1522 select BOARD_EARLY_INIT_F
1523 select BOARD_LATE_INIT
1525 select CPU_V7_HAS_NONSEC
1526 select CPU_V7_HAS_VIRT
1527 select LS1_DEEP_SLEEP
1529 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1530 select GPIO_EXTRA_HEADER
1533 config TARGET_PG_WCOM_SELI8
1534 bool "Support Hitachi-Powergrids SELI8 service unit card"
1536 select ARCH_SUPPORT_PSCI
1537 select BOARD_EARLY_INIT_F
1538 select BOARD_LATE_INIT
1540 select CPU_V7_HAS_NONSEC
1541 select CPU_V7_HAS_VIRT
1543 select FSL_DDR_INTERACTIVE
1544 select GPIO_EXTRA_HEADER
1548 Support for Hitachi-Powergrids SELI8 service unit card.
1549 SELI8 is a QorIQ LS1021a based service unit card used
1550 in XMC20 and FOX615 product families.
1552 config TARGET_PG_WCOM_EXPU1
1553 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1555 select ARCH_SUPPORT_PSCI
1556 select BOARD_EARLY_INIT_F
1557 select BOARD_LATE_INIT
1559 select CPU_V7_HAS_NONSEC
1560 select CPU_V7_HAS_VIRT
1562 select FSL_DDR_INTERACTIVE
1566 Support for Hitachi-Powergrids EXPU1 service unit card.
1567 EXPU1 is a QorIQ LS1021a based service unit card used
1568 in XMC20 and FOX615 product families.
1570 config TARGET_LS1021ATSN
1571 bool "Support ls1021atsn"
1573 select ARCH_SUPPORT_PSCI
1574 select BOARD_EARLY_INIT_F
1575 select BOARD_LATE_INIT
1577 select CPU_V7_HAS_NONSEC
1578 select CPU_V7_HAS_VIRT
1579 select LS1_DEEP_SLEEP
1581 select GPIO_EXTRA_HEADER
1584 config TARGET_LS1021AIOT
1585 bool "Support ls1021aiot"
1587 select ARCH_SUPPORT_PSCI
1588 select BOARD_LATE_INIT
1590 select CPU_V7_HAS_NONSEC
1591 select CPU_V7_HAS_VIRT
1593 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1594 select GPIO_EXTRA_HEADER
1597 Support for Freescale LS1021AIOT platform.
1598 The LS1021A Freescale board (IOT) is a high-performance
1599 development platform that supports the QorIQ LS1021A
1600 Layerscape Architecture processor.
1602 config TARGET_LS1043AQDS
1603 bool "Support ls1043aqds"
1606 select ARMV8_MULTIENTRY
1607 select ARCH_SUPPORT_TFABOOT
1608 select BOARD_EARLY_INIT_F
1609 select BOARD_LATE_INIT
1611 select FSL_DDR_INTERACTIVE if !SPL
1612 select FSL_DSPI if !SPL_NO_DSPI
1613 select DM_SPI_FLASH if FSL_DSPI
1614 select GPIO_EXTRA_HEADER
1618 Support for Freescale LS1043AQDS platform.
1620 config TARGET_LS1043ARDB
1621 bool "Support ls1043ardb"
1624 select ARMV8_MULTIENTRY
1625 select ARCH_SUPPORT_TFABOOT
1626 select BOARD_EARLY_INIT_F
1627 select BOARD_LATE_INIT
1629 select FSL_DSPI if !SPL_NO_DSPI
1630 select DM_SPI_FLASH if FSL_DSPI
1631 select GPIO_EXTRA_HEADER
1633 Support for Freescale LS1043ARDB platform.
1635 config TARGET_LS1046AQDS
1636 bool "Support ls1046aqds"
1639 select ARMV8_MULTIENTRY
1640 select ARCH_SUPPORT_TFABOOT
1641 select BOARD_EARLY_INIT_F
1642 select BOARD_LATE_INIT
1643 select DM_SPI_FLASH if DM_SPI
1645 select FSL_DDR_BIST if !SPL
1646 select FSL_DDR_INTERACTIVE if !SPL
1647 select FSL_DDR_INTERACTIVE if !SPL
1648 select GPIO_EXTRA_HEADER
1651 Support for Freescale LS1046AQDS platform.
1652 The LS1046A Development System (QDS) is a high-performance
1653 development platform that supports the QorIQ LS1046A
1654 Layerscape Architecture processor.
1656 config TARGET_LS1046ARDB
1657 bool "Support ls1046ardb"
1660 select ARMV8_MULTIENTRY
1661 select ARCH_SUPPORT_TFABOOT
1662 select BOARD_EARLY_INIT_F
1663 select BOARD_LATE_INIT
1664 select DM_SPI_FLASH if DM_SPI
1665 select POWER_MC34VR500
1668 select FSL_DDR_INTERACTIVE if !SPL
1669 select GPIO_EXTRA_HEADER
1672 Support for Freescale LS1046ARDB platform.
1673 The LS1046A Reference Design Board (RDB) is a high-performance
1674 development platform that supports the QorIQ LS1046A
1675 Layerscape Architecture processor.
1677 config TARGET_LS1046AFRWY
1678 bool "Support ls1046afrwy"
1681 select ARMV8_MULTIENTRY
1682 select ARCH_SUPPORT_TFABOOT
1683 select BOARD_EARLY_INIT_F
1684 select BOARD_LATE_INIT
1685 select DM_SPI_FLASH if DM_SPI
1686 select GPIO_EXTRA_HEADER
1689 Support for Freescale LS1046AFRWY platform.
1690 The LS1046A Freeway Board (FRWY) is a high-performance
1691 development platform that supports the QorIQ LS1046A
1692 Layerscape Architecture processor.
1698 select ARMV8_MULTIENTRY
1714 select GPIO_EXTRA_HEADER
1715 select SPL_DM if SPL
1716 select SPL_DM_SPI if SPL
1717 select SPL_DM_SPI_FLASH if SPL
1718 select SPL_DM_I2C if SPL
1719 select SPL_DM_MMC if SPL
1720 select SPL_DM_SERIAL if SPL
1722 Support for Kontron SMARC-sAL28 board.
1724 config TARGET_COLIBRI_PXA270
1725 bool "Support colibri_pxa270"
1727 select GPIO_EXTRA_HEADER
1729 config ARCH_UNIPHIER
1730 bool "Socionext UniPhier SoCs"
1731 select BOARD_LATE_INIT
1740 select OF_BOARD_SETUP
1744 select SPL_BOARD_INIT if SPL
1745 select SPL_DM if SPL
1746 select SPL_LIBCOMMON_SUPPORT if SPL
1747 select SPL_LIBGENERIC_SUPPORT if SPL
1748 select SPL_OF_CONTROL if SPL
1749 select SPL_PINCTRL if SPL
1752 imply DISTRO_DEFAULTS
1755 Support for UniPhier SoC family developed by Socionext Inc.
1756 (formerly, System LSI Business Division of Panasonic Corporation)
1758 config ARCH_SYNQUACER
1759 bool "Socionext SynQuacer SoCs"
1765 select SYSRESET_PSCI
1768 Support for SynQuacer SoC family developed by Socionext Inc.
1769 This SoC is used on 96boards EE DeveloperBox.
1772 bool "Support STMicroelectronics STM32 MCU with cortex M"
1776 select GPIO_EXTRA_HEADER
1780 bool "Support STMicrolectronics SoCs"
1789 Support for STMicroelectronics STiH407/10 SoC family.
1790 This SoC is used on Linaro 96Board STiH410-B2260
1793 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1794 select ARCH_MISC_INIT
1795 select ARCH_SUPPORT_TFABOOT
1796 select BOARD_LATE_INIT
1802 select GPIO_EXTRA_HEADER
1806 select OF_SYSTEM_SETUP
1812 select SYS_THUMB_BUILD
1816 imply OF_LIBFDT_OVERLAY
1817 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1820 Support for STM32MP SoC family developed by STMicroelectronics,
1821 MPUs based on ARM cortex A core
1822 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1823 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1825 SPL is the unsecure FSBL for the basic boot chain.
1827 config ARCH_ROCKCHIP
1828 bool "Support Rockchip SoCs"
1830 select BINMAN if SPL_OPTEE || (SPL && !ARM64)
1840 select ENABLE_ARM_SOC_BOOT0_HOOK
1843 select SPL_DM if SPL
1844 select SPL_DM_SPI if SPL
1845 select SPL_DM_SPI_FLASH if SPL
1847 select SYS_THUMB_BUILD if !ARM64
1850 imply DEBUG_UART_BOARD_INIT
1851 imply DISTRO_DEFAULTS
1853 imply SARADC_ROCKCHIP
1855 imply SPL_SYS_MALLOC_SIMPLE
1858 imply USB_FUNCTION_FASTBOOT
1860 config ARCH_OCTEONTX
1861 bool "Support OcteonTX SoCs"
1864 select GPIO_EXTRA_HEADER
1868 select BOARD_LATE_INIT
1869 select SYS_CACHE_SHIFT_7
1871 config ARCH_OCTEONTX2
1872 bool "Support OcteonTX2 SoCs"
1875 select GPIO_EXTRA_HEADER
1879 select BOARD_LATE_INIT
1880 select SYS_CACHE_SHIFT_7
1882 config TARGET_THUNDERX_88XX
1883 bool "Support ThunderX 88xx"
1885 select GPIO_EXTRA_HEADER
1888 select SYS_CACHE_SHIFT_7
1891 bool "Support Aspeed SoCs"
1896 config TARGET_DURIAN
1897 bool "Support Phytium Durian Platform"
1899 select GPIO_EXTRA_HEADER
1901 Support for durian platform.
1902 It has 2GB Sdram, uart and pcie.
1904 config TARGET_PRESIDIO_ASIC
1905 bool "Support Cortina Presidio ASIC Platform"
1909 config TARGET_XENGUEST_ARM64
1910 bool "Xen guest ARM64"
1914 select LINUX_KERNEL_IMAGE_HEADER
1919 config ARCH_SUPPORT_TFABOOT
1923 bool "Support for booting from TF-A"
1924 depends on ARCH_SUPPORT_TFABOOT
1927 Some platforms support the setup of secure registers (for instance
1928 for CPU errata handling) or provide secure services like PSCI.
1929 Those services could also be provided by other firmware parts
1930 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
1931 does not need to (and cannot) execute this code.
1932 Enabling this option will make a U-Boot binary that is relying
1933 on other firmware layers to provide secure functionality.
1935 config TI_SECURE_DEVICE
1936 bool "HS Device Type Support"
1937 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1939 If a high secure (HS) device type is being used, this config
1940 must be set. This option impacts various aspects of the
1941 build system (to create signed boot images that can be
1942 authenticated) and the code. See the doc/README.ti-secure
1943 file for further details.
1945 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1946 config ISW_ENTRY_ADDR
1947 hex "Address in memory or XIP address of bootloader entry point"
1948 default 0x402F4000 if AM43XX
1949 default 0x402F0400 if AM33XX
1950 default 0x40301350 if OMAP54XX
1952 After any reset, the boot ROM searches the boot media for a valid
1953 boot image. For non-XIP devices, the ROM then copies the image into
1954 internal memory. For all boot modes, after the ROM processes the
1955 boot image it eventually computes the entry point address depending
1956 on the device type (secure/non-secure), boot media (xip/non-xip) and
1960 source "arch/arm/mach-aspeed/Kconfig"
1962 source "arch/arm/mach-at91/Kconfig"
1964 source "arch/arm/mach-bcm283x/Kconfig"
1966 source "arch/arm/mach-bcmstb/Kconfig"
1968 source "arch/arm/mach-davinci/Kconfig"
1970 source "arch/arm/mach-exynos/Kconfig"
1972 source "arch/arm/mach-highbank/Kconfig"
1974 source "arch/arm/mach-integrator/Kconfig"
1976 source "arch/arm/mach-ipq40xx/Kconfig"
1978 source "arch/arm/mach-k3/Kconfig"
1980 source "arch/arm/mach-keystone/Kconfig"
1982 source "arch/arm/mach-kirkwood/Kconfig"
1984 source "arch/arm/mach-lpc32xx/Kconfig"
1986 source "arch/arm/mach-mvebu/Kconfig"
1988 source "arch/arm/mach-octeontx/Kconfig"
1990 source "arch/arm/mach-octeontx2/Kconfig"
1992 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1994 source "arch/arm/mach-imx/mx2/Kconfig"
1996 source "arch/arm/mach-imx/mx3/Kconfig"
1998 source "arch/arm/mach-imx/mx5/Kconfig"
2000 source "arch/arm/mach-imx/mx6/Kconfig"
2002 source "arch/arm/mach-imx/mx7/Kconfig"
2004 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2006 source "arch/arm/mach-imx/imx8/Kconfig"
2008 source "arch/arm/mach-imx/imx8m/Kconfig"
2010 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2012 source "arch/arm/mach-imx/imxrt/Kconfig"
2014 source "arch/arm/mach-imx/mxs/Kconfig"
2016 source "arch/arm/mach-omap2/Kconfig"
2018 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2020 source "arch/arm/mach-orion5x/Kconfig"
2022 source "arch/arm/mach-owl/Kconfig"
2024 source "arch/arm/mach-rmobile/Kconfig"
2026 source "arch/arm/mach-meson/Kconfig"
2028 source "arch/arm/mach-mediatek/Kconfig"
2030 source "arch/arm/mach-qemu/Kconfig"
2032 source "arch/arm/mach-rockchip/Kconfig"
2034 source "arch/arm/mach-s5pc1xx/Kconfig"
2036 source "arch/arm/mach-snapdragon/Kconfig"
2038 source "arch/arm/mach-socfpga/Kconfig"
2040 source "arch/arm/mach-sti/Kconfig"
2042 source "arch/arm/mach-stm32/Kconfig"
2044 source "arch/arm/mach-stm32mp/Kconfig"
2046 source "arch/arm/mach-sunxi/Kconfig"
2048 source "arch/arm/mach-tegra/Kconfig"
2050 source "arch/arm/mach-u8500/Kconfig"
2052 source "arch/arm/mach-uniphier/Kconfig"
2054 source "arch/arm/cpu/armv7/vf610/Kconfig"
2056 source "arch/arm/mach-zynq/Kconfig"
2058 source "arch/arm/mach-zynqmp/Kconfig"
2060 source "arch/arm/mach-versal/Kconfig"
2062 source "arch/arm/mach-zynqmp-r5/Kconfig"
2064 source "arch/arm/cpu/armv7/Kconfig"
2066 source "arch/arm/cpu/armv8/Kconfig"
2068 source "arch/arm/mach-imx/Kconfig"
2070 source "arch/arm/mach-nexell/Kconfig"
2072 source "board/armltd/total_compute/Kconfig"
2074 source "board/bosch/shc/Kconfig"
2075 source "board/bosch/guardian/Kconfig"
2076 source "board/CarMediaLab/flea3/Kconfig"
2077 source "board/Marvell/aspenite/Kconfig"
2078 source "board/Marvell/octeontx/Kconfig"
2079 source "board/Marvell/octeontx2/Kconfig"
2080 source "board/armltd/vexpress64/Kconfig"
2081 source "board/cortina/presidio-asic/Kconfig"
2082 source "board/broadcom/bcm963158/Kconfig"
2083 source "board/broadcom/bcm968360bg/Kconfig"
2084 source "board/broadcom/bcm968580xref/Kconfig"
2085 source "board/broadcom/bcmns3/Kconfig"
2086 source "board/cavium/thunderx/Kconfig"
2087 source "board/eets/pdu001/Kconfig"
2088 source "board/emulation/qemu-arm/Kconfig"
2089 source "board/freescale/ls2080aqds/Kconfig"
2090 source "board/freescale/ls2080ardb/Kconfig"
2091 source "board/freescale/ls1088a/Kconfig"
2092 source "board/freescale/ls1028a/Kconfig"
2093 source "board/freescale/ls1021aqds/Kconfig"
2094 source "board/freescale/ls1043aqds/Kconfig"
2095 source "board/freescale/ls1021atwr/Kconfig"
2096 source "board/freescale/ls1021atsn/Kconfig"
2097 source "board/freescale/ls1021aiot/Kconfig"
2098 source "board/freescale/ls1046aqds/Kconfig"
2099 source "board/freescale/ls1043ardb/Kconfig"
2100 source "board/freescale/ls1046ardb/Kconfig"
2101 source "board/freescale/ls1046afrwy/Kconfig"
2102 source "board/freescale/ls1012aqds/Kconfig"
2103 source "board/freescale/ls1012ardb/Kconfig"
2104 source "board/freescale/ls1012afrdm/Kconfig"
2105 source "board/freescale/lx2160a/Kconfig"
2106 source "board/grinn/chiliboard/Kconfig"
2107 source "board/hisilicon/hikey/Kconfig"
2108 source "board/hisilicon/hikey960/Kconfig"
2109 source "board/hisilicon/poplar/Kconfig"
2110 source "board/isee/igep003x/Kconfig"
2111 source "board/kontron/sl28/Kconfig"
2112 source "board/myir/mys_6ulx/Kconfig"
2113 source "board/seeed/npi_imx6ull/Kconfig"
2114 source "board/socionext/developerbox/Kconfig"
2115 source "board/st/stv0991/Kconfig"
2116 source "board/tcl/sl50/Kconfig"
2117 source "board/toradex/colibri_pxa270/Kconfig"
2118 source "board/variscite/dart_6ul/Kconfig"
2119 source "board/vscom/baltos/Kconfig"
2120 source "board/phytium/durian/Kconfig"
2121 source "board/xen/xenguest_arm64/Kconfig"
2122 source "board/keymile/Kconfig"
2124 source "arch/arm/Kconfig.debug"
2129 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2130 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2131 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64