1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
11 imply SPL_SEPARATE_BSS
14 bool "Enable support for CRC32 instruction"
18 ARMv8 implements dedicated crc32 instruction for crc32 calculation.
19 This is faster than software crc32 calculation. This instruction may
20 not be present on all ARMv8.0, but is always present on ARMv8.1 and
23 config COUNTER_FREQUENCY
24 int "Timer clock frequency"
25 depends on ARM64 || CPU_V7A
26 default 8000000 if IMX8 || MX7 || MX6UL || MX6ULL
27 default 24000000 if ARCH_SUNXI || ARCH_EXYNOS || ROCKCHIP_RK3128 || \
28 ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036
29 default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A
30 default 100000000 if ARCH_ZYNQMP
33 For platforms with ARMv8-A and ARMv7-A which features a system
34 counter, those platforms needs software to program the counter
35 frequency. Setup time clock frequency for certain platform.
36 0 means no need to configure the system counter frequency.
37 For platforms needs the frequency set in U-Boot with a
38 pre-defined value, should have the macro defined as a non-zero value.
40 config POSITION_INDEPENDENT
41 bool "Generate position-independent pre-relocation code"
42 depends on ARM64 || CPU_V7A
44 U-Boot expects to be linked to a specific hard-coded address, and to
45 be loaded to and run from that address. This option lifts that
46 restriction, thus allowing the code to be loaded to and executed from
47 almost any 4K aligned address. This logic relies on the relocation
48 information that is embedded in the binary to support U-Boot
49 relocating itself to the top-of-RAM later during execution.
51 config INIT_SP_RELATIVE
52 bool "Specify the early stack pointer relative to the .bss section"
54 default n if ARCH_QEMU
55 default y if POSITION_INDEPENDENT
57 U-Boot typically uses a hard-coded value for the stack pointer
58 before relocation. Enable this option to instead calculate the
59 initial SP at run-time. This is useful to avoid hard-coding addresses
60 into U-Boot, so that it can be loaded and executed at arbitrary
61 addresses and thus avoid using arbitrary addresses at runtime.
63 If this option is enabled, the early stack pointer is set to
64 &_bss_start with a offset value added. The offset is specified by
65 SYS_INIT_SP_BSS_OFFSET.
67 config SYS_INIT_SP_BSS_OFFSET
68 int "Early stack offset from the .bss base address"
70 depends on INIT_SP_RELATIVE
73 This option's value is the offset added to &_bss_start in order to
74 calculate the stack pointer. This offset should be large enough so
75 that the early malloc region, global data (gd), and early stack usage
76 do not overlap any appended DTB.
78 config SPL_SYS_NO_VECTOR_TABLE
82 config LINUX_KERNEL_IMAGE_HEADER
86 Place a Linux kernel image header at the start of the U-Boot binary.
87 The format of the header is described in the Linux kernel source at
88 Documentation/arm64/booting.txt. This feature is useful since the
89 image header reports the amount of memory (BSS and similar) that
90 U-Boot needs to use, but which isn't part of the binary.
92 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
93 depends on LINUX_KERNEL_IMAGE_HEADER
96 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
97 TEXT_OFFSET value written to the Linux kernel image header.
109 ARM GICV3 Interrupt translation service (ITS).
110 Basic support for programming locality specific peripheral
111 interrupts (LPI) configuration tables and enable LPI tables.
112 LPI configuration table can be used by u-boot or Linux.
113 ARM GICV3 has limitation, once the LPI table is enabled, LPI
114 configuration table can not be re-programmed, unless GICV3 reset.
120 config DMA_ADDR_T_64BIT
130 config GPIO_EXTRA_HEADER
133 # Used for compatibility with asm files copied from the kernel
134 config ARM_ASM_UNIFIED
138 # Used for compatibility with asm files copied from the kernel
142 config SYS_ICACHE_OFF
143 bool "Do not enable icache"
145 Do not enable instruction cache in U-Boot.
147 config SPL_SYS_ICACHE_OFF
148 bool "Do not enable icache in SPL"
150 default SYS_ICACHE_OFF
152 Do not enable instruction cache in SPL.
154 config SYS_DCACHE_OFF
155 bool "Do not enable dcache"
157 Do not enable data cache in U-Boot.
159 config SPL_SYS_DCACHE_OFF
160 bool "Do not enable dcache in SPL"
162 default SYS_DCACHE_OFF
164 Do not enable data cache in SPL.
166 config SYS_ARM_CACHE_CP15
167 bool "CP15 based cache enabling support"
169 Select this if your processor suports enabling caches by using
173 bool "MMU-based Paged Memory Management Support"
174 select SYS_ARM_CACHE_CP15
176 Select if you want MMU-based virtualised addressing space
177 support via paged memory management.
180 bool 'Use the ARM v7 PMSA Compliant MPU'
182 Some ARM systems without an MMU have instead a Memory Protection
183 Unit (MPU) that defines the type and permissions for regions of
185 If your CPU has an MPU then you should choose 'y' here unless you
186 know that you do not want to use the MPU.
188 # If set, the workarounds for these ARM errata are applied early during U-Boot
189 # startup. Note that in general these options force the workarounds to be
190 # applied; no CPU-type/version detection exists, unlike the similar options in
191 # the Linux kernel. Do not set these options unless they apply! Also note that
192 # the following can be machine-specific errata. These do have ability to
193 # provide rudimentary version and machine-specific checks, but expect no
195 # CONFIG_ARM_ERRATA_430973
196 # CONFIG_ARM_ERRATA_454179
197 # CONFIG_ARM_ERRATA_621766
198 # CONFIG_ARM_ERRATA_798870
199 # CONFIG_ARM_ERRATA_801819
200 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
201 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
203 config ARM_ERRATA_430973
206 config ARM_ERRATA_454179
209 config ARM_ERRATA_621766
212 config ARM_ERRATA_716044
215 config ARM_ERRATA_725233
218 config ARM_ERRATA_742230
221 config ARM_ERRATA_743622
224 config ARM_ERRATA_751472
227 config ARM_ERRATA_761320
230 config ARM_ERRATA_773022
233 config ARM_ERRATA_774769
236 config ARM_ERRATA_794072
239 config ARM_ERRATA_798870
242 config ARM_ERRATA_801819
245 config ARM_ERRATA_826974
248 config ARM_ERRATA_828024
251 config ARM_ERRATA_829520
254 config ARM_ERRATA_833069
257 config ARM_ERRATA_833471
260 config ARM_ERRATA_845369
263 config ARM_ERRATA_852421
266 config ARM_ERRATA_852423
269 config ARM_ERRATA_855873
272 config ARM_CORTEX_A8_CVE_2017_5715
275 config ARM_CORTEX_A15_CVE_2017_5715
280 select SYS_CACHE_SHIFT_5
285 select SYS_CACHE_SHIFT_5
290 select SYS_CACHE_SHIFT_5
292 imply SPL_SEPARATE_BSS
296 select SYS_CACHE_SHIFT_5
301 select SYS_CACHE_SHIFT_5
303 imply SPL_SEPARATE_BSS
308 select SYS_CACHE_SHIFT_5
315 select SYS_CACHE_SHIFT_6
322 select SYS_CACHE_SHIFT_5
323 select SYS_THUMB_BUILD
329 select SYS_ARM_CACHE_CP15
331 select SYS_CACHE_SHIFT_6
334 default "arm720t" if CPU_ARM720T
335 default "arm920t" if CPU_ARM920T
336 default "arm926ejs" if CPU_ARM926EJS
337 default "arm946es" if CPU_ARM946ES
338 default "arm1136" if CPU_ARM1136
339 default "arm1176" if CPU_ARM1176
340 default "armv7" if CPU_V7A
341 default "armv7" if CPU_V7R
342 default "armv7m" if CPU_V7M
343 default "armv8" if ARM64
347 default 4 if CPU_ARM720T
348 default 4 if CPU_ARM920T
349 default 5 if CPU_ARM926EJS
350 default 5 if CPU_ARM946ES
351 default 6 if CPU_ARM1136
352 default 6 if CPU_ARM1176
359 prompt "Select the ARM data write cache policy"
360 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || RZA1
361 default SYS_ARM_CACHE_WRITEBACK
363 config SYS_ARM_CACHE_WRITEBACK
364 bool "Write-back (WB)"
366 A write updates the cache only and marks the cache line as dirty.
367 External memory is updated only when the line is evicted or explicitly
370 config SYS_ARM_CACHE_WRITETHROUGH
371 bool "Write-through (WT)"
373 A write updates both the cache and the external memory system.
374 This does not mark the cache line as dirty.
376 config SYS_ARM_CACHE_WRITEALLOC
377 bool "Write allocation (WA)"
379 A cache line is allocated on a write miss. This means that executing a
380 store instruction on the processor might cause a burst read to occur.
381 There is a linefill to obtain the data for the cache line, before the
385 config ARCH_VERY_EARLY_INIT
388 config SPL_ARCH_VERY_EARLY_INIT
392 bool "Enable ARCH_CPU_INIT"
394 Some architectures require a call to arch_cpu_init().
395 Say Y here to enable it
397 config SYS_ARCH_TIMER
398 bool "ARM Generic Timer support"
399 depends on CPU_V7A || ARM64
402 The ARM Generic Timer (aka arch-timer) provides an architected
403 interface to a timer source on an SoC.
404 It is mandatory for ARMv8 implementation and widely available
408 bool "Support for ARM SMC Calling Convention (SMCCC)"
409 depends on CPU_V7A || ARM64
412 Say Y here if you want to enable ARM SMC Calling Convention.
413 This should be enabled if U-Boot needs to communicate with system
414 firmware (for example, PSCI) according to SMCCC.
417 bool "Support ARM semihosting"
419 Semihosting is a method for a target to communicate with a host
420 debugger. It uses special instructions which the debugger will trap
421 on and interpret. This allows U-Boot to read/write files, print to
422 the console, and execute arbitrary commands on the host system.
424 Enabling this option will add support for reading and writing files
425 on the host system. If you don't have a debugger attached then trying
426 to do this will likely cause U-Boot to hang. Say 'n' if you are unsure.
428 config SEMIHOSTING_FALLBACK
429 bool "Recover gracefully when semihosting fails"
430 depends on SEMIHOSTING && ARM64
433 Normally, if U-Boot makes a semihosting call and no debugger is
434 attached, then it will panic due to a synchronous abort
435 exception. This config adds an exception handler which will allow
436 U-Boot to recover. Say 'y' if unsure.
438 config SPL_SEMIHOSTING
439 bool "Support ARM semihosting in SPL"
442 Semihosting is a method for a target to communicate with a host
443 debugger. It uses special instructions which the debugger will trap
444 on and interpret. This allows U-Boot to read/write files, print to
445 the console, and execute arbitrary commands on the host system.
447 Enabling this option will add support for reading and writing files
448 on the host system. If you don't have a debugger attached then trying
449 to do this will likely cause U-Boot to hang. Say 'n' if you are unsure.
451 config SPL_SEMIHOSTING_FALLBACK
452 bool "Recover gracefully when semihosting fails in SPL"
453 depends on SPL_SEMIHOSTING && ARM64
454 select ARMV8_SPL_EXCEPTION_VECTORS
457 Normally, if U-Boot makes a semihosting call and no debugger is
458 attached, then it will panic due to a synchronous abort
459 exception. This config adds an exception handler which will allow
460 U-Boot to recover. Say 'y' if unsure.
462 config SYS_THUMB_BUILD
463 bool "Build U-Boot using the Thumb instruction set"
466 Use this flag to build U-Boot using the Thumb instruction set for
467 ARM architectures. Thumb instruction set provides better code
468 density. For ARM architectures that support Thumb2 this flag will
469 result in Thumb2 code generated by GCC.
471 config SPL_SYS_THUMB_BUILD
472 bool "Build SPL using the Thumb instruction set"
473 default y if SYS_THUMB_BUILD
474 depends on !ARM64 && SPL
476 Use this flag to build SPL using the Thumb instruction set for
477 ARM architectures. Thumb instruction set provides better code
478 density. For ARM architectures that support Thumb2 this flag will
479 result in Thumb2 code generated by GCC.
481 config TPL_SYS_THUMB_BUILD
482 bool "Build TPL using the Thumb instruction set"
483 default y if SYS_THUMB_BUILD
484 depends on TPL && !ARM64
486 Use this flag to build TPL using the Thumb instruction set for
487 ARM architectures. Thumb instruction set provides better code
488 density. For ARM architectures that support Thumb2 this flag will
489 result in Thumb2 code generated by GCC.
492 config SYS_L2CACHE_OFF
495 If SoC does not support L2CACHE or one does not want to enable
496 L2CACHE, choose this option.
498 config ENABLE_ARM_SOC_BOOT0_HOOK
499 bool "prepare BOOT0 header"
501 If the SoC's BOOT0 requires a header area filled with (magic)
502 values, then choose this option, and create a file included as
503 <asm/arch/boot0.h> which contains the required assembler code.
505 config USE_ARCH_MEMCPY
506 bool "Use an assembly optimized implementation of memcpy"
508 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
510 Enable the generation of an optimized version of memcpy.
511 Such an implementation may be faster under some conditions
512 but may increase the binary size.
514 config SPL_USE_ARCH_MEMCPY
515 bool "Use an assembly optimized implementation of memcpy for SPL"
516 default y if USE_ARCH_MEMCPY
519 Enable the generation of an optimized version of memcpy.
520 Such an implementation may be faster under some conditions
521 but may increase the binary size.
523 config TPL_USE_ARCH_MEMCPY
524 bool "Use an assembly optimized implementation of memcpy for TPL"
525 default y if USE_ARCH_MEMCPY
528 Enable the generation of an optimized version of memcpy.
529 Such an implementation may be faster under some conditions
530 but may increase the binary size.
532 config USE_ARCH_MEMMOVE
533 bool "Use an assembly optimized implementation of memmove" if !ARM64
534 default USE_ARCH_MEMCPY if ARM64
537 Enable the generation of an optimized version of memmove.
538 Such an implementation may be faster under some conditions
539 but may increase the binary size.
541 config SPL_USE_ARCH_MEMMOVE
542 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
543 default SPL_USE_ARCH_MEMCPY if ARM64
544 depends on SPL && ARM64
546 Enable the generation of an optimized version of memmove.
547 Such an implementation may be faster under some conditions
548 but may increase the binary size.
550 config TPL_USE_ARCH_MEMMOVE
551 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
552 default TPL_USE_ARCH_MEMCPY if ARM64
553 depends on TPL && ARM64
555 Enable the generation of an optimized version of memmove.
556 Such an implementation may be faster under some conditions
557 but may increase the binary size.
559 config USE_ARCH_MEMSET
560 bool "Use an assembly optimized implementation of memset"
562 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
564 Enable the generation of an optimized version of memset.
565 Such an implementation may be faster under some conditions
566 but may increase the binary size.
568 config SPL_USE_ARCH_MEMSET
569 bool "Use an assembly optimized implementation of memset for SPL"
570 default y if USE_ARCH_MEMSET
573 Enable the generation of an optimized version of memset.
574 Such an implementation may be faster under some conditions
575 but may increase the binary size.
577 config TPL_USE_ARCH_MEMSET
578 bool "Use an assembly optimized implementation of memset for TPL"
579 default y if USE_ARCH_MEMSET
582 Enable the generation of an optimized version of memset.
583 Such an implementation may be faster under some conditions
584 but may increase the binary size.
586 config ARM64_SUPPORT_AARCH32
587 bool "ARM64 system support AArch32 execution state"
589 default y if !TARGET_THUNDERX_88XX
591 This ARM64 system supports AArch32 execution state.
594 def_bool y if ARCH_EXYNOS || ARCH_S5PC1XX
597 prompt "Target select"
602 select GPIO_EXTRA_HEADER
603 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
604 select SPL_SEPARATE_BSS if SPL
609 select GPIO_EXTRA_HEADER
610 select SPL_DM_SPI if SPL
613 Support for TI's DaVinci platform.
616 bool "Marvell Kirkwood"
617 select ARCH_MISC_INIT
618 select BOARD_EARLY_INIT_F
620 select GPIO_EXTRA_HEADER
623 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
629 select GPIO_EXTRA_HEADER
630 select SPL_DM_SPI if SPL
631 select SPL_DM_SPI_FLASH if SPL
640 select GPIO_EXTRA_HEADER
641 select SPL_SEPARATE_BSS if SPL
643 config TARGET_STV0991
644 bool "Support stv0991"
650 select GPIO_EXTRA_HEADER
657 bool "Broadcom BCM283X family"
661 select GPIO_EXTRA_HEADER
664 select SERIAL_SEARCH_ALL
669 bool "Broadcom BCM63158 family"
675 bool "Broadcom BCM6753 family"
682 bool "Broadcom BCM68360 family"
688 bool "Broadcom BCM6858 family"
694 bool "Broadcom BCM7XXX family"
697 select GPIO_EXTRA_HEADER
700 imply OF_HAS_PRIOR_STAGE
702 This enables support for Broadcom ARM-based set-top box
703 chipsets, including the 7445 family of chips.
706 bool "Broadcom broadband chip family"
710 config TARGET_VEXPRESS_CA9X4
711 bool "Support vexpress_ca9x4"
715 config TARGET_BCMCYGNUS
716 bool "Support bcmcygnus"
718 select GPIO_EXTRA_HEADER
720 imply BCM_SF2_ETH_GMAC
728 bool "Support Broadcom Northstar2"
730 select GPIO_EXTRA_HEADER
732 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
733 ARMv8 Cortex-A57 processors targeting a broad range of networking
737 bool "Support Broadcom NS3"
739 select BOARD_LATE_INIT
741 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
742 ARMv8 Cortex-A72 processors targeting a broad range of networking
746 bool "Samsung EXYNOS"
756 select GPIO_EXTRA_HEADER
757 imply SYS_THUMB_BUILD
762 bool "Samsung S5PC1XX"
768 select GPIO_EXTRA_HEADER
772 bool "Calxeda Highbank"
783 imply OF_HAS_PRIOR_STAGE
785 config ARCH_INTEGRATOR
786 bool "ARM Ltd. Integrator family"
789 select GPIO_EXTRA_HEADER
794 bool "Qualcomm IPQ40xx SoCs"
800 select GPIO_EXTRA_HEADER
814 select SYS_ARCH_TIMER
815 select SYS_THUMB_BUILD
821 bool "Texas Instruments' K3 Architecture"
826 config ARCH_OMAP2PLUS
829 select GPIO_EXTRA_HEADER
830 select SPL_BOARD_INIT if SPL
831 select SPL_STACK_R if SPL
833 imply TI_SYSC if DM && OF_CONTROL
836 imply SPL_SEPARATE_BSS
840 select GPIO_EXTRA_HEADER
841 imply DISTRO_DEFAULTS
844 Support for the Meson SoC family developed by Amlogic Inc.,
845 targeted at media players and tablet computers. We currently
846 support the S905 (GXBaby) 64-bit SoC.
851 select GPIO_EXTRA_HEADER
854 select SPL_LIBCOMMON_SUPPORT if SPL
855 select SPL_LIBGENERIC_SUPPORT if SPL
856 select SPL_OF_CONTROL if SPL
859 Support for the MediaTek SoCs family developed by MediaTek Inc.
860 Please refer to doc/README.mediatek for more information.
863 bool "NXP LPC32xx platform"
868 select GPIO_EXTRA_HEADER
874 bool "NXP i.MX8 platform"
876 select SYS_FSL_HAS_SEC
877 select SYS_FSL_SEC_COMPAT_4
878 select SYS_FSL_SEC_LE
880 select GPIO_EXTRA_HEADER
883 select ENABLE_ARM_SOC_BOOT0_HOOK
887 bool "NXP i.MX8M platform"
889 select GPIO_EXTRA_HEADER
891 select SYS_FSL_HAS_SEC
892 select SYS_FSL_SEC_COMPAT_4
893 select SYS_FSL_SEC_LE
901 bool "NXP i.MX8ULP platform"
907 select GPIO_EXTRA_HEADER
912 bool "NXP i.MXRT platform"
916 select GPIO_EXTRA_HEADER
922 bool "NXP i.MX23 family"
924 select GPIO_EXTRA_HEADER
930 bool "NXP i.MX28 family"
932 select GPIO_EXTRA_HEADER
938 bool "NXP i.MX31 family"
940 select GPIO_EXTRA_HEADER
945 select BOARD_POSTCLK_INIT
947 select GPIO_EXTRA_HEADER
949 select SYS_FSL_HAS_SEC
950 select SYS_FSL_SEC_COMPAT_4
951 select SYS_FSL_SEC_LE
952 select ROM_UNIFIED_SECTIONS
954 imply SYS_THUMB_BUILD
958 select ARCH_MISC_INIT
960 select GPIO_EXTRA_HEADER
962 select SYS_FSL_HAS_SEC
963 select SYS_FSL_SEC_COMPAT_4
964 select SYS_FSL_SEC_LE
965 imply BOARD_EARLY_INIT_F
967 imply SYS_THUMB_BUILD
971 select BOARD_POSTCLK_INIT
973 select GPIO_EXTRA_HEADER
975 select SYS_FSL_HAS_SEC
976 select SYS_FSL_SEC_COMPAT_4
977 select SYS_FSL_SEC_LE
979 imply SYS_THUMB_BUILD
980 imply SPL_SEPARATE_BSS
984 select BOARD_EARLY_INIT_F
986 select GPIO_EXTRA_HEADER
991 bool "Nexell S5P4418/S5P6818 SoC"
992 select ENABLE_ARM_SOC_BOOT0_HOOK
994 select GPIO_EXTRA_HEADER
997 bool "Support Nuvoton SoCs"
1018 select LINUX_KERNEL_IMAGE_HEADER
1019 select OF_BOARD_SETUP
1022 select POSITION_INDEPENDENT
1028 select SYSRESET_WATCHDOG
1029 select SYSRESET_WATCHDOG_AUTO
1033 imply DISTRO_DEFAULTS
1034 imply OF_HAS_PRIOR_STAGE
1037 bool "Actions Semi OWL SoCs"
1041 select GPIO_EXTRA_HEADER
1046 select SYS_RELOC_GD_ENV_ADDR
1050 bool "QEMU Virtual Platform"
1059 imply OF_HAS_PRIOR_STAGE
1062 bool "Renesas ARM SoCs"
1065 select GPIO_EXTRA_HEADER
1066 imply BOARD_EARLY_INIT_F
1069 imply SYS_THUMB_BUILD
1070 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
1072 config ARCH_SNAPDRAGON
1073 bool "Qualcomm Snapdragon SoCs"
1078 select GPIO_EXTRA_HEADER
1087 bool "Altera SOCFPGA family"
1088 select ARCH_EARLY_INIT_R
1089 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
1090 select ARM64 if TARGET_SOCFPGA_SOC64
1091 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1095 select GPIO_EXTRA_HEADER
1096 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1098 select SPL_DM_RESET if DM_RESET
1099 select SPL_DM_SERIAL
1100 select SPL_LIBCOMMON_SUPPORT
1101 select SPL_LIBGENERIC_SUPPORT
1102 select SPL_OF_CONTROL
1103 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1109 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1111 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1112 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1122 imply SPL_DM_SPI_FLASH
1123 imply SPL_LIBDISK_SUPPORT
1125 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1126 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1127 imply SPL_SPI_FLASH_SUPPORT
1132 bool "Support sunxi (Allwinner) SoCs"
1135 select CMD_MMC if MMC
1136 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1141 select DM_I2C if I2C
1142 select DM_SPI if SPI
1143 select DM_SPI_FLASH if SPI
1145 select DM_MMC if MMC
1146 select DM_SCSI if SCSI
1148 select GPIO_EXTRA_HEADER
1149 select OF_BOARD_SETUP
1153 select SPECIFY_CONSOLE_INDEX
1154 select SPL_SEPARATE_BSS if SPL
1155 select SPL_STACK_R if SPL
1156 select SPL_SYS_MALLOC_SIMPLE if SPL
1157 select SPL_SYS_THUMB_BUILD if !ARM64
1160 select SYS_THUMB_BUILD if !ARM64
1161 select USB if DISTRO_DEFAULTS
1162 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1163 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1164 select SPL_USE_TINY_PRINTF
1166 select SYS_RELOC_GD_ENV_ADDR
1167 imply BOARD_LATE_INIT
1170 imply CMD_UBI if MTD_RAW_NAND
1171 imply DISTRO_DEFAULTS
1174 imply OF_LIBFDT_OVERLAY
1175 imply PRE_CONSOLE_BUFFER
1177 imply SPL_LIBCOMMON_SUPPORT
1178 imply SPL_LIBGENERIC_SUPPORT
1179 imply SPL_MMC if MMC
1183 imply SYSRESET_WATCHDOG
1184 imply SYSRESET_WATCHDOG_AUTO
1189 bool "ST-Ericsson U8500 Series"
1193 select DM_MMC if MMC
1195 select DM_USB_GADGET if DM_USB
1199 imply AB8500_USB_PHY
1200 imply ARM_PL180_MMCI
1205 imply NOMADIK_MTU_TIMER
1210 imply SYS_THUMB_BUILD
1211 imply SYSRESET_SYSCON
1214 bool "Support Xilinx Versal Platform"
1218 select DM_ETH if NET
1219 select DM_MMC if MMC
1224 imply BOARD_LATE_INIT
1225 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1228 bool "Freescale Vybrid"
1230 select GPIO_EXTRA_HEADER
1232 select SYS_FSL_ERRATUM_ESDHC111
1237 bool "Xilinx Zynq based platform"
1241 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1243 select DM_ETH if NET
1244 select DM_MMC if MMC
1250 select SPL_BOARD_INIT if SPL
1251 select SPL_CLK if SPL
1252 select SPL_DM if SPL
1253 select SPL_DM_SPI if SPL
1254 select SPL_DM_SPI_FLASH if SPL
1255 select SPL_OF_CONTROL if SPL
1256 select SPL_SEPARATE_BSS if SPL
1258 imply ARCH_EARLY_INIT_R
1259 imply BOARD_LATE_INIT
1263 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1266 config ARCH_ZYNQMP_R5
1267 bool "Xilinx ZynqMP R5 based platform"
1271 select DM_ETH if NET
1272 select DM_MMC if MMC
1279 bool "Xilinx ZynqMP based platform"
1283 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1284 select DM_ETH if NET
1286 select DM_MMC if MMC
1288 select DM_SPI if SPI
1289 select DM_SPI_FLASH if DM_SPI
1293 select SPL_BOARD_INIT if SPL
1294 select SPL_CLK if SPL
1295 select SPL_DM if SPL
1296 select SPL_DM_SPI if SPI && SPL_DM
1297 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1298 select SPL_DM_MAILBOX if SPL
1299 imply SPL_FIRMWARE if SPL
1300 select SPL_SEPARATE_BSS if SPL
1304 imply BOARD_LATE_INIT
1306 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1310 imply ZYNQMP_GPIO_MODEPIN if DM_GPIO && USB
1314 select GPIO_EXTRA_HEADER
1315 imply DISTRO_DEFAULTS
1318 config ARCH_VEXPRESS64
1319 bool "Support ARMv8 Arm Ltd. VExpress based boards and models"
1327 select MTD_NOR_FLASH if MTD
1328 select FLASH_CFI_DRIVER if MTD
1329 select ENV_IS_IN_FLASH if MTD
1330 imply DISTRO_DEFAULTS
1332 config TARGET_CORSTONE1000
1333 bool "Support Corstone1000 Platform"
1338 config TARGET_TOTAL_COMPUTE
1339 bool "Support Total Compute Platform"
1347 config TARGET_LS2080A_EMU
1348 bool "Support ls2080a_emu"
1351 select ARMV8_MULTIENTRY
1352 select FSL_DDR_SYNC_REFRESH
1353 select GPIO_EXTRA_HEADER
1355 Support for Freescale LS2080A_EMU platform.
1356 The LS2080A Development System (EMULATOR) is a pre-silicon
1357 development platform that supports the QorIQ LS2080A
1358 Layerscape Architecture processor.
1360 config TARGET_LS1088AQDS
1361 bool "Support ls1088aqds"
1364 select ARMV8_MULTIENTRY
1365 select ARCH_SUPPORT_TFABOOT
1366 select BOARD_LATE_INIT
1367 select GPIO_EXTRA_HEADER
1369 select FSL_DDR_INTERACTIVE if !SD_BOOT
1371 Support for NXP LS1088AQDS platform.
1372 The LS1088A Development System (QDS) is a high-performance
1373 development platform that supports the QorIQ LS1088A
1374 Layerscape Architecture processor.
1376 config TARGET_LS2080AQDS
1377 bool "Support ls2080aqds"
1380 select ARMV8_MULTIENTRY
1381 select ARCH_SUPPORT_TFABOOT
1382 select BOARD_LATE_INIT
1383 select GPIO_EXTRA_HEADER
1388 select FSL_DDR_INTERACTIVE if !SPL
1390 Support for Freescale LS2080AQDS platform.
1391 The LS2080A Development System (QDS) is a high-performance
1392 development platform that supports the QorIQ LS2080A
1393 Layerscape Architecture processor.
1395 config TARGET_LS2080ARDB
1396 bool "Support ls2080ardb"
1399 select ARMV8_MULTIENTRY
1400 select ARCH_SUPPORT_TFABOOT
1401 select BOARD_LATE_INIT
1404 select FSL_DDR_INTERACTIVE if !SPL
1405 select GPIO_EXTRA_HEADER
1409 Support for Freescale LS2080ARDB platform.
1410 The LS2080A Reference design board (RDB) is a high-performance
1411 development platform that supports the QorIQ LS2080A
1412 Layerscape Architecture processor.
1414 config TARGET_LS2081ARDB
1415 bool "Support ls2081ardb"
1418 select ARMV8_MULTIENTRY
1419 select BOARD_LATE_INIT
1420 select GPIO_EXTRA_HEADER
1423 Support for Freescale LS2081ARDB platform.
1424 The LS2081A Reference design board (RDB) is a high-performance
1425 development platform that supports the QorIQ LS2081A/LS2041A
1426 Layerscape Architecture processor.
1428 config TARGET_LX2160ARDB
1429 bool "Support lx2160ardb"
1432 select ARMV8_MULTIENTRY
1433 select ARCH_SUPPORT_TFABOOT
1434 select BOARD_LATE_INIT
1435 select GPIO_EXTRA_HEADER
1437 Support for NXP LX2160ARDB platform.
1438 The lx2160ardb (LX2160A Reference design board (RDB)
1439 is a high-performance development platform that supports the
1440 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1442 config TARGET_LX2160AQDS
1443 bool "Support lx2160aqds"
1446 select ARMV8_MULTIENTRY
1447 select ARCH_SUPPORT_TFABOOT
1448 select BOARD_LATE_INIT
1449 select GPIO_EXTRA_HEADER
1451 Support for NXP LX2160AQDS platform.
1452 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1453 is a high-performance development platform that supports the
1454 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1456 config TARGET_LX2162AQDS
1457 bool "Support lx2162aqds"
1459 select ARCH_MISC_INIT
1461 select ARMV8_MULTIENTRY
1462 select ARCH_SUPPORT_TFABOOT
1463 select BOARD_LATE_INIT
1464 select GPIO_EXTRA_HEADER
1466 Support for NXP LX2162AQDS platform.
1467 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1470 bool "Support HiKey 96boards Consumer Edition Platform"
1475 select GPIO_EXTRA_HEADER
1478 select SPECIFY_CONSOLE_INDEX
1481 Support for HiKey 96boards platform. It features a HI6220
1482 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1484 config TARGET_HIKEY960
1485 bool "Support HiKey960 96boards Consumer Edition Platform"
1489 select GPIO_EXTRA_HEADER
1494 Support for HiKey960 96boards platform. It features a HI3660
1495 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1497 config TARGET_POPLAR
1498 bool "Support Poplar 96boards Enterprise Edition Platform"
1502 select GPIO_EXTRA_HEADER
1507 Support for Poplar 96boards EE platform. It features a HI3798cv200
1508 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1509 making it capable of running any commercial set-top solution based on
1512 config TARGET_LS1012AQDS
1513 bool "Support ls1012aqds"
1516 select ARCH_SUPPORT_TFABOOT
1517 select BOARD_LATE_INIT
1518 select GPIO_EXTRA_HEADER
1520 Support for Freescale LS1012AQDS platform.
1521 The LS1012A Development System (QDS) is a high-performance
1522 development platform that supports the QorIQ LS1012A
1523 Layerscape Architecture processor.
1525 config TARGET_LS1012ARDB
1526 bool "Support ls1012ardb"
1529 select ARCH_SUPPORT_TFABOOT
1530 select BOARD_LATE_INIT
1531 select GPIO_EXTRA_HEADER
1535 Support for Freescale LS1012ARDB platform.
1536 The LS1012A Reference design board (RDB) is a high-performance
1537 development platform that supports the QorIQ LS1012A
1538 Layerscape Architecture processor.
1540 config TARGET_LS1012A2G5RDB
1541 bool "Support ls1012a2g5rdb"
1544 select ARCH_SUPPORT_TFABOOT
1545 select BOARD_LATE_INIT
1546 select GPIO_EXTRA_HEADER
1549 Support for Freescale LS1012A2G5RDB platform.
1550 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1551 development platform that supports the QorIQ LS1012A
1552 Layerscape Architecture processor.
1554 config TARGET_LS1012AFRWY
1555 bool "Support ls1012afrwy"
1558 select ARCH_SUPPORT_TFABOOT
1559 select BOARD_LATE_INIT
1560 select GPIO_EXTRA_HEADER
1564 Support for Freescale LS1012AFRWY platform.
1565 The LS1012A FRWY board (FRWY) is a high-performance
1566 development platform that supports the QorIQ LS1012A
1567 Layerscape Architecture processor.
1569 config TARGET_LS1012AFRDM
1570 bool "Support ls1012afrdm"
1573 select ARCH_SUPPORT_TFABOOT
1574 select GPIO_EXTRA_HEADER
1576 Support for Freescale LS1012AFRDM platform.
1577 The LS1012A Freedom board (FRDM) is a high-performance
1578 development platform that supports the QorIQ LS1012A
1579 Layerscape Architecture processor.
1581 config TARGET_LS1028AQDS
1582 bool "Support ls1028aqds"
1585 select ARMV8_MULTIENTRY
1586 select ARCH_SUPPORT_TFABOOT
1587 select BOARD_LATE_INIT
1588 select GPIO_EXTRA_HEADER
1590 Support for Freescale LS1028AQDS platform
1591 The LS1028A Development System (QDS) is a high-performance
1592 development platform that supports the QorIQ LS1028A
1593 Layerscape Architecture processor.
1595 config TARGET_LS1028ARDB
1596 bool "Support ls1028ardb"
1599 select ARMV8_MULTIENTRY
1600 select ARCH_SUPPORT_TFABOOT
1601 select BOARD_LATE_INIT
1602 select GPIO_EXTRA_HEADER
1604 Support for Freescale LS1028ARDB platform
1605 The LS1028A Development System (RDB) is a high-performance
1606 development platform that supports the QorIQ LS1028A
1607 Layerscape Architecture processor.
1609 config TARGET_LS1088ARDB
1610 bool "Support ls1088ardb"
1613 select ARMV8_MULTIENTRY
1614 select ARCH_SUPPORT_TFABOOT
1615 select BOARD_LATE_INIT
1617 select FSL_DDR_INTERACTIVE if !SD_BOOT
1618 select GPIO_EXTRA_HEADER
1620 Support for NXP LS1088ARDB platform.
1621 The LS1088A Reference design board (RDB) is a high-performance
1622 development platform that supports the QorIQ LS1088A
1623 Layerscape Architecture processor.
1625 config TARGET_LS1021AQDS
1626 bool "Support ls1021aqds"
1628 select ARCH_SUPPORT_PSCI
1629 select BOARD_EARLY_INIT_F
1630 select BOARD_LATE_INIT
1632 select CPU_V7_HAS_NONSEC
1633 select CPU_V7_HAS_VIRT
1634 select LS1_DEEP_SLEEP
1637 select FSL_DDR_INTERACTIVE
1638 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1639 select GPIO_EXTRA_HEADER
1640 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1643 config TARGET_LS1021ATWR
1644 bool "Support ls1021atwr"
1646 select ARCH_SUPPORT_PSCI
1647 select BOARD_EARLY_INIT_F
1648 select BOARD_LATE_INIT
1650 select CPU_V7_HAS_NONSEC
1651 select CPU_V7_HAS_VIRT
1652 select LS1_DEEP_SLEEP
1654 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1655 select GPIO_EXTRA_HEADER
1658 config TARGET_PG_WCOM_SELI8
1659 bool "Support Hitachi-Powergrids SELI8 service unit card"
1661 select ARCH_SUPPORT_PSCI
1662 select BOARD_EARLY_INIT_F
1663 select BOARD_LATE_INIT
1665 select CPU_V7_HAS_NONSEC
1666 select CPU_V7_HAS_VIRT
1668 select FSL_DDR_INTERACTIVE
1669 select GPIO_EXTRA_HEADER
1673 Support for Hitachi-Powergrids SELI8 service unit card.
1674 SELI8 is a QorIQ LS1021a based service unit card used
1675 in XMC20 and FOX615 product families.
1677 config TARGET_PG_WCOM_EXPU1
1678 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1680 select ARCH_SUPPORT_PSCI
1681 select BOARD_EARLY_INIT_F
1682 select BOARD_LATE_INIT
1684 select CPU_V7_HAS_NONSEC
1685 select CPU_V7_HAS_VIRT
1687 select FSL_DDR_INTERACTIVE
1691 Support for Hitachi-Powergrids EXPU1 service unit card.
1692 EXPU1 is a QorIQ LS1021a based service unit card used
1693 in XMC20 and FOX615 product families.
1695 config TARGET_LS1021ATSN
1696 bool "Support ls1021atsn"
1698 select ARCH_SUPPORT_PSCI
1699 select BOARD_EARLY_INIT_F
1700 select BOARD_LATE_INIT
1702 select CPU_V7_HAS_NONSEC
1703 select CPU_V7_HAS_VIRT
1704 select LS1_DEEP_SLEEP
1706 select GPIO_EXTRA_HEADER
1709 config TARGET_LS1021AIOT
1710 bool "Support ls1021aiot"
1712 select ARCH_SUPPORT_PSCI
1713 select BOARD_LATE_INIT
1715 select CPU_V7_HAS_NONSEC
1716 select CPU_V7_HAS_VIRT
1718 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1719 select GPIO_EXTRA_HEADER
1722 Support for Freescale LS1021AIOT platform.
1723 The LS1021A Freescale board (IOT) is a high-performance
1724 development platform that supports the QorIQ LS1021A
1725 Layerscape Architecture processor.
1727 config TARGET_LS1043AQDS
1728 bool "Support ls1043aqds"
1731 select ARMV8_MULTIENTRY
1732 select ARCH_SUPPORT_TFABOOT
1733 select BOARD_EARLY_INIT_F
1734 select BOARD_LATE_INIT
1736 select FSL_DDR_INTERACTIVE if !SPL
1737 select FSL_DSPI if !SPL_NO_DSPI
1738 select DM_SPI_FLASH if FSL_DSPI
1739 select GPIO_EXTRA_HEADER
1743 Support for Freescale LS1043AQDS platform.
1745 config TARGET_LS1043ARDB
1746 bool "Support ls1043ardb"
1749 select ARMV8_MULTIENTRY
1750 select ARCH_SUPPORT_TFABOOT
1751 select BOARD_EARLY_INIT_F
1752 select BOARD_LATE_INIT
1754 select FSL_DSPI if !SPL_NO_DSPI
1755 select DM_SPI_FLASH if FSL_DSPI
1756 select GPIO_EXTRA_HEADER
1758 Support for Freescale LS1043ARDB platform.
1760 config TARGET_LS1046AQDS
1761 bool "Support ls1046aqds"
1764 select ARMV8_MULTIENTRY
1765 select ARCH_SUPPORT_TFABOOT
1766 select BOARD_EARLY_INIT_F
1767 select BOARD_LATE_INIT
1768 select DM_SPI_FLASH if DM_SPI
1770 select FSL_DDR_BIST if !SPL
1771 select FSL_DDR_INTERACTIVE if !SPL
1772 select FSL_DDR_INTERACTIVE if !SPL
1773 select GPIO_EXTRA_HEADER
1776 Support for Freescale LS1046AQDS platform.
1777 The LS1046A Development System (QDS) is a high-performance
1778 development platform that supports the QorIQ LS1046A
1779 Layerscape Architecture processor.
1781 config TARGET_LS1046ARDB
1782 bool "Support ls1046ardb"
1785 select ARMV8_MULTIENTRY
1786 select ARCH_SUPPORT_TFABOOT
1787 select BOARD_EARLY_INIT_F
1788 select BOARD_LATE_INIT
1789 select DM_SPI_FLASH if DM_SPI
1790 select POWER_MC34VR500
1793 select FSL_DDR_INTERACTIVE if !SPL
1794 select GPIO_EXTRA_HEADER
1797 Support for Freescale LS1046ARDB platform.
1798 The LS1046A Reference Design Board (RDB) is a high-performance
1799 development platform that supports the QorIQ LS1046A
1800 Layerscape Architecture processor.
1802 config TARGET_LS1046AFRWY
1803 bool "Support ls1046afrwy"
1806 select ARMV8_MULTIENTRY
1807 select ARCH_SUPPORT_TFABOOT
1808 select BOARD_EARLY_INIT_F
1809 select BOARD_LATE_INIT
1810 select DM_SPI_FLASH if DM_SPI
1811 select GPIO_EXTRA_HEADER
1814 Support for Freescale LS1046AFRWY platform.
1815 The LS1046A Freeway Board (FRWY) is a high-performance
1816 development platform that supports the QorIQ LS1046A
1817 Layerscape Architecture processor.
1823 select ARMV8_MULTIENTRY
1839 select GPIO_EXTRA_HEADER
1840 select SPL_DM if SPL
1841 select SPL_DM_SPI if SPL
1842 select SPL_DM_SPI_FLASH if SPL
1843 select SPL_DM_I2C if SPL
1844 select SPL_DM_MMC if SPL
1845 select SPL_DM_SERIAL if SPL
1847 Support for Kontron SMARC-sAL28 board.
1850 bool "Support ten64"
1852 select ARCH_MISC_INIT
1854 select ARMV8_MULTIENTRY
1855 select ARCH_SUPPORT_TFABOOT
1856 select BOARD_LATE_INIT
1858 select FSL_DDR_INTERACTIVE if !SD_BOOT
1859 select GPIO_EXTRA_HEADER
1861 Support for Traverse Technologies Ten64 board, based
1864 config ARCH_UNIPHIER
1865 bool "Socionext UniPhier SoCs"
1866 select BOARD_LATE_INIT
1875 select OF_BOARD_SETUP
1879 select SPL_BOARD_INIT if SPL
1880 select SPL_DM if SPL
1881 select SPL_LIBCOMMON_SUPPORT if SPL
1882 select SPL_LIBGENERIC_SUPPORT if SPL
1883 select SPL_OF_CONTROL if SPL
1884 select SPL_PINCTRL if SPL
1887 imply DISTRO_DEFAULTS
1890 Support for UniPhier SoC family developed by Socionext Inc.
1891 (formerly, System LSI Business Division of Panasonic Corporation)
1893 config ARCH_SYNQUACER
1894 bool "Socionext SynQuacer SoCs"
1900 select SYSRESET_PSCI
1903 Support for SynQuacer SoC family developed by Socionext Inc.
1904 This SoC is used on 96boards EE DeveloperBox.
1907 bool "Support STMicroelectronics STM32 MCU with cortex M"
1914 bool "Support STMicroelectronics SoCs"
1923 Support for STMicroelectronics STiH407/10 SoC family.
1924 This SoC is used on Linaro 96Board STiH410-B2260
1927 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1928 select ARCH_MISC_INIT
1929 select ARCH_SUPPORT_TFABOOT
1930 select BOARD_LATE_INIT
1939 select OF_SYSTEM_SETUP
1944 select SYS_THUMB_BUILD
1948 imply OF_LIBFDT_OVERLAY
1949 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1953 Support for STM32MP SoC family developed by STMicroelectronics,
1954 MPUs based on ARM cortex A core
1955 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1956 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1958 SPL is the unsecure FSBL for the basic boot chain.
1960 config ARCH_ROCKCHIP
1961 bool "Support Rockchip SoCs"
1963 select BINMAN if SPL_OPTEE || (SPL && !ARM64)
1973 select ENABLE_ARM_SOC_BOOT0_HOOK
1976 select SPL_DM if SPL
1977 select SPL_DM_SPI if SPL
1978 select SPL_DM_SPI_FLASH if SPL
1980 select SYS_THUMB_BUILD if !ARM64
1983 imply DEBUG_UART_BOARD_INIT
1984 imply DISTRO_DEFAULTS
1986 imply SARADC_ROCKCHIP
1988 imply SPL_SYS_MALLOC_SIMPLE
1991 imply USB_FUNCTION_FASTBOOT
1993 config ARCH_OCTEONTX
1994 bool "Support OcteonTX SoCs"
1997 select GPIO_EXTRA_HEADER
2001 select BOARD_LATE_INIT
2002 select SYS_CACHE_SHIFT_7
2003 select SYS_PCI_64BIT if PCI
2004 imply OF_HAS_PRIOR_STAGE
2006 config ARCH_OCTEONTX2
2007 bool "Support OcteonTX2 SoCs"
2010 select GPIO_EXTRA_HEADER
2014 select BOARD_LATE_INIT
2015 select SYS_CACHE_SHIFT_7
2016 select SYS_PCI_64BIT if PCI
2017 imply OF_HAS_PRIOR_STAGE
2019 config TARGET_THUNDERX_88XX
2020 bool "Support ThunderX 88xx"
2022 select GPIO_EXTRA_HEADER
2025 select SYS_CACHE_SHIFT_7
2028 bool "Support Aspeed SoCs"
2033 config TARGET_DURIAN
2034 bool "Support Phytium Durian Platform"
2036 select GPIO_EXTRA_HEADER
2038 Support for durian platform.
2039 It has 2GB Sdram, uart and pcie.
2041 config TARGET_POMELO
2042 bool "Support Phytium Pomelo Platform"
2054 select DM_ETH if NET
2057 Support for pomelo platform.
2058 It has 8GB Sdram, uart and pcie.
2060 config TARGET_PRESIDIO_ASIC
2061 bool "Support Cortina Presidio ASIC Platform"
2065 config TARGET_XENGUEST_ARM64
2066 bool "Xen guest ARM64"
2070 select LINUX_KERNEL_IMAGE_HEADER
2073 imply OF_HAS_PRIOR_STAGE
2076 bool "Support HPE GXP SoCs"
2083 config SUPPORT_PASSING_ATAGS
2084 bool "Support pre-devicetree ATAG-based booting"
2086 imply SETUP_MEMORY_TAGS
2088 Support for booting older Linux kernels, using ATAGs rather than
2089 passing a devicetree. This is option is rarely used, and the
2090 semantics are defined at
2091 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
2093 config SETUP_MEMORY_TAGS
2094 bool "Pass memory size information via ATAG"
2095 depends on SUPPORT_PASSING_ATAGS
2098 bool "Pass Linux kernel cmdline via ATAG"
2099 depends on SUPPORT_PASSING_ATAGS
2102 bool "Pass initrd starting point and size via ATAG"
2103 depends on SUPPORT_PASSING_ATAGS
2106 bool "Pass system revision via ATAG"
2107 depends on SUPPORT_PASSING_ATAGS
2110 bool "Pass system serial number via ATAG"
2111 depends on SUPPORT_PASSING_ATAGS
2113 config STATIC_MACH_TYPE
2114 bool "Statically define the Machine ID number"
2116 When booting via ATAGs, enable this option if we know the correct
2117 machine ID number to use at compile time. Some systems will be
2118 passed the number dynamically by whatever loads U-Boot.
2121 int "Machine ID number"
2122 depends on STATIC_MACH_TYPE
2124 When booting via ATAGs, the machine type must be passed as a number.
2125 For the full list see https://www.arm.linux.org.uk/developer/machines
2127 config ARCH_SUPPORT_TFABOOT
2131 bool "Support for booting from TF-A"
2132 depends on ARCH_SUPPORT_TFABOOT
2134 Some platforms support the setup of secure registers (for instance
2135 for CPU errata handling) or provide secure services like PSCI.
2136 Those services could also be provided by other firmware parts
2137 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
2138 does not need to (and cannot) execute this code.
2139 Enabling this option will make a U-Boot binary that is relying
2140 on other firmware layers to provide secure functionality.
2142 config TI_SECURE_DEVICE
2143 bool "HS Device Type Support"
2144 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2146 If a high secure (HS) device type is being used, this config
2147 must be set. This option impacts various aspects of the
2148 build system (to create signed boot images that can be
2149 authenticated) and the code. See the doc/README.ti-secure
2150 file for further details.
2152 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
2153 config ISW_ENTRY_ADDR
2154 hex "Address in memory or XIP address of bootloader entry point"
2155 default 0x402F4000 if AM43XX
2156 default 0x402F0400 if AM33XX
2157 default 0x40301350 if OMAP54XX
2159 After any reset, the boot ROM searches the boot media for a valid
2160 boot image. For non-XIP devices, the ROM then copies the image into
2161 internal memory. For all boot modes, after the ROM processes the
2162 boot image it eventually computes the entry point address depending
2163 on the device type (secure/non-secure), boot media (xip/non-xip) and
2167 config SYS_KWD_CONFIG
2168 string "kwbimage config file path"
2169 depends on ARCH_KIRKWOOD || ARCH_MVEBU
2170 default "arch/arm/mach-mvebu/kwbimage.cfg"
2172 Path within the source directory to the kwbimage.cfg file to use
2173 when packaging the U-Boot image for use.
2175 source "arch/arm/mach-apple/Kconfig"
2177 source "arch/arm/mach-aspeed/Kconfig"
2179 source "arch/arm/mach-at91/Kconfig"
2181 source "arch/arm/mach-bcm283x/Kconfig"
2183 source "arch/arm/mach-bcmbca/Kconfig"
2185 source "arch/arm/mach-bcmstb/Kconfig"
2187 source "arch/arm/mach-davinci/Kconfig"
2189 source "arch/arm/mach-exynos/Kconfig"
2191 source "arch/arm/mach-hpe/gxp/Kconfig"
2193 source "arch/arm/mach-highbank/Kconfig"
2195 source "arch/arm/mach-integrator/Kconfig"
2197 source "arch/arm/mach-ipq40xx/Kconfig"
2199 source "arch/arm/mach-k3/Kconfig"
2201 source "arch/arm/mach-keystone/Kconfig"
2203 source "arch/arm/mach-kirkwood/Kconfig"
2205 source "arch/arm/mach-lpc32xx/Kconfig"
2207 source "arch/arm/mach-mvebu/Kconfig"
2209 source "arch/arm/mach-octeontx/Kconfig"
2211 source "arch/arm/mach-octeontx2/Kconfig"
2213 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2215 source "arch/arm/mach-imx/mx3/Kconfig"
2217 source "arch/arm/mach-imx/mx5/Kconfig"
2219 source "arch/arm/mach-imx/mx6/Kconfig"
2221 source "arch/arm/mach-imx/mx7/Kconfig"
2223 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2225 source "arch/arm/mach-imx/imx8/Kconfig"
2227 source "arch/arm/mach-imx/imx8m/Kconfig"
2229 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2231 source "arch/arm/mach-imx/imxrt/Kconfig"
2233 source "arch/arm/mach-imx/mxs/Kconfig"
2235 source "arch/arm/mach-omap2/Kconfig"
2237 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2239 source "arch/arm/mach-orion5x/Kconfig"
2241 source "arch/arm/mach-owl/Kconfig"
2243 source "arch/arm/mach-rmobile/Kconfig"
2245 source "arch/arm/mach-meson/Kconfig"
2247 source "arch/arm/mach-mediatek/Kconfig"
2249 source "arch/arm/mach-qemu/Kconfig"
2251 source "arch/arm/mach-rockchip/Kconfig"
2253 source "arch/arm/mach-s5pc1xx/Kconfig"
2255 source "arch/arm/mach-snapdragon/Kconfig"
2257 source "arch/arm/mach-socfpga/Kconfig"
2259 source "arch/arm/mach-sti/Kconfig"
2261 source "arch/arm/mach-stm32/Kconfig"
2263 source "arch/arm/mach-stm32mp/Kconfig"
2265 source "arch/arm/mach-sunxi/Kconfig"
2267 source "arch/arm/mach-tegra/Kconfig"
2269 source "arch/arm/mach-u8500/Kconfig"
2271 source "arch/arm/mach-uniphier/Kconfig"
2273 source "arch/arm/cpu/armv7/vf610/Kconfig"
2275 source "arch/arm/mach-zynq/Kconfig"
2277 source "arch/arm/mach-zynqmp/Kconfig"
2279 source "arch/arm/mach-versal/Kconfig"
2281 source "arch/arm/mach-zynqmp-r5/Kconfig"
2283 source "arch/arm/cpu/armv7/Kconfig"
2285 source "arch/arm/cpu/armv8/Kconfig"
2287 source "arch/arm/mach-imx/Kconfig"
2289 source "arch/arm/mach-nexell/Kconfig"
2291 source "arch/arm/mach-npcm/Kconfig"
2293 source "board/armltd/total_compute/Kconfig"
2294 source "board/armltd/corstone1000/Kconfig"
2295 source "board/bosch/shc/Kconfig"
2296 source "board/bosch/guardian/Kconfig"
2297 source "board/Marvell/octeontx/Kconfig"
2298 source "board/Marvell/octeontx2/Kconfig"
2299 source "board/armltd/vexpress/Kconfig"
2300 source "board/armltd/vexpress64/Kconfig"
2301 source "board/cortina/presidio-asic/Kconfig"
2302 source "board/broadcom/bcm963158/Kconfig"
2303 source "board/broadcom/bcm96753ref/Kconfig"
2304 source "board/broadcom/bcm968360bg/Kconfig"
2305 source "board/broadcom/bcm968580xref/Kconfig"
2306 source "board/broadcom/bcmns3/Kconfig"
2307 source "board/cavium/thunderx/Kconfig"
2308 source "board/eets/pdu001/Kconfig"
2309 source "board/emulation/qemu-arm/Kconfig"
2310 source "board/freescale/ls2080aqds/Kconfig"
2311 source "board/freescale/ls2080ardb/Kconfig"
2312 source "board/freescale/ls1088a/Kconfig"
2313 source "board/freescale/ls1028a/Kconfig"
2314 source "board/freescale/ls1021aqds/Kconfig"
2315 source "board/freescale/ls1043aqds/Kconfig"
2316 source "board/freescale/ls1021atwr/Kconfig"
2317 source "board/freescale/ls1021atsn/Kconfig"
2318 source "board/freescale/ls1021aiot/Kconfig"
2319 source "board/freescale/ls1046aqds/Kconfig"
2320 source "board/freescale/ls1043ardb/Kconfig"
2321 source "board/freescale/ls1046ardb/Kconfig"
2322 source "board/freescale/ls1046afrwy/Kconfig"
2323 source "board/freescale/ls1012aqds/Kconfig"
2324 source "board/freescale/ls1012ardb/Kconfig"
2325 source "board/freescale/ls1012afrdm/Kconfig"
2326 source "board/freescale/lx2160a/Kconfig"
2327 source "board/grinn/chiliboard/Kconfig"
2328 source "board/hisilicon/hikey/Kconfig"
2329 source "board/hisilicon/hikey960/Kconfig"
2330 source "board/hisilicon/poplar/Kconfig"
2331 source "board/isee/igep003x/Kconfig"
2332 source "board/kontron/sl28/Kconfig"
2333 source "board/myir/mys_6ulx/Kconfig"
2334 source "board/siemens/common/Kconfig"
2335 source "board/seeed/npi_imx6ull/Kconfig"
2336 source "board/socionext/developerbox/Kconfig"
2337 source "board/st/stv0991/Kconfig"
2338 source "board/tcl/sl50/Kconfig"
2339 source "board/traverse/ten64/Kconfig"
2340 source "board/variscite/dart_6ul/Kconfig"
2341 source "board/vscom/baltos/Kconfig"
2342 source "board/phytium/durian/Kconfig"
2343 source "board/phytium/pomelo/Kconfig"
2344 source "board/xen/xenguest_arm64/Kconfig"
2346 source "arch/arm/Kconfig.debug"