1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
11 imply SPL_SEPARATE_BSS
14 bool "Enable support for CRC32 instruction"
18 ARMv8 implements dedicated crc32 instruction for crc32 calculation.
19 This is faster than software crc32 calculation. This instruction may
20 not be present on all ARMv8.0, but is always present on ARMv8.1 and
23 config COUNTER_FREQUENCY
24 int "Timer clock frequency"
25 depends on ARM64 || CPU_V7A
26 default 8000000 if IMX8 || MX7 || MX6UL || MX6ULL
27 default 24000000 if ARCH_SUNXI || ARCH_EXYNOS || ROCKCHIP_RK3128 || \
28 ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036
29 default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A
30 default 100000000 if ARCH_ZYNQMP
33 For platforms with ARMv8-A and ARMv7-A which features a system
34 counter, those platforms needs software to program the counter
35 frequency. Setup time clock frequency for certain platform.
36 0 means no need to configure the system counter frequency.
37 For platforms needs the frequency set in U-Boot with a
38 pre-defined value, should have the macro defined as a non-zero value.
40 config POSITION_INDEPENDENT
41 bool "Generate position-independent pre-relocation code"
42 depends on ARM64 || CPU_V7A
44 U-Boot expects to be linked to a specific hard-coded address, and to
45 be loaded to and run from that address. This option lifts that
46 restriction, thus allowing the code to be loaded to and executed from
47 almost any 4K aligned address. This logic relies on the relocation
48 information that is embedded in the binary to support U-Boot
49 relocating itself to the top-of-RAM later during execution.
51 config INIT_SP_RELATIVE
52 bool "Specify the early stack pointer relative to the .bss section"
54 default n if ARCH_QEMU
55 default y if POSITION_INDEPENDENT
57 U-Boot typically uses a hard-coded value for the stack pointer
58 before relocation. Enable this option to instead calculate the
59 initial SP at run-time. This is useful to avoid hard-coding addresses
60 into U-Boot, so that it can be loaded and executed at arbitrary
61 addresses and thus avoid using arbitrary addresses at runtime.
63 If this option is enabled, the early stack pointer is set to
64 &_bss_start with a offset value added. The offset is specified by
65 SYS_INIT_SP_BSS_OFFSET.
67 config SYS_INIT_SP_BSS_OFFSET
68 int "Early stack offset from the .bss base address"
70 depends on INIT_SP_RELATIVE
73 This option's value is the offset added to &_bss_start in order to
74 calculate the stack pointer. This offset should be large enough so
75 that the early malloc region, global data (gd), and early stack usage
76 do not overlap any appended DTB.
78 config SPL_SYS_NO_VECTOR_TABLE
82 config LINUX_KERNEL_IMAGE_HEADER
86 Place a Linux kernel image header at the start of the U-Boot binary.
87 The format of the header is described in the Linux kernel source at
88 Documentation/arm64/booting.txt. This feature is useful since the
89 image header reports the amount of memory (BSS and similar) that
90 U-Boot needs to use, but which isn't part of the binary.
92 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
93 depends on LINUX_KERNEL_IMAGE_HEADER
96 The value subtracted from CONFIG_TEXT_BASE to calculate the
97 TEXT_OFFSET value written to the Linux kernel image header.
109 ARM GICV3 Interrupt translation service (ITS).
110 Basic support for programming locality specific peripheral
111 interrupts (LPI) configuration tables and enable LPI tables.
112 LPI configuration table can be used by u-boot or Linux.
113 ARM GICV3 has limitation, once the LPI table is enabled, LPI
114 configuration table can not be re-programmed, unless GICV3 reset.
120 config DMA_ADDR_T_64BIT
130 config GPIO_EXTRA_HEADER
133 # Used for compatibility with asm files copied from the kernel
134 config ARM_ASM_UNIFIED
138 # Used for compatibility with asm files copied from the kernel
142 config SYS_ICACHE_OFF
143 bool "Do not enable icache"
145 Do not enable instruction cache in U-Boot.
147 config SPL_SYS_ICACHE_OFF
148 bool "Do not enable icache in SPL"
150 default SYS_ICACHE_OFF
152 Do not enable instruction cache in SPL.
154 config SYS_DCACHE_OFF
155 bool "Do not enable dcache"
157 Do not enable data cache in U-Boot.
159 config SPL_SYS_DCACHE_OFF
160 bool "Do not enable dcache in SPL"
162 default SYS_DCACHE_OFF
164 Do not enable data cache in SPL.
166 config SYS_ARM_CACHE_CP15
167 bool "CP15 based cache enabling support"
169 Select this if your processor suports enabling caches by using
173 bool "MMU-based Paged Memory Management Support"
174 select SYS_ARM_CACHE_CP15
176 Select if you want MMU-based virtualised addressing space
177 support via paged memory management.
180 bool 'Use the ARM v7 PMSA Compliant MPU'
182 Some ARM systems without an MMU have instead a Memory Protection
183 Unit (MPU) that defines the type and permissions for regions of
185 If your CPU has an MPU then you should choose 'y' here unless you
186 know that you do not want to use the MPU.
188 # If set, the workarounds for these ARM errata are applied early during U-Boot
189 # startup. Note that in general these options force the workarounds to be
190 # applied; no CPU-type/version detection exists, unlike the similar options in
191 # the Linux kernel. Do not set these options unless they apply! Also note that
192 # the following can be machine-specific errata. These do have ability to
193 # provide rudimentary version and machine-specific checks, but expect no
195 # CONFIG_ARM_ERRATA_430973
196 # CONFIG_ARM_ERRATA_454179
197 # CONFIG_ARM_ERRATA_621766
198 # CONFIG_ARM_ERRATA_798870
199 # CONFIG_ARM_ERRATA_801819
200 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
201 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
203 config ARM_ERRATA_430973
206 config ARM_ERRATA_454179
209 config ARM_ERRATA_621766
212 config ARM_ERRATA_716044
215 config ARM_ERRATA_725233
218 config ARM_ERRATA_742230
221 config ARM_ERRATA_743622
224 config ARM_ERRATA_751472
227 config ARM_ERRATA_761320
230 config ARM_ERRATA_773022
233 config ARM_ERRATA_774769
236 config ARM_ERRATA_794072
239 config ARM_ERRATA_798870
242 config ARM_ERRATA_801819
245 config ARM_ERRATA_826974
248 config ARM_ERRATA_828024
251 config ARM_ERRATA_829520
254 config ARM_ERRATA_833069
257 config ARM_ERRATA_833471
260 config ARM_ERRATA_845369
263 config ARM_ERRATA_852421
266 config ARM_ERRATA_852423
269 config ARM_ERRATA_855873
272 config ARM_CORTEX_A8_CVE_2017_5715
275 config ARM_CORTEX_A15_CVE_2017_5715
280 select SYS_CACHE_SHIFT_5
285 select SYS_CACHE_SHIFT_5
290 select SYS_CACHE_SHIFT_5
292 imply SPL_SEPARATE_BSS
296 select SYS_CACHE_SHIFT_5
301 select SYS_CACHE_SHIFT_5
303 imply SPL_SEPARATE_BSS
308 select SYS_CACHE_SHIFT_5
315 select SYS_CACHE_SHIFT_6
322 select SYS_CACHE_SHIFT_5
323 select SYS_THUMB_BUILD
329 select SYS_ARM_CACHE_CP15
331 select SYS_CACHE_SHIFT_6
334 default "arm720t" if CPU_ARM720T
335 default "arm920t" if CPU_ARM920T
336 default "arm926ejs" if CPU_ARM926EJS
337 default "arm946es" if CPU_ARM946ES
338 default "arm1136" if CPU_ARM1136
339 default "arm1176" if CPU_ARM1176
340 default "armv7" if CPU_V7A
341 default "armv7" if CPU_V7R
342 default "armv7m" if CPU_V7M
343 default "armv8" if ARM64
347 default 4 if CPU_ARM720T
348 default 4 if CPU_ARM920T
349 default 5 if CPU_ARM926EJS
350 default 5 if CPU_ARM946ES
351 default 6 if CPU_ARM1136
352 default 6 if CPU_ARM1176
359 prompt "Select the ARM data write cache policy"
360 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || RZA1
361 default SYS_ARM_CACHE_WRITEBACK
363 config SYS_ARM_CACHE_WRITEBACK
364 bool "Write-back (WB)"
366 A write updates the cache only and marks the cache line as dirty.
367 External memory is updated only when the line is evicted or explicitly
370 config SYS_ARM_CACHE_WRITETHROUGH
371 bool "Write-through (WT)"
373 A write updates both the cache and the external memory system.
374 This does not mark the cache line as dirty.
376 config SYS_ARM_CACHE_WRITEALLOC
377 bool "Write allocation (WA)"
379 A cache line is allocated on a write miss. This means that executing a
380 store instruction on the processor might cause a burst read to occur.
381 There is a linefill to obtain the data for the cache line, before the
385 config ARCH_VERY_EARLY_INIT
388 config SPL_ARCH_VERY_EARLY_INIT
392 bool "Enable ARCH_CPU_INIT"
394 Some architectures require a call to arch_cpu_init().
395 Say Y here to enable it
397 config SYS_ARCH_TIMER
398 bool "ARM Generic Timer support"
399 depends on CPU_V7A || ARM64
402 The ARM Generic Timer (aka arch-timer) provides an architected
403 interface to a timer source on an SoC.
404 It is mandatory for ARMv8 implementation and widely available
408 bool "Support for ARM SMC Calling Convention (SMCCC)"
409 depends on CPU_V7A || ARM64
412 Say Y here if you want to enable ARM SMC Calling Convention.
413 This should be enabled if U-Boot needs to communicate with system
414 firmware (for example, PSCI) according to SMCCC.
416 config SYS_THUMB_BUILD
417 bool "Build U-Boot using the Thumb instruction set"
420 Use this flag to build U-Boot using the Thumb instruction set for
421 ARM architectures. Thumb instruction set provides better code
422 density. For ARM architectures that support Thumb2 this flag will
423 result in Thumb2 code generated by GCC.
425 config SPL_SYS_THUMB_BUILD
426 bool "Build SPL using the Thumb instruction set"
427 default y if SYS_THUMB_BUILD
428 depends on !ARM64 && SPL
430 Use this flag to build SPL using the Thumb instruction set for
431 ARM architectures. Thumb instruction set provides better code
432 density. For ARM architectures that support Thumb2 this flag will
433 result in Thumb2 code generated by GCC.
435 config TPL_SYS_THUMB_BUILD
436 bool "Build TPL using the Thumb instruction set"
437 default y if SYS_THUMB_BUILD
438 depends on TPL && !ARM64
440 Use this flag to build TPL using the Thumb instruction set for
441 ARM architectures. Thumb instruction set provides better code
442 density. For ARM architectures that support Thumb2 this flag will
443 result in Thumb2 code generated by GCC.
446 bool "ARM PL310 L2 cache controller"
448 Enable support for ARM PL310 L2 cache controller in U-Boot
450 config SPL_SYS_L2_PL310
451 bool "ARM PL310 L2 cache controller in SPL"
453 Enable support for ARM PL310 L2 cache controller in SPL
455 config SYS_L2CACHE_OFF
458 If SoC does not support L2CACHE or one does not want to enable
459 L2CACHE, choose this option.
461 config ENABLE_ARM_SOC_BOOT0_HOOK
462 bool "prepare BOOT0 header"
464 If the SoC's BOOT0 requires a header area filled with (magic)
465 values, then choose this option, and create a file included as
466 <asm/arch/boot0.h> which contains the required assembler code.
468 config USE_ARCH_MEMCPY
469 bool "Use an assembly optimized implementation of memcpy"
471 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
473 Enable the generation of an optimized version of memcpy.
474 Such an implementation may be faster under some conditions
475 but may increase the binary size.
477 config SPL_USE_ARCH_MEMCPY
478 bool "Use an assembly optimized implementation of memcpy for SPL"
479 default y if USE_ARCH_MEMCPY
482 Enable the generation of an optimized version of memcpy.
483 Such an implementation may be faster under some conditions
484 but may increase the binary size.
486 config TPL_USE_ARCH_MEMCPY
487 bool "Use an assembly optimized implementation of memcpy for TPL"
488 default y if USE_ARCH_MEMCPY
491 Enable the generation of an optimized version of memcpy.
492 Such an implementation may be faster under some conditions
493 but may increase the binary size.
495 config USE_ARCH_MEMMOVE
496 bool "Use an assembly optimized implementation of memmove" if !ARM64
497 default USE_ARCH_MEMCPY if ARM64
500 Enable the generation of an optimized version of memmove.
501 Such an implementation may be faster under some conditions
502 but may increase the binary size.
504 config SPL_USE_ARCH_MEMMOVE
505 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
506 default SPL_USE_ARCH_MEMCPY if ARM64
507 depends on SPL && ARM64
509 Enable the generation of an optimized version of memmove.
510 Such an implementation may be faster under some conditions
511 but may increase the binary size.
513 config TPL_USE_ARCH_MEMMOVE
514 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
515 default TPL_USE_ARCH_MEMCPY if ARM64
516 depends on TPL && ARM64
518 Enable the generation of an optimized version of memmove.
519 Such an implementation may be faster under some conditions
520 but may increase the binary size.
522 config USE_ARCH_MEMSET
523 bool "Use an assembly optimized implementation of memset"
525 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
527 Enable the generation of an optimized version of memset.
528 Such an implementation may be faster under some conditions
529 but may increase the binary size.
531 config SPL_USE_ARCH_MEMSET
532 bool "Use an assembly optimized implementation of memset for SPL"
533 default y if USE_ARCH_MEMSET
536 Enable the generation of an optimized version of memset.
537 Such an implementation may be faster under some conditions
538 but may increase the binary size.
540 config TPL_USE_ARCH_MEMSET
541 bool "Use an assembly optimized implementation of memset for TPL"
542 default y if USE_ARCH_MEMSET
545 Enable the generation of an optimized version of memset.
546 Such an implementation may be faster under some conditions
547 but may increase the binary size.
549 config ARM64_SUPPORT_AARCH32
550 bool "ARM64 system support AArch32 execution state"
552 default y if !TARGET_THUNDERX_88XX
554 This ARM64 system supports AArch32 execution state.
560 def_bool y if ARCH_EXYNOS || ARCH_S5PC1XX
563 prompt "Target select"
568 select GPIO_EXTRA_HEADER
569 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
570 select SPL_SEPARATE_BSS if SPL
575 select GPIO_EXTRA_HEADER
576 select SPL_DM_SPI if SPL
579 Support for TI's DaVinci platform.
582 bool "Marvell Kirkwood"
583 select ARCH_MISC_INIT
584 select BOARD_EARLY_INIT_F
586 select GPIO_EXTRA_HEADER
590 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
595 select GPIO_EXTRA_HEADER
596 select SPL_DM_SPI if SPL
597 select SPL_DM_SPI_FLASH if SPL
598 select SPL_TIMER if SPL
599 select TIMER if !ARM64
608 select GPIO_EXTRA_HEADER
609 select SPL_SEPARATE_BSS if SPL
612 config TARGET_STV0991
613 bool "Support stv0991"
619 select GPIO_EXTRA_HEADER
626 bool "Broadcom BCM283X family"
630 select GPIO_EXTRA_HEADER
633 select SERIAL_SEARCH_ALL
638 bool "Broadcom BCM7XXX family"
641 select GPIO_EXTRA_HEADER
644 imply OF_HAS_PRIOR_STAGE
646 This enables support for Broadcom ARM-based set-top box
647 chipsets, including the 7445 family of chips.
650 bool "Broadcom broadband chip family"
655 config TARGET_VEXPRESS_CA9X4
656 bool "Support vexpress_ca9x4"
660 config TARGET_BCMCYGNUS
661 bool "Support bcmcygnus"
663 select GPIO_EXTRA_HEADER
666 imply BCM_SF2_ETH_GMAC
674 bool "Support Broadcom Northstar2"
676 select GPIO_EXTRA_HEADER
678 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
679 ARMv8 Cortex-A57 processors targeting a broad range of networking
683 bool "Support Broadcom NS3"
685 select BOARD_LATE_INIT
687 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
688 ARMv8 Cortex-A72 processors targeting a broad range of networking
692 bool "Samsung EXYNOS"
701 select GPIO_EXTRA_HEADER
702 imply SYS_THUMB_BUILD
707 bool "Samsung S5PC1XX"
713 select GPIO_EXTRA_HEADER
717 bool "Calxeda Highbank"
729 imply OF_HAS_PRIOR_STAGE
731 config ARCH_INTEGRATOR
732 bool "ARM Ltd. Integrator family"
735 select GPIO_EXTRA_HEADER
740 bool "Qualcomm IPQ40xx SoCs"
746 select GPIO_EXTRA_HEADER
760 select SYS_ARCH_TIMER
761 select SYS_THUMB_BUILD
767 bool "Texas Instruments' K3 Architecture"
772 config ARCH_OMAP2PLUS
775 select GPIO_EXTRA_HEADER
776 select SPL_BOARD_INIT if SPL
777 select SPL_STACK_R if SPL
779 imply TI_SYSC if DM && OF_CONTROL
781 imply SPL_SEPARATE_BSS
785 select GPIO_EXTRA_HEADER
786 imply DISTRO_DEFAULTS
789 Support for the Meson SoC family developed by Amlogic Inc.,
790 targeted at media players and tablet computers. We currently
791 support the S905 (GXBaby) 64-bit SoC.
796 select GPIO_EXTRA_HEADER
799 select SPL_LIBCOMMON_SUPPORT if SPL
800 select SPL_LIBGENERIC_SUPPORT if SPL
801 select SPL_OF_CONTROL if SPL
804 Support for the MediaTek SoCs family developed by MediaTek Inc.
805 Please refer to doc/README.mediatek for more information.
808 bool "NXP LPC32xx platform"
813 select GPIO_EXTRA_HEADER
819 bool "NXP i.MX8 platform"
821 select SYS_FSL_HAS_SEC
822 select SYS_FSL_SEC_COMPAT_4
823 select SYS_FSL_SEC_LE
826 select GPIO_EXTRA_HEADER
829 select ENABLE_ARM_SOC_BOOT0_HOOK
832 bool "NXP i.MX8M platform"
834 select GPIO_EXTRA_HEADER
836 select SYS_FSL_HAS_SEC
837 select SYS_FSL_SEC_COMPAT_4
838 select SYS_FSL_SEC_LE
841 select DM_EVENT if CLK
846 bool "NXP i.MX8ULP platform"
853 select GPIO_EXTRA_HEADER
859 bool "NXP i.MX9 platform"
865 select GPIO_EXTRA_HEADER
871 bool "NXP i.MXRT platform"
875 select GPIO_EXTRA_HEADER
881 bool "NXP i.MX23 family"
883 select GPIO_EXTRA_HEADER
889 bool "NXP i.MX28 family"
891 select GPIO_EXTRA_HEADER
897 bool "NXP i.MX31 family"
899 select GPIO_EXTRA_HEADER
904 select BOARD_POSTCLK_INIT
906 select GPIO_EXTRA_HEADER
908 select SYS_FSL_HAS_SEC
909 select SYS_FSL_SEC_COMPAT_4
910 select SYS_FSL_SEC_LE
911 select ROM_UNIFIED_SECTIONS
913 imply SYS_THUMB_BUILD
917 select ARCH_MISC_INIT
919 select GPIO_EXTRA_HEADER
922 select SYS_FSL_HAS_SEC
923 select SYS_FSL_SEC_COMPAT_4
924 select SYS_FSL_SEC_LE
925 imply BOARD_EARLY_INIT_F
927 imply SYS_THUMB_BUILD
931 select BOARD_POSTCLK_INIT
933 select GPIO_EXTRA_HEADER
936 select SYS_FSL_HAS_SEC
937 select SYS_FSL_SEC_COMPAT_4
938 select SYS_FSL_SEC_LE
939 select SYS_L2_PL310 if !SYS_L2CACHE_OFF
941 imply SYS_THUMB_BUILD
942 imply SPL_SEPARATE_BSS
946 select BOARD_EARLY_INIT_F
948 select GPIO_EXTRA_HEADER
953 bool "Nexell S5P4418/S5P6818 SoC"
954 select ENABLE_ARM_SOC_BOOT0_HOOK
956 select GPIO_EXTRA_HEADER
959 bool "Support Nuvoton SoCs"
979 select LINUX_KERNEL_IMAGE_HEADER
980 select OF_BOARD_SETUP
983 select POSITION_INDEPENDENT
989 select SYSRESET_WATCHDOG
990 select SYSRESET_WATCHDOG_AUTO
994 imply DISTRO_DEFAULTS
995 imply OF_HAS_PRIOR_STAGE
998 bool "Actions Semi OWL SoCs"
1001 select GPIO_EXTRA_HEADER
1006 select SYS_RELOC_GD_ENV_ADDR
1010 bool "QEMU Virtual Platform"
1019 imply OF_HAS_PRIOR_STAGE
1022 bool "Renesas ARM SoCs"
1025 select GPIO_EXTRA_HEADER
1026 imply BOARD_EARLY_INIT_F
1029 imply SYS_THUMB_BUILD
1030 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
1032 config ARCH_SNAPDRAGON
1033 bool "Qualcomm Snapdragon SoCs"
1038 select GPIO_EXTRA_HEADER
1047 bool "Altera SOCFPGA family"
1048 select ARCH_EARLY_INIT_R
1049 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
1050 select ARM64 if TARGET_SOCFPGA_SOC64
1051 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1055 select GPIO_EXTRA_HEADER
1056 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1058 select SPL_DM_RESET if DM_RESET
1059 select SPL_DM_SERIAL
1060 select SPL_LIBCOMMON_SUPPORT
1061 select SPL_LIBGENERIC_SUPPORT
1062 select SPL_OF_CONTROL
1063 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1069 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1071 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1072 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1082 imply SPL_DM_SPI_FLASH
1083 imply SPL_LIBDISK_SUPPORT
1085 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1086 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1087 imply SPL_SPI_FLASH_SUPPORT
1092 bool "Support sunxi (Allwinner) SoCs"
1095 select CMD_MMC if MMC
1096 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1100 select DM_I2C if I2C
1101 select DM_SPI if SPI
1102 select DM_SPI_FLASH if SPI
1104 select DM_MMC if MMC
1105 select DM_SCSI if SCSI
1107 select GPIO_EXTRA_HEADER
1108 select OF_BOARD_SETUP
1112 select SPECIFY_CONSOLE_INDEX
1113 select SPL_SEPARATE_BSS if SPL
1114 select SPL_STACK_R if SPL
1115 select SPL_SYS_MALLOC_SIMPLE if SPL
1116 select SPL_SYS_THUMB_BUILD if !ARM64
1119 select SYS_THUMB_BUILD if !ARM64
1120 select USB if DISTRO_DEFAULTS
1121 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1122 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1123 select SPL_USE_TINY_PRINTF
1125 select SYS_RELOC_GD_ENV_ADDR
1126 imply BOARD_LATE_INIT
1129 imply CMD_UBI if MTD_RAW_NAND
1130 imply DISTRO_DEFAULTS
1133 imply OF_LIBFDT_OVERLAY
1134 imply PRE_CONSOLE_BUFFER
1136 imply SPL_LIBCOMMON_SUPPORT
1137 imply SPL_LIBGENERIC_SUPPORT
1138 imply SPL_MMC if MMC
1142 imply SYSRESET_WATCHDOG
1143 imply SYSRESET_WATCHDOG_AUTO
1148 bool "ST-Ericsson U8500 Series"
1152 select DM_MMC if MMC
1154 select DM_USB_GADGET if DM_USB
1158 imply AB8500_USB_PHY
1159 imply ARM_PL180_MMCI
1164 imply NOMADIK_MTU_TIMER
1169 imply SYS_THUMB_BUILD
1170 imply SYSRESET_SYSCON
1173 bool "Support Xilinx Versal Platform"
1177 select DM_MMC if MMC
1182 imply BOARD_LATE_INIT
1183 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1185 config ARCH_VERSAL_NET
1186 bool "Support Xilinx Versal NET Platform"
1190 select DM_MMC if MMC
1193 imply BOARD_LATE_INIT
1194 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1197 bool "Freescale Vybrid"
1199 select GPIO_EXTRA_HEADER
1200 select IOMUX_SHARE_CONF_REG
1202 select SYS_FSL_ERRATUM_ESDHC111
1207 bool "Xilinx Zynq based platform"
1208 select ARM_TWD_TIMER
1212 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1214 select DM_MMC if MMC
1220 select SPL_BOARD_INIT if SPL
1221 select SPL_CLK if SPL
1222 select SPL_DM if SPL
1223 select SPL_DM_SPI if SPL
1224 select SPL_DM_SPI_FLASH if SPL
1225 select SPL_OF_CONTROL if SPL
1226 select SPL_SEPARATE_BSS if SPL
1227 select SPL_TIMER if SPL
1230 imply ARCH_EARLY_INIT_R
1231 imply BOARD_LATE_INIT
1235 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1238 config ARCH_ZYNQMP_R5
1239 bool "Xilinx ZynqMP R5 based platform"
1243 select DM_MMC if MMC
1250 bool "Xilinx ZynqMP based platform"
1254 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1256 select DM_MMC if MMC
1258 select DM_SPI if SPI
1259 select DM_SPI_FLASH if DM_SPI
1263 select SPL_BOARD_INIT if SPL
1264 select SPL_CLK if SPL
1265 select SPL_DM if SPL
1266 select SPL_DM_SPI if SPI && SPL_DM
1267 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1268 select SPL_DM_MAILBOX if SPL
1269 imply SPL_FIRMWARE if SPL
1270 select SPL_SEPARATE_BSS if SPL
1272 imply ZYNQMP_IPI if DM_MAILBOX
1274 imply BOARD_LATE_INIT
1276 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1280 imply ZYNQMP_GPIO_MODEPIN if DM_GPIO && USB
1284 select GPIO_EXTRA_HEADER
1285 imply DISTRO_DEFAULTS
1288 config ARCH_VEXPRESS64
1289 bool "Support ARMv8 Arm Ltd. VExpress based boards and models"
1297 select MTD_NOR_FLASH if MTD
1298 select FLASH_CFI_DRIVER if MTD
1299 select ENV_IS_IN_FLASH if MTD
1300 imply DISTRO_DEFAULTS
1302 config TARGET_CORSTONE1000
1303 bool "Support Corstone1000 Platform"
1308 config TARGET_TOTAL_COMPUTE
1309 bool "Support Total Compute Platform"
1317 config TARGET_LS2080A_EMU
1318 bool "Support ls2080a_emu"
1321 select ARMV8_MULTIENTRY
1322 select FSL_DDR_SYNC_REFRESH
1323 select GPIO_EXTRA_HEADER
1325 Support for Freescale LS2080A_EMU platform.
1326 The LS2080A Development System (EMULATOR) is a pre-silicon
1327 development platform that supports the QorIQ LS2080A
1328 Layerscape Architecture processor.
1330 config TARGET_LS1088AQDS
1331 bool "Support ls1088aqds"
1334 select ARMV8_MULTIENTRY
1335 select ARCH_SUPPORT_TFABOOT
1336 select BOARD_LATE_INIT
1337 select GPIO_EXTRA_HEADER
1339 select FSL_DDR_INTERACTIVE if !SD_BOOT
1341 Support for NXP LS1088AQDS platform.
1342 The LS1088A Development System (QDS) is a high-performance
1343 development platform that supports the QorIQ LS1088A
1344 Layerscape Architecture processor.
1346 config TARGET_LS2080AQDS
1347 bool "Support ls2080aqds"
1350 select ARMV8_MULTIENTRY
1351 select ARCH_SUPPORT_TFABOOT
1352 select BOARD_LATE_INIT
1353 select GPIO_EXTRA_HEADER
1358 select FSL_DDR_INTERACTIVE if !SPL
1360 Support for Freescale LS2080AQDS platform.
1361 The LS2080A Development System (QDS) is a high-performance
1362 development platform that supports the QorIQ LS2080A
1363 Layerscape Architecture processor.
1365 config TARGET_LS2080ARDB
1366 bool "Support ls2080ardb"
1369 select ARMV8_MULTIENTRY
1370 select ARCH_SUPPORT_TFABOOT
1371 select BOARD_LATE_INIT
1374 select FSL_DDR_INTERACTIVE if !SPL
1375 select GPIO_EXTRA_HEADER
1379 Support for Freescale LS2080ARDB platform.
1380 The LS2080A Reference design board (RDB) is a high-performance
1381 development platform that supports the QorIQ LS2080A
1382 Layerscape Architecture processor.
1384 config TARGET_LS2081ARDB
1385 bool "Support ls2081ardb"
1388 select ARMV8_MULTIENTRY
1389 select BOARD_LATE_INIT
1390 select GPIO_EXTRA_HEADER
1393 Support for Freescale LS2081ARDB platform.
1394 The LS2081A Reference design board (RDB) is a high-performance
1395 development platform that supports the QorIQ LS2081A/LS2041A
1396 Layerscape Architecture processor.
1398 config TARGET_LX2160ARDB
1399 bool "Support lx2160ardb"
1402 select ARMV8_MULTIENTRY
1403 select ARCH_SUPPORT_TFABOOT
1404 select BOARD_LATE_INIT
1405 select GPIO_EXTRA_HEADER
1407 Support for NXP LX2160ARDB platform.
1408 The lx2160ardb (LX2160A Reference design board (RDB)
1409 is a high-performance development platform that supports the
1410 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1412 config TARGET_LX2160AQDS
1413 bool "Support lx2160aqds"
1416 select ARMV8_MULTIENTRY
1417 select ARCH_SUPPORT_TFABOOT
1418 select BOARD_LATE_INIT
1419 select GPIO_EXTRA_HEADER
1421 Support for NXP LX2160AQDS platform.
1422 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1423 is a high-performance development platform that supports the
1424 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1426 config TARGET_LX2162AQDS
1427 bool "Support lx2162aqds"
1429 select ARCH_MISC_INIT
1431 select ARMV8_MULTIENTRY
1432 select ARCH_SUPPORT_TFABOOT
1433 select BOARD_LATE_INIT
1434 select GPIO_EXTRA_HEADER
1436 Support for NXP LX2162AQDS platform.
1437 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1440 bool "Support HiKey 96boards Consumer Edition Platform"
1445 select GPIO_EXTRA_HEADER
1448 select SPECIFY_CONSOLE_INDEX
1451 Support for HiKey 96boards platform. It features a HI6220
1452 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1454 config TARGET_HIKEY960
1455 bool "Support HiKey960 96boards Consumer Edition Platform"
1459 select GPIO_EXTRA_HEADER
1464 Support for HiKey960 96boards platform. It features a HI3660
1465 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1467 config TARGET_POPLAR
1468 bool "Support Poplar 96boards Enterprise Edition Platform"
1472 select GPIO_EXTRA_HEADER
1477 Support for Poplar 96boards EE platform. It features a HI3798cv200
1478 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1479 making it capable of running any commercial set-top solution based on
1482 config TARGET_LS1012AQDS
1483 bool "Support ls1012aqds"
1486 select ARCH_SUPPORT_TFABOOT
1487 select BOARD_LATE_INIT
1488 select GPIO_EXTRA_HEADER
1490 Support for Freescale LS1012AQDS platform.
1491 The LS1012A Development System (QDS) is a high-performance
1492 development platform that supports the QorIQ LS1012A
1493 Layerscape Architecture processor.
1495 config TARGET_LS1012ARDB
1496 bool "Support ls1012ardb"
1499 select ARCH_SUPPORT_TFABOOT
1500 select BOARD_LATE_INIT
1501 select GPIO_EXTRA_HEADER
1505 Support for Freescale LS1012ARDB platform.
1506 The LS1012A Reference design board (RDB) is a high-performance
1507 development platform that supports the QorIQ LS1012A
1508 Layerscape Architecture processor.
1510 config TARGET_LS1012A2G5RDB
1511 bool "Support ls1012a2g5rdb"
1514 select ARCH_SUPPORT_TFABOOT
1515 select BOARD_LATE_INIT
1516 select GPIO_EXTRA_HEADER
1519 Support for Freescale LS1012A2G5RDB platform.
1520 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1521 development platform that supports the QorIQ LS1012A
1522 Layerscape Architecture processor.
1524 config TARGET_LS1012AFRWY
1525 bool "Support ls1012afrwy"
1528 select ARCH_SUPPORT_TFABOOT
1529 select BOARD_LATE_INIT
1530 select GPIO_EXTRA_HEADER
1534 Support for Freescale LS1012AFRWY platform.
1535 The LS1012A FRWY board (FRWY) is a high-performance
1536 development platform that supports the QorIQ LS1012A
1537 Layerscape Architecture processor.
1539 config TARGET_LS1012AFRDM
1540 bool "Support ls1012afrdm"
1543 select ARCH_SUPPORT_TFABOOT
1544 select GPIO_EXTRA_HEADER
1546 Support for Freescale LS1012AFRDM platform.
1547 The LS1012A Freedom board (FRDM) is a high-performance
1548 development platform that supports the QorIQ LS1012A
1549 Layerscape Architecture processor.
1551 config TARGET_LS1028AQDS
1552 bool "Support ls1028aqds"
1555 select ARMV8_MULTIENTRY
1556 select ARCH_SUPPORT_TFABOOT
1557 select BOARD_LATE_INIT
1558 select GPIO_EXTRA_HEADER
1560 Support for Freescale LS1028AQDS platform
1561 The LS1028A Development System (QDS) is a high-performance
1562 development platform that supports the QorIQ LS1028A
1563 Layerscape Architecture processor.
1565 config TARGET_LS1028ARDB
1566 bool "Support ls1028ardb"
1569 select ARMV8_MULTIENTRY
1570 select ARCH_SUPPORT_TFABOOT
1571 select BOARD_LATE_INIT
1572 select GPIO_EXTRA_HEADER
1574 Support for Freescale LS1028ARDB platform
1575 The LS1028A Development System (RDB) is a high-performance
1576 development platform that supports the QorIQ LS1028A
1577 Layerscape Architecture processor.
1579 config TARGET_LS1088ARDB
1580 bool "Support ls1088ardb"
1583 select ARMV8_MULTIENTRY
1584 select ARCH_SUPPORT_TFABOOT
1585 select BOARD_LATE_INIT
1587 select FSL_DDR_INTERACTIVE if !SD_BOOT
1588 select GPIO_EXTRA_HEADER
1590 Support for NXP LS1088ARDB platform.
1591 The LS1088A Reference design board (RDB) is a high-performance
1592 development platform that supports the QorIQ LS1088A
1593 Layerscape Architecture processor.
1595 config TARGET_LS1021AQDS
1596 bool "Support ls1021aqds"
1598 select ARCH_SUPPORT_PSCI
1599 select BOARD_EARLY_INIT_F
1600 select BOARD_LATE_INIT
1602 select CPU_V7_HAS_NONSEC
1603 select CPU_V7_HAS_VIRT
1604 select LS1_DEEP_SLEEP
1605 select PEN_ADDR_BIG_ENDIAN
1608 select FSL_DDR_INTERACTIVE
1609 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1610 select GPIO_EXTRA_HEADER
1611 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1614 config TARGET_LS1021ATWR
1615 bool "Support ls1021atwr"
1617 select ARCH_SUPPORT_PSCI
1618 select BOARD_EARLY_INIT_F
1619 select BOARD_LATE_INIT
1621 select CPU_V7_HAS_NONSEC
1622 select CPU_V7_HAS_VIRT
1623 select LS1_DEEP_SLEEP
1624 select PEN_ADDR_BIG_ENDIAN
1626 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1627 select GPIO_EXTRA_HEADER
1630 config TARGET_PG_WCOM_SELI8
1631 bool "Support Hitachi-Powergrids SELI8 service unit card"
1633 select ARCH_SUPPORT_PSCI
1634 select BOARD_EARLY_INIT_F
1635 select BOARD_LATE_INIT
1637 select CPU_V7_HAS_NONSEC
1638 select CPU_V7_HAS_VIRT
1640 select FSL_DDR_INTERACTIVE
1641 select GPIO_EXTRA_HEADER
1645 Support for Hitachi-Powergrids SELI8 service unit card.
1646 SELI8 is a QorIQ LS1021a based service unit card used
1647 in XMC20 and FOX615 product families.
1649 config TARGET_PG_WCOM_EXPU1
1650 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1652 select ARCH_SUPPORT_PSCI
1653 select BOARD_EARLY_INIT_F
1654 select BOARD_LATE_INIT
1656 select CPU_V7_HAS_NONSEC
1657 select CPU_V7_HAS_VIRT
1659 select FSL_DDR_INTERACTIVE
1663 Support for Hitachi-Powergrids EXPU1 service unit card.
1664 EXPU1 is a QorIQ LS1021a based service unit card used
1665 in XMC20 and FOX615 product families.
1667 config TARGET_LS1021ATSN
1668 bool "Support ls1021atsn"
1670 select ARCH_SUPPORT_PSCI
1671 select BOARD_EARLY_INIT_F
1672 select BOARD_LATE_INIT
1674 select CPU_V7_HAS_NONSEC
1675 select CPU_V7_HAS_VIRT
1676 select LS1_DEEP_SLEEP
1678 select GPIO_EXTRA_HEADER
1681 config TARGET_LS1021AIOT
1682 bool "Support ls1021aiot"
1684 select ARCH_SUPPORT_PSCI
1685 select BOARD_LATE_INIT
1687 select CPU_V7_HAS_NONSEC
1688 select CPU_V7_HAS_VIRT
1689 select PEN_ADDR_BIG_ENDIAN
1691 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1692 select GPIO_EXTRA_HEADER
1695 Support for Freescale LS1021AIOT platform.
1696 The LS1021A Freescale board (IOT) is a high-performance
1697 development platform that supports the QorIQ LS1021A
1698 Layerscape Architecture processor.
1700 config TARGET_LS1043AQDS
1701 bool "Support ls1043aqds"
1704 select ARMV8_MULTIENTRY
1705 select ARCH_SUPPORT_TFABOOT
1706 select BOARD_EARLY_INIT_F
1707 select BOARD_LATE_INIT
1709 select FSL_DDR_INTERACTIVE if !SPL
1710 select FSL_DSPI if !SPL_NO_DSPI
1711 select DM_SPI_FLASH if FSL_DSPI
1712 select GPIO_EXTRA_HEADER
1716 Support for Freescale LS1043AQDS platform.
1718 config TARGET_LS1043ARDB
1719 bool "Support ls1043ardb"
1722 select ARMV8_MULTIENTRY
1723 select ARCH_SUPPORT_TFABOOT
1724 select BOARD_EARLY_INIT_F
1725 select BOARD_LATE_INIT
1727 select FSL_DSPI if !SPL_NO_DSPI
1728 select DM_SPI_FLASH if FSL_DSPI
1729 select GPIO_EXTRA_HEADER
1731 Support for Freescale LS1043ARDB platform.
1733 config TARGET_LS1046AQDS
1734 bool "Support ls1046aqds"
1737 select ARMV8_MULTIENTRY
1738 select ARCH_SUPPORT_TFABOOT
1739 select BOARD_EARLY_INIT_F
1740 select BOARD_LATE_INIT
1741 select DM_SPI_FLASH if DM_SPI
1743 select FSL_DDR_BIST if !SPL
1744 select FSL_DDR_INTERACTIVE if !SPL
1745 select FSL_DDR_INTERACTIVE if !SPL
1746 select GPIO_EXTRA_HEADER
1749 Support for Freescale LS1046AQDS platform.
1750 The LS1046A Development System (QDS) is a high-performance
1751 development platform that supports the QorIQ LS1046A
1752 Layerscape Architecture processor.
1754 config TARGET_LS1046ARDB
1755 bool "Support ls1046ardb"
1758 select ARMV8_MULTIENTRY
1759 select ARCH_SUPPORT_TFABOOT
1760 select BOARD_EARLY_INIT_F
1761 select BOARD_LATE_INIT
1762 select DM_SPI_FLASH if DM_SPI
1763 select POWER_MC34VR500
1766 select FSL_DDR_INTERACTIVE if !SPL
1767 select GPIO_EXTRA_HEADER
1770 Support for Freescale LS1046ARDB platform.
1771 The LS1046A Reference Design Board (RDB) is a high-performance
1772 development platform that supports the QorIQ LS1046A
1773 Layerscape Architecture processor.
1775 config TARGET_LS1046AFRWY
1776 bool "Support ls1046afrwy"
1779 select ARMV8_MULTIENTRY
1780 select ARCH_SUPPORT_TFABOOT
1781 select BOARD_EARLY_INIT_F
1782 select BOARD_LATE_INIT
1783 select DM_SPI_FLASH if DM_SPI
1784 select GPIO_EXTRA_HEADER
1787 Support for Freescale LS1046AFRWY platform.
1788 The LS1046A Freeway Board (FRWY) is a high-performance
1789 development platform that supports the QorIQ LS1046A
1790 Layerscape Architecture processor.
1796 select ARMV8_MULTIENTRY
1811 select GPIO_EXTRA_HEADER
1812 select SPL_DM if SPL
1813 select SPL_DM_SPI if SPL
1814 select SPL_DM_SPI_FLASH if SPL
1815 select SPL_DM_I2C if SPL
1816 select SPL_DM_MMC if SPL
1817 select SPL_DM_SERIAL if SPL
1819 Support for Kontron SMARC-sAL28 board.
1822 bool "Support ten64"
1824 select ARCH_MISC_INIT
1826 select ARMV8_MULTIENTRY
1827 select ARCH_SUPPORT_TFABOOT
1828 select BOARD_LATE_INIT
1830 select FSL_DDR_INTERACTIVE if !SD_BOOT
1831 select GPIO_EXTRA_HEADER
1833 Support for Traverse Technologies Ten64 board, based
1836 config ARCH_UNIPHIER
1837 bool "Socionext UniPhier SoCs"
1838 select BOARD_LATE_INIT
1846 select OF_BOARD_SETUP
1850 select SPL_BOARD_INIT if SPL
1851 select SPL_DM if SPL
1852 select SPL_LIBCOMMON_SUPPORT if SPL
1853 select SPL_LIBGENERIC_SUPPORT if SPL
1854 select SPL_OF_CONTROL if SPL
1855 select SPL_PINCTRL if SPL
1858 imply DISTRO_DEFAULTS
1861 Support for UniPhier SoC family developed by Socionext Inc.
1862 (formerly, System LSI Business Division of Panasonic Corporation)
1864 config ARCH_SYNQUACER
1865 bool "Socionext SynQuacer SoCs"
1871 select SYSRESET_PSCI
1874 Support for SynQuacer SoC family developed by Socionext Inc.
1875 This SoC is used on 96boards EE DeveloperBox.
1878 bool "Support STMicroelectronics STM32 MCU with cortex M"
1885 bool "Support STMicroelectronics SoCs"
1894 Support for STMicroelectronics STiH407/10 SoC family.
1895 This SoC is used on Linaro 96Board STiH410-B2260
1898 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1899 select ARCH_MISC_INIT
1900 select ARCH_SUPPORT_TFABOOT
1901 select BOARD_LATE_INIT
1910 select OF_SYSTEM_SETUP
1915 select SYS_THUMB_BUILD
1919 imply OF_LIBFDT_OVERLAY
1920 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1924 Support for STM32MP SoC family developed by STMicroelectronics,
1925 MPUs based on ARM cortex A core
1926 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1927 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1929 SPL is the unsecure FSBL for the basic boot chain.
1931 config ARCH_ROCKCHIP
1932 bool "Support Rockchip SoCs"
1934 select BINMAN if SPL_OPTEE || SPL
1944 select ENABLE_ARM_SOC_BOOT0_HOOK
1947 select SPL_DM if SPL
1948 select SPL_DM_SPI if SPL
1949 select SPL_DM_SPI_FLASH if SPL
1951 select SYS_THUMB_BUILD if !ARM64
1954 imply DEBUG_UART_BOARD_INIT
1955 imply DISTRO_DEFAULTS
1957 imply SARADC_ROCKCHIP
1959 imply SPL_SYS_MALLOC_SIMPLE
1962 imply USB_FUNCTION_FASTBOOT
1964 config ARCH_OCTEONTX
1965 bool "Support OcteonTX SoCs"
1968 select GPIO_EXTRA_HEADER
1972 select BOARD_LATE_INIT
1973 select SYS_CACHE_SHIFT_7
1974 select SYS_PCI_64BIT if PCI
1975 imply OF_HAS_PRIOR_STAGE
1977 config ARCH_OCTEONTX2
1978 bool "Support OcteonTX2 SoCs"
1981 select GPIO_EXTRA_HEADER
1985 select BOARD_LATE_INIT
1986 select SYS_CACHE_SHIFT_7
1987 select SYS_PCI_64BIT if PCI
1988 imply OF_HAS_PRIOR_STAGE
1990 config TARGET_THUNDERX_88XX
1991 bool "Support ThunderX 88xx"
1993 select GPIO_EXTRA_HEADER
1996 select SYS_CACHE_SHIFT_7
1999 bool "Support Aspeed SoCs"
2004 config TARGET_DURIAN
2005 bool "Support Phytium Durian Platform"
2007 select GPIO_EXTRA_HEADER
2009 Support for durian platform.
2010 It has 2GB Sdram, uart and pcie.
2012 config TARGET_POMELO
2013 bool "Support Phytium Pomelo Platform"
2027 Support for pomelo platform.
2028 It has 8GB Sdram, uart and pcie.
2030 config TARGET_PRESIDIO_ASIC
2031 bool "Support Cortina Presidio ASIC Platform"
2035 config TARGET_XENGUEST_ARM64
2036 bool "Xen guest ARM64"
2040 select LINUX_KERNEL_IMAGE_HEADER
2043 imply OF_HAS_PRIOR_STAGE
2046 bool "Support HPE GXP SoCs"
2053 config SUPPORT_PASSING_ATAGS
2054 bool "Support pre-devicetree ATAG-based booting"
2056 imply SETUP_MEMORY_TAGS
2058 Support for booting older Linux kernels, using ATAGs rather than
2059 passing a devicetree. This is option is rarely used, and the
2060 semantics are defined at
2061 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
2063 config SETUP_MEMORY_TAGS
2064 bool "Pass memory size information via ATAG"
2065 depends on SUPPORT_PASSING_ATAGS
2068 bool "Pass Linux kernel cmdline via ATAG"
2069 depends on SUPPORT_PASSING_ATAGS
2072 bool "Pass initrd starting point and size via ATAG"
2073 depends on SUPPORT_PASSING_ATAGS
2076 bool "Pass system revision via ATAG"
2077 depends on SUPPORT_PASSING_ATAGS
2080 bool "Pass system serial number via ATAG"
2081 depends on SUPPORT_PASSING_ATAGS
2083 config STATIC_MACH_TYPE
2084 bool "Statically define the Machine ID number"
2085 default y if TARGET_DS109 || TARGET_NOKIA_RX51 || TARGET_DS414 || DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
2087 When booting via ATAGs, enable this option if we know the correct
2088 machine ID number to use at compile time. Some systems will be
2089 passed the number dynamically by whatever loads U-Boot.
2092 int "Machine ID number"
2093 depends on STATIC_MACH_TYPE
2094 default 527 if TARGET_DS109
2095 default 1955 if TARGET_NOKIA_RX51
2096 default 3036 if TARGET_DS414
2097 default 4283 if DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
2099 When booting via ATAGs, the machine type must be passed as a number.
2100 For the full list see https://www.arm.linux.org.uk/developer/machines
2102 config ARCH_SUPPORT_TFABOOT
2106 bool "Support for booting from TF-A"
2107 depends on ARCH_SUPPORT_TFABOOT
2109 Some platforms support the setup of secure registers (for instance
2110 for CPU errata handling) or provide secure services like PSCI.
2111 Those services could also be provided by other firmware parts
2112 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
2113 does not need to (and cannot) execute this code.
2114 Enabling this option will make a U-Boot binary that is relying
2115 on other firmware layers to provide secure functionality.
2117 config TI_SECURE_DEVICE
2118 bool "HS Device Type Support"
2119 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2121 If a high secure (HS) device type is being used, this config
2122 must be set. This option impacts various aspects of the
2123 build system (to create signed boot images that can be
2124 authenticated) and the code. See the doc/README.ti-secure
2125 file for further details.
2127 config SYS_KWD_CONFIG
2128 string "kwbimage config file path"
2129 depends on ARCH_KIRKWOOD || ARCH_MVEBU
2130 default "arch/arm/mach-mvebu/kwbimage.cfg"
2132 Path within the source directory to the kwbimage.cfg file to use
2133 when packaging the U-Boot image for use.
2135 source "arch/arm/mach-apple/Kconfig"
2137 source "arch/arm/mach-aspeed/Kconfig"
2139 source "arch/arm/mach-at91/Kconfig"
2141 source "arch/arm/mach-bcm283x/Kconfig"
2143 source "arch/arm/mach-bcmbca/Kconfig"
2145 source "arch/arm/mach-bcmstb/Kconfig"
2147 source "arch/arm/mach-davinci/Kconfig"
2149 source "arch/arm/mach-exynos/Kconfig"
2151 source "arch/arm/mach-hpe/gxp/Kconfig"
2153 source "arch/arm/mach-highbank/Kconfig"
2155 source "arch/arm/mach-integrator/Kconfig"
2157 source "arch/arm/mach-ipq40xx/Kconfig"
2159 source "arch/arm/mach-k3/Kconfig"
2161 source "arch/arm/mach-keystone/Kconfig"
2163 source "arch/arm/mach-kirkwood/Kconfig"
2165 source "arch/arm/mach-lpc32xx/Kconfig"
2167 source "arch/arm/mach-mvebu/Kconfig"
2169 source "arch/arm/mach-octeontx/Kconfig"
2171 source "arch/arm/mach-octeontx2/Kconfig"
2173 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2175 source "arch/arm/mach-imx/mx3/Kconfig"
2177 source "arch/arm/mach-imx/mx5/Kconfig"
2179 source "arch/arm/mach-imx/mx6/Kconfig"
2181 source "arch/arm/mach-imx/mx7/Kconfig"
2183 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2185 source "arch/arm/mach-imx/imx8/Kconfig"
2187 source "arch/arm/mach-imx/imx8m/Kconfig"
2189 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2191 source "arch/arm/mach-imx/imx9/Kconfig"
2193 source "arch/arm/mach-imx/imxrt/Kconfig"
2195 source "arch/arm/mach-imx/mxs/Kconfig"
2197 source "arch/arm/mach-omap2/Kconfig"
2199 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2201 source "arch/arm/mach-orion5x/Kconfig"
2203 source "arch/arm/mach-owl/Kconfig"
2205 source "arch/arm/mach-rmobile/Kconfig"
2207 source "arch/arm/mach-meson/Kconfig"
2209 source "arch/arm/mach-mediatek/Kconfig"
2211 source "arch/arm/mach-qemu/Kconfig"
2213 source "arch/arm/mach-rockchip/Kconfig"
2215 source "arch/arm/mach-s5pc1xx/Kconfig"
2217 source "arch/arm/mach-snapdragon/Kconfig"
2219 source "arch/arm/mach-socfpga/Kconfig"
2221 source "arch/arm/mach-sti/Kconfig"
2223 source "arch/arm/mach-stm32/Kconfig"
2225 source "arch/arm/mach-stm32mp/Kconfig"
2227 source "arch/arm/mach-sunxi/Kconfig"
2229 source "arch/arm/mach-tegra/Kconfig"
2231 source "arch/arm/mach-u8500/Kconfig"
2233 source "arch/arm/mach-uniphier/Kconfig"
2235 source "arch/arm/cpu/armv7/vf610/Kconfig"
2237 source "arch/arm/mach-zynq/Kconfig"
2239 source "arch/arm/mach-zynqmp/Kconfig"
2241 source "arch/arm/mach-versal/Kconfig"
2243 source "arch/arm/mach-versal-net/Kconfig"
2245 source "arch/arm/mach-zynqmp-r5/Kconfig"
2247 source "arch/arm/cpu/armv7/Kconfig"
2249 source "arch/arm/cpu/armv8/Kconfig"
2251 source "arch/arm/mach-imx/Kconfig"
2253 source "arch/arm/mach-nexell/Kconfig"
2255 source "arch/arm/mach-npcm/Kconfig"
2257 source "board/armltd/total_compute/Kconfig"
2258 source "board/armltd/corstone1000/Kconfig"
2259 source "board/bosch/shc/Kconfig"
2260 source "board/bosch/guardian/Kconfig"
2261 source "board/Marvell/octeontx/Kconfig"
2262 source "board/Marvell/octeontx2/Kconfig"
2263 source "board/armltd/vexpress/Kconfig"
2264 source "board/armltd/vexpress64/Kconfig"
2265 source "board/cortina/presidio-asic/Kconfig"
2266 source "board/broadcom/bcmns3/Kconfig"
2267 source "board/cavium/thunderx/Kconfig"
2268 source "board/eets/pdu001/Kconfig"
2269 source "board/emulation/qemu-arm/Kconfig"
2270 source "board/freescale/ls2080aqds/Kconfig"
2271 source "board/freescale/ls2080ardb/Kconfig"
2272 source "board/freescale/ls1088a/Kconfig"
2273 source "board/freescale/ls1028a/Kconfig"
2274 source "board/freescale/ls1021aqds/Kconfig"
2275 source "board/freescale/ls1043aqds/Kconfig"
2276 source "board/freescale/ls1021atwr/Kconfig"
2277 source "board/freescale/ls1021atsn/Kconfig"
2278 source "board/freescale/ls1021aiot/Kconfig"
2279 source "board/freescale/ls1046aqds/Kconfig"
2280 source "board/freescale/ls1043ardb/Kconfig"
2281 source "board/freescale/ls1046ardb/Kconfig"
2282 source "board/freescale/ls1046afrwy/Kconfig"
2283 source "board/freescale/ls1012aqds/Kconfig"
2284 source "board/freescale/ls1012ardb/Kconfig"
2285 source "board/freescale/ls1012afrdm/Kconfig"
2286 source "board/freescale/lx2160a/Kconfig"
2287 source "board/grinn/chiliboard/Kconfig"
2288 source "board/hisilicon/hikey/Kconfig"
2289 source "board/hisilicon/hikey960/Kconfig"
2290 source "board/hisilicon/poplar/Kconfig"
2291 source "board/isee/igep003x/Kconfig"
2292 source "board/kontron/sl28/Kconfig"
2293 source "board/myir/mys_6ulx/Kconfig"
2294 source "board/samsung/common/Kconfig"
2295 source "board/siemens/common/Kconfig"
2296 source "board/seeed/npi_imx6ull/Kconfig"
2297 source "board/socionext/developerbox/Kconfig"
2298 source "board/st/stv0991/Kconfig"
2299 source "board/tcl/sl50/Kconfig"
2300 source "board/traverse/ten64/Kconfig"
2301 source "board/variscite/dart_6ul/Kconfig"
2302 source "board/vscom/baltos/Kconfig"
2303 source "board/phytium/durian/Kconfig"
2304 source "board/phytium/pomelo/Kconfig"
2305 source "board/xen/xenguest_arm64/Kconfig"
2307 source "arch/arm/Kconfig.debug"