1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 bool "Enable support for CRC32 instruction"
17 ARMv8 implements dedicated crc32 instruction for crc32 calculation.
18 This is faster than software crc32 calculation. This instruction may
19 not be present on all ARMv8.0, but is always present on ARMv8.1 and
22 config POSITION_INDEPENDENT
23 bool "Generate position-independent pre-relocation code"
24 depends on ARM64 || CPU_V7A
26 U-Boot expects to be linked to a specific hard-coded address, and to
27 be loaded to and run from that address. This option lifts that
28 restriction, thus allowing the code to be loaded to and executed from
29 almost any 4K aligned address. This logic relies on the relocation
30 information that is embedded in the binary to support U-Boot
31 relocating itself to the top-of-RAM later during execution.
33 config INIT_SP_RELATIVE
34 bool "Specify the early stack pointer relative to the .bss section"
36 default n if ARCH_QEMU
37 default y if POSITION_INDEPENDENT
39 U-Boot typically uses a hard-coded value for the stack pointer
40 before relocation. Enable this option to instead calculate the
41 initial SP at run-time. This is useful to avoid hard-coding addresses
42 into U-Boot, so that it can be loaded and executed at arbitrary
43 addresses and thus avoid using arbitrary addresses at runtime.
45 If this option is enabled, the early stack pointer is set to
46 &_bss_start with a offset value added. The offset is specified by
47 SYS_INIT_SP_BSS_OFFSET.
49 config SYS_INIT_SP_BSS_OFFSET
50 int "Early stack offset from the .bss base address"
52 depends on INIT_SP_RELATIVE
55 This option's value is the offset added to &_bss_start in order to
56 calculate the stack pointer. This offset should be large enough so
57 that the early malloc region, global data (gd), and early stack usage
58 do not overlap any appended DTB.
60 config LINUX_KERNEL_IMAGE_HEADER
64 Place a Linux kernel image header at the start of the U-Boot binary.
65 The format of the header is described in the Linux kernel source at
66 Documentation/arm64/booting.txt. This feature is useful since the
67 image header reports the amount of memory (BSS and similar) that
68 U-Boot needs to use, but which isn't part of the binary.
70 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
71 depends on LINUX_KERNEL_IMAGE_HEADER
74 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
75 TEXT_OFFSET value written to the Linux kernel image header.
87 ARM GICV3 Interrupt translation service (ITS).
88 Basic support for programming locality specific peripheral
89 interrupts (LPI) configuration tables and enable LPI tables.
90 LPI configuration table can be used by u-boot or Linux.
91 ARM GICV3 has limitation, once the LPI table is enabled, LPI
92 configuration table can not be re-programmed, unless GICV3 reset.
98 config DMA_ADDR_T_64BIT
108 config GPIO_EXTRA_HEADER
111 # Used for compatibility with asm files copied from the kernel
112 config ARM_ASM_UNIFIED
116 # Used for compatibility with asm files copied from the kernel
120 config SYS_ICACHE_OFF
121 bool "Do not enable icache"
123 Do not enable instruction cache in U-Boot.
125 config SPL_SYS_ICACHE_OFF
126 bool "Do not enable icache in SPL"
128 default SYS_ICACHE_OFF
130 Do not enable instruction cache in SPL.
132 config SYS_DCACHE_OFF
133 bool "Do not enable dcache"
135 Do not enable data cache in U-Boot.
137 config SPL_SYS_DCACHE_OFF
138 bool "Do not enable dcache in SPL"
140 default SYS_DCACHE_OFF
142 Do not enable data cache in SPL.
144 config SYS_ARM_CACHE_CP15
145 bool "CP15 based cache enabling support"
147 Select this if your processor suports enabling caches by using
151 bool "MMU-based Paged Memory Management Support"
152 select SYS_ARM_CACHE_CP15
154 Select if you want MMU-based virtualised addressing space
155 support via paged memory management.
158 bool 'Use the ARM v7 PMSA Compliant MPU'
160 Some ARM systems without an MMU have instead a Memory Protection
161 Unit (MPU) that defines the type and permissions for regions of
163 If your CPU has an MPU then you should choose 'y' here unless you
164 know that you do not want to use the MPU.
166 # If set, the workarounds for these ARM errata are applied early during U-Boot
167 # startup. Note that in general these options force the workarounds to be
168 # applied; no CPU-type/version detection exists, unlike the similar options in
169 # the Linux kernel. Do not set these options unless they apply! Also note that
170 # the following can be machine-specific errata. These do have ability to
171 # provide rudimentary version and machine-specific checks, but expect no
173 # CONFIG_ARM_ERRATA_430973
174 # CONFIG_ARM_ERRATA_454179
175 # CONFIG_ARM_ERRATA_621766
176 # CONFIG_ARM_ERRATA_798870
177 # CONFIG_ARM_ERRATA_801819
178 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
179 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
181 config ARM_ERRATA_430973
184 config ARM_ERRATA_454179
187 config ARM_ERRATA_621766
190 config ARM_ERRATA_716044
193 config ARM_ERRATA_725233
196 config ARM_ERRATA_742230
199 config ARM_ERRATA_743622
202 config ARM_ERRATA_751472
205 config ARM_ERRATA_761320
208 config ARM_ERRATA_773022
211 config ARM_ERRATA_774769
214 config ARM_ERRATA_794072
217 config ARM_ERRATA_798870
220 config ARM_ERRATA_801819
223 config ARM_ERRATA_826974
226 config ARM_ERRATA_828024
229 config ARM_ERRATA_829520
232 config ARM_ERRATA_833069
235 config ARM_ERRATA_833471
238 config ARM_ERRATA_845369
241 config ARM_ERRATA_852421
244 config ARM_ERRATA_852423
247 config ARM_ERRATA_855873
250 config ARM_CORTEX_A8_CVE_2017_5715
253 config ARM_CORTEX_A15_CVE_2017_5715
258 select SYS_CACHE_SHIFT_5
263 select SYS_CACHE_SHIFT_5
268 select SYS_CACHE_SHIFT_5
273 select SYS_CACHE_SHIFT_5
278 select SYS_CACHE_SHIFT_5
284 select SYS_CACHE_SHIFT_5
291 select SYS_CACHE_SHIFT_6
298 select SYS_CACHE_SHIFT_5
299 select SYS_THUMB_BUILD
305 select SYS_ARM_CACHE_CP15
307 select SYS_CACHE_SHIFT_6
311 select SYS_CACHE_SHIFT_5
316 select SYS_CACHE_SHIFT_5
320 default "arm720t" if CPU_ARM720T
321 default "arm920t" if CPU_ARM920T
322 default "arm926ejs" if CPU_ARM926EJS
323 default "arm946es" if CPU_ARM946ES
324 default "arm1136" if CPU_ARM1136
325 default "arm1176" if CPU_ARM1176
326 default "armv7" if CPU_V7A
327 default "armv7" if CPU_V7R
328 default "armv7m" if CPU_V7M
329 default "pxa" if CPU_PXA
330 default "sa1100" if CPU_SA1100
331 default "armv8" if ARM64
335 default 4 if CPU_ARM720T
336 default 4 if CPU_ARM920T
337 default 5 if CPU_ARM926EJS
338 default 5 if CPU_ARM946ES
339 default 6 if CPU_ARM1136
340 default 6 if CPU_ARM1176
345 default 4 if CPU_SA1100
349 prompt "Select the ARM data write cache policy"
350 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
352 default SYS_ARM_CACHE_WRITEBACK
354 config SYS_ARM_CACHE_WRITEBACK
355 bool "Write-back (WB)"
357 A write updates the cache only and marks the cache line as dirty.
358 External memory is updated only when the line is evicted or explicitly
361 config SYS_ARM_CACHE_WRITETHROUGH
362 bool "Write-through (WT)"
364 A write updates both the cache and the external memory system.
365 This does not mark the cache line as dirty.
367 config SYS_ARM_CACHE_WRITEALLOC
368 bool "Write allocation (WA)"
370 A cache line is allocated on a write miss. This means that executing a
371 store instruction on the processor might cause a burst read to occur.
372 There is a linefill to obtain the data for the cache line, before the
377 bool "Enable ARCH_CPU_INIT"
379 Some architectures require a call to arch_cpu_init().
380 Say Y here to enable it
382 config SYS_ARCH_TIMER
383 bool "ARM Generic Timer support"
384 depends on CPU_V7A || ARM64
387 The ARM Generic Timer (aka arch-timer) provides an architected
388 interface to a timer source on an SoC.
389 It is mandatory for ARMv8 implementation and widely available
393 bool "Support for ARM SMC Calling Convention (SMCCC)"
394 depends on CPU_V7A || ARM64
397 Say Y here if you want to enable ARM SMC Calling Convention.
398 This should be enabled if U-Boot needs to communicate with system
399 firmware (for example, PSCI) according to SMCCC.
402 bool "support boot from semihosting"
404 In emulated environments, semihosting is a way for
405 the hosted environment to call out to the emulator to
406 retrieve files from the host machine.
408 config SYS_THUMB_BUILD
409 bool "Build U-Boot using the Thumb instruction set"
412 Use this flag to build U-Boot using the Thumb instruction set for
413 ARM architectures. Thumb instruction set provides better code
414 density. For ARM architectures that support Thumb2 this flag will
415 result in Thumb2 code generated by GCC.
417 config SPL_SYS_THUMB_BUILD
418 bool "Build SPL using the Thumb instruction set"
419 default y if SYS_THUMB_BUILD
420 depends on !ARM64 && SPL
422 Use this flag to build SPL using the Thumb instruction set for
423 ARM architectures. Thumb instruction set provides better code
424 density. For ARM architectures that support Thumb2 this flag will
425 result in Thumb2 code generated by GCC.
427 config TPL_SYS_THUMB_BUILD
428 bool "Build TPL using the Thumb instruction set"
429 default y if SYS_THUMB_BUILD
430 depends on TPL && !ARM64
432 Use this flag to build TPL using the Thumb instruction set for
433 ARM architectures. Thumb instruction set provides better code
434 density. For ARM architectures that support Thumb2 this flag will
435 result in Thumb2 code generated by GCC.
438 config SYS_L2CACHE_OFF
441 If SoC does not support L2CACHE or one does not want to enable
442 L2CACHE, choose this option.
444 config ENABLE_ARM_SOC_BOOT0_HOOK
445 bool "prepare BOOT0 header"
447 If the SoC's BOOT0 requires a header area filled with (magic)
448 values, then choose this option, and create a file included as
449 <asm/arch/boot0.h> which contains the required assembler code.
451 config ARM_CORTEX_CPU_IS_UP
454 config USE_ARCH_MEMCPY
455 bool "Use an assembly optimized implementation of memcpy"
457 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
459 Enable the generation of an optimized version of memcpy.
460 Such an implementation may be faster under some conditions
461 but may increase the binary size.
463 config SPL_USE_ARCH_MEMCPY
464 bool "Use an assembly optimized implementation of memcpy for SPL"
465 default y if USE_ARCH_MEMCPY
468 Enable the generation of an optimized version of memcpy.
469 Such an implementation may be faster under some conditions
470 but may increase the binary size.
472 config TPL_USE_ARCH_MEMCPY
473 bool "Use an assembly optimized implementation of memcpy for TPL"
474 default y if USE_ARCH_MEMCPY
477 Enable the generation of an optimized version of memcpy.
478 Such an implementation may be faster under some conditions
479 but may increase the binary size.
481 config USE_ARCH_MEMMOVE
482 bool "Use an assembly optimized implementation of memmove" if !ARM64
483 default USE_ARCH_MEMCPY if ARM64
486 Enable the generation of an optimized version of memmove.
487 Such an implementation may be faster under some conditions
488 but may increase the binary size.
490 config SPL_USE_ARCH_MEMMOVE
491 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
492 default SPL_USE_ARCH_MEMCPY if ARM64
493 depends on SPL && ARM64
495 Enable the generation of an optimized version of memmove.
496 Such an implementation may be faster under some conditions
497 but may increase the binary size.
499 config TPL_USE_ARCH_MEMMOVE
500 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
501 default TPL_USE_ARCH_MEMCPY if ARM64
502 depends on TPL && ARM64
504 Enable the generation of an optimized version of memmove.
505 Such an implementation may be faster under some conditions
506 but may increase the binary size.
508 config USE_ARCH_MEMSET
509 bool "Use an assembly optimized implementation of memset"
511 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
513 Enable the generation of an optimized version of memset.
514 Such an implementation may be faster under some conditions
515 but may increase the binary size.
517 config SPL_USE_ARCH_MEMSET
518 bool "Use an assembly optimized implementation of memset for SPL"
519 default y if USE_ARCH_MEMSET
522 Enable the generation of an optimized version of memset.
523 Such an implementation may be faster under some conditions
524 but may increase the binary size.
526 config TPL_USE_ARCH_MEMSET
527 bool "Use an assembly optimized implementation of memset for TPL"
528 default y if USE_ARCH_MEMSET
531 Enable the generation of an optimized version of memset.
532 Such an implementation may be faster under some conditions
533 but may increase the binary size.
535 config ARM64_SUPPORT_AARCH32
536 bool "ARM64 system support AArch32 execution state"
538 default y if !TARGET_THUNDERX_88XX
540 This ARM64 system supports AArch32 execution state.
543 prompt "Target select"
548 select GPIO_EXTRA_HEADER
549 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
550 select SPL_SEPARATE_BSS if SPL
555 select GPIO_EXTRA_HEADER
556 select SPL_DM_SPI if SPL
559 Support for TI's DaVinci platform.
562 bool "Marvell Kirkwood"
563 select ARCH_MISC_INIT
564 select BOARD_EARLY_INIT_F
566 select GPIO_EXTRA_HEADER
569 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
575 select GPIO_EXTRA_HEADER
576 select SPL_DM_SPI if SPL
577 select SPL_DM_SPI_FLASH if SPL
586 select GPIO_EXTRA_HEADER
588 config TARGET_STV0991
589 bool "Support stv0991"
595 select GPIO_EXTRA_HEADER
602 bool "Broadcom BCM283X family"
606 select GPIO_EXTRA_HEADER
609 select SERIAL_SEARCH_ALL
614 bool "Broadcom BCM63158 family"
620 bool "Broadcom BCM68360 family"
626 bool "Broadcom BCM6858 family"
632 bool "Broadcom BCM7XXX family"
635 select GPIO_EXTRA_HEADER
639 This enables support for Broadcom ARM-based set-top box
640 chipsets, including the 7445 family of chips.
642 config TARGET_VEXPRESS_CA9X4
643 bool "Support vexpress_ca9x4"
647 config TARGET_BCMCYGNUS
648 bool "Support bcmcygnus"
650 select GPIO_EXTRA_HEADER
652 imply BCM_SF2_ETH_GMAC
660 bool "Support Broadcom Northstar2"
662 select GPIO_EXTRA_HEADER
664 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
665 ARMv8 Cortex-A57 processors targeting a broad range of networking
669 bool "Support Broadcom NS3"
671 select BOARD_LATE_INIT
673 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
674 ARMv8 Cortex-A72 processors targeting a broad range of networking
678 bool "Samsung EXYNOS"
688 select GPIO_EXTRA_HEADER
689 imply SYS_THUMB_BUILD
694 bool "Samsung S5PC1XX"
700 select GPIO_EXTRA_HEADER
704 bool "Calxeda Highbank"
717 config ARCH_INTEGRATOR
718 bool "ARM Ltd. Integrator family"
721 select GPIO_EXTRA_HEADER
726 bool "Qualcomm IPQ40xx SoCs"
732 select GPIO_EXTRA_HEADER
745 select GPIO_EXTRA_HEADER
747 select SYS_ARCH_TIMER
748 select SYS_THUMB_BUILD
754 bool "Texas Instruments' K3 Architecture"
759 config ARCH_OMAP2PLUS
762 select GPIO_EXTRA_HEADER
763 select SPL_BOARD_INIT if SPL
764 select SPL_STACK_R if SPL
766 imply TI_SYSC if DM && OF_CONTROL
771 select GPIO_EXTRA_HEADER
772 imply DISTRO_DEFAULTS
775 Support for the Meson SoC family developed by Amlogic Inc.,
776 targeted at media players and tablet computers. We currently
777 support the S905 (GXBaby) 64-bit SoC.
782 select GPIO_EXTRA_HEADER
785 select SPL_LIBCOMMON_SUPPORT if SPL
786 select SPL_LIBGENERIC_SUPPORT if SPL
787 select SPL_OF_CONTROL if SPL
790 Support for the MediaTek SoCs family developed by MediaTek Inc.
791 Please refer to doc/README.mediatek for more information.
794 bool "NXP LPC32xx platform"
799 select GPIO_EXTRA_HEADER
805 bool "NXP i.MX8 platform"
808 select GPIO_EXTRA_HEADER
811 select ENABLE_ARM_SOC_BOOT0_HOOK
814 bool "NXP i.MX8M platform"
816 select GPIO_EXTRA_HEADER
818 select SYS_FSL_HAS_SEC if IMX_HAB
819 select SYS_FSL_SEC_COMPAT_4
820 select SYS_FSL_SEC_LE
827 bool "NXP i.MX8ULP platform"
833 select GPIO_EXTRA_HEADER
837 bool "NXP i.MXRT platform"
841 select GPIO_EXTRA_HEADER
847 bool "NXP i.MX23 family"
849 select GPIO_EXTRA_HEADER
855 bool "NXP i.MX28 family"
857 select GPIO_EXTRA_HEADER
863 bool "NXP i.MX31 family"
865 select GPIO_EXTRA_HEADER
871 select GPIO_EXTRA_HEADER
873 select SYS_FSL_HAS_SEC if IMX_HAB
874 select SYS_FSL_SEC_COMPAT_4
875 select SYS_FSL_SEC_LE
876 select ROM_UNIFIED_SECTIONS
878 imply SYS_THUMB_BUILD
882 select ARCH_MISC_INIT
884 select GPIO_EXTRA_HEADER
886 select SYS_FSL_HAS_SEC if IMX_HAB
887 select SYS_FSL_SEC_COMPAT_4
888 select SYS_FSL_SEC_LE
889 imply BOARD_EARLY_INIT_F
891 imply SYS_THUMB_BUILD
896 select GPIO_EXTRA_HEADER
898 select SYS_FSL_HAS_SEC
899 select SYS_FSL_SEC_COMPAT_4
900 select SYS_FSL_SEC_LE
902 imply SYS_THUMB_BUILD
906 default "arch/arm/mach-omap2/u-boot-spl.lds"
911 select BOARD_EARLY_INIT_F
913 select GPIO_EXTRA_HEADER
918 bool "Nexell S5P4418/S5P6818 SoC"
919 select ENABLE_ARM_SOC_BOOT0_HOOK
921 select GPIO_EXTRA_HEADER
935 select LINUX_KERNEL_IMAGE_HEADER
938 select POSITION_INDEPENDENT
942 imply DISTRO_DEFAULTS
945 bool "Actions Semi OWL SoCs"
949 select GPIO_EXTRA_HEADER
954 select SYS_RELOC_GD_ENV_ADDR
958 bool "QEMU Virtual Platform"
969 bool "Renesas ARM SoCs"
972 select GPIO_EXTRA_HEADER
973 imply BOARD_EARLY_INIT_F
976 imply SYS_THUMB_BUILD
977 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
979 config ARCH_SNAPDRAGON
980 bool "Qualcomm Snapdragon SoCs"
985 select GPIO_EXTRA_HEADER
994 bool "Altera SOCFPGA family"
995 select ARCH_EARLY_INIT_R
996 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
997 select ARM64 if TARGET_SOCFPGA_SOC64
998 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1002 select GPIO_EXTRA_HEADER
1003 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1005 select SPL_DM_RESET if DM_RESET
1006 select SPL_DM_SERIAL
1007 select SPL_LIBCOMMON_SUPPORT
1008 select SPL_LIBGENERIC_SUPPORT
1009 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
1010 select SPL_OF_CONTROL
1011 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1017 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1019 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1020 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1030 imply SPL_DM_SPI_FLASH
1031 imply SPL_LIBDISK_SUPPORT
1033 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1034 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1035 imply SPL_SPI_FLASH_SUPPORT
1040 bool "Support sunxi (Allwinner) SoCs"
1043 select CMD_MMC if MMC
1044 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1049 select DM_I2C if I2C
1051 select DM_MMC if MMC
1052 select DM_SCSI if SCSI
1054 select GPIO_EXTRA_HEADER
1055 select OF_BOARD_SETUP
1058 select SPECIFY_CONSOLE_INDEX
1059 select SPL_SEPARATE_BSS if SPL
1060 select SPL_STACK_R if SPL
1061 select SPL_SYS_MALLOC_SIMPLE if SPL
1062 select SPL_SYS_THUMB_BUILD if !ARM64
1065 select SYS_THUMB_BUILD if !ARM64
1066 select USB if DISTRO_DEFAULTS
1067 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1068 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1069 select SPL_USE_TINY_PRINTF
1071 select SYS_RELOC_GD_ENV_ADDR
1072 imply BOARD_LATE_INIT
1075 imply CMD_UBI if MTD_RAW_NAND
1076 imply DISTRO_DEFAULTS
1079 imply OF_LIBFDT_OVERLAY
1080 imply PRE_CONSOLE_BUFFER
1082 imply SPL_LIBCOMMON_SUPPORT
1083 imply SPL_LIBGENERIC_SUPPORT
1084 imply SPL_MMC if MMC
1091 bool "ST-Ericsson U8500 Series"
1095 select DM_MMC if MMC
1097 select DM_USB_GADGET if DM_USB
1101 imply AB8500_USB_PHY
1102 imply ARM_PL180_MMCI
1107 imply NOMADIK_MTU_TIMER
1112 imply SYS_THUMB_BUILD
1113 imply SYSRESET_SYSCON
1116 bool "Support Xilinx Versal Platform"
1120 select DM_ETH if NET
1121 select DM_MMC if MMC
1124 select GPIO_EXTRA_HEADER
1127 imply BOARD_LATE_INIT
1128 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1131 bool "Freescale Vybrid"
1133 select GPIO_EXTRA_HEADER
1135 select SYS_FSL_ERRATUM_ESDHC111
1140 bool "Xilinx Zynq based platform"
1145 select DM_ETH if NET
1146 select DM_MMC if MMC
1150 select GPIO_EXTRA_HEADER
1153 select SPL_BOARD_INIT if SPL
1154 select SPL_CLK if SPL
1155 select SPL_DM if SPL
1156 select SPL_DM_SPI if SPL
1157 select SPL_DM_SPI_FLASH if SPL
1158 select SPL_OF_CONTROL if SPL
1159 select SPL_SEPARATE_BSS if SPL
1161 imply ARCH_EARLY_INIT_R
1162 imply BOARD_LATE_INIT
1166 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1169 config ARCH_ZYNQMP_R5
1170 bool "Xilinx ZynqMP R5 based platform"
1174 select DM_ETH if NET
1175 select DM_MMC if MMC
1177 select GPIO_EXTRA_HEADER
1183 bool "Xilinx ZynqMP based platform"
1187 select DM_ETH if NET
1189 select DM_MMC if MMC
1191 select DM_SPI if SPI
1192 select DM_SPI_FLASH if DM_SPI
1195 select GPIO_EXTRA_HEADER
1197 select SPL_BOARD_INIT if SPL
1198 select SPL_CLK if SPL
1199 select SPL_DM if SPL
1200 select SPL_DM_SPI if SPI && SPL_DM
1201 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1202 select SPL_DM_MAILBOX if SPL
1203 select SPL_FIRMWARE if SPL
1204 select SPL_SEPARATE_BSS if SPL
1208 imply BOARD_LATE_INIT
1210 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1217 select GPIO_EXTRA_HEADER
1218 imply DISTRO_DEFAULTS
1221 config TARGET_VEXPRESS64_AEMV8A
1222 bool "Support vexpress_aemv8a"
1224 select GPIO_EXTRA_HEADER
1227 config TARGET_VEXPRESS64_BASE_FVP
1228 bool "Support Versatile Express ARMv8a FVP BASE model"
1230 select GPIO_EXTRA_HEADER
1234 config TARGET_VEXPRESS64_JUNO
1235 bool "Support Versatile Express Juno Development Platform"
1237 select GPIO_EXTRA_HEADER
1250 config TARGET_TOTAL_COMPUTE
1251 bool "Support Total Compute Platform"
1259 config TARGET_LS2080A_EMU
1260 bool "Support ls2080a_emu"
1263 select ARMV8_MULTIENTRY
1264 select FSL_DDR_SYNC_REFRESH
1265 select GPIO_EXTRA_HEADER
1267 Support for Freescale LS2080A_EMU platform.
1268 The LS2080A Development System (EMULATOR) is a pre-silicon
1269 development platform that supports the QorIQ LS2080A
1270 Layerscape Architecture processor.
1272 config TARGET_LS1088AQDS
1273 bool "Support ls1088aqds"
1276 select ARMV8_MULTIENTRY
1277 select ARCH_SUPPORT_TFABOOT
1278 select BOARD_LATE_INIT
1279 select GPIO_EXTRA_HEADER
1281 select FSL_DDR_INTERACTIVE if !SD_BOOT
1283 Support for NXP LS1088AQDS platform.
1284 The LS1088A Development System (QDS) is a high-performance
1285 development platform that supports the QorIQ LS1088A
1286 Layerscape Architecture processor.
1288 config TARGET_LS2080AQDS
1289 bool "Support ls2080aqds"
1292 select ARMV8_MULTIENTRY
1293 select ARCH_SUPPORT_TFABOOT
1294 select BOARD_LATE_INIT
1295 select GPIO_EXTRA_HEADER
1300 select FSL_DDR_INTERACTIVE if !SPL
1302 Support for Freescale LS2080AQDS platform.
1303 The LS2080A Development System (QDS) is a high-performance
1304 development platform that supports the QorIQ LS2080A
1305 Layerscape Architecture processor.
1307 config TARGET_LS2080ARDB
1308 bool "Support ls2080ardb"
1311 select ARMV8_MULTIENTRY
1312 select ARCH_SUPPORT_TFABOOT
1313 select BOARD_LATE_INIT
1316 select FSL_DDR_INTERACTIVE if !SPL
1317 select GPIO_EXTRA_HEADER
1321 Support for Freescale LS2080ARDB platform.
1322 The LS2080A Reference design board (RDB) is a high-performance
1323 development platform that supports the QorIQ LS2080A
1324 Layerscape Architecture processor.
1326 config TARGET_LS2081ARDB
1327 bool "Support ls2081ardb"
1330 select ARMV8_MULTIENTRY
1331 select BOARD_LATE_INIT
1332 select GPIO_EXTRA_HEADER
1335 Support for Freescale LS2081ARDB platform.
1336 The LS2081A Reference design board (RDB) is a high-performance
1337 development platform that supports the QorIQ LS2081A/LS2041A
1338 Layerscape Architecture processor.
1340 config TARGET_LX2160ARDB
1341 bool "Support lx2160ardb"
1344 select ARMV8_MULTIENTRY
1345 select ARCH_SUPPORT_TFABOOT
1346 select BOARD_LATE_INIT
1347 select GPIO_EXTRA_HEADER
1349 Support for NXP LX2160ARDB platform.
1350 The lx2160ardb (LX2160A Reference design board (RDB)
1351 is a high-performance development platform that supports the
1352 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1354 config TARGET_LX2160AQDS
1355 bool "Support lx2160aqds"
1358 select ARMV8_MULTIENTRY
1359 select ARCH_SUPPORT_TFABOOT
1360 select BOARD_LATE_INIT
1361 select GPIO_EXTRA_HEADER
1363 Support for NXP LX2160AQDS platform.
1364 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1365 is a high-performance development platform that supports the
1366 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1368 config TARGET_LX2162AQDS
1369 bool "Support lx2162aqds"
1371 select ARCH_MISC_INIT
1373 select ARMV8_MULTIENTRY
1374 select ARCH_SUPPORT_TFABOOT
1375 select BOARD_LATE_INIT
1376 select GPIO_EXTRA_HEADER
1378 Support for NXP LX2162AQDS platform.
1379 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1382 bool "Support HiKey 96boards Consumer Edition Platform"
1387 select GPIO_EXTRA_HEADER
1390 select SPECIFY_CONSOLE_INDEX
1393 Support for HiKey 96boards platform. It features a HI6220
1394 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1396 config TARGET_HIKEY960
1397 bool "Support HiKey960 96boards Consumer Edition Platform"
1401 select GPIO_EXTRA_HEADER
1406 Support for HiKey960 96boards platform. It features a HI3660
1407 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1409 config TARGET_POPLAR
1410 bool "Support Poplar 96boards Enterprise Edition Platform"
1414 select GPIO_EXTRA_HEADER
1419 Support for Poplar 96boards EE platform. It features a HI3798cv200
1420 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1421 making it capable of running any commercial set-top solution based on
1424 config TARGET_LS1012AQDS
1425 bool "Support ls1012aqds"
1428 select ARCH_SUPPORT_TFABOOT
1429 select BOARD_LATE_INIT
1430 select GPIO_EXTRA_HEADER
1432 Support for Freescale LS1012AQDS platform.
1433 The LS1012A Development System (QDS) is a high-performance
1434 development platform that supports the QorIQ LS1012A
1435 Layerscape Architecture processor.
1437 config TARGET_LS1012ARDB
1438 bool "Support ls1012ardb"
1441 select ARCH_SUPPORT_TFABOOT
1442 select BOARD_LATE_INIT
1443 select GPIO_EXTRA_HEADER
1447 Support for Freescale LS1012ARDB platform.
1448 The LS1012A Reference design board (RDB) is a high-performance
1449 development platform that supports the QorIQ LS1012A
1450 Layerscape Architecture processor.
1452 config TARGET_LS1012A2G5RDB
1453 bool "Support ls1012a2g5rdb"
1456 select ARCH_SUPPORT_TFABOOT
1457 select BOARD_LATE_INIT
1458 select GPIO_EXTRA_HEADER
1461 Support for Freescale LS1012A2G5RDB platform.
1462 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1463 development platform that supports the QorIQ LS1012A
1464 Layerscape Architecture processor.
1466 config TARGET_LS1012AFRWY
1467 bool "Support ls1012afrwy"
1470 select ARCH_SUPPORT_TFABOOT
1471 select BOARD_LATE_INIT
1472 select GPIO_EXTRA_HEADER
1476 Support for Freescale LS1012AFRWY platform.
1477 The LS1012A FRWY board (FRWY) is a high-performance
1478 development platform that supports the QorIQ LS1012A
1479 Layerscape Architecture processor.
1481 config TARGET_LS1012AFRDM
1482 bool "Support ls1012afrdm"
1485 select ARCH_SUPPORT_TFABOOT
1486 select GPIO_EXTRA_HEADER
1488 Support for Freescale LS1012AFRDM platform.
1489 The LS1012A Freedom board (FRDM) is a high-performance
1490 development platform that supports the QorIQ LS1012A
1491 Layerscape Architecture processor.
1493 config TARGET_LS1028AQDS
1494 bool "Support ls1028aqds"
1497 select ARMV8_MULTIENTRY
1498 select ARCH_SUPPORT_TFABOOT
1499 select BOARD_LATE_INIT
1500 select GPIO_EXTRA_HEADER
1502 Support for Freescale LS1028AQDS platform
1503 The LS1028A Development System (QDS) is a high-performance
1504 development platform that supports the QorIQ LS1028A
1505 Layerscape Architecture processor.
1507 config TARGET_LS1028ARDB
1508 bool "Support ls1028ardb"
1511 select ARMV8_MULTIENTRY
1512 select ARCH_SUPPORT_TFABOOT
1513 select BOARD_LATE_INIT
1514 select GPIO_EXTRA_HEADER
1516 Support for Freescale LS1028ARDB platform
1517 The LS1028A Development System (RDB) is a high-performance
1518 development platform that supports the QorIQ LS1028A
1519 Layerscape Architecture processor.
1521 config TARGET_LS1088ARDB
1522 bool "Support ls1088ardb"
1525 select ARMV8_MULTIENTRY
1526 select ARCH_SUPPORT_TFABOOT
1527 select BOARD_LATE_INIT
1529 select FSL_DDR_INTERACTIVE if !SD_BOOT
1530 select GPIO_EXTRA_HEADER
1532 Support for NXP LS1088ARDB platform.
1533 The LS1088A Reference design board (RDB) is a high-performance
1534 development platform that supports the QorIQ LS1088A
1535 Layerscape Architecture processor.
1537 config TARGET_LS1021AQDS
1538 bool "Support ls1021aqds"
1540 select ARCH_SUPPORT_PSCI
1541 select BOARD_EARLY_INIT_F
1542 select BOARD_LATE_INIT
1544 select CPU_V7_HAS_NONSEC
1545 select CPU_V7_HAS_VIRT
1546 select LS1_DEEP_SLEEP
1549 select FSL_DDR_INTERACTIVE
1550 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1551 select GPIO_EXTRA_HEADER
1552 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1555 config TARGET_LS1021ATWR
1556 bool "Support ls1021atwr"
1558 select ARCH_SUPPORT_PSCI
1559 select BOARD_EARLY_INIT_F
1560 select BOARD_LATE_INIT
1562 select CPU_V7_HAS_NONSEC
1563 select CPU_V7_HAS_VIRT
1564 select LS1_DEEP_SLEEP
1566 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1567 select GPIO_EXTRA_HEADER
1570 config TARGET_PG_WCOM_SELI8
1571 bool "Support Hitachi-Powergrids SELI8 service unit card"
1573 select ARCH_SUPPORT_PSCI
1574 select BOARD_EARLY_INIT_F
1575 select BOARD_LATE_INIT
1577 select CPU_V7_HAS_NONSEC
1578 select CPU_V7_HAS_VIRT
1580 select FSL_DDR_INTERACTIVE
1581 select GPIO_EXTRA_HEADER
1585 Support for Hitachi-Powergrids SELI8 service unit card.
1586 SELI8 is a QorIQ LS1021a based service unit card used
1587 in XMC20 and FOX615 product families.
1589 config TARGET_PG_WCOM_EXPU1
1590 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1592 select ARCH_SUPPORT_PSCI
1593 select BOARD_EARLY_INIT_F
1594 select BOARD_LATE_INIT
1596 select CPU_V7_HAS_NONSEC
1597 select CPU_V7_HAS_VIRT
1599 select FSL_DDR_INTERACTIVE
1603 Support for Hitachi-Powergrids EXPU1 service unit card.
1604 EXPU1 is a QorIQ LS1021a based service unit card used
1605 in XMC20 and FOX615 product families.
1607 config TARGET_LS1021ATSN
1608 bool "Support ls1021atsn"
1610 select ARCH_SUPPORT_PSCI
1611 select BOARD_EARLY_INIT_F
1612 select BOARD_LATE_INIT
1614 select CPU_V7_HAS_NONSEC
1615 select CPU_V7_HAS_VIRT
1616 select LS1_DEEP_SLEEP
1618 select GPIO_EXTRA_HEADER
1621 config TARGET_LS1021AIOT
1622 bool "Support ls1021aiot"
1624 select ARCH_SUPPORT_PSCI
1625 select BOARD_LATE_INIT
1627 select CPU_V7_HAS_NONSEC
1628 select CPU_V7_HAS_VIRT
1630 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1631 select GPIO_EXTRA_HEADER
1634 Support for Freescale LS1021AIOT platform.
1635 The LS1021A Freescale board (IOT) is a high-performance
1636 development platform that supports the QorIQ LS1021A
1637 Layerscape Architecture processor.
1639 config TARGET_LS1043AQDS
1640 bool "Support ls1043aqds"
1643 select ARMV8_MULTIENTRY
1644 select ARCH_SUPPORT_TFABOOT
1645 select BOARD_EARLY_INIT_F
1646 select BOARD_LATE_INIT
1648 select FSL_DDR_INTERACTIVE if !SPL
1649 select FSL_DSPI if !SPL_NO_DSPI
1650 select DM_SPI_FLASH if FSL_DSPI
1651 select GPIO_EXTRA_HEADER
1655 Support for Freescale LS1043AQDS platform.
1657 config TARGET_LS1043ARDB
1658 bool "Support ls1043ardb"
1661 select ARMV8_MULTIENTRY
1662 select ARCH_SUPPORT_TFABOOT
1663 select BOARD_EARLY_INIT_F
1664 select BOARD_LATE_INIT
1666 select FSL_DSPI if !SPL_NO_DSPI
1667 select DM_SPI_FLASH if FSL_DSPI
1668 select GPIO_EXTRA_HEADER
1670 Support for Freescale LS1043ARDB platform.
1672 config TARGET_LS1046AQDS
1673 bool "Support ls1046aqds"
1676 select ARMV8_MULTIENTRY
1677 select ARCH_SUPPORT_TFABOOT
1678 select BOARD_EARLY_INIT_F
1679 select BOARD_LATE_INIT
1680 select DM_SPI_FLASH if DM_SPI
1682 select FSL_DDR_BIST if !SPL
1683 select FSL_DDR_INTERACTIVE if !SPL
1684 select FSL_DDR_INTERACTIVE if !SPL
1685 select GPIO_EXTRA_HEADER
1688 Support for Freescale LS1046AQDS platform.
1689 The LS1046A Development System (QDS) is a high-performance
1690 development platform that supports the QorIQ LS1046A
1691 Layerscape Architecture processor.
1693 config TARGET_LS1046ARDB
1694 bool "Support ls1046ardb"
1697 select ARMV8_MULTIENTRY
1698 select ARCH_SUPPORT_TFABOOT
1699 select BOARD_EARLY_INIT_F
1700 select BOARD_LATE_INIT
1701 select DM_SPI_FLASH if DM_SPI
1702 select POWER_MC34VR500
1705 select FSL_DDR_INTERACTIVE if !SPL
1706 select GPIO_EXTRA_HEADER
1709 Support for Freescale LS1046ARDB platform.
1710 The LS1046A Reference Design Board (RDB) is a high-performance
1711 development platform that supports the QorIQ LS1046A
1712 Layerscape Architecture processor.
1714 config TARGET_LS1046AFRWY
1715 bool "Support ls1046afrwy"
1718 select ARMV8_MULTIENTRY
1719 select ARCH_SUPPORT_TFABOOT
1720 select BOARD_EARLY_INIT_F
1721 select BOARD_LATE_INIT
1722 select DM_SPI_FLASH if DM_SPI
1723 select GPIO_EXTRA_HEADER
1726 Support for Freescale LS1046AFRWY platform.
1727 The LS1046A Freeway Board (FRWY) is a high-performance
1728 development platform that supports the QorIQ LS1046A
1729 Layerscape Architecture processor.
1735 select ARMV8_MULTIENTRY
1751 select GPIO_EXTRA_HEADER
1752 select SPL_DM if SPL
1753 select SPL_DM_SPI if SPL
1754 select SPL_DM_SPI_FLASH if SPL
1755 select SPL_DM_I2C if SPL
1756 select SPL_DM_MMC if SPL
1757 select SPL_DM_SERIAL if SPL
1759 Support for Kontron SMARC-sAL28 board.
1761 config TARGET_COLIBRI_PXA270
1762 bool "Support colibri_pxa270"
1764 select GPIO_EXTRA_HEADER
1766 config ARCH_UNIPHIER
1767 bool "Socionext UniPhier SoCs"
1768 select BOARD_LATE_INIT
1777 select OF_BOARD_SETUP
1781 select SPL_BOARD_INIT if SPL
1782 select SPL_DM if SPL
1783 select SPL_LIBCOMMON_SUPPORT if SPL
1784 select SPL_LIBGENERIC_SUPPORT if SPL
1785 select SPL_OF_CONTROL if SPL
1786 select SPL_PINCTRL if SPL
1789 imply DISTRO_DEFAULTS
1792 Support for UniPhier SoC family developed by Socionext Inc.
1793 (formerly, System LSI Business Division of Panasonic Corporation)
1795 config ARCH_SYNQUACER
1796 bool "Socionext SynQuacer SoCs"
1802 select SYSRESET_PSCI
1805 Support for SynQuacer SoC family developed by Socionext Inc.
1806 This SoC is used on 96boards EE DeveloperBox.
1809 bool "Support STMicroelectronics STM32 MCU with cortex M"
1816 bool "Support STMicrolectronics SoCs"
1825 Support for STMicroelectronics STiH407/10 SoC family.
1826 This SoC is used on Linaro 96Board STiH410-B2260
1829 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1830 select ARCH_MISC_INIT
1831 select ARCH_SUPPORT_TFABOOT
1832 select BOARD_LATE_INIT
1841 select OF_SYSTEM_SETUP
1847 select SYS_THUMB_BUILD
1851 imply OF_LIBFDT_OVERLAY
1852 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1855 Support for STM32MP SoC family developed by STMicroelectronics,
1856 MPUs based on ARM cortex A core
1857 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1858 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1860 SPL is the unsecure FSBL for the basic boot chain.
1862 config ARCH_ROCKCHIP
1863 bool "Support Rockchip SoCs"
1865 select BINMAN if SPL_OPTEE || (SPL && !ARM64)
1875 select ENABLE_ARM_SOC_BOOT0_HOOK
1878 select SPL_DM if SPL
1879 select SPL_DM_SPI if SPL
1880 select SPL_DM_SPI_FLASH if SPL
1882 select SYS_THUMB_BUILD if !ARM64
1885 imply DEBUG_UART_BOARD_INIT
1886 imply DISTRO_DEFAULTS
1888 imply SARADC_ROCKCHIP
1890 imply SPL_SYS_MALLOC_SIMPLE
1893 imply USB_FUNCTION_FASTBOOT
1895 config ARCH_OCTEONTX
1896 bool "Support OcteonTX SoCs"
1899 select GPIO_EXTRA_HEADER
1903 select BOARD_LATE_INIT
1904 select SYS_CACHE_SHIFT_7
1906 config ARCH_OCTEONTX2
1907 bool "Support OcteonTX2 SoCs"
1910 select GPIO_EXTRA_HEADER
1914 select BOARD_LATE_INIT
1915 select SYS_CACHE_SHIFT_7
1917 config TARGET_THUNDERX_88XX
1918 bool "Support ThunderX 88xx"
1920 select GPIO_EXTRA_HEADER
1923 select SYS_CACHE_SHIFT_7
1926 bool "Support Aspeed SoCs"
1931 config TARGET_DURIAN
1932 bool "Support Phytium Durian Platform"
1934 select GPIO_EXTRA_HEADER
1936 Support for durian platform.
1937 It has 2GB Sdram, uart and pcie.
1939 config TARGET_PRESIDIO_ASIC
1940 bool "Support Cortina Presidio ASIC Platform"
1944 config TARGET_XENGUEST_ARM64
1945 bool "Xen guest ARM64"
1949 select LINUX_KERNEL_IMAGE_HEADER
1954 config SUPPORT_PASSING_ATAGS
1955 bool "Support pre-devicetree ATAG-based booting"
1957 imply SETUP_MEMORY_TAGS
1959 Support for booting older Linux kernels, using ATAGs rather than
1960 passing a devicetree. This is option is rarely used, and the
1961 semantics are defined at
1962 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
1964 config SETUP_MEMORY_TAGS
1965 bool "Pass memory size information via ATAG"
1966 depends on SUPPORT_PASSING_ATAGS
1969 bool "Pass Linux kernel cmdline via ATAG"
1970 depends on SUPPORT_PASSING_ATAGS
1973 bool "Pass initrd starting point and size via ATAG"
1974 depends on SUPPORT_PASSING_ATAGS
1977 bool "Pass system revision via ATAG"
1978 depends on SUPPORT_PASSING_ATAGS
1981 bool "Pass system serial number via ATAG"
1982 depends on SUPPORT_PASSING_ATAGS
1984 config STATIC_MACH_TYPE
1985 bool "Statically define the Machine ID number"
1987 When booting via ATAGs, enable this option if we know the correct
1988 machine ID number to use at compile time. Some systems will be
1989 passed the number dynamically by whatever loads U-Boot.
1992 int "Machine ID number"
1993 depends on STATIC_MACH_TYPE
1995 When booting via ATAGs, the machine type must be passed as a number.
1996 For the full list see https://www.arm.linux.org.uk/developer/machines
1998 config ARCH_SUPPORT_TFABOOT
2002 bool "Support for booting from TF-A"
2003 depends on ARCH_SUPPORT_TFABOOT
2005 Some platforms support the setup of secure registers (for instance
2006 for CPU errata handling) or provide secure services like PSCI.
2007 Those services could also be provided by other firmware parts
2008 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
2009 does not need to (and cannot) execute this code.
2010 Enabling this option will make a U-Boot binary that is relying
2011 on other firmware layers to provide secure functionality.
2013 config TI_SECURE_DEVICE
2014 bool "HS Device Type Support"
2015 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2017 If a high secure (HS) device type is being used, this config
2018 must be set. This option impacts various aspects of the
2019 build system (to create signed boot images that can be
2020 authenticated) and the code. See the doc/README.ti-secure
2021 file for further details.
2023 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
2024 config ISW_ENTRY_ADDR
2025 hex "Address in memory or XIP address of bootloader entry point"
2026 default 0x402F4000 if AM43XX
2027 default 0x402F0400 if AM33XX
2028 default 0x40301350 if OMAP54XX
2030 After any reset, the boot ROM searches the boot media for a valid
2031 boot image. For non-XIP devices, the ROM then copies the image into
2032 internal memory. For all boot modes, after the ROM processes the
2033 boot image it eventually computes the entry point address depending
2034 on the device type (secure/non-secure), boot media (xip/non-xip) and
2038 source "arch/arm/mach-apple/Kconfig"
2040 source "arch/arm/mach-aspeed/Kconfig"
2042 source "arch/arm/mach-at91/Kconfig"
2044 source "arch/arm/mach-bcm283x/Kconfig"
2046 source "arch/arm/mach-bcmstb/Kconfig"
2048 source "arch/arm/mach-davinci/Kconfig"
2050 source "arch/arm/mach-exynos/Kconfig"
2052 source "arch/arm/mach-highbank/Kconfig"
2054 source "arch/arm/mach-integrator/Kconfig"
2056 source "arch/arm/mach-ipq40xx/Kconfig"
2058 source "arch/arm/mach-k3/Kconfig"
2060 source "arch/arm/mach-keystone/Kconfig"
2062 source "arch/arm/mach-kirkwood/Kconfig"
2064 source "arch/arm/mach-lpc32xx/Kconfig"
2066 source "arch/arm/mach-mvebu/Kconfig"
2068 source "arch/arm/mach-octeontx/Kconfig"
2070 source "arch/arm/mach-octeontx2/Kconfig"
2072 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2074 source "arch/arm/mach-imx/mx3/Kconfig"
2076 source "arch/arm/mach-imx/mx5/Kconfig"
2078 source "arch/arm/mach-imx/mx6/Kconfig"
2080 source "arch/arm/mach-imx/mx7/Kconfig"
2082 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2084 source "arch/arm/mach-imx/imx8/Kconfig"
2086 source "arch/arm/mach-imx/imx8m/Kconfig"
2088 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2090 source "arch/arm/mach-imx/imxrt/Kconfig"
2092 source "arch/arm/mach-imx/mxs/Kconfig"
2094 source "arch/arm/mach-omap2/Kconfig"
2096 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2098 source "arch/arm/mach-orion5x/Kconfig"
2100 source "arch/arm/mach-owl/Kconfig"
2102 source "arch/arm/mach-rmobile/Kconfig"
2104 source "arch/arm/mach-meson/Kconfig"
2106 source "arch/arm/mach-mediatek/Kconfig"
2108 source "arch/arm/mach-qemu/Kconfig"
2110 source "arch/arm/mach-rockchip/Kconfig"
2112 source "arch/arm/mach-s5pc1xx/Kconfig"
2114 source "arch/arm/mach-snapdragon/Kconfig"
2116 source "arch/arm/mach-socfpga/Kconfig"
2118 source "arch/arm/mach-sti/Kconfig"
2120 source "arch/arm/mach-stm32/Kconfig"
2122 source "arch/arm/mach-stm32mp/Kconfig"
2124 source "arch/arm/mach-sunxi/Kconfig"
2126 source "arch/arm/mach-tegra/Kconfig"
2128 source "arch/arm/mach-u8500/Kconfig"
2130 source "arch/arm/mach-uniphier/Kconfig"
2132 source "arch/arm/cpu/armv7/vf610/Kconfig"
2134 source "arch/arm/mach-zynq/Kconfig"
2136 source "arch/arm/mach-zynqmp/Kconfig"
2138 source "arch/arm/mach-versal/Kconfig"
2140 source "arch/arm/mach-zynqmp-r5/Kconfig"
2142 source "arch/arm/cpu/armv7/Kconfig"
2144 source "arch/arm/cpu/armv8/Kconfig"
2146 source "arch/arm/mach-imx/Kconfig"
2148 source "arch/arm/mach-nexell/Kconfig"
2150 source "board/armltd/total_compute/Kconfig"
2152 source "board/bosch/shc/Kconfig"
2153 source "board/bosch/guardian/Kconfig"
2154 source "board/Marvell/octeontx/Kconfig"
2155 source "board/Marvell/octeontx2/Kconfig"
2156 source "board/armltd/vexpress/Kconfig"
2157 source "board/armltd/vexpress64/Kconfig"
2158 source "board/cortina/presidio-asic/Kconfig"
2159 source "board/broadcom/bcm963158/Kconfig"
2160 source "board/broadcom/bcm968360bg/Kconfig"
2161 source "board/broadcom/bcm968580xref/Kconfig"
2162 source "board/broadcom/bcmns3/Kconfig"
2163 source "board/cavium/thunderx/Kconfig"
2164 source "board/eets/pdu001/Kconfig"
2165 source "board/emulation/qemu-arm/Kconfig"
2166 source "board/freescale/ls2080aqds/Kconfig"
2167 source "board/freescale/ls2080ardb/Kconfig"
2168 source "board/freescale/ls1088a/Kconfig"
2169 source "board/freescale/ls1028a/Kconfig"
2170 source "board/freescale/ls1021aqds/Kconfig"
2171 source "board/freescale/ls1043aqds/Kconfig"
2172 source "board/freescale/ls1021atwr/Kconfig"
2173 source "board/freescale/ls1021atsn/Kconfig"
2174 source "board/freescale/ls1021aiot/Kconfig"
2175 source "board/freescale/ls1046aqds/Kconfig"
2176 source "board/freescale/ls1043ardb/Kconfig"
2177 source "board/freescale/ls1046ardb/Kconfig"
2178 source "board/freescale/ls1046afrwy/Kconfig"
2179 source "board/freescale/ls1012aqds/Kconfig"
2180 source "board/freescale/ls1012ardb/Kconfig"
2181 source "board/freescale/ls1012afrdm/Kconfig"
2182 source "board/freescale/lx2160a/Kconfig"
2183 source "board/grinn/chiliboard/Kconfig"
2184 source "board/hisilicon/hikey/Kconfig"
2185 source "board/hisilicon/hikey960/Kconfig"
2186 source "board/hisilicon/poplar/Kconfig"
2187 source "board/isee/igep003x/Kconfig"
2188 source "board/kontron/sl28/Kconfig"
2189 source "board/myir/mys_6ulx/Kconfig"
2190 source "board/seeed/npi_imx6ull/Kconfig"
2191 source "board/socionext/developerbox/Kconfig"
2192 source "board/st/stv0991/Kconfig"
2193 source "board/tcl/sl50/Kconfig"
2194 source "board/toradex/colibri_pxa270/Kconfig"
2195 source "board/variscite/dart_6ul/Kconfig"
2196 source "board/vscom/baltos/Kconfig"
2197 source "board/phytium/durian/Kconfig"
2198 source "board/xen/xenguest_arm64/Kconfig"
2199 source "board/keymile/Kconfig"
2201 source "arch/arm/Kconfig.debug"
2206 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2207 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2208 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64