1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
15 select INIT_SP_RELATIVE
17 U-Boot expects to be linked to a specific hard-coded address, and to
18 be loaded to and run from that address. This option lifts that
19 restriction, thus allowing the code to be loaded to and executed
20 from almost any address. This logic relies on the relocation
21 information that is embedded in the binary to support U-Boot
22 relocating itself to the top-of-RAM later during execution.
24 config INIT_SP_RELATIVE
25 bool "Specify the early stack pointer relative to the .bss section"
27 U-Boot typically uses a hard-coded value for the stack pointer
28 before relocation. Enable this option to instead calculate the
29 initial SP at run-time. This is useful to avoid hard-coding addresses
30 into U-Boot, so that it can be loaded and executed at arbitrary
31 addresses and thus avoid using arbitrary addresses at runtime.
33 If this option is enabled, the early stack pointer is set to
34 &_bss_start with a offset value added. The offset is specified by
35 SYS_INIT_SP_BSS_OFFSET.
37 config SYS_INIT_SP_BSS_OFFSET
38 int "Early stack offset from the .bss base address"
39 depends on INIT_SP_RELATIVE
42 This option's value is the offset added to &_bss_start in order to
43 calculate the stack pointer. This offset should be large enough so
44 that the early malloc region, global data (gd), and early stack usage
45 do not overlap any appended DTB.
47 config LINUX_KERNEL_IMAGE_HEADER
50 Place a Linux kernel image header at the start of the U-Boot binary.
51 The format of the header is described in the Linux kernel source at
52 Documentation/arm64/booting.txt. This feature is useful since the
53 image header reports the amount of memory (BSS and similar) that
54 U-Boot needs to use, but which isn't part of the binary.
56 if LINUX_KERNEL_IMAGE_HEADER
57 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
60 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
61 TEXT_OFFSET value written to the Linux kernel image header.
70 ARM GICV3 Interrupt translation service (ITS).
71 Basic support for programming locality specific peripheral
72 interrupts (LPI) configuration tables and enable LPI tables.
73 LPI configuration table can be used by u-boot or Linux.
74 ARM GICV3 has limitation, once the LPI table is enabled, LPI
75 configuration table can not be re-programmed, unless GICV3 reset.
79 default y if ARM64 && !POSITION_INDEPENDENT
81 config DMA_ADDR_T_64BIT
91 # Used for compatibility with asm files copied from the kernel
92 config ARM_ASM_UNIFIED
96 # Used for compatibility with asm files copied from the kernel
100 config SYS_ICACHE_OFF
101 bool "Do not enable icache"
104 Do not enable instruction cache in U-Boot.
106 config SPL_SYS_ICACHE_OFF
107 bool "Do not enable icache in SPL"
109 default SYS_ICACHE_OFF
111 Do not enable instruction cache in SPL.
113 config SYS_DCACHE_OFF
114 bool "Do not enable dcache"
117 Do not enable data cache in U-Boot.
119 config SPL_SYS_DCACHE_OFF
120 bool "Do not enable dcache in SPL"
122 default SYS_DCACHE_OFF
124 Do not enable data cache in SPL.
126 config SYS_ARM_CACHE_CP15
127 bool "CP15 based cache enabling support"
129 Select this if your processor suports enabling caches by using
133 bool "MMU-based Paged Memory Management Support"
134 select SYS_ARM_CACHE_CP15
136 Select if you want MMU-based virtualised addressing space
137 support via paged memory management.
140 bool 'Use the ARM v7 PMSA Compliant MPU'
142 Some ARM systems without an MMU have instead a Memory Protection
143 Unit (MPU) that defines the type and permissions for regions of
145 If your CPU has an MPU then you should choose 'y' here unless you
146 know that you do not want to use the MPU.
148 # If set, the workarounds for these ARM errata are applied early during U-Boot
149 # startup. Note that in general these options force the workarounds to be
150 # applied; no CPU-type/version detection exists, unlike the similar options in
151 # the Linux kernel. Do not set these options unless they apply! Also note that
152 # the following can be machine-specific errata. These do have ability to
153 # provide rudimentary version and machine-specific checks, but expect no
155 # CONFIG_ARM_ERRATA_430973
156 # CONFIG_ARM_ERRATA_454179
157 # CONFIG_ARM_ERRATA_621766
158 # CONFIG_ARM_ERRATA_798870
159 # CONFIG_ARM_ERRATA_801819
160 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
161 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
163 config ARM_ERRATA_430973
166 config ARM_ERRATA_454179
169 config ARM_ERRATA_621766
172 config ARM_ERRATA_716044
175 config ARM_ERRATA_725233
178 config ARM_ERRATA_742230
181 config ARM_ERRATA_743622
184 config ARM_ERRATA_751472
187 config ARM_ERRATA_761320
190 config ARM_ERRATA_773022
193 config ARM_ERRATA_774769
196 config ARM_ERRATA_794072
199 config ARM_ERRATA_798870
202 config ARM_ERRATA_801819
205 config ARM_ERRATA_826974
208 config ARM_ERRATA_828024
211 config ARM_ERRATA_829520
214 config ARM_ERRATA_833069
217 config ARM_ERRATA_833471
220 config ARM_ERRATA_845369
223 config ARM_ERRATA_852421
226 config ARM_ERRATA_852423
229 config ARM_ERRATA_855873
232 config ARM_CORTEX_A8_CVE_2017_5715
235 config ARM_CORTEX_A15_CVE_2017_5715
240 select SYS_CACHE_SHIFT_5
245 select SYS_CACHE_SHIFT_5
250 select SYS_CACHE_SHIFT_5
255 select SYS_CACHE_SHIFT_5
260 select SYS_CACHE_SHIFT_5
266 select SYS_CACHE_SHIFT_5
273 select SYS_CACHE_SHIFT_6
280 select SYS_CACHE_SHIFT_5
281 select SYS_THUMB_BUILD
287 select SYS_ARM_CACHE_CP15
289 select SYS_CACHE_SHIFT_6
293 select SYS_CACHE_SHIFT_5
298 select SYS_CACHE_SHIFT_5
302 default "arm720t" if CPU_ARM720T
303 default "arm920t" if CPU_ARM920T
304 default "arm926ejs" if CPU_ARM926EJS
305 default "arm946es" if CPU_ARM946ES
306 default "arm1136" if CPU_ARM1136
307 default "arm1176" if CPU_ARM1176
308 default "armv7" if CPU_V7A
309 default "armv7" if CPU_V7R
310 default "armv7m" if CPU_V7M
311 default "pxa" if CPU_PXA
312 default "sa1100" if CPU_SA1100
313 default "armv8" if ARM64
317 default 4 if CPU_ARM720T
318 default 4 if CPU_ARM920T
319 default 5 if CPU_ARM926EJS
320 default 5 if CPU_ARM946ES
321 default 6 if CPU_ARM1136
322 default 6 if CPU_ARM1176
327 default 4 if CPU_SA1100
330 config SYS_CACHE_SHIFT_5
333 config SYS_CACHE_SHIFT_6
336 config SYS_CACHE_SHIFT_7
339 config SYS_CACHELINE_SIZE
341 default 128 if SYS_CACHE_SHIFT_7
342 default 64 if SYS_CACHE_SHIFT_6
343 default 32 if SYS_CACHE_SHIFT_5
346 prompt "Select the ARM data write cache policy"
347 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
348 TARGET_BCMNSP || CPU_PXA || RZA1
349 default SYS_ARM_CACHE_WRITEBACK
351 config SYS_ARM_CACHE_WRITEBACK
352 bool "Write-back (WB)"
354 A write updates the cache only and marks the cache line as dirty.
355 External memory is updated only when the line is evicted or explicitly
358 config SYS_ARM_CACHE_WRITETHROUGH
359 bool "Write-through (WT)"
361 A write updates both the cache and the external memory system.
362 This does not mark the cache line as dirty.
364 config SYS_ARM_CACHE_WRITEALLOC
365 bool "Write allocation (WA)"
367 A cache line is allocated on a write miss. This means that executing a
368 store instruction on the processor might cause a burst read to occur.
369 There is a linefill to obtain the data for the cache line, before the
374 bool "Enable ARCH_CPU_INIT"
376 Some architectures require a call to arch_cpu_init().
377 Say Y here to enable it
379 config SYS_ARCH_TIMER
380 bool "ARM Generic Timer support"
381 depends on CPU_V7A || ARM64
384 The ARM Generic Timer (aka arch-timer) provides an architected
385 interface to a timer source on an SoC.
386 It is mandatory for ARMv8 implementation and widely available
390 bool "Support for ARM SMC Calling Convention (SMCCC)"
391 depends on CPU_V7A || ARM64
394 Say Y here if you want to enable ARM SMC Calling Convention.
395 This should be enabled if U-Boot needs to communicate with system
396 firmware (for example, PSCI) according to SMCCC.
399 bool "support boot from semihosting"
401 In emulated environments, semihosting is a way for
402 the hosted environment to call out to the emulator to
403 retrieve files from the host machine.
405 config SYS_THUMB_BUILD
406 bool "Build U-Boot using the Thumb instruction set"
409 Use this flag to build U-Boot using the Thumb instruction set for
410 ARM architectures. Thumb instruction set provides better code
411 density. For ARM architectures that support Thumb2 this flag will
412 result in Thumb2 code generated by GCC.
414 config SPL_SYS_THUMB_BUILD
415 bool "Build SPL using the Thumb instruction set"
416 default y if SYS_THUMB_BUILD
417 depends on !ARM64 && SPL
419 Use this flag to build SPL using the Thumb instruction set for
420 ARM architectures. Thumb instruction set provides better code
421 density. For ARM architectures that support Thumb2 this flag will
422 result in Thumb2 code generated by GCC.
424 config TPL_SYS_THUMB_BUILD
425 bool "Build TPL using the Thumb instruction set"
426 default y if SYS_THUMB_BUILD
427 depends on TPL && !ARM64
429 Use this flag to build TPL using the Thumb instruction set for
430 ARM architectures. Thumb instruction set provides better code
431 density. For ARM architectures that support Thumb2 this flag will
432 result in Thumb2 code generated by GCC.
435 config SYS_L2CACHE_OFF
438 If SoC does not support L2CACHE or one does not want to enable
439 L2CACHE, choose this option.
441 config ENABLE_ARM_SOC_BOOT0_HOOK
442 bool "prepare BOOT0 header"
444 If the SoC's BOOT0 requires a header area filled with (magic)
445 values, then choose this option, and create a file included as
446 <asm/arch/boot0.h> which contains the required assembler code.
448 config ARM_CORTEX_CPU_IS_UP
452 config USE_ARCH_MEMCPY
453 bool "Use an assembly optimized implementation of memcpy"
457 Enable the generation of an optimized version of memcpy.
458 Such an implementation may be faster under some conditions
459 but may increase the binary size.
461 config SPL_USE_ARCH_MEMCPY
462 bool "Use an assembly optimized implementation of memcpy for SPL"
463 default y if USE_ARCH_MEMCPY
464 depends on !ARM64 && SPL
466 Enable the generation of an optimized version of memcpy.
467 Such an implementation may be faster under some conditions
468 but may increase the binary size.
470 config TPL_USE_ARCH_MEMCPY
471 bool "Use an assembly optimized implementation of memcpy for TPL"
472 default y if USE_ARCH_MEMCPY
473 depends on !ARM64 && TPL
475 Enable the generation of an optimized version of memcpy.
476 Such an implementation may be faster under some conditions
477 but may increase the binary size.
479 config USE_ARCH_MEMSET
480 bool "Use an assembly optimized implementation of memset"
484 Enable the generation of an optimized version of memset.
485 Such an implementation may be faster under some conditions
486 but may increase the binary size.
488 config SPL_USE_ARCH_MEMSET
489 bool "Use an assembly optimized implementation of memset for SPL"
490 default y if USE_ARCH_MEMSET
491 depends on !ARM64 && SPL
493 Enable the generation of an optimized version of memset.
494 Such an implementation may be faster under some conditions
495 but may increase the binary size.
497 config TPL_USE_ARCH_MEMSET
498 bool "Use an assembly optimized implementation of memset for TPL"
499 default y if USE_ARCH_MEMSET
500 depends on !ARM64 && TPL
502 Enable the generation of an optimized version of memset.
503 Such an implementation may be faster under some conditions
504 but may increase the binary size.
506 config ARM64_SUPPORT_AARCH32
507 bool "ARM64 system support AArch32 execution state"
509 default y if !TARGET_THUNDERX_88XX
511 This ARM64 system supports AArch32 execution state.
514 prompt "Target select"
519 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
520 select SPL_SEPARATE_BSS if SPL
522 config TARGET_EDB93XX
523 bool "Support edb93xx"
527 config TARGET_ASPENITE
528 bool "Support aspenite"
532 bool "Support gplugd"
538 select SPL_DM_SPI if SPL
541 Support for TI's DaVinci platform.
544 bool "Marvell Kirkwood"
545 select ARCH_MISC_INIT
546 select BOARD_EARLY_INIT_F
550 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
556 select SPL_DM_SPI if SPL
557 select SPL_DM_SPI_FLASH if SPL
572 config TARGET_SPEAR300
573 bool "Support spear300"
574 select BOARD_EARLY_INIT_F
579 config TARGET_SPEAR310
580 bool "Support spear310"
581 select BOARD_EARLY_INIT_F
586 config TARGET_SPEAR320
587 bool "Support spear320"
588 select BOARD_EARLY_INIT_F
593 config TARGET_SPEAR600
594 bool "Support spear600"
595 select BOARD_EARLY_INIT_F
600 config TARGET_STV0991
601 bool "Support stv0991"
614 select BOARD_LATE_INIT
623 config TARGET_MX35PDK
624 bool "Support mx35pdk"
625 select BOARD_LATE_INIT
629 bool "Broadcom BCM283X family"
635 select SERIAL_SEARCH_ALL
640 bool "Broadcom BCM63158 family"
646 bool "Broadcom BCM68360 family"
652 bool "Broadcom BCM6858 family"
657 config TARGET_VEXPRESS_CA15_TC2
658 bool "Support vexpress_ca15_tc2"
660 select CPU_V7_HAS_NONSEC
661 select CPU_V7_HAS_VIRT
665 bool "Broadcom BCM7XXX family"
669 select OF_PRIOR_STAGE
672 This enables support for Broadcom ARM-based set-top box
673 chipsets, including the 7445 family of chips.
675 config TARGET_VEXPRESS_CA5X2
676 bool "Support vexpress_ca5x2"
680 config TARGET_VEXPRESS_CA9X4
681 bool "Support vexpress_ca9x4"
685 config TARGET_BCM23550_W1D
686 bool "Support bcm23550_w1d"
691 config TARGET_BCM28155_AP
692 bool "Support bcm28155_ap"
697 config TARGET_BCMCYGNUS
698 bool "Support bcmcygnus"
701 imply BCM_SF2_ETH_GMAC
709 bool "Support bcmnsp"
713 bool "Support Broadcom Northstar2"
716 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
717 ARMv8 Cortex-A57 processors targeting a broad range of networking
721 bool "Support Broadcom NS3"
723 select BOARD_LATE_INIT
725 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
726 ARMv8 Cortex-A72 processors targeting a broad range of networking
730 bool "Samsung EXYNOS"
739 imply SYS_THUMB_BUILD
744 bool "Samsung S5PC1XX"
753 bool "Calxeda Highbank"
757 config ARCH_INTEGRATOR
758 bool "ARM Ltd. Integrator family"
765 bool "Qualcomm IPQ40xx SoCs"
780 select SYS_ARCH_TIMER
781 select SYS_THUMB_BUILD
787 bool "Texas Instruments' K3 Architecture"
792 config ARCH_OMAP2PLUS
795 select SPL_BOARD_INIT if SPL
796 select SPL_STACK_R if SPL
802 imply DISTRO_DEFAULTS
805 Support for the Meson SoC family developed by Amlogic Inc.,
806 targeted at media players and tablet computers. We currently
807 support the S905 (GXBaby) 64-bit SoC.
814 select SPL_LIBCOMMON_SUPPORT if SPL
815 select SPL_LIBGENERIC_SUPPORT if SPL
816 select SPL_OF_CONTROL if SPL
819 Support for the MediaTek SoCs family developed by MediaTek Inc.
820 Please refer to doc/README.mediatek for more information.
823 bool "NXP LPC32xx platform"
833 bool "NXP i.MX8 platform"
837 select ENABLE_ARM_SOC_BOOT0_HOOK
840 bool "NXP i.MX8M platform"
847 bool "NXP i.MXRT platform"
855 bool "NXP i.MX23 family"
866 bool "NXP i.MX28 family"
872 bool "NXP i.MX31 family"
878 select ROM_UNIFIED_SECTIONS
880 imply SYS_THUMB_BUILD
884 select ARCH_MISC_INIT
886 select SYS_FSL_HAS_SEC if IMX_HAB
887 select SYS_FSL_SEC_COMPAT_4
888 select SYS_FSL_SEC_LE
889 imply BOARD_EARLY_INIT_F
891 imply SYS_THUMB_BUILD
896 select SYS_FSL_HAS_SEC
897 select SYS_FSL_SEC_COMPAT_4
898 select SYS_FSL_SEC_LE
900 imply SYS_THUMB_BUILD
904 default "arch/arm/mach-omap2/u-boot-spl.lds"
909 select BOARD_EARLY_INIT_F
914 bool "Nexell S5P4418/S5P6818 SoC"
915 select ENABLE_ARM_SOC_BOOT0_HOOK
919 bool "Actions Semi OWL SoCs"
927 select SYS_RELOC_GD_ENV_ADDR
931 bool "QEMU Virtual Platform"
932 select ARCH_SUPPORT_TFABOOT
942 bool "Renesas ARM SoCs"
943 select BOARD_EARLY_INIT_F if !RZA1
948 imply SYS_THUMB_BUILD
949 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
951 config TARGET_S32V234EVB
952 bool "Support s32v234evb"
954 select SYS_FSL_ERRATUM_ESDHC111
956 config ARCH_SNAPDRAGON
957 bool "Qualcomm Snapdragon SoCs"
970 bool "Altera SOCFPGA family"
971 select ARCH_EARLY_INIT_R
972 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
973 select ARM64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
974 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
977 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
979 select SPL_DM_RESET if DM_RESET
981 select SPL_LIBCOMMON_SUPPORT
982 select SPL_LIBGENERIC_SUPPORT
983 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
984 select SPL_OF_CONTROL
985 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
986 select SPL_SERIAL_SUPPORT
988 select SPL_WATCHDOG_SUPPORT
991 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
993 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
994 select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
1004 imply SPL_DM_SPI_FLASH
1005 imply SPL_LIBDISK_SUPPORT
1006 imply SPL_MMC_SUPPORT
1007 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1008 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1009 imply SPL_SPI_FLASH_SUPPORT
1010 imply SPL_SPI_SUPPORT
1014 bool "Support sunxi (Allwinner) SoCs"
1017 select CMD_MMC if MMC
1018 select CMD_USB if DISTRO_DEFAULTS
1024 select DM_MMC if MMC
1025 select DM_SCSI if SCSI
1027 select DM_USB if DISTRO_DEFAULTS
1028 select OF_BOARD_SETUP
1031 select SPECIFY_CONSOLE_INDEX
1032 select SPL_STACK_R if SPL
1033 select SPL_SYS_MALLOC_SIMPLE if SPL
1034 select SPL_SYS_THUMB_BUILD if !ARM64
1037 select SYS_THUMB_BUILD if !ARM64
1038 select USB if DISTRO_DEFAULTS
1039 select USB_KEYBOARD if DISTRO_DEFAULTS
1040 select USB_STORAGE if DISTRO_DEFAULTS
1041 select SPL_USE_TINY_PRINTF
1043 select SYS_RELOC_GD_ENV_ADDR
1046 imply CMD_UBI if MTD_RAW_NAND
1047 imply DISTRO_DEFAULTS
1050 imply OF_LIBFDT_OVERLAY
1051 imply PRE_CONSOLE_BUFFER
1052 imply SPL_GPIO_SUPPORT
1053 imply SPL_LIBCOMMON_SUPPORT
1054 imply SPL_LIBGENERIC_SUPPORT
1055 imply SPL_MMC_SUPPORT if MMC
1056 imply SPL_POWER_SUPPORT
1057 imply SPL_SERIAL_SUPPORT
1061 bool "ST-Ericsson U8500 Series"
1065 select DM_MMC if MMC
1067 select DM_USB if USB
1071 imply ARM_PL180_MMCI
1073 imply NOMADIK_MTU_TIMER
1076 imply SYSRESET_SYSCON
1079 bool "Support Xilinx Versal Platform"
1083 select DM_ETH if NET
1084 select DM_MMC if MMC
1087 imply BOARD_LATE_INIT
1088 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1091 bool "Freescale Vybrid"
1093 select SYS_FSL_ERRATUM_ESDHC111
1098 bool "Xilinx Zynq based platform"
1103 select DM_ETH if NET
1104 select DM_MMC if MMC
1108 select DM_USB if USB
1111 select SPL_BOARD_INIT if SPL
1112 select SPL_CLK if SPL
1113 select SPL_DM if SPL
1114 select SPL_DM_SPI if SPL
1115 select SPL_DM_SPI_FLASH if SPL
1116 select SPL_OF_CONTROL if SPL
1117 select SPL_SEPARATE_BSS if SPL
1119 imply ARCH_EARLY_INIT_R
1120 imply BOARD_LATE_INIT
1124 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1127 config ARCH_ZYNQMP_R5
1128 bool "Xilinx ZynqMP R5 based platform"
1132 select DM_ETH if NET
1133 select DM_MMC if MMC
1140 bool "Xilinx ZynqMP based platform"
1144 select DM_ETH if NET
1146 select DM_MMC if MMC
1148 select DM_SPI if SPI
1149 select DM_SPI_FLASH if DM_SPI
1150 select DM_USB if USB
1153 select SPL_BOARD_INIT if SPL
1154 select SPL_CLK if SPL
1155 select SPL_DM_SPI if SPI
1156 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1157 select SPL_DM_MAILBOX if SPL
1158 select SPL_FIRMWARE if SPL
1159 select SPL_SEPARATE_BSS if SPL
1162 imply BOARD_LATE_INIT
1164 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1171 imply DISTRO_DEFAULTS
1174 config TARGET_VEXPRESS64_AEMV8A
1175 bool "Support vexpress_aemv8a"
1179 config TARGET_VEXPRESS64_BASE_FVP
1180 bool "Support Versatile Express ARMv8a FVP BASE model"
1185 config TARGET_VEXPRESS64_JUNO
1186 bool "Support Versatile Express Juno Development Platform"
1201 config TARGET_LS2080A_EMU
1202 bool "Support ls2080a_emu"
1205 select ARMV8_MULTIENTRY
1206 select FSL_DDR_SYNC_REFRESH
1208 Support for Freescale LS2080A_EMU platform.
1209 The LS2080A Development System (EMULATOR) is a pre-silicon
1210 development platform that supports the QorIQ LS2080A
1211 Layerscape Architecture processor.
1213 config TARGET_LS2080A_SIMU
1214 bool "Support ls2080a_simu"
1217 select ARMV8_MULTIENTRY
1218 select BOARD_LATE_INIT
1220 Support for Freescale LS2080A_SIMU platform.
1221 The LS2080A Development System (QDS) is a pre silicon
1222 development platform that supports the QorIQ LS2080A
1223 Layerscape Architecture processor.
1225 config TARGET_LS1088AQDS
1226 bool "Support ls1088aqds"
1229 select ARMV8_MULTIENTRY
1230 select ARCH_SUPPORT_TFABOOT
1231 select BOARD_LATE_INIT
1233 select FSL_DDR_INTERACTIVE if !SD_BOOT
1235 Support for NXP LS1088AQDS platform.
1236 The LS1088A Development System (QDS) is a high-performance
1237 development platform that supports the QorIQ LS1088A
1238 Layerscape Architecture processor.
1240 config TARGET_LS2080AQDS
1241 bool "Support ls2080aqds"
1244 select ARMV8_MULTIENTRY
1245 select ARCH_SUPPORT_TFABOOT
1246 select BOARD_LATE_INIT
1251 select FSL_DDR_INTERACTIVE if !SPL
1253 Support for Freescale LS2080AQDS platform.
1254 The LS2080A Development System (QDS) is a high-performance
1255 development platform that supports the QorIQ LS2080A
1256 Layerscape Architecture processor.
1258 config TARGET_LS2080ARDB
1259 bool "Support ls2080ardb"
1262 select ARMV8_MULTIENTRY
1263 select ARCH_SUPPORT_TFABOOT
1264 select BOARD_LATE_INIT
1267 select FSL_DDR_INTERACTIVE if !SPL
1271 Support for Freescale LS2080ARDB platform.
1272 The LS2080A Reference design board (RDB) is a high-performance
1273 development platform that supports the QorIQ LS2080A
1274 Layerscape Architecture processor.
1276 config TARGET_LS2081ARDB
1277 bool "Support ls2081ardb"
1280 select ARMV8_MULTIENTRY
1281 select BOARD_LATE_INIT
1284 Support for Freescale LS2081ARDB platform.
1285 The LS2081A Reference design board (RDB) is a high-performance
1286 development platform that supports the QorIQ LS2081A/LS2041A
1287 Layerscape Architecture processor.
1289 config TARGET_LX2160ARDB
1290 bool "Support lx2160ardb"
1293 select ARMV8_MULTIENTRY
1294 select ARCH_SUPPORT_TFABOOT
1295 select BOARD_LATE_INIT
1297 Support for NXP LX2160ARDB platform.
1298 The lx2160ardb (LX2160A Reference design board (RDB)
1299 is a high-performance development platform that supports the
1300 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1302 config TARGET_LX2160AQDS
1303 bool "Support lx2160aqds"
1306 select ARMV8_MULTIENTRY
1307 select ARCH_SUPPORT_TFABOOT
1308 select BOARD_LATE_INIT
1310 Support for NXP LX2160AQDS platform.
1311 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1312 is a high-performance development platform that supports the
1313 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1316 bool "Support HiKey 96boards Consumer Edition Platform"
1323 select SPECIFY_CONSOLE_INDEX
1326 Support for HiKey 96boards platform. It features a HI6220
1327 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1329 config TARGET_HIKEY960
1330 bool "Support HiKey960 96boards Consumer Edition Platform"
1338 Support for HiKey960 96boards platform. It features a HI3660
1339 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1341 config TARGET_POPLAR
1342 bool "Support Poplar 96boards Enterprise Edition Platform"
1351 Support for Poplar 96boards EE platform. It features a HI3798cv200
1352 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1353 making it capable of running any commercial set-top solution based on
1356 config TARGET_LS1012AQDS
1357 bool "Support ls1012aqds"
1360 select ARCH_SUPPORT_TFABOOT
1361 select BOARD_LATE_INIT
1363 Support for Freescale LS1012AQDS platform.
1364 The LS1012A Development System (QDS) is a high-performance
1365 development platform that supports the QorIQ LS1012A
1366 Layerscape Architecture processor.
1368 config TARGET_LS1012ARDB
1369 bool "Support ls1012ardb"
1372 select ARCH_SUPPORT_TFABOOT
1373 select BOARD_LATE_INIT
1377 Support for Freescale LS1012ARDB platform.
1378 The LS1012A Reference design board (RDB) is a high-performance
1379 development platform that supports the QorIQ LS1012A
1380 Layerscape Architecture processor.
1382 config TARGET_LS1012A2G5RDB
1383 bool "Support ls1012a2g5rdb"
1386 select ARCH_SUPPORT_TFABOOT
1387 select BOARD_LATE_INIT
1390 Support for Freescale LS1012A2G5RDB platform.
1391 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1392 development platform that supports the QorIQ LS1012A
1393 Layerscape Architecture processor.
1395 config TARGET_LS1012AFRWY
1396 bool "Support ls1012afrwy"
1399 select ARCH_SUPPORT_TFABOOT
1400 select BOARD_LATE_INIT
1404 Support for Freescale LS1012AFRWY platform.
1405 The LS1012A FRWY board (FRWY) is a high-performance
1406 development platform that supports the QorIQ LS1012A
1407 Layerscape Architecture processor.
1409 config TARGET_LS1012AFRDM
1410 bool "Support ls1012afrdm"
1413 select ARCH_SUPPORT_TFABOOT
1415 Support for Freescale LS1012AFRDM platform.
1416 The LS1012A Freedom board (FRDM) is a high-performance
1417 development platform that supports the QorIQ LS1012A
1418 Layerscape Architecture processor.
1420 config TARGET_LS1028AQDS
1421 bool "Support ls1028aqds"
1424 select ARMV8_MULTIENTRY
1425 select ARCH_SUPPORT_TFABOOT
1426 select BOARD_LATE_INIT
1428 Support for Freescale LS1028AQDS platform
1429 The LS1028A Development System (QDS) is a high-performance
1430 development platform that supports the QorIQ LS1028A
1431 Layerscape Architecture processor.
1433 config TARGET_LS1028ARDB
1434 bool "Support ls1028ardb"
1437 select ARMV8_MULTIENTRY
1438 select ARCH_SUPPORT_TFABOOT
1439 select BOARD_LATE_INIT
1441 Support for Freescale LS1028ARDB platform
1442 The LS1028A Development System (RDB) is a high-performance
1443 development platform that supports the QorIQ LS1028A
1444 Layerscape Architecture processor.
1446 config TARGET_LS1088ARDB
1447 bool "Support ls1088ardb"
1450 select ARMV8_MULTIENTRY
1451 select ARCH_SUPPORT_TFABOOT
1452 select BOARD_LATE_INIT
1454 select FSL_DDR_INTERACTIVE if !SD_BOOT
1456 Support for NXP LS1088ARDB platform.
1457 The LS1088A Reference design board (RDB) is a high-performance
1458 development platform that supports the QorIQ LS1088A
1459 Layerscape Architecture processor.
1461 config TARGET_LS1021AQDS
1462 bool "Support ls1021aqds"
1464 select ARCH_SUPPORT_PSCI
1465 select BOARD_EARLY_INIT_F
1466 select BOARD_LATE_INIT
1468 select CPU_V7_HAS_NONSEC
1469 select CPU_V7_HAS_VIRT
1470 select LS1_DEEP_SLEEP
1473 select FSL_DDR_INTERACTIVE
1474 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1475 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1478 config TARGET_LS1021ATWR
1479 bool "Support ls1021atwr"
1481 select ARCH_SUPPORT_PSCI
1482 select BOARD_EARLY_INIT_F
1483 select BOARD_LATE_INIT
1485 select CPU_V7_HAS_NONSEC
1486 select CPU_V7_HAS_VIRT
1487 select LS1_DEEP_SLEEP
1489 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1492 config TARGET_LS1021ATSN
1493 bool "Support ls1021atsn"
1495 select ARCH_SUPPORT_PSCI
1496 select BOARD_EARLY_INIT_F
1497 select BOARD_LATE_INIT
1499 select CPU_V7_HAS_NONSEC
1500 select CPU_V7_HAS_VIRT
1501 select LS1_DEEP_SLEEP
1505 config TARGET_LS1021AIOT
1506 bool "Support ls1021aiot"
1508 select ARCH_SUPPORT_PSCI
1509 select BOARD_LATE_INIT
1511 select CPU_V7_HAS_NONSEC
1512 select CPU_V7_HAS_VIRT
1514 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1517 Support for Freescale LS1021AIOT platform.
1518 The LS1021A Freescale board (IOT) is a high-performance
1519 development platform that supports the QorIQ LS1021A
1520 Layerscape Architecture processor.
1522 config TARGET_LS1043AQDS
1523 bool "Support ls1043aqds"
1526 select ARMV8_MULTIENTRY
1527 select ARCH_SUPPORT_TFABOOT
1528 select BOARD_EARLY_INIT_F
1529 select BOARD_LATE_INIT
1531 select FSL_DDR_INTERACTIVE if !SPL
1532 select FSL_DSPI if !SPL_NO_DSPI
1533 select DM_SPI_FLASH if FSL_DSPI
1537 Support for Freescale LS1043AQDS platform.
1539 config TARGET_LS1043ARDB
1540 bool "Support ls1043ardb"
1543 select ARMV8_MULTIENTRY
1544 select ARCH_SUPPORT_TFABOOT
1545 select BOARD_EARLY_INIT_F
1546 select BOARD_LATE_INIT
1548 select FSL_DSPI if !SPL_NO_DSPI
1549 select DM_SPI_FLASH if FSL_DSPI
1551 Support for Freescale LS1043ARDB platform.
1553 config TARGET_LS1046AQDS
1554 bool "Support ls1046aqds"
1557 select ARMV8_MULTIENTRY
1558 select ARCH_SUPPORT_TFABOOT
1559 select BOARD_EARLY_INIT_F
1560 select BOARD_LATE_INIT
1561 select DM_SPI_FLASH if DM_SPI
1563 select FSL_DDR_BIST if !SPL
1564 select FSL_DDR_INTERACTIVE if !SPL
1565 select FSL_DDR_INTERACTIVE if !SPL
1568 Support for Freescale LS1046AQDS platform.
1569 The LS1046A Development System (QDS) is a high-performance
1570 development platform that supports the QorIQ LS1046A
1571 Layerscape Architecture processor.
1573 config TARGET_LS1046ARDB
1574 bool "Support ls1046ardb"
1577 select ARMV8_MULTIENTRY
1578 select ARCH_SUPPORT_TFABOOT
1579 select BOARD_EARLY_INIT_F
1580 select BOARD_LATE_INIT
1581 select DM_SPI_FLASH if DM_SPI
1582 select POWER_MC34VR500
1585 select FSL_DDR_INTERACTIVE if !SPL
1588 Support for Freescale LS1046ARDB platform.
1589 The LS1046A Reference Design Board (RDB) is a high-performance
1590 development platform that supports the QorIQ LS1046A
1591 Layerscape Architecture processor.
1593 config TARGET_LS1046AFRWY
1594 bool "Support ls1046afrwy"
1597 select ARMV8_MULTIENTRY
1598 select ARCH_SUPPORT_TFABOOT
1599 select BOARD_EARLY_INIT_F
1600 select BOARD_LATE_INIT
1601 select DM_SPI_FLASH if DM_SPI
1604 Support for Freescale LS1046AFRWY platform.
1605 The LS1046A Freeway Board (FRWY) is a high-performance
1606 development platform that supports the QorIQ LS1046A
1607 Layerscape Architecture processor.
1609 config TARGET_COLIBRI_PXA270
1610 bool "Support colibri_pxa270"
1613 config ARCH_UNIPHIER
1614 bool "Socionext UniPhier SoCs"
1615 select BOARD_LATE_INIT
1625 select OF_BOARD_SETUP
1629 select SPL_BOARD_INIT if SPL
1630 select SPL_DM if SPL
1631 select SPL_LIBCOMMON_SUPPORT if SPL
1632 select SPL_LIBGENERIC_SUPPORT if SPL
1633 select SPL_OF_CONTROL if SPL
1634 select SPL_PINCTRL if SPL
1637 imply DISTRO_DEFAULTS
1640 Support for UniPhier SoC family developed by Socionext Inc.
1641 (formerly, System LSI Business Division of Panasonic Corporation)
1644 bool "Support STMicroelectronics STM32 MCU with cortex M"
1651 bool "Support STMicrolectronics SoCs"
1660 Support for STMicroelectronics STiH407/10 SoC family.
1661 This SoC is used on Linaro 96Board STiH410-B2260
1664 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1665 select ARCH_MISC_INIT
1666 select ARCH_SUPPORT_TFABOOT
1667 select BOARD_LATE_INIT
1676 select OF_SYSTEM_SETUP
1682 select SYS_THUMB_BUILD
1686 imply OF_LIBFDT_OVERLAY
1687 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1690 Support for STM32MP SoC family developed by STMicroelectronics,
1691 MPUs based on ARM cortex A core
1692 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1693 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1695 SPL is the unsecure FSBL for the basic boot chain.
1697 config ARCH_ROCKCHIP
1698 bool "Support Rockchip SoCs"
1700 select BINMAN if !ARM64
1710 select DM_USB if USB
1711 select ENABLE_ARM_SOC_BOOT0_HOOK
1714 select SPL_DM if SPL
1715 select SPL_DM_SPI if SPL
1716 select SPL_DM_SPI_FLASH if SPL
1718 select SYS_THUMB_BUILD if !ARM64
1721 imply DEBUG_UART_BOARD_INIT
1722 imply DISTRO_DEFAULTS
1724 imply SARADC_ROCKCHIP
1726 imply SPL_SYS_MALLOC_SIMPLE
1729 imply USB_FUNCTION_FASTBOOT
1731 config TARGET_THUNDERX_88XX
1732 bool "Support ThunderX 88xx"
1736 select SYS_CACHE_SHIFT_7
1739 bool "Support Aspeed SoCs"
1744 config TARGET_DURIAN
1745 bool "Support Phytium Durian Platform"
1748 Support for durian platform.
1749 It has 2GB Sdram, uart and pcie.
1751 config TARGET_PRESIDIO_ASIC
1752 bool "Support Cortina Presidio ASIC Platform"
1755 config TARGET_XENGUEST_ARM64
1756 bool "Xen guest ARM64"
1760 select LINUX_KERNEL_IMAGE_HEADER
1765 config ARCH_SUPPORT_TFABOOT
1769 bool "Support for booting from TF-A"
1770 depends on ARCH_SUPPORT_TFABOOT
1773 Enabling this will make a U-Boot binary that is capable of being
1774 booted via TF-A (Trusted Firmware for Cortex-A).
1776 config TI_SECURE_DEVICE
1777 bool "HS Device Type Support"
1778 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1780 If a high secure (HS) device type is being used, this config
1781 must be set. This option impacts various aspects of the
1782 build system (to create signed boot images that can be
1783 authenticated) and the code. See the doc/README.ti-secure
1784 file for further details.
1786 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1787 config ISW_ENTRY_ADDR
1788 hex "Address in memory or XIP address of bootloader entry point"
1789 default 0x402F4000 if AM43XX
1790 default 0x402F0400 if AM33XX
1791 default 0x40301350 if OMAP54XX
1793 After any reset, the boot ROM searches the boot media for a valid
1794 boot image. For non-XIP devices, the ROM then copies the image into
1795 internal memory. For all boot modes, after the ROM processes the
1796 boot image it eventually computes the entry point address depending
1797 on the device type (secure/non-secure), boot media (xip/non-xip) and
1801 source "arch/arm/mach-aspeed/Kconfig"
1803 source "arch/arm/mach-at91/Kconfig"
1805 source "arch/arm/mach-bcm283x/Kconfig"
1807 source "arch/arm/mach-bcmstb/Kconfig"
1809 source "arch/arm/mach-davinci/Kconfig"
1811 source "arch/arm/mach-exynos/Kconfig"
1813 source "arch/arm/mach-highbank/Kconfig"
1815 source "arch/arm/mach-integrator/Kconfig"
1817 source "arch/arm/mach-ipq40xx/Kconfig"
1819 source "arch/arm/mach-k3/Kconfig"
1821 source "arch/arm/mach-keystone/Kconfig"
1823 source "arch/arm/mach-kirkwood/Kconfig"
1825 source "arch/arm/mach-lpc32xx/Kconfig"
1827 source "arch/arm/mach-mvebu/Kconfig"
1829 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1831 source "arch/arm/mach-imx/mx2/Kconfig"
1833 source "arch/arm/mach-imx/mx3/Kconfig"
1835 source "arch/arm/mach-imx/mx5/Kconfig"
1837 source "arch/arm/mach-imx/mx6/Kconfig"
1839 source "arch/arm/mach-imx/mx7/Kconfig"
1841 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1843 source "arch/arm/mach-imx/imx8/Kconfig"
1845 source "arch/arm/mach-imx/imx8m/Kconfig"
1847 source "arch/arm/mach-imx/imxrt/Kconfig"
1849 source "arch/arm/mach-imx/mxs/Kconfig"
1851 source "arch/arm/mach-omap2/Kconfig"
1853 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1855 source "arch/arm/mach-orion5x/Kconfig"
1857 source "arch/arm/mach-owl/Kconfig"
1859 source "arch/arm/mach-rmobile/Kconfig"
1861 source "arch/arm/mach-meson/Kconfig"
1863 source "arch/arm/mach-mediatek/Kconfig"
1865 source "arch/arm/mach-qemu/Kconfig"
1867 source "arch/arm/mach-rockchip/Kconfig"
1869 source "arch/arm/mach-s5pc1xx/Kconfig"
1871 source "arch/arm/mach-snapdragon/Kconfig"
1873 source "arch/arm/mach-socfpga/Kconfig"
1875 source "arch/arm/mach-sti/Kconfig"
1877 source "arch/arm/mach-stm32/Kconfig"
1879 source "arch/arm/mach-stm32mp/Kconfig"
1881 source "arch/arm/mach-sunxi/Kconfig"
1883 source "arch/arm/mach-tegra/Kconfig"
1885 source "arch/arm/mach-u8500/Kconfig"
1887 source "arch/arm/mach-uniphier/Kconfig"
1889 source "arch/arm/cpu/armv7/vf610/Kconfig"
1891 source "arch/arm/mach-zynq/Kconfig"
1893 source "arch/arm/mach-zynqmp/Kconfig"
1895 source "arch/arm/mach-versal/Kconfig"
1897 source "arch/arm/mach-zynqmp-r5/Kconfig"
1899 source "arch/arm/cpu/armv7/Kconfig"
1901 source "arch/arm/cpu/armv8/Kconfig"
1903 source "arch/arm/mach-imx/Kconfig"
1905 source "arch/arm/mach-nexell/Kconfig"
1907 source "board/bosch/shc/Kconfig"
1908 source "board/bosch/guardian/Kconfig"
1909 source "board/CarMediaLab/flea3/Kconfig"
1910 source "board/Marvell/aspenite/Kconfig"
1911 source "board/Marvell/gplugd/Kconfig"
1912 source "board/armadeus/apf27/Kconfig"
1913 source "board/armltd/vexpress/Kconfig"
1914 source "board/armltd/vexpress64/Kconfig"
1915 source "board/cortina/presidio-asic/Kconfig"
1916 source "board/broadcom/bcm23550_w1d/Kconfig"
1917 source "board/broadcom/bcm28155_ap/Kconfig"
1918 source "board/broadcom/bcm963158/Kconfig"
1919 source "board/broadcom/bcm968360bg/Kconfig"
1920 source "board/broadcom/bcm968580xref/Kconfig"
1921 source "board/broadcom/bcmcygnus/Kconfig"
1922 source "board/broadcom/bcmnsp/Kconfig"
1923 source "board/broadcom/bcmns2/Kconfig"
1924 source "board/broadcom/bcmns3/Kconfig"
1925 source "board/cavium/thunderx/Kconfig"
1926 source "board/cirrus/edb93xx/Kconfig"
1927 source "board/eets/pdu001/Kconfig"
1928 source "board/emulation/qemu-arm/Kconfig"
1929 source "board/freescale/ls2080a/Kconfig"
1930 source "board/freescale/ls2080aqds/Kconfig"
1931 source "board/freescale/ls2080ardb/Kconfig"
1932 source "board/freescale/ls1088a/Kconfig"
1933 source "board/freescale/ls1028a/Kconfig"
1934 source "board/freescale/ls1021aqds/Kconfig"
1935 source "board/freescale/ls1043aqds/Kconfig"
1936 source "board/freescale/ls1021atwr/Kconfig"
1937 source "board/freescale/ls1021atsn/Kconfig"
1938 source "board/freescale/ls1021aiot/Kconfig"
1939 source "board/freescale/ls1046aqds/Kconfig"
1940 source "board/freescale/ls1043ardb/Kconfig"
1941 source "board/freescale/ls1046ardb/Kconfig"
1942 source "board/freescale/ls1046afrwy/Kconfig"
1943 source "board/freescale/ls1012aqds/Kconfig"
1944 source "board/freescale/ls1012ardb/Kconfig"
1945 source "board/freescale/ls1012afrdm/Kconfig"
1946 source "board/freescale/lx2160a/Kconfig"
1947 source "board/freescale/mx35pdk/Kconfig"
1948 source "board/freescale/s32v234evb/Kconfig"
1949 source "board/grinn/chiliboard/Kconfig"
1950 source "board/hisilicon/hikey/Kconfig"
1951 source "board/hisilicon/hikey960/Kconfig"
1952 source "board/hisilicon/poplar/Kconfig"
1953 source "board/isee/igep003x/Kconfig"
1954 source "board/myir/mys_6ulx/Kconfig"
1955 source "board/spear/spear300/Kconfig"
1956 source "board/spear/spear310/Kconfig"
1957 source "board/spear/spear320/Kconfig"
1958 source "board/spear/spear600/Kconfig"
1959 source "board/spear/x600/Kconfig"
1960 source "board/st/stv0991/Kconfig"
1961 source "board/tcl/sl50/Kconfig"
1962 source "board/toradex/colibri_pxa270/Kconfig"
1963 source "board/variscite/dart_6ul/Kconfig"
1964 source "board/vscom/baltos/Kconfig"
1965 source "board/xilinx/Kconfig"
1966 source "board/xilinx/zynq/Kconfig"
1967 source "board/xilinx/zynqmp/Kconfig"
1968 source "board/xilinx/versal/Kconfig"
1969 source "board/phytium/durian/Kconfig"
1970 source "board/xen/xenguest_arm64/Kconfig"
1972 source "arch/arm/Kconfig.debug"
1977 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
1978 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
1979 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64