1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed from
19 almost any 4K aligned address. This logic relies on the relocation
20 information that is embedded in the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
25 default n if ARCH_QEMU
26 default y if POSITION_INDEPENDENT
28 U-Boot typically uses a hard-coded value for the stack pointer
29 before relocation. Enable this option to instead calculate the
30 initial SP at run-time. This is useful to avoid hard-coding addresses
31 into U-Boot, so that it can be loaded and executed at arbitrary
32 addresses and thus avoid using arbitrary addresses at runtime.
34 If this option is enabled, the early stack pointer is set to
35 &_bss_start with a offset value added. The offset is specified by
36 SYS_INIT_SP_BSS_OFFSET.
38 config SYS_INIT_SP_BSS_OFFSET
39 int "Early stack offset from the .bss base address"
40 depends on INIT_SP_RELATIVE
43 This option's value is the offset added to &_bss_start in order to
44 calculate the stack pointer. This offset should be large enough so
45 that the early malloc region, global data (gd), and early stack usage
46 do not overlap any appended DTB.
48 config LINUX_KERNEL_IMAGE_HEADER
51 Place a Linux kernel image header at the start of the U-Boot binary.
52 The format of the header is described in the Linux kernel source at
53 Documentation/arm64/booting.txt. This feature is useful since the
54 image header reports the amount of memory (BSS and similar) that
55 U-Boot needs to use, but which isn't part of the binary.
57 if LINUX_KERNEL_IMAGE_HEADER
58 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
61 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
62 TEXT_OFFSET value written to the Linux kernel image header.
72 ARM GICV3 Interrupt translation service (ITS).
73 Basic support for programming locality specific peripheral
74 interrupts (LPI) configuration tables and enable LPI tables.
75 LPI configuration table can be used by u-boot or Linux.
76 ARM GICV3 has limitation, once the LPI table is enabled, LPI
77 configuration table can not be re-programmed, unless GICV3 reset.
83 config DMA_ADDR_T_64BIT
93 config GPIO_EXTRA_HEADER
96 # Used for compatibility with asm files copied from the kernel
97 config ARM_ASM_UNIFIED
101 # Used for compatibility with asm files copied from the kernel
105 config SYS_ICACHE_OFF
106 bool "Do not enable icache"
109 Do not enable instruction cache in U-Boot.
111 config SPL_SYS_ICACHE_OFF
112 bool "Do not enable icache in SPL"
114 default SYS_ICACHE_OFF
116 Do not enable instruction cache in SPL.
118 config SYS_DCACHE_OFF
119 bool "Do not enable dcache"
122 Do not enable data cache in U-Boot.
124 config SPL_SYS_DCACHE_OFF
125 bool "Do not enable dcache in SPL"
127 default SYS_DCACHE_OFF
129 Do not enable data cache in SPL.
131 config SYS_ARM_CACHE_CP15
132 bool "CP15 based cache enabling support"
134 Select this if your processor suports enabling caches by using
138 bool "MMU-based Paged Memory Management Support"
139 select SYS_ARM_CACHE_CP15
141 Select if you want MMU-based virtualised addressing space
142 support via paged memory management.
145 bool 'Use the ARM v7 PMSA Compliant MPU'
147 Some ARM systems without an MMU have instead a Memory Protection
148 Unit (MPU) that defines the type and permissions for regions of
150 If your CPU has an MPU then you should choose 'y' here unless you
151 know that you do not want to use the MPU.
153 # If set, the workarounds for these ARM errata are applied early during U-Boot
154 # startup. Note that in general these options force the workarounds to be
155 # applied; no CPU-type/version detection exists, unlike the similar options in
156 # the Linux kernel. Do not set these options unless they apply! Also note that
157 # the following can be machine-specific errata. These do have ability to
158 # provide rudimentary version and machine-specific checks, but expect no
160 # CONFIG_ARM_ERRATA_430973
161 # CONFIG_ARM_ERRATA_454179
162 # CONFIG_ARM_ERRATA_621766
163 # CONFIG_ARM_ERRATA_798870
164 # CONFIG_ARM_ERRATA_801819
165 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
166 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
168 config ARM_ERRATA_430973
171 config ARM_ERRATA_454179
174 config ARM_ERRATA_621766
177 config ARM_ERRATA_716044
180 config ARM_ERRATA_725233
183 config ARM_ERRATA_742230
186 config ARM_ERRATA_743622
189 config ARM_ERRATA_751472
192 config ARM_ERRATA_761320
195 config ARM_ERRATA_773022
198 config ARM_ERRATA_774769
201 config ARM_ERRATA_794072
204 config ARM_ERRATA_798870
207 config ARM_ERRATA_801819
210 config ARM_ERRATA_826974
213 config ARM_ERRATA_828024
216 config ARM_ERRATA_829520
219 config ARM_ERRATA_833069
222 config ARM_ERRATA_833471
225 config ARM_ERRATA_845369
228 config ARM_ERRATA_852421
231 config ARM_ERRATA_852423
234 config ARM_ERRATA_855873
237 config ARM_CORTEX_A8_CVE_2017_5715
240 config ARM_CORTEX_A15_CVE_2017_5715
245 select SYS_CACHE_SHIFT_5
250 select SYS_CACHE_SHIFT_5
255 select SYS_CACHE_SHIFT_5
260 select SYS_CACHE_SHIFT_5
265 select SYS_CACHE_SHIFT_5
271 select SYS_CACHE_SHIFT_5
278 select SYS_CACHE_SHIFT_6
285 select SYS_CACHE_SHIFT_5
286 select SYS_THUMB_BUILD
292 select SYS_ARM_CACHE_CP15
294 select SYS_CACHE_SHIFT_6
298 select SYS_CACHE_SHIFT_5
303 select SYS_CACHE_SHIFT_5
307 default "arm720t" if CPU_ARM720T
308 default "arm920t" if CPU_ARM920T
309 default "arm926ejs" if CPU_ARM926EJS
310 default "arm946es" if CPU_ARM946ES
311 default "arm1136" if CPU_ARM1136
312 default "arm1176" if CPU_ARM1176
313 default "armv7" if CPU_V7A
314 default "armv7" if CPU_V7R
315 default "armv7m" if CPU_V7M
316 default "pxa" if CPU_PXA
317 default "sa1100" if CPU_SA1100
318 default "armv8" if ARM64
322 default 4 if CPU_ARM720T
323 default 4 if CPU_ARM920T
324 default 5 if CPU_ARM926EJS
325 default 5 if CPU_ARM946ES
326 default 6 if CPU_ARM1136
327 default 6 if CPU_ARM1176
332 default 4 if CPU_SA1100
335 config SYS_CACHE_SHIFT_5
338 config SYS_CACHE_SHIFT_6
341 config SYS_CACHE_SHIFT_7
344 config SYS_CACHELINE_SIZE
346 default 128 if SYS_CACHE_SHIFT_7
347 default 64 if SYS_CACHE_SHIFT_6
348 default 32 if SYS_CACHE_SHIFT_5
351 prompt "Select the ARM data write cache policy"
352 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
354 default SYS_ARM_CACHE_WRITEBACK
356 config SYS_ARM_CACHE_WRITEBACK
357 bool "Write-back (WB)"
359 A write updates the cache only and marks the cache line as dirty.
360 External memory is updated only when the line is evicted or explicitly
363 config SYS_ARM_CACHE_WRITETHROUGH
364 bool "Write-through (WT)"
366 A write updates both the cache and the external memory system.
367 This does not mark the cache line as dirty.
369 config SYS_ARM_CACHE_WRITEALLOC
370 bool "Write allocation (WA)"
372 A cache line is allocated on a write miss. This means that executing a
373 store instruction on the processor might cause a burst read to occur.
374 There is a linefill to obtain the data for the cache line, before the
379 bool "Enable ARCH_CPU_INIT"
381 Some architectures require a call to arch_cpu_init().
382 Say Y here to enable it
384 config SYS_ARCH_TIMER
385 bool "ARM Generic Timer support"
386 depends on CPU_V7A || ARM64
389 The ARM Generic Timer (aka arch-timer) provides an architected
390 interface to a timer source on an SoC.
391 It is mandatory for ARMv8 implementation and widely available
395 bool "Support for ARM SMC Calling Convention (SMCCC)"
396 depends on CPU_V7A || ARM64
399 Say Y here if you want to enable ARM SMC Calling Convention.
400 This should be enabled if U-Boot needs to communicate with system
401 firmware (for example, PSCI) according to SMCCC.
404 bool "support boot from semihosting"
406 In emulated environments, semihosting is a way for
407 the hosted environment to call out to the emulator to
408 retrieve files from the host machine.
410 config SYS_THUMB_BUILD
411 bool "Build U-Boot using the Thumb instruction set"
414 Use this flag to build U-Boot using the Thumb instruction set for
415 ARM architectures. Thumb instruction set provides better code
416 density. For ARM architectures that support Thumb2 this flag will
417 result in Thumb2 code generated by GCC.
419 config SPL_SYS_THUMB_BUILD
420 bool "Build SPL using the Thumb instruction set"
421 default y if SYS_THUMB_BUILD
422 depends on !ARM64 && SPL
424 Use this flag to build SPL using the Thumb instruction set for
425 ARM architectures. Thumb instruction set provides better code
426 density. For ARM architectures that support Thumb2 this flag will
427 result in Thumb2 code generated by GCC.
429 config TPL_SYS_THUMB_BUILD
430 bool "Build TPL using the Thumb instruction set"
431 default y if SYS_THUMB_BUILD
432 depends on TPL && !ARM64
434 Use this flag to build TPL using the Thumb instruction set for
435 ARM architectures. Thumb instruction set provides better code
436 density. For ARM architectures that support Thumb2 this flag will
437 result in Thumb2 code generated by GCC.
440 config SYS_L2CACHE_OFF
443 If SoC does not support L2CACHE or one does not want to enable
444 L2CACHE, choose this option.
446 config ENABLE_ARM_SOC_BOOT0_HOOK
447 bool "prepare BOOT0 header"
449 If the SoC's BOOT0 requires a header area filled with (magic)
450 values, then choose this option, and create a file included as
451 <asm/arch/boot0.h> which contains the required assembler code.
453 config ARM_CORTEX_CPU_IS_UP
457 config USE_ARCH_MEMCPY
458 bool "Use an assembly optimized implementation of memcpy"
462 Enable the generation of an optimized version of memcpy.
463 Such an implementation may be faster under some conditions
464 but may increase the binary size.
466 config SPL_USE_ARCH_MEMCPY
467 bool "Use an assembly optimized implementation of memcpy for SPL"
468 default y if USE_ARCH_MEMCPY
469 depends on !ARM64 && SPL
471 Enable the generation of an optimized version of memcpy.
472 Such an implementation may be faster under some conditions
473 but may increase the binary size.
475 config TPL_USE_ARCH_MEMCPY
476 bool "Use an assembly optimized implementation of memcpy for TPL"
477 default y if USE_ARCH_MEMCPY
478 depends on !ARM64 && TPL
480 Enable the generation of an optimized version of memcpy.
481 Such an implementation may be faster under some conditions
482 but may increase the binary size.
484 config USE_ARCH_MEMSET
485 bool "Use an assembly optimized implementation of memset"
489 Enable the generation of an optimized version of memset.
490 Such an implementation may be faster under some conditions
491 but may increase the binary size.
493 config SPL_USE_ARCH_MEMSET
494 bool "Use an assembly optimized implementation of memset for SPL"
495 default y if USE_ARCH_MEMSET
496 depends on !ARM64 && SPL
498 Enable the generation of an optimized version of memset.
499 Such an implementation may be faster under some conditions
500 but may increase the binary size.
502 config TPL_USE_ARCH_MEMSET
503 bool "Use an assembly optimized implementation of memset for TPL"
504 default y if USE_ARCH_MEMSET
505 depends on !ARM64 && TPL
507 Enable the generation of an optimized version of memset.
508 Such an implementation may be faster under some conditions
509 but may increase the binary size.
511 config ARM64_SUPPORT_AARCH32
512 bool "ARM64 system support AArch32 execution state"
514 default y if !TARGET_THUNDERX_88XX
516 This ARM64 system supports AArch32 execution state.
519 prompt "Target select"
524 select GPIO_EXTRA_HEADER
525 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
526 select SPL_SEPARATE_BSS if SPL
528 config TARGET_EDB93XX
529 bool "Support edb93xx"
531 select GPIO_EXTRA_HEADER
534 config TARGET_ASPENITE
535 bool "Support aspenite"
537 select GPIO_EXTRA_HEADER
540 bool "Support gplugd"
542 select GPIO_EXTRA_HEADER
547 select GPIO_EXTRA_HEADER
548 select SPL_DM_SPI if SPL
551 Support for TI's DaVinci platform.
554 bool "Marvell Kirkwood"
555 select ARCH_MISC_INIT
556 select BOARD_EARLY_INIT_F
558 select GPIO_EXTRA_HEADER
561 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
567 select GPIO_EXTRA_HEADER
568 select SPL_DM_SPI if SPL
569 select SPL_DM_SPI_FLASH if SPL
578 select GPIO_EXTRA_HEADER
580 config TARGET_SPEAR300
581 bool "Support spear300"
582 select BOARD_EARLY_INIT_F
584 select GPIO_EXTRA_HEADER
588 config TARGET_SPEAR310
589 bool "Support spear310"
590 select BOARD_EARLY_INIT_F
592 select GPIO_EXTRA_HEADER
596 config TARGET_SPEAR320
597 bool "Support spear320"
598 select BOARD_EARLY_INIT_F
600 select GPIO_EXTRA_HEADER
604 config TARGET_SPEAR600
605 bool "Support spear600"
606 select BOARD_EARLY_INIT_F
608 select GPIO_EXTRA_HEADER
612 config TARGET_STV0991
613 bool "Support stv0991"
619 select GPIO_EXTRA_HEADER
627 select BOARD_LATE_INIT
629 select GPIO_EXTRA_HEADER
636 select GPIO_EXTRA_HEADER
639 bool "Broadcom BCM283X family"
643 select GPIO_EXTRA_HEADER
646 select SERIAL_SEARCH_ALL
651 bool "Broadcom BCM63158 family"
657 bool "Broadcom BCM68360 family"
663 bool "Broadcom BCM6858 family"
669 bool "Broadcom BCM7XXX family"
672 select GPIO_EXTRA_HEADER
674 select OF_PRIOR_STAGE
677 This enables support for Broadcom ARM-based set-top box
678 chipsets, including the 7445 family of chips.
680 config TARGET_BCMCYGNUS
681 bool "Support bcmcygnus"
683 select GPIO_EXTRA_HEADER
685 imply BCM_SF2_ETH_GMAC
693 bool "Support Broadcom Northstar2"
695 select GPIO_EXTRA_HEADER
697 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
698 ARMv8 Cortex-A57 processors targeting a broad range of networking
702 bool "Support Broadcom NS3"
704 select BOARD_LATE_INIT
706 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
707 ARMv8 Cortex-A72 processors targeting a broad range of networking
711 bool "Samsung EXYNOS"
720 select GPIO_EXTRA_HEADER
721 imply SYS_THUMB_BUILD
726 bool "Samsung S5PC1XX"
732 select GPIO_EXTRA_HEADER
736 bool "Calxeda Highbank"
749 config ARCH_INTEGRATOR
750 bool "ARM Ltd. Integrator family"
753 select GPIO_EXTRA_HEADER
758 bool "Qualcomm IPQ40xx SoCs"
764 select GPIO_EXTRA_HEADER
776 select GPIO_EXTRA_HEADER
778 select SYS_ARCH_TIMER
779 select SYS_THUMB_BUILD
785 bool "Texas Instruments' K3 Architecture"
790 config ARCH_OMAP2PLUS
793 select GPIO_EXTRA_HEADER
794 select SPL_BOARD_INIT if SPL
795 select SPL_STACK_R if SPL
797 imply TI_SYSC if DM && OF_CONTROL
802 select GPIO_EXTRA_HEADER
803 imply DISTRO_DEFAULTS
806 Support for the Meson SoC family developed by Amlogic Inc.,
807 targeted at media players and tablet computers. We currently
808 support the S905 (GXBaby) 64-bit SoC.
813 select GPIO_EXTRA_HEADER
816 select SPL_LIBCOMMON_SUPPORT if SPL
817 select SPL_LIBGENERIC_SUPPORT if SPL
818 select SPL_OF_CONTROL if SPL
821 Support for the MediaTek SoCs family developed by MediaTek Inc.
822 Please refer to doc/README.mediatek for more information.
825 bool "NXP LPC32xx platform"
830 select GPIO_EXTRA_HEADER
836 bool "NXP i.MX8 platform"
839 select GPIO_EXTRA_HEADER
841 select ENABLE_ARM_SOC_BOOT0_HOOK
844 bool "NXP i.MX8M platform"
846 select GPIO_EXTRA_HEADER
847 select SYS_FSL_HAS_SEC if IMX_HAB
848 select SYS_FSL_SEC_COMPAT_4
849 select SYS_FSL_SEC_LE
855 bool "NXP i.MXRT platform"
859 select GPIO_EXTRA_HEADER
864 bool "NXP i.MX23 family"
866 select GPIO_EXTRA_HEADER
873 select GPIO_EXTRA_HEADER
877 bool "NXP i.MX28 family"
879 select GPIO_EXTRA_HEADER
884 bool "NXP i.MX31 family"
886 select GPIO_EXTRA_HEADER
891 select GPIO_EXTRA_HEADER
892 select SYS_FSL_HAS_SEC if IMX_HAB
893 select SYS_FSL_SEC_COMPAT_4
894 select SYS_FSL_SEC_LE
895 select ROM_UNIFIED_SECTIONS
897 imply SYS_THUMB_BUILD
901 select ARCH_MISC_INIT
903 select GPIO_EXTRA_HEADER
904 select SYS_FSL_HAS_SEC if IMX_HAB
905 select SYS_FSL_SEC_COMPAT_4
906 select SYS_FSL_SEC_LE
907 imply BOARD_EARLY_INIT_F
909 imply SYS_THUMB_BUILD
914 select GPIO_EXTRA_HEADER
915 select SYS_FSL_HAS_SEC
916 select SYS_FSL_SEC_COMPAT_4
917 select SYS_FSL_SEC_LE
919 imply SYS_THUMB_BUILD
923 default "arch/arm/mach-omap2/u-boot-spl.lds"
928 select BOARD_EARLY_INIT_F
930 select GPIO_EXTRA_HEADER
934 bool "Nexell S5P4418/S5P6818 SoC"
935 select ENABLE_ARM_SOC_BOOT0_HOOK
937 select GPIO_EXTRA_HEADER
940 bool "Actions Semi OWL SoCs"
944 select GPIO_EXTRA_HEADER
949 select SYS_RELOC_GD_ENV_ADDR
953 bool "QEMU Virtual Platform"
964 bool "Renesas ARM SoCs"
967 select GPIO_EXTRA_HEADER
968 imply BOARD_EARLY_INIT_F
971 imply SYS_THUMB_BUILD
972 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
974 config ARCH_SNAPDRAGON
975 bool "Qualcomm Snapdragon SoCs"
980 select GPIO_EXTRA_HEADER
989 bool "Altera SOCFPGA family"
990 select ARCH_EARLY_INIT_R
991 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
992 select ARM64 if TARGET_SOCFPGA_SOC64
993 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
996 select GPIO_EXTRA_HEADER
997 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
999 select SPL_DM_RESET if DM_RESET
1000 select SPL_DM_SERIAL
1001 select SPL_LIBCOMMON_SUPPORT
1002 select SPL_LIBGENERIC_SUPPORT
1003 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
1004 select SPL_OF_CONTROL
1005 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1006 select SPL_SERIAL_SUPPORT
1008 select SPL_WATCHDOG_SUPPORT
1011 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1013 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1014 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1024 imply SPL_DM_SPI_FLASH
1025 imply SPL_LIBDISK_SUPPORT
1026 imply SPL_MMC_SUPPORT
1027 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1028 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1029 imply SPL_SPI_FLASH_SUPPORT
1030 imply SPL_SPI_SUPPORT
1034 bool "Support sunxi (Allwinner) SoCs"
1037 select CMD_MMC if MMC
1038 select CMD_USB if DISTRO_DEFAULTS
1044 select DM_MMC if MMC
1045 select DM_SCSI if SCSI
1047 select DM_USB if DISTRO_DEFAULTS
1048 select GPIO_EXTRA_HEADER
1049 select OF_BOARD_SETUP
1052 select SPECIFY_CONSOLE_INDEX
1053 select SPL_STACK_R if SPL
1054 select SPL_SYS_MALLOC_SIMPLE if SPL
1055 select SPL_SYS_THUMB_BUILD if !ARM64
1058 select SYS_THUMB_BUILD if !ARM64
1059 select USB if DISTRO_DEFAULTS
1060 select USB_KEYBOARD if DISTRO_DEFAULTS
1061 select USB_STORAGE if DISTRO_DEFAULTS
1062 select SPL_USE_TINY_PRINTF
1064 select SYS_RELOC_GD_ENV_ADDR
1065 imply BOARD_LATE_INIT
1068 imply CMD_UBI if MTD_RAW_NAND
1069 imply DISTRO_DEFAULTS
1072 imply OF_LIBFDT_OVERLAY
1073 imply PRE_CONSOLE_BUFFER
1074 imply SPL_GPIO_SUPPORT
1075 imply SPL_LIBCOMMON_SUPPORT
1076 imply SPL_LIBGENERIC_SUPPORT
1077 imply SPL_MMC_SUPPORT if MMC
1078 imply SPL_POWER_SUPPORT
1079 imply SPL_SERIAL_SUPPORT
1083 bool "ST-Ericsson U8500 Series"
1087 select DM_MMC if MMC
1089 select DM_USB if USB
1093 imply ARM_PL180_MMCI
1095 imply NOMADIK_MTU_TIMER
1098 imply SYSRESET_SYSCON
1101 bool "Support Xilinx Versal Platform"
1105 select DM_ETH if NET
1106 select DM_MMC if MMC
1108 select GPIO_EXTRA_HEADER
1110 imply BOARD_LATE_INIT
1111 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1114 bool "Freescale Vybrid"
1116 select GPIO_EXTRA_HEADER
1117 select SYS_FSL_ERRATUM_ESDHC111
1122 bool "Xilinx Zynq based platform"
1127 select DM_ETH if NET
1128 select DM_MMC if MMC
1132 select DM_USB if USB
1133 select GPIO_EXTRA_HEADER
1136 select SPL_BOARD_INIT if SPL
1137 select SPL_CLK if SPL
1138 select SPL_DM if SPL
1139 select SPL_DM_SPI if SPL
1140 select SPL_DM_SPI_FLASH if SPL
1141 select SPL_OF_CONTROL if SPL
1142 select SPL_SEPARATE_BSS if SPL
1144 imply ARCH_EARLY_INIT_R
1145 imply BOARD_LATE_INIT
1149 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1152 config ARCH_ZYNQMP_R5
1153 bool "Xilinx ZynqMP R5 based platform"
1157 select DM_ETH if NET
1158 select DM_MMC if MMC
1160 select GPIO_EXTRA_HEADER
1166 bool "Xilinx ZynqMP based platform"
1170 select DM_ETH if NET
1172 select DM_MMC if MMC
1174 select DM_SPI if SPI
1175 select DM_SPI_FLASH if DM_SPI
1176 select DM_USB if USB
1178 select GPIO_EXTRA_HEADER
1180 select SPL_BOARD_INIT if SPL
1181 select SPL_CLK if SPL
1182 select SPL_DM if SPL
1183 select SPL_DM_SPI if SPI && SPL_DM
1184 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1185 select SPL_DM_MAILBOX if SPL
1186 select SPL_FIRMWARE if SPL
1187 select SPL_SEPARATE_BSS if SPL
1190 imply BOARD_LATE_INIT
1192 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1199 select GPIO_EXTRA_HEADER
1200 imply DISTRO_DEFAULTS
1203 config TARGET_VEXPRESS64_AEMV8A
1204 bool "Support vexpress_aemv8a"
1206 select GPIO_EXTRA_HEADER
1209 config TARGET_VEXPRESS64_BASE_FVP
1210 bool "Support Versatile Express ARMv8a FVP BASE model"
1212 select GPIO_EXTRA_HEADER
1216 config TARGET_VEXPRESS64_JUNO
1217 bool "Support Versatile Express Juno Development Platform"
1219 select GPIO_EXTRA_HEADER
1233 config TARGET_TOTAL_COMPUTE
1234 bool "Support Total Compute Platform"
1242 config TARGET_LS2080A_EMU
1243 bool "Support ls2080a_emu"
1246 select ARMV8_MULTIENTRY
1247 select FSL_DDR_SYNC_REFRESH
1248 select GPIO_EXTRA_HEADER
1250 Support for Freescale LS2080A_EMU platform.
1251 The LS2080A Development System (EMULATOR) is a pre-silicon
1252 development platform that supports the QorIQ LS2080A
1253 Layerscape Architecture processor.
1255 config TARGET_LS1088AQDS
1256 bool "Support ls1088aqds"
1259 select ARMV8_MULTIENTRY
1260 select ARCH_SUPPORT_TFABOOT
1261 select BOARD_LATE_INIT
1262 select GPIO_EXTRA_HEADER
1264 select FSL_DDR_INTERACTIVE if !SD_BOOT
1266 Support for NXP LS1088AQDS platform.
1267 The LS1088A Development System (QDS) is a high-performance
1268 development platform that supports the QorIQ LS1088A
1269 Layerscape Architecture processor.
1271 config TARGET_LS2080AQDS
1272 bool "Support ls2080aqds"
1275 select ARMV8_MULTIENTRY
1276 select ARCH_SUPPORT_TFABOOT
1277 select BOARD_LATE_INIT
1278 select GPIO_EXTRA_HEADER
1283 select FSL_DDR_INTERACTIVE if !SPL
1285 Support for Freescale LS2080AQDS platform.
1286 The LS2080A Development System (QDS) is a high-performance
1287 development platform that supports the QorIQ LS2080A
1288 Layerscape Architecture processor.
1290 config TARGET_LS2080ARDB
1291 bool "Support ls2080ardb"
1294 select ARMV8_MULTIENTRY
1295 select ARCH_SUPPORT_TFABOOT
1296 select BOARD_LATE_INIT
1299 select FSL_DDR_INTERACTIVE if !SPL
1300 select GPIO_EXTRA_HEADER
1304 Support for Freescale LS2080ARDB platform.
1305 The LS2080A Reference design board (RDB) is a high-performance
1306 development platform that supports the QorIQ LS2080A
1307 Layerscape Architecture processor.
1309 config TARGET_LS2081ARDB
1310 bool "Support ls2081ardb"
1313 select ARMV8_MULTIENTRY
1314 select BOARD_LATE_INIT
1315 select GPIO_EXTRA_HEADER
1318 Support for Freescale LS2081ARDB platform.
1319 The LS2081A Reference design board (RDB) is a high-performance
1320 development platform that supports the QorIQ LS2081A/LS2041A
1321 Layerscape Architecture processor.
1323 config TARGET_LX2160ARDB
1324 bool "Support lx2160ardb"
1327 select ARMV8_MULTIENTRY
1328 select ARCH_SUPPORT_TFABOOT
1329 select BOARD_LATE_INIT
1330 select GPIO_EXTRA_HEADER
1332 Support for NXP LX2160ARDB platform.
1333 The lx2160ardb (LX2160A Reference design board (RDB)
1334 is a high-performance development platform that supports the
1335 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1337 config TARGET_LX2160AQDS
1338 bool "Support lx2160aqds"
1341 select ARMV8_MULTIENTRY
1342 select ARCH_SUPPORT_TFABOOT
1343 select BOARD_LATE_INIT
1344 select GPIO_EXTRA_HEADER
1346 Support for NXP LX2160AQDS platform.
1347 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1348 is a high-performance development platform that supports the
1349 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1351 config TARGET_LX2162AQDS
1352 bool "Support lx2162aqds"
1354 select ARCH_MISC_INIT
1356 select ARMV8_MULTIENTRY
1357 select ARCH_SUPPORT_TFABOOT
1358 select BOARD_LATE_INIT
1359 select GPIO_EXTRA_HEADER
1361 Support for NXP LX2162AQDS platform.
1362 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1365 bool "Support HiKey 96boards Consumer Edition Platform"
1370 select GPIO_EXTRA_HEADER
1373 select SPECIFY_CONSOLE_INDEX
1376 Support for HiKey 96boards platform. It features a HI6220
1377 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1379 config TARGET_HIKEY960
1380 bool "Support HiKey960 96boards Consumer Edition Platform"
1384 select GPIO_EXTRA_HEADER
1389 Support for HiKey960 96boards platform. It features a HI3660
1390 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1392 config TARGET_POPLAR
1393 bool "Support Poplar 96boards Enterprise Edition Platform"
1398 select GPIO_EXTRA_HEADER
1403 Support for Poplar 96boards EE platform. It features a HI3798cv200
1404 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1405 making it capable of running any commercial set-top solution based on
1408 config TARGET_LS1012AQDS
1409 bool "Support ls1012aqds"
1412 select ARCH_SUPPORT_TFABOOT
1413 select BOARD_LATE_INIT
1414 select GPIO_EXTRA_HEADER
1416 Support for Freescale LS1012AQDS platform.
1417 The LS1012A Development System (QDS) is a high-performance
1418 development platform that supports the QorIQ LS1012A
1419 Layerscape Architecture processor.
1421 config TARGET_LS1012ARDB
1422 bool "Support ls1012ardb"
1425 select ARCH_SUPPORT_TFABOOT
1426 select BOARD_LATE_INIT
1427 select GPIO_EXTRA_HEADER
1431 Support for Freescale LS1012ARDB platform.
1432 The LS1012A Reference design board (RDB) is a high-performance
1433 development platform that supports the QorIQ LS1012A
1434 Layerscape Architecture processor.
1436 config TARGET_LS1012A2G5RDB
1437 bool "Support ls1012a2g5rdb"
1440 select ARCH_SUPPORT_TFABOOT
1441 select BOARD_LATE_INIT
1442 select GPIO_EXTRA_HEADER
1445 Support for Freescale LS1012A2G5RDB platform.
1446 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1447 development platform that supports the QorIQ LS1012A
1448 Layerscape Architecture processor.
1450 config TARGET_LS1012AFRWY
1451 bool "Support ls1012afrwy"
1454 select ARCH_SUPPORT_TFABOOT
1455 select BOARD_LATE_INIT
1456 select GPIO_EXTRA_HEADER
1460 Support for Freescale LS1012AFRWY platform.
1461 The LS1012A FRWY board (FRWY) is a high-performance
1462 development platform that supports the QorIQ LS1012A
1463 Layerscape Architecture processor.
1465 config TARGET_LS1012AFRDM
1466 bool "Support ls1012afrdm"
1469 select ARCH_SUPPORT_TFABOOT
1470 select GPIO_EXTRA_HEADER
1472 Support for Freescale LS1012AFRDM platform.
1473 The LS1012A Freedom board (FRDM) is a high-performance
1474 development platform that supports the QorIQ LS1012A
1475 Layerscape Architecture processor.
1477 config TARGET_LS1028AQDS
1478 bool "Support ls1028aqds"
1481 select ARMV8_MULTIENTRY
1482 select ARCH_SUPPORT_TFABOOT
1483 select BOARD_LATE_INIT
1484 select GPIO_EXTRA_HEADER
1486 Support for Freescale LS1028AQDS platform
1487 The LS1028A Development System (QDS) is a high-performance
1488 development platform that supports the QorIQ LS1028A
1489 Layerscape Architecture processor.
1491 config TARGET_LS1028ARDB
1492 bool "Support ls1028ardb"
1495 select ARMV8_MULTIENTRY
1496 select ARCH_SUPPORT_TFABOOT
1497 select BOARD_LATE_INIT
1498 select GPIO_EXTRA_HEADER
1500 Support for Freescale LS1028ARDB platform
1501 The LS1028A Development System (RDB) is a high-performance
1502 development platform that supports the QorIQ LS1028A
1503 Layerscape Architecture processor.
1505 config TARGET_LS1088ARDB
1506 bool "Support ls1088ardb"
1509 select ARMV8_MULTIENTRY
1510 select ARCH_SUPPORT_TFABOOT
1511 select BOARD_LATE_INIT
1513 select FSL_DDR_INTERACTIVE if !SD_BOOT
1514 select GPIO_EXTRA_HEADER
1516 Support for NXP LS1088ARDB platform.
1517 The LS1088A Reference design board (RDB) is a high-performance
1518 development platform that supports the QorIQ LS1088A
1519 Layerscape Architecture processor.
1521 config TARGET_LS1021AQDS
1522 bool "Support ls1021aqds"
1524 select ARCH_SUPPORT_PSCI
1525 select BOARD_EARLY_INIT_F
1526 select BOARD_LATE_INIT
1528 select CPU_V7_HAS_NONSEC
1529 select CPU_V7_HAS_VIRT
1530 select LS1_DEEP_SLEEP
1533 select FSL_DDR_INTERACTIVE
1534 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1535 select GPIO_EXTRA_HEADER
1536 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1539 config TARGET_LS1021ATWR
1540 bool "Support ls1021atwr"
1542 select ARCH_SUPPORT_PSCI
1543 select BOARD_EARLY_INIT_F
1544 select BOARD_LATE_INIT
1546 select CPU_V7_HAS_NONSEC
1547 select CPU_V7_HAS_VIRT
1548 select LS1_DEEP_SLEEP
1550 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1551 select GPIO_EXTRA_HEADER
1554 config TARGET_PG_WCOM_SELI8
1555 bool "Support Hitachi-Powergrids SELI8 service unit card"
1557 select ARCH_SUPPORT_PSCI
1558 select BOARD_EARLY_INIT_F
1559 select BOARD_LATE_INIT
1561 select CPU_V7_HAS_NONSEC
1562 select CPU_V7_HAS_VIRT
1564 select FSL_DDR_INTERACTIVE
1565 select GPIO_EXTRA_HEADER
1569 Support for Hitachi-Powergrids SELI8 service unit card.
1570 SELI8 is a QorIQ LS1021a based service unit card used
1571 in XMC20 and FOX615 product families.
1573 config TARGET_PG_WCOM_EXPU1
1574 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1576 select ARCH_SUPPORT_PSCI
1577 select BOARD_EARLY_INIT_F
1578 select BOARD_LATE_INIT
1580 select CPU_V7_HAS_NONSEC
1581 select CPU_V7_HAS_VIRT
1583 select FSL_DDR_INTERACTIVE
1587 Support for Hitachi-Powergrids EXPU1 service unit card.
1588 EXPU1 is a QorIQ LS1021a based service unit card used
1589 in XMC20 and FOX615 product families.
1591 config TARGET_LS1021ATSN
1592 bool "Support ls1021atsn"
1594 select ARCH_SUPPORT_PSCI
1595 select BOARD_EARLY_INIT_F
1596 select BOARD_LATE_INIT
1598 select CPU_V7_HAS_NONSEC
1599 select CPU_V7_HAS_VIRT
1600 select LS1_DEEP_SLEEP
1602 select GPIO_EXTRA_HEADER
1605 config TARGET_LS1021AIOT
1606 bool "Support ls1021aiot"
1608 select ARCH_SUPPORT_PSCI
1609 select BOARD_LATE_INIT
1611 select CPU_V7_HAS_NONSEC
1612 select CPU_V7_HAS_VIRT
1614 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1615 select GPIO_EXTRA_HEADER
1618 Support for Freescale LS1021AIOT platform.
1619 The LS1021A Freescale board (IOT) is a high-performance
1620 development platform that supports the QorIQ LS1021A
1621 Layerscape Architecture processor.
1623 config TARGET_LS1043AQDS
1624 bool "Support ls1043aqds"
1627 select ARMV8_MULTIENTRY
1628 select ARCH_SUPPORT_TFABOOT
1629 select BOARD_EARLY_INIT_F
1630 select BOARD_LATE_INIT
1632 select FSL_DDR_INTERACTIVE if !SPL
1633 select FSL_DSPI if !SPL_NO_DSPI
1634 select DM_SPI_FLASH if FSL_DSPI
1635 select GPIO_EXTRA_HEADER
1639 Support for Freescale LS1043AQDS platform.
1641 config TARGET_LS1043ARDB
1642 bool "Support ls1043ardb"
1645 select ARMV8_MULTIENTRY
1646 select ARCH_SUPPORT_TFABOOT
1647 select BOARD_EARLY_INIT_F
1648 select BOARD_LATE_INIT
1650 select FSL_DSPI if !SPL_NO_DSPI
1651 select DM_SPI_FLASH if FSL_DSPI
1652 select GPIO_EXTRA_HEADER
1654 Support for Freescale LS1043ARDB platform.
1656 config TARGET_LS1046AQDS
1657 bool "Support ls1046aqds"
1660 select ARMV8_MULTIENTRY
1661 select ARCH_SUPPORT_TFABOOT
1662 select BOARD_EARLY_INIT_F
1663 select BOARD_LATE_INIT
1664 select DM_SPI_FLASH if DM_SPI
1666 select FSL_DDR_BIST if !SPL
1667 select FSL_DDR_INTERACTIVE if !SPL
1668 select FSL_DDR_INTERACTIVE if !SPL
1669 select GPIO_EXTRA_HEADER
1672 Support for Freescale LS1046AQDS platform.
1673 The LS1046A Development System (QDS) is a high-performance
1674 development platform that supports the QorIQ LS1046A
1675 Layerscape Architecture processor.
1677 config TARGET_LS1046ARDB
1678 bool "Support ls1046ardb"
1681 select ARMV8_MULTIENTRY
1682 select ARCH_SUPPORT_TFABOOT
1683 select BOARD_EARLY_INIT_F
1684 select BOARD_LATE_INIT
1685 select DM_SPI_FLASH if DM_SPI
1686 select POWER_MC34VR500
1689 select FSL_DDR_INTERACTIVE if !SPL
1690 select GPIO_EXTRA_HEADER
1693 Support for Freescale LS1046ARDB platform.
1694 The LS1046A Reference Design Board (RDB) is a high-performance
1695 development platform that supports the QorIQ LS1046A
1696 Layerscape Architecture processor.
1698 config TARGET_LS1046AFRWY
1699 bool "Support ls1046afrwy"
1702 select ARMV8_MULTIENTRY
1703 select ARCH_SUPPORT_TFABOOT
1704 select BOARD_EARLY_INIT_F
1705 select BOARD_LATE_INIT
1706 select DM_SPI_FLASH if DM_SPI
1707 select GPIO_EXTRA_HEADER
1710 Support for Freescale LS1046AFRWY platform.
1711 The LS1046A Freeway Board (FRWY) is a high-performance
1712 development platform that supports the QorIQ LS1046A
1713 Layerscape Architecture processor.
1719 select ARMV8_MULTIENTRY
1736 select GPIO_EXTRA_HEADER
1737 select SPL_DM if SPL
1738 select SPL_DM_SPI if SPL
1739 select SPL_DM_SPI_FLASH if SPL
1740 select SPL_DM_I2C if SPL
1741 select SPL_DM_MMC if SPL
1742 select SPL_DM_SERIAL if SPL
1744 Support for Kontron SMARC-sAL28 board.
1746 config TARGET_COLIBRI_PXA270
1747 bool "Support colibri_pxa270"
1749 select GPIO_EXTRA_HEADER
1751 config ARCH_UNIPHIER
1752 bool "Socionext UniPhier SoCs"
1753 select BOARD_LATE_INIT
1763 select OF_BOARD_SETUP
1767 select SPL_BOARD_INIT if SPL
1768 select SPL_DM if SPL
1769 select SPL_LIBCOMMON_SUPPORT if SPL
1770 select SPL_LIBGENERIC_SUPPORT if SPL
1771 select SPL_OF_CONTROL if SPL
1772 select SPL_PINCTRL if SPL
1775 imply DISTRO_DEFAULTS
1778 Support for UniPhier SoC family developed by Socionext Inc.
1779 (formerly, System LSI Business Division of Panasonic Corporation)
1782 bool "Support STMicroelectronics STM32 MCU with cortex M"
1786 select GPIO_EXTRA_HEADER
1790 bool "Support STMicrolectronics SoCs"
1799 Support for STMicroelectronics STiH407/10 SoC family.
1800 This SoC is used on Linaro 96Board STiH410-B2260
1803 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1804 select ARCH_MISC_INIT
1805 select ARCH_SUPPORT_TFABOOT
1806 select BOARD_LATE_INIT
1812 select GPIO_EXTRA_HEADER
1816 select OF_SYSTEM_SETUP
1822 select SYS_THUMB_BUILD
1826 imply OF_LIBFDT_OVERLAY
1827 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1830 Support for STM32MP SoC family developed by STMicroelectronics,
1831 MPUs based on ARM cortex A core
1832 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1833 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1835 SPL is the unsecure FSBL for the basic boot chain.
1837 config ARCH_ROCKCHIP
1838 bool "Support Rockchip SoCs"
1840 select BINMAN if SPL_OPTEE
1850 select DM_USB if USB
1851 select ENABLE_ARM_SOC_BOOT0_HOOK
1854 select SPL_DM if SPL
1855 select SPL_DM_SPI if SPL
1856 select SPL_DM_SPI_FLASH if SPL
1858 select SYS_THUMB_BUILD if !ARM64
1861 imply DEBUG_UART_BOARD_INIT
1862 imply DISTRO_DEFAULTS
1864 imply SARADC_ROCKCHIP
1866 imply SPL_SYS_MALLOC_SIMPLE
1869 imply USB_FUNCTION_FASTBOOT
1871 config ARCH_OCTEONTX
1872 bool "Support OcteonTX SoCs"
1875 select GPIO_EXTRA_HEADER
1879 select BOARD_LATE_INIT
1880 select SYS_CACHE_SHIFT_7
1882 config ARCH_OCTEONTX2
1883 bool "Support OcteonTX2 SoCs"
1886 select GPIO_EXTRA_HEADER
1890 select BOARD_LATE_INIT
1891 select SYS_CACHE_SHIFT_7
1893 config TARGET_THUNDERX_88XX
1894 bool "Support ThunderX 88xx"
1896 select GPIO_EXTRA_HEADER
1899 select SYS_CACHE_SHIFT_7
1902 bool "Support Aspeed SoCs"
1907 config TARGET_DURIAN
1908 bool "Support Phytium Durian Platform"
1910 select GPIO_EXTRA_HEADER
1912 Support for durian platform.
1913 It has 2GB Sdram, uart and pcie.
1915 config TARGET_PRESIDIO_ASIC
1916 bool "Support Cortina Presidio ASIC Platform"
1919 config TARGET_XENGUEST_ARM64
1920 bool "Xen guest ARM64"
1924 select LINUX_KERNEL_IMAGE_HEADER
1929 config ARCH_SUPPORT_TFABOOT
1933 bool "Support for booting from TF-A"
1934 depends on ARCH_SUPPORT_TFABOOT
1937 Some platforms support the setup of secure registers (for instance
1938 for CPU errata handling) or provide secure services like PSCI.
1939 Those services could also be provided by other firmware parts
1940 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
1941 does not need to (and cannot) execute this code.
1942 Enabling this option will make a U-Boot binary that is relying
1943 on other firmware layers to provide secure functionality.
1945 config TI_SECURE_DEVICE
1946 bool "HS Device Type Support"
1947 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1949 If a high secure (HS) device type is being used, this config
1950 must be set. This option impacts various aspects of the
1951 build system (to create signed boot images that can be
1952 authenticated) and the code. See the doc/README.ti-secure
1953 file for further details.
1955 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1956 config ISW_ENTRY_ADDR
1957 hex "Address in memory or XIP address of bootloader entry point"
1958 default 0x402F4000 if AM43XX
1959 default 0x402F0400 if AM33XX
1960 default 0x40301350 if OMAP54XX
1962 After any reset, the boot ROM searches the boot media for a valid
1963 boot image. For non-XIP devices, the ROM then copies the image into
1964 internal memory. For all boot modes, after the ROM processes the
1965 boot image it eventually computes the entry point address depending
1966 on the device type (secure/non-secure), boot media (xip/non-xip) and
1970 source "arch/arm/mach-aspeed/Kconfig"
1972 source "arch/arm/mach-at91/Kconfig"
1974 source "arch/arm/mach-bcm283x/Kconfig"
1976 source "arch/arm/mach-bcmstb/Kconfig"
1978 source "arch/arm/mach-davinci/Kconfig"
1980 source "arch/arm/mach-exynos/Kconfig"
1982 source "arch/arm/mach-highbank/Kconfig"
1984 source "arch/arm/mach-integrator/Kconfig"
1986 source "arch/arm/mach-ipq40xx/Kconfig"
1988 source "arch/arm/mach-k3/Kconfig"
1990 source "arch/arm/mach-keystone/Kconfig"
1992 source "arch/arm/mach-kirkwood/Kconfig"
1994 source "arch/arm/mach-lpc32xx/Kconfig"
1996 source "arch/arm/mach-mvebu/Kconfig"
1998 source "arch/arm/mach-octeontx/Kconfig"
2000 source "arch/arm/mach-octeontx2/Kconfig"
2002 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2004 source "arch/arm/mach-imx/mx2/Kconfig"
2006 source "arch/arm/mach-imx/mx3/Kconfig"
2008 source "arch/arm/mach-imx/mx5/Kconfig"
2010 source "arch/arm/mach-imx/mx6/Kconfig"
2012 source "arch/arm/mach-imx/mx7/Kconfig"
2014 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2016 source "arch/arm/mach-imx/imx8/Kconfig"
2018 source "arch/arm/mach-imx/imx8m/Kconfig"
2020 source "arch/arm/mach-imx/imxrt/Kconfig"
2022 source "arch/arm/mach-imx/mxs/Kconfig"
2024 source "arch/arm/mach-omap2/Kconfig"
2026 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2028 source "arch/arm/mach-orion5x/Kconfig"
2030 source "arch/arm/mach-owl/Kconfig"
2032 source "arch/arm/mach-rmobile/Kconfig"
2034 source "arch/arm/mach-meson/Kconfig"
2036 source "arch/arm/mach-mediatek/Kconfig"
2038 source "arch/arm/mach-qemu/Kconfig"
2040 source "arch/arm/mach-rockchip/Kconfig"
2042 source "arch/arm/mach-s5pc1xx/Kconfig"
2044 source "arch/arm/mach-snapdragon/Kconfig"
2046 source "arch/arm/mach-socfpga/Kconfig"
2048 source "arch/arm/mach-sti/Kconfig"
2050 source "arch/arm/mach-stm32/Kconfig"
2052 source "arch/arm/mach-stm32mp/Kconfig"
2054 source "arch/arm/mach-sunxi/Kconfig"
2056 source "arch/arm/mach-tegra/Kconfig"
2058 source "arch/arm/mach-u8500/Kconfig"
2060 source "arch/arm/mach-uniphier/Kconfig"
2062 source "arch/arm/cpu/armv7/vf610/Kconfig"
2064 source "arch/arm/mach-zynq/Kconfig"
2066 source "arch/arm/mach-zynqmp/Kconfig"
2068 source "arch/arm/mach-versal/Kconfig"
2070 source "arch/arm/mach-zynqmp-r5/Kconfig"
2072 source "arch/arm/cpu/armv7/Kconfig"
2074 source "arch/arm/cpu/armv8/Kconfig"
2076 source "arch/arm/mach-imx/Kconfig"
2078 source "arch/arm/mach-nexell/Kconfig"
2080 source "board/armltd/total_compute/Kconfig"
2082 source "board/bosch/shc/Kconfig"
2083 source "board/bosch/guardian/Kconfig"
2084 source "board/CarMediaLab/flea3/Kconfig"
2085 source "board/Marvell/aspenite/Kconfig"
2086 source "board/Marvell/gplugd/Kconfig"
2087 source "board/Marvell/octeontx/Kconfig"
2088 source "board/Marvell/octeontx2/Kconfig"
2089 source "board/armltd/vexpress64/Kconfig"
2090 source "board/cortina/presidio-asic/Kconfig"
2091 source "board/broadcom/bcm963158/Kconfig"
2092 source "board/broadcom/bcm968360bg/Kconfig"
2093 source "board/broadcom/bcm968580xref/Kconfig"
2094 source "board/broadcom/bcmns3/Kconfig"
2095 source "board/cavium/thunderx/Kconfig"
2096 source "board/cirrus/edb93xx/Kconfig"
2097 source "board/eets/pdu001/Kconfig"
2098 source "board/emulation/qemu-arm/Kconfig"
2099 source "board/freescale/ls2080aqds/Kconfig"
2100 source "board/freescale/ls2080ardb/Kconfig"
2101 source "board/freescale/ls1088a/Kconfig"
2102 source "board/freescale/ls1028a/Kconfig"
2103 source "board/freescale/ls1021aqds/Kconfig"
2104 source "board/freescale/ls1043aqds/Kconfig"
2105 source "board/freescale/ls1021atwr/Kconfig"
2106 source "board/freescale/ls1021atsn/Kconfig"
2107 source "board/freescale/ls1021aiot/Kconfig"
2108 source "board/freescale/ls1046aqds/Kconfig"
2109 source "board/freescale/ls1043ardb/Kconfig"
2110 source "board/freescale/ls1046ardb/Kconfig"
2111 source "board/freescale/ls1046afrwy/Kconfig"
2112 source "board/freescale/ls1012aqds/Kconfig"
2113 source "board/freescale/ls1012ardb/Kconfig"
2114 source "board/freescale/ls1012afrdm/Kconfig"
2115 source "board/freescale/lx2160a/Kconfig"
2116 source "board/grinn/chiliboard/Kconfig"
2117 source "board/hisilicon/hikey/Kconfig"
2118 source "board/hisilicon/hikey960/Kconfig"
2119 source "board/hisilicon/poplar/Kconfig"
2120 source "board/isee/igep003x/Kconfig"
2121 source "board/kontron/sl28/Kconfig"
2122 source "board/myir/mys_6ulx/Kconfig"
2123 source "board/seeed/npi_imx6ull/Kconfig"
2124 source "board/spear/spear300/Kconfig"
2125 source "board/spear/spear310/Kconfig"
2126 source "board/spear/spear320/Kconfig"
2127 source "board/spear/spear600/Kconfig"
2128 source "board/spear/x600/Kconfig"
2129 source "board/st/stv0991/Kconfig"
2130 source "board/tcl/sl50/Kconfig"
2131 source "board/toradex/colibri_pxa270/Kconfig"
2132 source "board/variscite/dart_6ul/Kconfig"
2133 source "board/vscom/baltos/Kconfig"
2134 source "board/phytium/durian/Kconfig"
2135 source "board/xen/xenguest_arm64/Kconfig"
2136 source "board/keymile/Kconfig"
2138 source "arch/arm/Kconfig.debug"
2143 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2144 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2145 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64