1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 bool "Enable support for CRC32 instruction"
17 ARMv8 implements dedicated crc32 instruction for crc32 calculation.
18 This is faster than software crc32 calculation. This instruction may
19 not be present on all ARMv8.0, but is always present on ARMv8.1 and
22 config POSITION_INDEPENDENT
23 bool "Generate position-independent pre-relocation code"
24 depends on ARM64 || CPU_V7A
26 U-Boot expects to be linked to a specific hard-coded address, and to
27 be loaded to and run from that address. This option lifts that
28 restriction, thus allowing the code to be loaded to and executed from
29 almost any 4K aligned address. This logic relies on the relocation
30 information that is embedded in the binary to support U-Boot
31 relocating itself to the top-of-RAM later during execution.
33 config INIT_SP_RELATIVE
34 bool "Specify the early stack pointer relative to the .bss section"
36 default n if ARCH_QEMU
37 default y if POSITION_INDEPENDENT
39 U-Boot typically uses a hard-coded value for the stack pointer
40 before relocation. Enable this option to instead calculate the
41 initial SP at run-time. This is useful to avoid hard-coding addresses
42 into U-Boot, so that it can be loaded and executed at arbitrary
43 addresses and thus avoid using arbitrary addresses at runtime.
45 If this option is enabled, the early stack pointer is set to
46 &_bss_start with a offset value added. The offset is specified by
47 SYS_INIT_SP_BSS_OFFSET.
49 config SYS_INIT_SP_BSS_OFFSET
50 int "Early stack offset from the .bss base address"
52 depends on INIT_SP_RELATIVE
55 This option's value is the offset added to &_bss_start in order to
56 calculate the stack pointer. This offset should be large enough so
57 that the early malloc region, global data (gd), and early stack usage
58 do not overlap any appended DTB.
60 config LINUX_KERNEL_IMAGE_HEADER
64 Place a Linux kernel image header at the start of the U-Boot binary.
65 The format of the header is described in the Linux kernel source at
66 Documentation/arm64/booting.txt. This feature is useful since the
67 image header reports the amount of memory (BSS and similar) that
68 U-Boot needs to use, but which isn't part of the binary.
70 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
71 depends on LINUX_KERNEL_IMAGE_HEADER
74 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
75 TEXT_OFFSET value written to the Linux kernel image header.
89 ARM GICV3 Interrupt translation service (ITS).
90 Basic support for programming locality specific peripheral
91 interrupts (LPI) configuration tables and enable LPI tables.
92 LPI configuration table can be used by u-boot or Linux.
93 ARM GICV3 has limitation, once the LPI table is enabled, LPI
94 configuration table can not be re-programmed, unless GICV3 reset.
100 config DMA_ADDR_T_64BIT
110 config GPIO_EXTRA_HEADER
113 # Used for compatibility with asm files copied from the kernel
114 config ARM_ASM_UNIFIED
118 # Used for compatibility with asm files copied from the kernel
122 config SYS_ICACHE_OFF
123 bool "Do not enable icache"
125 Do not enable instruction cache in U-Boot.
127 config SPL_SYS_ICACHE_OFF
128 bool "Do not enable icache in SPL"
130 default SYS_ICACHE_OFF
132 Do not enable instruction cache in SPL.
134 config SYS_DCACHE_OFF
135 bool "Do not enable dcache"
137 Do not enable data cache in U-Boot.
139 config SPL_SYS_DCACHE_OFF
140 bool "Do not enable dcache in SPL"
142 default SYS_DCACHE_OFF
144 Do not enable data cache in SPL.
146 config SYS_ARM_CACHE_CP15
147 bool "CP15 based cache enabling support"
149 Select this if your processor suports enabling caches by using
153 bool "MMU-based Paged Memory Management Support"
154 select SYS_ARM_CACHE_CP15
156 Select if you want MMU-based virtualised addressing space
157 support via paged memory management.
160 bool 'Use the ARM v7 PMSA Compliant MPU'
162 Some ARM systems without an MMU have instead a Memory Protection
163 Unit (MPU) that defines the type and permissions for regions of
165 If your CPU has an MPU then you should choose 'y' here unless you
166 know that you do not want to use the MPU.
168 # If set, the workarounds for these ARM errata are applied early during U-Boot
169 # startup. Note that in general these options force the workarounds to be
170 # applied; no CPU-type/version detection exists, unlike the similar options in
171 # the Linux kernel. Do not set these options unless they apply! Also note that
172 # the following can be machine-specific errata. These do have ability to
173 # provide rudimentary version and machine-specific checks, but expect no
175 # CONFIG_ARM_ERRATA_430973
176 # CONFIG_ARM_ERRATA_454179
177 # CONFIG_ARM_ERRATA_621766
178 # CONFIG_ARM_ERRATA_798870
179 # CONFIG_ARM_ERRATA_801819
180 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
181 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
183 config ARM_ERRATA_430973
186 config ARM_ERRATA_454179
189 config ARM_ERRATA_621766
192 config ARM_ERRATA_716044
195 config ARM_ERRATA_725233
198 config ARM_ERRATA_742230
201 config ARM_ERRATA_743622
204 config ARM_ERRATA_751472
207 config ARM_ERRATA_761320
210 config ARM_ERRATA_773022
213 config ARM_ERRATA_774769
216 config ARM_ERRATA_794072
219 config ARM_ERRATA_798870
222 config ARM_ERRATA_801819
225 config ARM_ERRATA_826974
228 config ARM_ERRATA_828024
231 config ARM_ERRATA_829520
234 config ARM_ERRATA_833069
237 config ARM_ERRATA_833471
240 config ARM_ERRATA_845369
243 config ARM_ERRATA_852421
246 config ARM_ERRATA_852423
249 config ARM_ERRATA_855873
252 config ARM_CORTEX_A8_CVE_2017_5715
255 config ARM_CORTEX_A15_CVE_2017_5715
260 select SYS_CACHE_SHIFT_5
265 select SYS_CACHE_SHIFT_5
270 select SYS_CACHE_SHIFT_5
275 select SYS_CACHE_SHIFT_5
280 select SYS_CACHE_SHIFT_5
286 select SYS_CACHE_SHIFT_5
293 select SYS_CACHE_SHIFT_6
300 select SYS_CACHE_SHIFT_5
301 select SYS_THUMB_BUILD
307 select SYS_ARM_CACHE_CP15
309 select SYS_CACHE_SHIFT_6
313 select SYS_CACHE_SHIFT_5
318 select SYS_CACHE_SHIFT_5
322 default "arm720t" if CPU_ARM720T
323 default "arm920t" if CPU_ARM920T
324 default "arm926ejs" if CPU_ARM926EJS
325 default "arm946es" if CPU_ARM946ES
326 default "arm1136" if CPU_ARM1136
327 default "arm1176" if CPU_ARM1176
328 default "armv7" if CPU_V7A
329 default "armv7" if CPU_V7R
330 default "armv7m" if CPU_V7M
331 default "pxa" if CPU_PXA
332 default "sa1100" if CPU_SA1100
333 default "armv8" if ARM64
337 default 4 if CPU_ARM720T
338 default 4 if CPU_ARM920T
339 default 5 if CPU_ARM926EJS
340 default 5 if CPU_ARM946ES
341 default 6 if CPU_ARM1136
342 default 6 if CPU_ARM1176
347 default 4 if CPU_SA1100
351 prompt "Select the ARM data write cache policy"
352 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
354 default SYS_ARM_CACHE_WRITEBACK
356 config SYS_ARM_CACHE_WRITEBACK
357 bool "Write-back (WB)"
359 A write updates the cache only and marks the cache line as dirty.
360 External memory is updated only when the line is evicted or explicitly
363 config SYS_ARM_CACHE_WRITETHROUGH
364 bool "Write-through (WT)"
366 A write updates both the cache and the external memory system.
367 This does not mark the cache line as dirty.
369 config SYS_ARM_CACHE_WRITEALLOC
370 bool "Write allocation (WA)"
372 A cache line is allocated on a write miss. This means that executing a
373 store instruction on the processor might cause a burst read to occur.
374 There is a linefill to obtain the data for the cache line, before the
379 bool "Enable ARCH_CPU_INIT"
381 Some architectures require a call to arch_cpu_init().
382 Say Y here to enable it
384 config SYS_ARCH_TIMER
385 bool "ARM Generic Timer support"
386 depends on CPU_V7A || ARM64
389 The ARM Generic Timer (aka arch-timer) provides an architected
390 interface to a timer source on an SoC.
391 It is mandatory for ARMv8 implementation and widely available
395 bool "Support for ARM SMC Calling Convention (SMCCC)"
396 depends on CPU_V7A || ARM64
399 Say Y here if you want to enable ARM SMC Calling Convention.
400 This should be enabled if U-Boot needs to communicate with system
401 firmware (for example, PSCI) according to SMCCC.
404 bool "support boot from semihosting"
406 In emulated environments, semihosting is a way for
407 the hosted environment to call out to the emulator to
408 retrieve files from the host machine.
410 config SYS_THUMB_BUILD
411 bool "Build U-Boot using the Thumb instruction set"
414 Use this flag to build U-Boot using the Thumb instruction set for
415 ARM architectures. Thumb instruction set provides better code
416 density. For ARM architectures that support Thumb2 this flag will
417 result in Thumb2 code generated by GCC.
419 config SPL_SYS_THUMB_BUILD
420 bool "Build SPL using the Thumb instruction set"
421 default y if SYS_THUMB_BUILD
422 depends on !ARM64 && SPL
424 Use this flag to build SPL using the Thumb instruction set for
425 ARM architectures. Thumb instruction set provides better code
426 density. For ARM architectures that support Thumb2 this flag will
427 result in Thumb2 code generated by GCC.
429 config TPL_SYS_THUMB_BUILD
430 bool "Build TPL using the Thumb instruction set"
431 default y if SYS_THUMB_BUILD
432 depends on TPL && !ARM64
434 Use this flag to build TPL using the Thumb instruction set for
435 ARM architectures. Thumb instruction set provides better code
436 density. For ARM architectures that support Thumb2 this flag will
437 result in Thumb2 code generated by GCC.
440 config SYS_L2CACHE_OFF
443 If SoC does not support L2CACHE or one does not want to enable
444 L2CACHE, choose this option.
446 config ENABLE_ARM_SOC_BOOT0_HOOK
447 bool "prepare BOOT0 header"
449 If the SoC's BOOT0 requires a header area filled with (magic)
450 values, then choose this option, and create a file included as
451 <asm/arch/boot0.h> which contains the required assembler code.
453 config ARM_CORTEX_CPU_IS_UP
456 config USE_ARCH_MEMCPY
457 bool "Use an assembly optimized implementation of memcpy"
461 Enable the generation of an optimized version of memcpy.
462 Such an implementation may be faster under some conditions
463 but may increase the binary size.
465 config SPL_USE_ARCH_MEMCPY
466 bool "Use an assembly optimized implementation of memcpy for SPL"
467 default y if USE_ARCH_MEMCPY
468 depends on !ARM64 && SPL
470 Enable the generation of an optimized version of memcpy.
471 Such an implementation may be faster under some conditions
472 but may increase the binary size.
474 config TPL_USE_ARCH_MEMCPY
475 bool "Use an assembly optimized implementation of memcpy for TPL"
476 default y if USE_ARCH_MEMCPY
477 depends on !ARM64 && TPL
479 Enable the generation of an optimized version of memcpy.
480 Such an implementation may be faster under some conditions
481 but may increase the binary size.
483 config USE_ARCH_MEMSET
484 bool "Use an assembly optimized implementation of memset"
488 Enable the generation of an optimized version of memset.
489 Such an implementation may be faster under some conditions
490 but may increase the binary size.
492 config SPL_USE_ARCH_MEMSET
493 bool "Use an assembly optimized implementation of memset for SPL"
494 default y if USE_ARCH_MEMSET
495 depends on !ARM64 && SPL
497 Enable the generation of an optimized version of memset.
498 Such an implementation may be faster under some conditions
499 but may increase the binary size.
501 config TPL_USE_ARCH_MEMSET
502 bool "Use an assembly optimized implementation of memset for TPL"
503 default y if USE_ARCH_MEMSET
504 depends on !ARM64 && TPL
506 Enable the generation of an optimized version of memset.
507 Such an implementation may be faster under some conditions
508 but may increase the binary size.
510 config ARM64_SUPPORT_AARCH32
511 bool "ARM64 system support AArch32 execution state"
513 default y if !TARGET_THUNDERX_88XX
515 This ARM64 system supports AArch32 execution state.
518 prompt "Target select"
523 select GPIO_EXTRA_HEADER
524 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
525 select SPL_SEPARATE_BSS if SPL
527 config TARGET_ASPENITE
528 bool "Support aspenite"
530 select GPIO_EXTRA_HEADER
535 select GPIO_EXTRA_HEADER
536 select SPL_DM_SPI if SPL
539 Support for TI's DaVinci platform.
542 bool "Marvell Kirkwood"
543 select ARCH_MISC_INIT
544 select BOARD_EARLY_INIT_F
546 select GPIO_EXTRA_HEADER
549 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
555 select GPIO_EXTRA_HEADER
556 select SPL_DM_SPI if SPL
557 select SPL_DM_SPI_FLASH if SPL
566 select GPIO_EXTRA_HEADER
568 config TARGET_STV0991
569 bool "Support stv0991"
575 select GPIO_EXTRA_HEADER
584 select GPIO_EXTRA_HEADER
587 bool "Broadcom BCM283X family"
591 select GPIO_EXTRA_HEADER
594 select SERIAL_SEARCH_ALL
599 bool "Broadcom BCM63158 family"
605 bool "Broadcom BCM68360 family"
611 bool "Broadcom BCM6858 family"
617 bool "Broadcom BCM7XXX family"
620 select GPIO_EXTRA_HEADER
622 select OF_PRIOR_STAGE
625 This enables support for Broadcom ARM-based set-top box
626 chipsets, including the 7445 family of chips.
628 config TARGET_BCMCYGNUS
629 bool "Support bcmcygnus"
631 select GPIO_EXTRA_HEADER
633 imply BCM_SF2_ETH_GMAC
641 bool "Support Broadcom Northstar2"
643 select GPIO_EXTRA_HEADER
645 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
646 ARMv8 Cortex-A57 processors targeting a broad range of networking
650 bool "Support Broadcom NS3"
652 select BOARD_LATE_INIT
654 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
655 ARMv8 Cortex-A72 processors targeting a broad range of networking
659 bool "Samsung EXYNOS"
669 select GPIO_EXTRA_HEADER
670 imply SYS_THUMB_BUILD
675 bool "Samsung S5PC1XX"
681 select GPIO_EXTRA_HEADER
685 bool "Calxeda Highbank"
698 config ARCH_INTEGRATOR
699 bool "ARM Ltd. Integrator family"
702 select GPIO_EXTRA_HEADER
707 bool "Qualcomm IPQ40xx SoCs"
713 select GPIO_EXTRA_HEADER
726 select GPIO_EXTRA_HEADER
728 select SYS_ARCH_TIMER
729 select SYS_THUMB_BUILD
735 bool "Texas Instruments' K3 Architecture"
740 config ARCH_OMAP2PLUS
743 select GPIO_EXTRA_HEADER
744 select SPL_BOARD_INIT if SPL
745 select SPL_STACK_R if SPL
747 imply TI_SYSC if DM && OF_CONTROL
752 select GPIO_EXTRA_HEADER
753 imply DISTRO_DEFAULTS
756 Support for the Meson SoC family developed by Amlogic Inc.,
757 targeted at media players and tablet computers. We currently
758 support the S905 (GXBaby) 64-bit SoC.
763 select GPIO_EXTRA_HEADER
766 select SPL_LIBCOMMON_SUPPORT if SPL
767 select SPL_LIBGENERIC_SUPPORT if SPL
768 select SPL_OF_CONTROL if SPL
771 Support for the MediaTek SoCs family developed by MediaTek Inc.
772 Please refer to doc/README.mediatek for more information.
775 bool "NXP LPC32xx platform"
780 select GPIO_EXTRA_HEADER
786 bool "NXP i.MX8 platform"
789 select GPIO_EXTRA_HEADER
792 select ENABLE_ARM_SOC_BOOT0_HOOK
795 bool "NXP i.MX8M platform"
797 select GPIO_EXTRA_HEADER
799 select SYS_FSL_HAS_SEC if IMX_HAB
800 select SYS_FSL_SEC_COMPAT_4
801 select SYS_FSL_SEC_LE
808 bool "NXP i.MX8ULP platform"
814 select GPIO_EXTRA_HEADER
818 bool "NXP i.MXRT platform"
822 select GPIO_EXTRA_HEADER
828 bool "NXP i.MX23 family"
830 select GPIO_EXTRA_HEADER
838 select GPIO_EXTRA_HEADER
843 bool "NXP i.MX28 family"
845 select GPIO_EXTRA_HEADER
851 bool "NXP i.MX31 family"
853 select GPIO_EXTRA_HEADER
859 select GPIO_EXTRA_HEADER
861 select SYS_FSL_HAS_SEC if IMX_HAB
862 select SYS_FSL_SEC_COMPAT_4
863 select SYS_FSL_SEC_LE
864 select ROM_UNIFIED_SECTIONS
866 imply SYS_THUMB_BUILD
870 select ARCH_MISC_INIT
872 select GPIO_EXTRA_HEADER
874 select SYS_FSL_HAS_SEC if IMX_HAB
875 select SYS_FSL_SEC_COMPAT_4
876 select SYS_FSL_SEC_LE
877 imply BOARD_EARLY_INIT_F
879 imply SYS_THUMB_BUILD
884 select GPIO_EXTRA_HEADER
886 select SYS_FSL_HAS_SEC
887 select SYS_FSL_SEC_COMPAT_4
888 select SYS_FSL_SEC_LE
890 imply SYS_THUMB_BUILD
894 default "arch/arm/mach-omap2/u-boot-spl.lds"
899 select BOARD_EARLY_INIT_F
901 select GPIO_EXTRA_HEADER
906 bool "Nexell S5P4418/S5P6818 SoC"
907 select ENABLE_ARM_SOC_BOOT0_HOOK
909 select GPIO_EXTRA_HEADER
912 bool "Actions Semi OWL SoCs"
916 select GPIO_EXTRA_HEADER
921 select SYS_RELOC_GD_ENV_ADDR
925 bool "QEMU Virtual Platform"
936 bool "Renesas ARM SoCs"
939 select GPIO_EXTRA_HEADER
940 imply BOARD_EARLY_INIT_F
943 imply SYS_THUMB_BUILD
944 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
946 config ARCH_SNAPDRAGON
947 bool "Qualcomm Snapdragon SoCs"
952 select GPIO_EXTRA_HEADER
961 bool "Altera SOCFPGA family"
962 select ARCH_EARLY_INIT_R
963 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
964 select ARM64 if TARGET_SOCFPGA_SOC64
965 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
969 select GPIO_EXTRA_HEADER
970 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
972 select SPL_DM_RESET if DM_RESET
974 select SPL_LIBCOMMON_SUPPORT
975 select SPL_LIBGENERIC_SUPPORT
976 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
977 select SPL_OF_CONTROL
978 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
984 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
986 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
987 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
997 imply SPL_DM_SPI_FLASH
998 imply SPL_LIBDISK_SUPPORT
1000 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1001 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1002 imply SPL_SPI_FLASH_SUPPORT
1007 bool "Support sunxi (Allwinner) SoCs"
1010 select CMD_MMC if MMC
1011 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1017 select DM_MMC if MMC
1018 select DM_SCSI if SCSI
1020 select GPIO_EXTRA_HEADER
1021 select OF_BOARD_SETUP
1024 select SPECIFY_CONSOLE_INDEX
1025 select SPL_STACK_R if SPL
1026 select SPL_SYS_MALLOC_SIMPLE if SPL
1027 select SPL_SYS_THUMB_BUILD if !ARM64
1030 select SYS_THUMB_BUILD if !ARM64
1031 select USB if DISTRO_DEFAULTS
1032 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1033 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1034 select SPL_USE_TINY_PRINTF
1036 select SYS_RELOC_GD_ENV_ADDR
1037 imply BOARD_LATE_INIT
1040 imply CMD_UBI if MTD_RAW_NAND
1041 imply DISTRO_DEFAULTS
1044 imply OF_LIBFDT_OVERLAY
1045 imply PRE_CONSOLE_BUFFER
1047 imply SPL_LIBCOMMON_SUPPORT
1048 imply SPL_LIBGENERIC_SUPPORT
1049 imply SPL_MMC if MMC
1055 bool "ST-Ericsson U8500 Series"
1059 select DM_MMC if MMC
1061 select DM_USB_GADGET if DM_USB
1065 imply AB8500_USB_PHY
1066 imply ARM_PL180_MMCI
1071 imply NOMADIK_MTU_TIMER
1076 imply SYS_THUMB_BUILD
1077 imply SYSRESET_SYSCON
1080 bool "Support Xilinx Versal Platform"
1084 select DM_ETH if NET
1085 select DM_MMC if MMC
1088 select GPIO_EXTRA_HEADER
1091 imply BOARD_LATE_INIT
1092 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1095 bool "Freescale Vybrid"
1097 select GPIO_EXTRA_HEADER
1099 select SYS_FSL_ERRATUM_ESDHC111
1104 bool "Xilinx Zynq based platform"
1109 select DM_ETH if NET
1110 select DM_MMC if MMC
1114 select GPIO_EXTRA_HEADER
1117 select SPL_BOARD_INIT if SPL
1118 select SPL_CLK if SPL
1119 select SPL_DM if SPL
1120 select SPL_DM_SPI if SPL
1121 select SPL_DM_SPI_FLASH if SPL
1122 select SPL_OF_CONTROL if SPL
1123 select SPL_SEPARATE_BSS if SPL
1125 imply ARCH_EARLY_INIT_R
1126 imply BOARD_LATE_INIT
1130 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1133 config ARCH_ZYNQMP_R5
1134 bool "Xilinx ZynqMP R5 based platform"
1138 select DM_ETH if NET
1139 select DM_MMC if MMC
1141 select GPIO_EXTRA_HEADER
1147 bool "Xilinx ZynqMP based platform"
1151 select DM_ETH if NET
1153 select DM_MMC if MMC
1155 select DM_SPI if SPI
1156 select DM_SPI_FLASH if DM_SPI
1159 select GPIO_EXTRA_HEADER
1161 select SPL_BOARD_INIT if SPL
1162 select SPL_CLK if SPL
1163 select SPL_DM if SPL
1164 select SPL_DM_SPI if SPI && SPL_DM
1165 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1166 select SPL_DM_MAILBOX if SPL
1167 select SPL_FIRMWARE if SPL
1168 select SPL_SEPARATE_BSS if SPL
1172 imply BOARD_LATE_INIT
1174 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1181 select GPIO_EXTRA_HEADER
1182 imply DISTRO_DEFAULTS
1185 config TARGET_VEXPRESS64_AEMV8A
1186 bool "Support vexpress_aemv8a"
1188 select GPIO_EXTRA_HEADER
1191 config TARGET_VEXPRESS64_BASE_FVP
1192 bool "Support Versatile Express ARMv8a FVP BASE model"
1194 select GPIO_EXTRA_HEADER
1198 config TARGET_VEXPRESS64_JUNO
1199 bool "Support Versatile Express Juno Development Platform"
1201 select GPIO_EXTRA_HEADER
1214 config TARGET_TOTAL_COMPUTE
1215 bool "Support Total Compute Platform"
1223 config TARGET_LS2080A_EMU
1224 bool "Support ls2080a_emu"
1227 select ARMV8_MULTIENTRY
1228 select FSL_DDR_SYNC_REFRESH
1229 select GPIO_EXTRA_HEADER
1231 Support for Freescale LS2080A_EMU platform.
1232 The LS2080A Development System (EMULATOR) is a pre-silicon
1233 development platform that supports the QorIQ LS2080A
1234 Layerscape Architecture processor.
1236 config TARGET_LS1088AQDS
1237 bool "Support ls1088aqds"
1240 select ARMV8_MULTIENTRY
1241 select ARCH_SUPPORT_TFABOOT
1242 select BOARD_LATE_INIT
1243 select GPIO_EXTRA_HEADER
1245 select FSL_DDR_INTERACTIVE if !SD_BOOT
1247 Support for NXP LS1088AQDS platform.
1248 The LS1088A Development System (QDS) is a high-performance
1249 development platform that supports the QorIQ LS1088A
1250 Layerscape Architecture processor.
1252 config TARGET_LS2080AQDS
1253 bool "Support ls2080aqds"
1256 select ARMV8_MULTIENTRY
1257 select ARCH_SUPPORT_TFABOOT
1258 select BOARD_LATE_INIT
1259 select GPIO_EXTRA_HEADER
1264 select FSL_DDR_INTERACTIVE if !SPL
1266 Support for Freescale LS2080AQDS platform.
1267 The LS2080A Development System (QDS) is a high-performance
1268 development platform that supports the QorIQ LS2080A
1269 Layerscape Architecture processor.
1271 config TARGET_LS2080ARDB
1272 bool "Support ls2080ardb"
1275 select ARMV8_MULTIENTRY
1276 select ARCH_SUPPORT_TFABOOT
1277 select BOARD_LATE_INIT
1280 select FSL_DDR_INTERACTIVE if !SPL
1281 select GPIO_EXTRA_HEADER
1285 Support for Freescale LS2080ARDB platform.
1286 The LS2080A Reference design board (RDB) is a high-performance
1287 development platform that supports the QorIQ LS2080A
1288 Layerscape Architecture processor.
1290 config TARGET_LS2081ARDB
1291 bool "Support ls2081ardb"
1294 select ARMV8_MULTIENTRY
1295 select BOARD_LATE_INIT
1296 select GPIO_EXTRA_HEADER
1299 Support for Freescale LS2081ARDB platform.
1300 The LS2081A Reference design board (RDB) is a high-performance
1301 development platform that supports the QorIQ LS2081A/LS2041A
1302 Layerscape Architecture processor.
1304 config TARGET_LX2160ARDB
1305 bool "Support lx2160ardb"
1308 select ARMV8_MULTIENTRY
1309 select ARCH_SUPPORT_TFABOOT
1310 select BOARD_LATE_INIT
1311 select GPIO_EXTRA_HEADER
1313 Support for NXP LX2160ARDB platform.
1314 The lx2160ardb (LX2160A Reference design board (RDB)
1315 is a high-performance development platform that supports the
1316 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1318 config TARGET_LX2160AQDS
1319 bool "Support lx2160aqds"
1322 select ARMV8_MULTIENTRY
1323 select ARCH_SUPPORT_TFABOOT
1324 select BOARD_LATE_INIT
1325 select GPIO_EXTRA_HEADER
1327 Support for NXP LX2160AQDS platform.
1328 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1329 is a high-performance development platform that supports the
1330 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1332 config TARGET_LX2162AQDS
1333 bool "Support lx2162aqds"
1335 select ARCH_MISC_INIT
1337 select ARMV8_MULTIENTRY
1338 select ARCH_SUPPORT_TFABOOT
1339 select BOARD_LATE_INIT
1340 select GPIO_EXTRA_HEADER
1342 Support for NXP LX2162AQDS platform.
1343 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1346 bool "Support HiKey 96boards Consumer Edition Platform"
1351 select GPIO_EXTRA_HEADER
1354 select SPECIFY_CONSOLE_INDEX
1357 Support for HiKey 96boards platform. It features a HI6220
1358 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1360 config TARGET_HIKEY960
1361 bool "Support HiKey960 96boards Consumer Edition Platform"
1365 select GPIO_EXTRA_HEADER
1370 Support for HiKey960 96boards platform. It features a HI3660
1371 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1373 config TARGET_POPLAR
1374 bool "Support Poplar 96boards Enterprise Edition Platform"
1378 select GPIO_EXTRA_HEADER
1383 Support for Poplar 96boards EE platform. It features a HI3798cv200
1384 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1385 making it capable of running any commercial set-top solution based on
1388 config TARGET_LS1012AQDS
1389 bool "Support ls1012aqds"
1392 select ARCH_SUPPORT_TFABOOT
1393 select BOARD_LATE_INIT
1394 select GPIO_EXTRA_HEADER
1396 Support for Freescale LS1012AQDS platform.
1397 The LS1012A Development System (QDS) is a high-performance
1398 development platform that supports the QorIQ LS1012A
1399 Layerscape Architecture processor.
1401 config TARGET_LS1012ARDB
1402 bool "Support ls1012ardb"
1405 select ARCH_SUPPORT_TFABOOT
1406 select BOARD_LATE_INIT
1407 select GPIO_EXTRA_HEADER
1411 Support for Freescale LS1012ARDB platform.
1412 The LS1012A Reference design board (RDB) is a high-performance
1413 development platform that supports the QorIQ LS1012A
1414 Layerscape Architecture processor.
1416 config TARGET_LS1012A2G5RDB
1417 bool "Support ls1012a2g5rdb"
1420 select ARCH_SUPPORT_TFABOOT
1421 select BOARD_LATE_INIT
1422 select GPIO_EXTRA_HEADER
1425 Support for Freescale LS1012A2G5RDB platform.
1426 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1427 development platform that supports the QorIQ LS1012A
1428 Layerscape Architecture processor.
1430 config TARGET_LS1012AFRWY
1431 bool "Support ls1012afrwy"
1434 select ARCH_SUPPORT_TFABOOT
1435 select BOARD_LATE_INIT
1436 select GPIO_EXTRA_HEADER
1440 Support for Freescale LS1012AFRWY platform.
1441 The LS1012A FRWY board (FRWY) is a high-performance
1442 development platform that supports the QorIQ LS1012A
1443 Layerscape Architecture processor.
1445 config TARGET_LS1012AFRDM
1446 bool "Support ls1012afrdm"
1449 select ARCH_SUPPORT_TFABOOT
1450 select GPIO_EXTRA_HEADER
1452 Support for Freescale LS1012AFRDM platform.
1453 The LS1012A Freedom board (FRDM) is a high-performance
1454 development platform that supports the QorIQ LS1012A
1455 Layerscape Architecture processor.
1457 config TARGET_LS1028AQDS
1458 bool "Support ls1028aqds"
1461 select ARMV8_MULTIENTRY
1462 select ARCH_SUPPORT_TFABOOT
1463 select BOARD_LATE_INIT
1464 select GPIO_EXTRA_HEADER
1466 Support for Freescale LS1028AQDS platform
1467 The LS1028A Development System (QDS) is a high-performance
1468 development platform that supports the QorIQ LS1028A
1469 Layerscape Architecture processor.
1471 config TARGET_LS1028ARDB
1472 bool "Support ls1028ardb"
1475 select ARMV8_MULTIENTRY
1476 select ARCH_SUPPORT_TFABOOT
1477 select BOARD_LATE_INIT
1478 select GPIO_EXTRA_HEADER
1480 Support for Freescale LS1028ARDB platform
1481 The LS1028A Development System (RDB) is a high-performance
1482 development platform that supports the QorIQ LS1028A
1483 Layerscape Architecture processor.
1485 config TARGET_LS1088ARDB
1486 bool "Support ls1088ardb"
1489 select ARMV8_MULTIENTRY
1490 select ARCH_SUPPORT_TFABOOT
1491 select BOARD_LATE_INIT
1493 select FSL_DDR_INTERACTIVE if !SD_BOOT
1494 select GPIO_EXTRA_HEADER
1496 Support for NXP LS1088ARDB platform.
1497 The LS1088A Reference design board (RDB) is a high-performance
1498 development platform that supports the QorIQ LS1088A
1499 Layerscape Architecture processor.
1501 config TARGET_LS1021AQDS
1502 bool "Support ls1021aqds"
1504 select ARCH_SUPPORT_PSCI
1505 select BOARD_EARLY_INIT_F
1506 select BOARD_LATE_INIT
1508 select CPU_V7_HAS_NONSEC
1509 select CPU_V7_HAS_VIRT
1510 select LS1_DEEP_SLEEP
1513 select FSL_DDR_INTERACTIVE
1514 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1515 select GPIO_EXTRA_HEADER
1516 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1519 config TARGET_LS1021ATWR
1520 bool "Support ls1021atwr"
1522 select ARCH_SUPPORT_PSCI
1523 select BOARD_EARLY_INIT_F
1524 select BOARD_LATE_INIT
1526 select CPU_V7_HAS_NONSEC
1527 select CPU_V7_HAS_VIRT
1528 select LS1_DEEP_SLEEP
1530 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1531 select GPIO_EXTRA_HEADER
1534 config TARGET_PG_WCOM_SELI8
1535 bool "Support Hitachi-Powergrids SELI8 service unit card"
1537 select ARCH_SUPPORT_PSCI
1538 select BOARD_EARLY_INIT_F
1539 select BOARD_LATE_INIT
1541 select CPU_V7_HAS_NONSEC
1542 select CPU_V7_HAS_VIRT
1544 select FSL_DDR_INTERACTIVE
1545 select GPIO_EXTRA_HEADER
1549 Support for Hitachi-Powergrids SELI8 service unit card.
1550 SELI8 is a QorIQ LS1021a based service unit card used
1551 in XMC20 and FOX615 product families.
1553 config TARGET_PG_WCOM_EXPU1
1554 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1556 select ARCH_SUPPORT_PSCI
1557 select BOARD_EARLY_INIT_F
1558 select BOARD_LATE_INIT
1560 select CPU_V7_HAS_NONSEC
1561 select CPU_V7_HAS_VIRT
1563 select FSL_DDR_INTERACTIVE
1567 Support for Hitachi-Powergrids EXPU1 service unit card.
1568 EXPU1 is a QorIQ LS1021a based service unit card used
1569 in XMC20 and FOX615 product families.
1571 config TARGET_LS1021ATSN
1572 bool "Support ls1021atsn"
1574 select ARCH_SUPPORT_PSCI
1575 select BOARD_EARLY_INIT_F
1576 select BOARD_LATE_INIT
1578 select CPU_V7_HAS_NONSEC
1579 select CPU_V7_HAS_VIRT
1580 select LS1_DEEP_SLEEP
1582 select GPIO_EXTRA_HEADER
1585 config TARGET_LS1021AIOT
1586 bool "Support ls1021aiot"
1588 select ARCH_SUPPORT_PSCI
1589 select BOARD_LATE_INIT
1591 select CPU_V7_HAS_NONSEC
1592 select CPU_V7_HAS_VIRT
1594 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1595 select GPIO_EXTRA_HEADER
1598 Support for Freescale LS1021AIOT platform.
1599 The LS1021A Freescale board (IOT) is a high-performance
1600 development platform that supports the QorIQ LS1021A
1601 Layerscape Architecture processor.
1603 config TARGET_LS1043AQDS
1604 bool "Support ls1043aqds"
1607 select ARMV8_MULTIENTRY
1608 select ARCH_SUPPORT_TFABOOT
1609 select BOARD_EARLY_INIT_F
1610 select BOARD_LATE_INIT
1612 select FSL_DDR_INTERACTIVE if !SPL
1613 select FSL_DSPI if !SPL_NO_DSPI
1614 select DM_SPI_FLASH if FSL_DSPI
1615 select GPIO_EXTRA_HEADER
1619 Support for Freescale LS1043AQDS platform.
1621 config TARGET_LS1043ARDB
1622 bool "Support ls1043ardb"
1625 select ARMV8_MULTIENTRY
1626 select ARCH_SUPPORT_TFABOOT
1627 select BOARD_EARLY_INIT_F
1628 select BOARD_LATE_INIT
1630 select FSL_DSPI if !SPL_NO_DSPI
1631 select DM_SPI_FLASH if FSL_DSPI
1632 select GPIO_EXTRA_HEADER
1634 Support for Freescale LS1043ARDB platform.
1636 config TARGET_LS1046AQDS
1637 bool "Support ls1046aqds"
1640 select ARMV8_MULTIENTRY
1641 select ARCH_SUPPORT_TFABOOT
1642 select BOARD_EARLY_INIT_F
1643 select BOARD_LATE_INIT
1644 select DM_SPI_FLASH if DM_SPI
1646 select FSL_DDR_BIST if !SPL
1647 select FSL_DDR_INTERACTIVE if !SPL
1648 select FSL_DDR_INTERACTIVE if !SPL
1649 select GPIO_EXTRA_HEADER
1652 Support for Freescale LS1046AQDS platform.
1653 The LS1046A Development System (QDS) is a high-performance
1654 development platform that supports the QorIQ LS1046A
1655 Layerscape Architecture processor.
1657 config TARGET_LS1046ARDB
1658 bool "Support ls1046ardb"
1661 select ARMV8_MULTIENTRY
1662 select ARCH_SUPPORT_TFABOOT
1663 select BOARD_EARLY_INIT_F
1664 select BOARD_LATE_INIT
1665 select DM_SPI_FLASH if DM_SPI
1666 select POWER_MC34VR500
1669 select FSL_DDR_INTERACTIVE if !SPL
1670 select GPIO_EXTRA_HEADER
1673 Support for Freescale LS1046ARDB platform.
1674 The LS1046A Reference Design Board (RDB) is a high-performance
1675 development platform that supports the QorIQ LS1046A
1676 Layerscape Architecture processor.
1678 config TARGET_LS1046AFRWY
1679 bool "Support ls1046afrwy"
1682 select ARMV8_MULTIENTRY
1683 select ARCH_SUPPORT_TFABOOT
1684 select BOARD_EARLY_INIT_F
1685 select BOARD_LATE_INIT
1686 select DM_SPI_FLASH if DM_SPI
1687 select GPIO_EXTRA_HEADER
1690 Support for Freescale LS1046AFRWY platform.
1691 The LS1046A Freeway Board (FRWY) is a high-performance
1692 development platform that supports the QorIQ LS1046A
1693 Layerscape Architecture processor.
1699 select ARMV8_MULTIENTRY
1715 select GPIO_EXTRA_HEADER
1716 select SPL_DM if SPL
1717 select SPL_DM_SPI if SPL
1718 select SPL_DM_SPI_FLASH if SPL
1719 select SPL_DM_I2C if SPL
1720 select SPL_DM_MMC if SPL
1721 select SPL_DM_SERIAL if SPL
1723 Support for Kontron SMARC-sAL28 board.
1725 config TARGET_COLIBRI_PXA270
1726 bool "Support colibri_pxa270"
1728 select GPIO_EXTRA_HEADER
1730 config ARCH_UNIPHIER
1731 bool "Socionext UniPhier SoCs"
1732 select BOARD_LATE_INIT
1741 select OF_BOARD_SETUP
1745 select SPL_BOARD_INIT if SPL
1746 select SPL_DM if SPL
1747 select SPL_LIBCOMMON_SUPPORT if SPL
1748 select SPL_LIBGENERIC_SUPPORT if SPL
1749 select SPL_OF_CONTROL if SPL
1750 select SPL_PINCTRL if SPL
1753 imply DISTRO_DEFAULTS
1756 Support for UniPhier SoC family developed by Socionext Inc.
1757 (formerly, System LSI Business Division of Panasonic Corporation)
1759 config ARCH_SYNQUACER
1760 bool "Socionext SynQuacer SoCs"
1766 select SYSRESET_PSCI
1769 Support for SynQuacer SoC family developed by Socionext Inc.
1770 This SoC is used on 96boards EE DeveloperBox.
1773 bool "Support STMicroelectronics STM32 MCU with cortex M"
1777 select GPIO_EXTRA_HEADER
1781 bool "Support STMicrolectronics SoCs"
1790 Support for STMicroelectronics STiH407/10 SoC family.
1791 This SoC is used on Linaro 96Board STiH410-B2260
1794 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1795 select ARCH_MISC_INIT
1796 select ARCH_SUPPORT_TFABOOT
1797 select BOARD_LATE_INIT
1803 select GPIO_EXTRA_HEADER
1807 select OF_SYSTEM_SETUP
1813 select SYS_THUMB_BUILD
1817 imply OF_LIBFDT_OVERLAY
1818 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1821 Support for STM32MP SoC family developed by STMicroelectronics,
1822 MPUs based on ARM cortex A core
1823 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1824 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1826 SPL is the unsecure FSBL for the basic boot chain.
1828 config ARCH_ROCKCHIP
1829 bool "Support Rockchip SoCs"
1831 select BINMAN if SPL_OPTEE || (SPL && !ARM64)
1841 select ENABLE_ARM_SOC_BOOT0_HOOK
1844 select SPL_DM if SPL
1845 select SPL_DM_SPI if SPL
1846 select SPL_DM_SPI_FLASH if SPL
1848 select SYS_THUMB_BUILD if !ARM64
1851 imply DEBUG_UART_BOARD_INIT
1852 imply DISTRO_DEFAULTS
1854 imply SARADC_ROCKCHIP
1856 imply SPL_SYS_MALLOC_SIMPLE
1859 imply USB_FUNCTION_FASTBOOT
1861 config ARCH_OCTEONTX
1862 bool "Support OcteonTX SoCs"
1865 select GPIO_EXTRA_HEADER
1869 select BOARD_LATE_INIT
1870 select SYS_CACHE_SHIFT_7
1872 config ARCH_OCTEONTX2
1873 bool "Support OcteonTX2 SoCs"
1876 select GPIO_EXTRA_HEADER
1880 select BOARD_LATE_INIT
1881 select SYS_CACHE_SHIFT_7
1883 config TARGET_THUNDERX_88XX
1884 bool "Support ThunderX 88xx"
1886 select GPIO_EXTRA_HEADER
1889 select SYS_CACHE_SHIFT_7
1892 bool "Support Aspeed SoCs"
1897 config TARGET_DURIAN
1898 bool "Support Phytium Durian Platform"
1900 select GPIO_EXTRA_HEADER
1902 Support for durian platform.
1903 It has 2GB Sdram, uart and pcie.
1905 config TARGET_PRESIDIO_ASIC
1906 bool "Support Cortina Presidio ASIC Platform"
1910 config TARGET_XENGUEST_ARM64
1911 bool "Xen guest ARM64"
1915 select LINUX_KERNEL_IMAGE_HEADER
1920 config SUPPORT_PASSING_ATAGS
1921 bool "Support pre-devicetree ATAG-based booting"
1923 imply SETUP_MEMORY_TAGS
1925 Support for booting older Linux kernels, using ATAGs rather than
1926 passing a devicetree. This is option is rarely used, and the
1927 semantics are defined at
1928 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
1930 config SETUP_MEMORY_TAGS
1931 bool "Pass memory size information via ATAG"
1932 depends on SUPPORT_PASSING_ATAGS
1935 bool "Pass Linux kernel cmdline via ATAG"
1936 depends on SUPPORT_PASSING_ATAGS
1939 bool "Pass initrd starting point and size via ATAG"
1940 depends on SUPPORT_PASSING_ATAGS
1943 bool "Pass system revision via ATAG"
1944 depends on SUPPORT_PASSING_ATAGS
1947 bool "Pass system serial number via ATAG"
1948 depends on SUPPORT_PASSING_ATAGS
1950 config STATIC_MACH_TYPE
1951 bool "Statically define the Machine ID number"
1953 When booting via ATAGs, enable this option if we know the correct
1954 machine ID number to use at compile time. Some systems will be
1955 passed the number dynamically by whatever loads U-Boot.
1958 int "Machine ID number"
1959 depends on STATIC_MACH_TYPE
1961 When booting via ATAGs, the machine type must be passed as a number.
1962 For the full list see https://www.arm.linux.org.uk/developer/machines
1964 config ARCH_SUPPORT_TFABOOT
1968 bool "Support for booting from TF-A"
1969 depends on ARCH_SUPPORT_TFABOOT
1971 Some platforms support the setup of secure registers (for instance
1972 for CPU errata handling) or provide secure services like PSCI.
1973 Those services could also be provided by other firmware parts
1974 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
1975 does not need to (and cannot) execute this code.
1976 Enabling this option will make a U-Boot binary that is relying
1977 on other firmware layers to provide secure functionality.
1979 config TI_SECURE_DEVICE
1980 bool "HS Device Type Support"
1981 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1983 If a high secure (HS) device type is being used, this config
1984 must be set. This option impacts various aspects of the
1985 build system (to create signed boot images that can be
1986 authenticated) and the code. See the doc/README.ti-secure
1987 file for further details.
1989 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1990 config ISW_ENTRY_ADDR
1991 hex "Address in memory or XIP address of bootloader entry point"
1992 default 0x402F4000 if AM43XX
1993 default 0x402F0400 if AM33XX
1994 default 0x40301350 if OMAP54XX
1996 After any reset, the boot ROM searches the boot media for a valid
1997 boot image. For non-XIP devices, the ROM then copies the image into
1998 internal memory. For all boot modes, after the ROM processes the
1999 boot image it eventually computes the entry point address depending
2000 on the device type (secure/non-secure), boot media (xip/non-xip) and
2004 source "arch/arm/mach-aspeed/Kconfig"
2006 source "arch/arm/mach-at91/Kconfig"
2008 source "arch/arm/mach-bcm283x/Kconfig"
2010 source "arch/arm/mach-bcmstb/Kconfig"
2012 source "arch/arm/mach-davinci/Kconfig"
2014 source "arch/arm/mach-exynos/Kconfig"
2016 source "arch/arm/mach-highbank/Kconfig"
2018 source "arch/arm/mach-integrator/Kconfig"
2020 source "arch/arm/mach-ipq40xx/Kconfig"
2022 source "arch/arm/mach-k3/Kconfig"
2024 source "arch/arm/mach-keystone/Kconfig"
2026 source "arch/arm/mach-kirkwood/Kconfig"
2028 source "arch/arm/mach-lpc32xx/Kconfig"
2030 source "arch/arm/mach-mvebu/Kconfig"
2032 source "arch/arm/mach-octeontx/Kconfig"
2034 source "arch/arm/mach-octeontx2/Kconfig"
2036 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2038 source "arch/arm/mach-imx/mx2/Kconfig"
2040 source "arch/arm/mach-imx/mx3/Kconfig"
2042 source "arch/arm/mach-imx/mx5/Kconfig"
2044 source "arch/arm/mach-imx/mx6/Kconfig"
2046 source "arch/arm/mach-imx/mx7/Kconfig"
2048 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2050 source "arch/arm/mach-imx/imx8/Kconfig"
2052 source "arch/arm/mach-imx/imx8m/Kconfig"
2054 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2056 source "arch/arm/mach-imx/imxrt/Kconfig"
2058 source "arch/arm/mach-imx/mxs/Kconfig"
2060 source "arch/arm/mach-omap2/Kconfig"
2062 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2064 source "arch/arm/mach-orion5x/Kconfig"
2066 source "arch/arm/mach-owl/Kconfig"
2068 source "arch/arm/mach-rmobile/Kconfig"
2070 source "arch/arm/mach-meson/Kconfig"
2072 source "arch/arm/mach-mediatek/Kconfig"
2074 source "arch/arm/mach-qemu/Kconfig"
2076 source "arch/arm/mach-rockchip/Kconfig"
2078 source "arch/arm/mach-s5pc1xx/Kconfig"
2080 source "arch/arm/mach-snapdragon/Kconfig"
2082 source "arch/arm/mach-socfpga/Kconfig"
2084 source "arch/arm/mach-sti/Kconfig"
2086 source "arch/arm/mach-stm32/Kconfig"
2088 source "arch/arm/mach-stm32mp/Kconfig"
2090 source "arch/arm/mach-sunxi/Kconfig"
2092 source "arch/arm/mach-tegra/Kconfig"
2094 source "arch/arm/mach-u8500/Kconfig"
2096 source "arch/arm/mach-uniphier/Kconfig"
2098 source "arch/arm/cpu/armv7/vf610/Kconfig"
2100 source "arch/arm/mach-zynq/Kconfig"
2102 source "arch/arm/mach-zynqmp/Kconfig"
2104 source "arch/arm/mach-versal/Kconfig"
2106 source "arch/arm/mach-zynqmp-r5/Kconfig"
2108 source "arch/arm/cpu/armv7/Kconfig"
2110 source "arch/arm/cpu/armv8/Kconfig"
2112 source "arch/arm/mach-imx/Kconfig"
2114 source "arch/arm/mach-nexell/Kconfig"
2116 source "board/armltd/total_compute/Kconfig"
2118 source "board/bosch/shc/Kconfig"
2119 source "board/bosch/guardian/Kconfig"
2120 source "board/CarMediaLab/flea3/Kconfig"
2121 source "board/Marvell/aspenite/Kconfig"
2122 source "board/Marvell/octeontx/Kconfig"
2123 source "board/Marvell/octeontx2/Kconfig"
2124 source "board/armltd/vexpress64/Kconfig"
2125 source "board/cortina/presidio-asic/Kconfig"
2126 source "board/broadcom/bcm963158/Kconfig"
2127 source "board/broadcom/bcm968360bg/Kconfig"
2128 source "board/broadcom/bcm968580xref/Kconfig"
2129 source "board/broadcom/bcmns3/Kconfig"
2130 source "board/cavium/thunderx/Kconfig"
2131 source "board/eets/pdu001/Kconfig"
2132 source "board/emulation/qemu-arm/Kconfig"
2133 source "board/freescale/ls2080aqds/Kconfig"
2134 source "board/freescale/ls2080ardb/Kconfig"
2135 source "board/freescale/ls1088a/Kconfig"
2136 source "board/freescale/ls1028a/Kconfig"
2137 source "board/freescale/ls1021aqds/Kconfig"
2138 source "board/freescale/ls1043aqds/Kconfig"
2139 source "board/freescale/ls1021atwr/Kconfig"
2140 source "board/freescale/ls1021atsn/Kconfig"
2141 source "board/freescale/ls1021aiot/Kconfig"
2142 source "board/freescale/ls1046aqds/Kconfig"
2143 source "board/freescale/ls1043ardb/Kconfig"
2144 source "board/freescale/ls1046ardb/Kconfig"
2145 source "board/freescale/ls1046afrwy/Kconfig"
2146 source "board/freescale/ls1012aqds/Kconfig"
2147 source "board/freescale/ls1012ardb/Kconfig"
2148 source "board/freescale/ls1012afrdm/Kconfig"
2149 source "board/freescale/lx2160a/Kconfig"
2150 source "board/grinn/chiliboard/Kconfig"
2151 source "board/hisilicon/hikey/Kconfig"
2152 source "board/hisilicon/hikey960/Kconfig"
2153 source "board/hisilicon/poplar/Kconfig"
2154 source "board/isee/igep003x/Kconfig"
2155 source "board/kontron/sl28/Kconfig"
2156 source "board/myir/mys_6ulx/Kconfig"
2157 source "board/seeed/npi_imx6ull/Kconfig"
2158 source "board/socionext/developerbox/Kconfig"
2159 source "board/st/stv0991/Kconfig"
2160 source "board/tcl/sl50/Kconfig"
2161 source "board/toradex/colibri_pxa270/Kconfig"
2162 source "board/variscite/dart_6ul/Kconfig"
2163 source "board/vscom/baltos/Kconfig"
2164 source "board/phytium/durian/Kconfig"
2165 source "board/xen/xenguest_arm64/Kconfig"
2166 source "board/keymile/Kconfig"
2168 source "arch/arm/Kconfig.debug"
2173 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2174 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2175 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64