1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed
19 from almost any address. This logic relies on the relocation
20 information that is embedded in the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
26 U-Boot typically uses a hard-coded value for the stack pointer
27 before relocation. Enable this option to instead calculate the
28 initial SP at run-time. This is useful to avoid hard-coding addresses
29 into U-Boot, so that it can be loaded and executed at arbitrary
30 addresses and thus avoid using arbitrary addresses at runtime.
32 If this option is enabled, the early stack pointer is set to
33 &_bss_start with a offset value added. The offset is specified by
34 SYS_INIT_SP_BSS_OFFSET.
36 config SYS_INIT_SP_BSS_OFFSET
37 int "Early stack offset from the .bss base address"
38 depends on INIT_SP_RELATIVE
41 This option's value is the offset added to &_bss_start in order to
42 calculate the stack pointer. This offset should be large enough so
43 that the early malloc region, global data (gd), and early stack usage
44 do not overlap any appended DTB.
46 config LINUX_KERNEL_IMAGE_HEADER
49 Place a Linux kernel image header at the start of the U-Boot binary.
50 The format of the header is described in the Linux kernel source at
51 Documentation/arm64/booting.txt. This feature is useful since the
52 image header reports the amount of memory (BSS and similar) that
53 U-Boot needs to use, but which isn't part of the binary.
55 if LINUX_KERNEL_IMAGE_HEADER
56 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
59 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
60 TEXT_OFFSET value written to the Linux kernel image header.
67 ARM GICV3 Interrupt translation service (ITS).
68 Basic support for programming locality specific peripheral
69 interrupts (LPI) configuration tables and enable LPI tables.
70 LPI configuration table can be used by u-boot or Linux.
71 ARM GICV3 has limitation, once the LPI table is enabled, LPI
72 configuration table can not be re-programmed, unless GICV3 reset.
76 default y if ARM64 && !POSITION_INDEPENDENT
78 config DMA_ADDR_T_64BIT
88 # Used for compatibility with asm files copied from the kernel
89 config ARM_ASM_UNIFIED
93 # Used for compatibility with asm files copied from the kernel
98 bool "Do not enable icache"
101 Do not enable instruction cache in U-Boot.
103 config SPL_SYS_ICACHE_OFF
104 bool "Do not enable icache in SPL"
106 default SYS_ICACHE_OFF
108 Do not enable instruction cache in SPL.
110 config SYS_DCACHE_OFF
111 bool "Do not enable dcache"
114 Do not enable data cache in U-Boot.
116 config SPL_SYS_DCACHE_OFF
117 bool "Do not enable dcache in SPL"
119 default SYS_DCACHE_OFF
121 Do not enable data cache in SPL.
123 config SYS_ARM_CACHE_CP15
124 bool "CP15 based cache enabling support"
126 Select this if your processor suports enabling caches by using
130 bool "MMU-based Paged Memory Management Support"
131 select SYS_ARM_CACHE_CP15
133 Select if you want MMU-based virtualised addressing space
134 support via paged memory management.
137 bool 'Use the ARM v7 PMSA Compliant MPU'
139 Some ARM systems without an MMU have instead a Memory Protection
140 Unit (MPU) that defines the type and permissions for regions of
142 If your CPU has an MPU then you should choose 'y' here unless you
143 know that you do not want to use the MPU.
145 # If set, the workarounds for these ARM errata are applied early during U-Boot
146 # startup. Note that in general these options force the workarounds to be
147 # applied; no CPU-type/version detection exists, unlike the similar options in
148 # the Linux kernel. Do not set these options unless they apply! Also note that
149 # the following can be machine-specific errata. These do have ability to
150 # provide rudimentary version and machine-specific checks, but expect no
152 # CONFIG_ARM_ERRATA_430973
153 # CONFIG_ARM_ERRATA_454179
154 # CONFIG_ARM_ERRATA_621766
155 # CONFIG_ARM_ERRATA_798870
156 # CONFIG_ARM_ERRATA_801819
157 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
158 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
160 config ARM_ERRATA_430973
163 config ARM_ERRATA_454179
166 config ARM_ERRATA_621766
169 config ARM_ERRATA_716044
172 config ARM_ERRATA_725233
175 config ARM_ERRATA_742230
178 config ARM_ERRATA_743622
181 config ARM_ERRATA_751472
184 config ARM_ERRATA_761320
187 config ARM_ERRATA_773022
190 config ARM_ERRATA_774769
193 config ARM_ERRATA_794072
196 config ARM_ERRATA_798870
199 config ARM_ERRATA_801819
202 config ARM_ERRATA_826974
205 config ARM_ERRATA_828024
208 config ARM_ERRATA_829520
211 config ARM_ERRATA_833069
214 config ARM_ERRATA_833471
217 config ARM_ERRATA_845369
220 config ARM_ERRATA_852421
223 config ARM_ERRATA_852423
226 config ARM_ERRATA_855873
229 config ARM_CORTEX_A8_CVE_2017_5715
232 config ARM_CORTEX_A15_CVE_2017_5715
237 select SYS_CACHE_SHIFT_5
242 select SYS_CACHE_SHIFT_5
247 select SYS_CACHE_SHIFT_5
252 select SYS_CACHE_SHIFT_5
257 select SYS_CACHE_SHIFT_5
263 select SYS_CACHE_SHIFT_5
270 select SYS_CACHE_SHIFT_6
277 select SYS_CACHE_SHIFT_5
278 select SYS_THUMB_BUILD
284 select SYS_ARM_CACHE_CP15
286 select SYS_CACHE_SHIFT_6
290 select SYS_CACHE_SHIFT_5
295 select SYS_CACHE_SHIFT_5
299 default "arm720t" if CPU_ARM720T
300 default "arm920t" if CPU_ARM920T
301 default "arm926ejs" if CPU_ARM926EJS
302 default "arm946es" if CPU_ARM946ES
303 default "arm1136" if CPU_ARM1136
304 default "arm1176" if CPU_ARM1176
305 default "armv7" if CPU_V7A
306 default "armv7" if CPU_V7R
307 default "armv7m" if CPU_V7M
308 default "pxa" if CPU_PXA
309 default "sa1100" if CPU_SA1100
310 default "armv8" if ARM64
314 default 4 if CPU_ARM720T
315 default 4 if CPU_ARM920T
316 default 5 if CPU_ARM926EJS
317 default 5 if CPU_ARM946ES
318 default 6 if CPU_ARM1136
319 default 6 if CPU_ARM1176
324 default 4 if CPU_SA1100
327 config SYS_CACHE_SHIFT_5
330 config SYS_CACHE_SHIFT_6
333 config SYS_CACHE_SHIFT_7
336 config SYS_CACHELINE_SIZE
338 default 128 if SYS_CACHE_SHIFT_7
339 default 64 if SYS_CACHE_SHIFT_6
340 default 32 if SYS_CACHE_SHIFT_5
343 bool "Enable ARCH_CPU_INIT"
345 Some architectures require a call to arch_cpu_init().
346 Say Y here to enable it
348 config SYS_ARCH_TIMER
349 bool "ARM Generic Timer support"
350 depends on CPU_V7A || ARM64
353 The ARM Generic Timer (aka arch-timer) provides an architected
354 interface to a timer source on an SoC.
355 It is mandatory for ARMv8 implementation and widely available
359 bool "Support for ARM SMC Calling Convention (SMCCC)"
360 depends on CPU_V7A || ARM64
363 Say Y here if you want to enable ARM SMC Calling Convention.
364 This should be enabled if U-Boot needs to communicate with system
365 firmware (for example, PSCI) according to SMCCC.
368 bool "support boot from semihosting"
370 In emulated environments, semihosting is a way for
371 the hosted environment to call out to the emulator to
372 retrieve files from the host machine.
374 config SYS_THUMB_BUILD
375 bool "Build U-Boot using the Thumb instruction set"
378 Use this flag to build U-Boot using the Thumb instruction set for
379 ARM architectures. Thumb instruction set provides better code
380 density. For ARM architectures that support Thumb2 this flag will
381 result in Thumb2 code generated by GCC.
383 config SPL_SYS_THUMB_BUILD
384 bool "Build SPL using the Thumb instruction set"
385 default y if SYS_THUMB_BUILD
386 depends on !ARM64 && SPL
388 Use this flag to build SPL using the Thumb instruction set for
389 ARM architectures. Thumb instruction set provides better code
390 density. For ARM architectures that support Thumb2 this flag will
391 result in Thumb2 code generated by GCC.
393 config TPL_SYS_THUMB_BUILD
394 bool "Build TPL using the Thumb instruction set"
395 default y if SYS_THUMB_BUILD
396 depends on TPL && !ARM64
398 Use this flag to build TPL using the Thumb instruction set for
399 ARM architectures. Thumb instruction set provides better code
400 density. For ARM architectures that support Thumb2 this flag will
401 result in Thumb2 code generated by GCC.
404 config SYS_L2CACHE_OFF
407 If SoC does not support L2CACHE or one does not want to enable
408 L2CACHE, choose this option.
410 config ENABLE_ARM_SOC_BOOT0_HOOK
411 bool "prepare BOOT0 header"
413 If the SoC's BOOT0 requires a header area filled with (magic)
414 values, then choose this option, and create a file included as
415 <asm/arch/boot0.h> which contains the required assembler code.
417 config ARM_CORTEX_CPU_IS_UP
421 config USE_ARCH_MEMCPY
422 bool "Use an assembly optimized implementation of memcpy"
426 Enable the generation of an optimized version of memcpy.
427 Such an implementation may be faster under some conditions
428 but may increase the binary size.
430 config SPL_USE_ARCH_MEMCPY
431 bool "Use an assembly optimized implementation of memcpy for SPL"
432 default y if USE_ARCH_MEMCPY
433 depends on !ARM64 && SPL
435 Enable the generation of an optimized version of memcpy.
436 Such an implementation may be faster under some conditions
437 but may increase the binary size.
439 config TPL_USE_ARCH_MEMCPY
440 bool "Use an assembly optimized implementation of memcpy for TPL"
441 default y if USE_ARCH_MEMCPY
442 depends on !ARM64 && TPL
444 Enable the generation of an optimized version of memcpy.
445 Such an implementation may be faster under some conditions
446 but may increase the binary size.
448 config USE_ARCH_MEMSET
449 bool "Use an assembly optimized implementation of memset"
453 Enable the generation of an optimized version of memset.
454 Such an implementation may be faster under some conditions
455 but may increase the binary size.
457 config SPL_USE_ARCH_MEMSET
458 bool "Use an assembly optimized implementation of memset for SPL"
459 default y if USE_ARCH_MEMSET
460 depends on !ARM64 && SPL
462 Enable the generation of an optimized version of memset.
463 Such an implementation may be faster under some conditions
464 but may increase the binary size.
466 config TPL_USE_ARCH_MEMSET
467 bool "Use an assembly optimized implementation of memset for TPL"
468 default y if USE_ARCH_MEMSET
469 depends on !ARM64 && TPL
471 Enable the generation of an optimized version of memset.
472 Such an implementation may be faster under some conditions
473 but may increase the binary size.
475 config SET_STACK_SIZE
476 bool "Enable an option to set max stack size that can be used"
477 default y if ARCH_VERSAL || ARCH_ZYNQMP
479 This will enable an option to set max stack size that can be
483 hex "Define max stack size that can be used by U-Boot"
484 depends on SET_STACK_SIZE
485 default 0x4000000 if ARCH_VERSAL || ARCH_ZYNQMP
487 Define Max stack size that can be used by U-Boot so that the
488 initrd_high will be calculated as base stack pointer minus this
491 config ARM64_SUPPORT_AARCH32
492 bool "ARM64 system support AArch32 execution state"
494 default y if !TARGET_THUNDERX_88XX
496 This ARM64 system supports AArch32 execution state.
499 prompt "Target select"
504 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
506 config TARGET_EDB93XX
507 bool "Support edb93xx"
511 config TARGET_ASPENITE
512 bool "Support aspenite"
516 bool "Support gplugd"
524 Support for TI's DaVinci platform.
527 bool "Marvell Kirkwood"
528 select ARCH_MISC_INIT
529 select BOARD_EARLY_INIT_F
533 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
553 config TARGET_SPEAR300
554 bool "Support spear300"
555 select BOARD_EARLY_INIT_F
560 config TARGET_SPEAR310
561 bool "Support spear310"
562 select BOARD_EARLY_INIT_F
567 config TARGET_SPEAR320
568 bool "Support spear320"
569 select BOARD_EARLY_INIT_F
574 config TARGET_SPEAR600
575 bool "Support spear600"
576 select BOARD_EARLY_INIT_F
581 config TARGET_STV0991
582 bool "Support stv0991"
595 select BOARD_LATE_INIT
600 config TARGET_WOODBURN
601 bool "Support woodburn"
604 config TARGET_WOODBURN_SD
605 bool "Support woodburn_sd"
613 config TARGET_MX35PDK
614 bool "Support mx35pdk"
615 select BOARD_LATE_INIT
619 bool "Broadcom BCM283X family"
625 select SERIAL_SEARCH_ALL
630 bool "Broadcom BCM63158 family"
636 bool "Broadcom BCM6858 family"
641 config TARGET_VEXPRESS_CA15_TC2
642 bool "Support vexpress_ca15_tc2"
644 select CPU_V7_HAS_NONSEC
645 select CPU_V7_HAS_VIRT
649 bool "Broadcom BCM7XXX family"
653 select OF_PRIOR_STAGE
656 This enables support for Broadcom ARM-based set-top box
657 chipsets, including the 7445 family of chips.
659 config TARGET_VEXPRESS_CA5X2
660 bool "Support vexpress_ca5x2"
664 config TARGET_VEXPRESS_CA9X4
665 bool "Support vexpress_ca9x4"
669 config TARGET_BCM23550_W1D
670 bool "Support bcm23550_w1d"
675 config TARGET_BCM28155_AP
676 bool "Support bcm28155_ap"
681 config TARGET_BCMCYGNUS
682 bool "Support bcmcygnus"
685 imply BCM_SF2_ETH_GMAC
693 bool "Support bcmnsp"
697 bool "Support Broadcom Northstar2"
700 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
701 ARMv8 Cortex-A57 processors targeting a broad range of networking
705 bool "Samsung EXYNOS"
714 imply SYS_THUMB_BUILD
719 bool "Samsung S5PC1XX"
728 bool "Calxeda Highbank"
732 config ARCH_INTEGRATOR
733 bool "ARM Ltd. Integrator family"
744 select SYS_ARCH_TIMER
745 select SYS_THUMB_BUILD
751 bool "Texas Instruments' K3 Architecture"
756 config ARCH_OMAP2PLUS
759 select SPL_BOARD_INIT if SPL
760 select SPL_STACK_R if SPL
766 imply DISTRO_DEFAULTS
768 Support for the Meson SoC family developed by Amlogic Inc.,
769 targeted at media players and tablet computers. We currently
770 support the S905 (GXBaby) 64-bit SoC.
778 select SPL_LIBCOMMON_SUPPORT if SPL
779 select SPL_LIBGENERIC_SUPPORT if SPL
780 select SPL_OF_CONTROL if SPL
783 Support for the MediaTek SoCs family developed by MediaTek Inc.
784 Please refer to doc/README.mediatek for more information.
787 bool "NXP LPC32xx platform"
797 bool "NXP i.MX8 platform"
801 select ENABLE_ARM_SOC_BOOT0_HOOK
804 bool "NXP i.MX8M platform"
811 bool "NXP i.MX23 family"
822 bool "NXP i.MX28 family"
828 bool "NXP i.MX31 family"
834 select ROM_UNIFIED_SECTIONS
836 imply SYS_THUMB_BUILD
840 select ARCH_MISC_INIT
841 select BOARD_EARLY_INIT_F
843 select SYS_FSL_HAS_SEC if IMX_HAB
844 select SYS_FSL_SEC_COMPAT_4
845 select SYS_FSL_SEC_LE
847 imply SYS_THUMB_BUILD
852 select SYS_FSL_HAS_SEC if IMX_HAB
853 select SYS_FSL_SEC_COMPAT_4
854 select SYS_FSL_SEC_LE
856 imply SYS_THUMB_BUILD
860 default "arch/arm/mach-omap2/u-boot-spl.lds"
865 select BOARD_EARLY_INIT_F
870 bool "Actions Semi OWL SoCs"
878 bool "QEMU Virtual Platform"
879 select ARCH_SUPPORT_TFABOOT
889 bool "Renesas ARM SoCs"
890 select BOARD_EARLY_INIT_F if !RZA1
895 imply SYS_THUMB_BUILD
896 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
898 config TARGET_S32V234EVB
899 bool "Support s32v234evb"
901 select SYS_FSL_ERRATUM_ESDHC111
903 config ARCH_SNAPDRAGON
904 bool "Qualcomm Snapdragon SoCs"
917 bool "Altera SOCFPGA family"
918 select ARCH_EARLY_INIT_R
919 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
920 select ARM64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
921 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
924 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
926 select SPL_DM_RESET if DM_RESET
928 select SPL_LIBCOMMON_SUPPORT
929 select SPL_LIBGENERIC_SUPPORT
930 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
931 select SPL_OF_CONTROL
932 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
933 select SPL_SERIAL_SUPPORT
935 select SPL_WATCHDOG_SUPPORT
938 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
940 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
941 select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
950 imply SPL_LIBDISK_SUPPORT
951 imply SPL_MMC_SUPPORT
952 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
953 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
954 imply SPL_SPI_FLASH_SUPPORT
955 imply SPL_SPI_SUPPORT
959 bool "Support sunxi (Allwinner) SoCs"
962 select CMD_MMC if MMC
963 select CMD_USB if DISTRO_DEFAULTS
970 select DM_SCSI if SCSI
972 select DM_USB if DISTRO_DEFAULTS
973 select OF_BOARD_SETUP
976 select SPECIFY_CONSOLE_INDEX
977 select SPL_STACK_R if SPL
978 select SPL_SYS_MALLOC_SIMPLE if SPL
979 select SPL_SYS_THUMB_BUILD if !ARM64
982 select SYS_THUMB_BUILD if !ARM64
983 select USB if DISTRO_DEFAULTS
984 select USB_KEYBOARD if DISTRO_DEFAULTS
985 select USB_STORAGE if DISTRO_DEFAULTS
986 select SPL_USE_TINY_PRINTF
989 imply CMD_UBI if MTD_RAW_NAND
990 imply DISTRO_DEFAULTS
993 imply OF_LIBFDT_OVERLAY
994 imply PRE_CONSOLE_BUFFER
995 imply SPL_GPIO_SUPPORT
996 imply SPL_LIBCOMMON_SUPPORT
997 imply SPL_LIBGENERIC_SUPPORT
998 imply SPL_MMC_SUPPORT if MMC
999 imply SPL_POWER_SUPPORT
1000 imply SPL_SERIAL_SUPPORT
1004 bool "Support Xilinx Versal Platform"
1008 select DM_ETH if NET
1009 select DM_MMC if MMC
1012 imply BOARD_LATE_INIT
1015 bool "Freescale Vybrid"
1017 select SYS_FSL_ERRATUM_ESDHC111
1022 bool "Xilinx Zynq based platform"
1027 select DM_ETH if NET
1028 select DM_MMC if MMC
1032 select DM_USB if USB
1035 select SPL_BOARD_INIT if SPL
1036 select SPL_CLK if SPL
1037 select SPL_DM if SPL
1038 select SPL_OF_CONTROL if SPL
1039 select SPL_SEPARATE_BSS if SPL
1041 imply ARCH_EARLY_INIT_R
1042 imply BOARD_LATE_INIT
1048 config ARCH_ZYNQMP_R5
1049 bool "Xilinx ZynqMP R5 based platform"
1053 select DM_ETH if NET
1054 select DM_MMC if MMC
1061 bool "Xilinx ZynqMP based platform"
1065 select DM_ETH if NET
1067 select DM_MMC if MMC
1069 select DM_SPI if SPI
1070 select DM_SPI_FLASH if DM_SPI
1071 select DM_USB if USB
1074 select SPL_BOARD_INIT if SPL
1075 select SPL_CLK if SPL
1076 select SPL_DM_MAILBOX if SPL
1077 select SPL_FIRMWARE if SPL
1078 select SPL_SEPARATE_BSS if SPL
1081 imply BOARD_LATE_INIT
1089 imply DISTRO_DEFAULTS
1092 config TARGET_VEXPRESS64_AEMV8A
1093 bool "Support vexpress_aemv8a"
1097 config TARGET_VEXPRESS64_BASE_FVP
1098 bool "Support Versatile Express ARMv8a FVP BASE model"
1103 config TARGET_VEXPRESS64_JUNO
1104 bool "Support Versatile Express Juno Development Platform"
1108 config TARGET_LS2080A_EMU
1109 bool "Support ls2080a_emu"
1111 select ARCH_MISC_INIT
1113 select ARMV8_MULTIENTRY
1114 select FSL_DDR_SYNC_REFRESH
1116 Support for Freescale LS2080A_EMU platform.
1117 The LS2080A Development System (EMULATOR) is a pre-silicon
1118 development platform that supports the QorIQ LS2080A
1119 Layerscape Architecture processor.
1121 config TARGET_LS2080A_SIMU
1122 bool "Support ls2080a_simu"
1124 select ARCH_MISC_INIT
1126 select ARMV8_MULTIENTRY
1127 select BOARD_LATE_INIT
1129 Support for Freescale LS2080A_SIMU platform.
1130 The LS2080A Development System (QDS) is a pre silicon
1131 development platform that supports the QorIQ LS2080A
1132 Layerscape Architecture processor.
1134 config TARGET_LS1088AQDS
1135 bool "Support ls1088aqds"
1137 select ARCH_MISC_INIT
1139 select ARMV8_MULTIENTRY
1140 select ARCH_SUPPORT_TFABOOT
1141 select BOARD_LATE_INIT
1143 select FSL_DDR_INTERACTIVE if !SD_BOOT
1145 Support for NXP LS1088AQDS platform.
1146 The LS1088A Development System (QDS) is a high-performance
1147 development platform that supports the QorIQ LS1088A
1148 Layerscape Architecture processor.
1150 config TARGET_LS2080AQDS
1151 bool "Support ls2080aqds"
1153 select ARCH_MISC_INIT
1155 select ARMV8_MULTIENTRY
1156 select ARCH_SUPPORT_TFABOOT
1157 select BOARD_LATE_INIT
1162 select FSL_DDR_INTERACTIVE if !SPL
1164 Support for Freescale LS2080AQDS platform.
1165 The LS2080A Development System (QDS) is a high-performance
1166 development platform that supports the QorIQ LS2080A
1167 Layerscape Architecture processor.
1169 config TARGET_LS2080ARDB
1170 bool "Support ls2080ardb"
1172 select ARCH_MISC_INIT
1174 select ARMV8_MULTIENTRY
1175 select ARCH_SUPPORT_TFABOOT
1176 select BOARD_LATE_INIT
1179 select FSL_DDR_INTERACTIVE if !SPL
1183 Support for Freescale LS2080ARDB platform.
1184 The LS2080A Reference design board (RDB) is a high-performance
1185 development platform that supports the QorIQ LS2080A
1186 Layerscape Architecture processor.
1188 config TARGET_LS2081ARDB
1189 bool "Support ls2081ardb"
1191 select ARCH_MISC_INIT
1193 select ARMV8_MULTIENTRY
1194 select BOARD_LATE_INIT
1197 Support for Freescale LS2081ARDB platform.
1198 The LS2081A Reference design board (RDB) is a high-performance
1199 development platform that supports the QorIQ LS2081A/LS2041A
1200 Layerscape Architecture processor.
1202 config TARGET_LX2160ARDB
1203 bool "Support lx2160ardb"
1205 select ARCH_MISC_INIT
1207 select ARMV8_MULTIENTRY
1208 select ARCH_SUPPORT_TFABOOT
1209 select BOARD_LATE_INIT
1211 Support for NXP LX2160ARDB platform.
1212 The lx2160ardb (LX2160A Reference design board (RDB)
1213 is a high-performance development platform that supports the
1214 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1216 config TARGET_LX2160AQDS
1217 bool "Support lx2160aqds"
1219 select ARCH_MISC_INIT
1221 select ARMV8_MULTIENTRY
1222 select ARCH_SUPPORT_TFABOOT
1223 select BOARD_LATE_INIT
1225 Support for NXP LX2160AQDS platform.
1226 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1227 is a high-performance development platform that supports the
1228 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1231 bool "Support HiKey 96boards Consumer Edition Platform"
1238 select SPECIFY_CONSOLE_INDEX
1241 Support for HiKey 96boards platform. It features a HI6220
1242 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1244 config TARGET_HIKEY960
1245 bool "Support HiKey960 96boards Consumer Edition Platform"
1253 Support for HiKey960 96boards platform. It features a HI3660
1254 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1256 config TARGET_POPLAR
1257 bool "Support Poplar 96boards Enterprise Edition Platform"
1266 Support for Poplar 96boards EE platform. It features a HI3798cv200
1267 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1268 making it capable of running any commercial set-top solution based on
1271 config TARGET_LS1012AQDS
1272 bool "Support ls1012aqds"
1275 select ARCH_SUPPORT_TFABOOT
1276 select BOARD_LATE_INIT
1278 Support for Freescale LS1012AQDS platform.
1279 The LS1012A Development System (QDS) is a high-performance
1280 development platform that supports the QorIQ LS1012A
1281 Layerscape Architecture processor.
1283 config TARGET_LS1012ARDB
1284 bool "Support ls1012ardb"
1287 select ARCH_SUPPORT_TFABOOT
1288 select BOARD_LATE_INIT
1292 Support for Freescale LS1012ARDB platform.
1293 The LS1012A Reference design board (RDB) is a high-performance
1294 development platform that supports the QorIQ LS1012A
1295 Layerscape Architecture processor.
1297 config TARGET_LS1012A2G5RDB
1298 bool "Support ls1012a2g5rdb"
1301 select ARCH_SUPPORT_TFABOOT
1302 select BOARD_LATE_INIT
1305 Support for Freescale LS1012A2G5RDB platform.
1306 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1307 development platform that supports the QorIQ LS1012A
1308 Layerscape Architecture processor.
1310 config TARGET_LS1012AFRWY
1311 bool "Support ls1012afrwy"
1314 select ARCH_SUPPORT_TFABOOT
1315 select BOARD_LATE_INIT
1319 Support for Freescale LS1012AFRWY platform.
1320 The LS1012A FRWY board (FRWY) is a high-performance
1321 development platform that supports the QorIQ LS1012A
1322 Layerscape Architecture processor.
1324 config TARGET_LS1012AFRDM
1325 bool "Support ls1012afrdm"
1328 select ARCH_SUPPORT_TFABOOT
1330 Support for Freescale LS1012AFRDM platform.
1331 The LS1012A Freedom board (FRDM) is a high-performance
1332 development platform that supports the QorIQ LS1012A
1333 Layerscape Architecture processor.
1335 config TARGET_LS1028AQDS
1336 bool "Support ls1028aqds"
1339 select ARMV8_MULTIENTRY
1340 select ARCH_SUPPORT_TFABOOT
1341 select BOARD_LATE_INIT
1342 select ARCH_MISC_INIT
1344 Support for Freescale LS1028AQDS platform
1345 The LS1028A Development System (QDS) is a high-performance
1346 development platform that supports the QorIQ LS1028A
1347 Layerscape Architecture processor.
1349 config TARGET_LS1028ARDB
1350 bool "Support ls1028ardb"
1353 select ARMV8_MULTIENTRY
1354 select ARCH_SUPPORT_TFABOOT
1356 Support for Freescale LS1028ARDB platform
1357 The LS1028A Development System (RDB) is a high-performance
1358 development platform that supports the QorIQ LS1028A
1359 Layerscape Architecture processor.
1361 config TARGET_LS1088ARDB
1362 bool "Support ls1088ardb"
1364 select ARCH_MISC_INIT
1366 select ARMV8_MULTIENTRY
1367 select ARCH_SUPPORT_TFABOOT
1368 select BOARD_LATE_INIT
1370 select FSL_DDR_INTERACTIVE if !SD_BOOT
1372 Support for NXP LS1088ARDB platform.
1373 The LS1088A Reference design board (RDB) is a high-performance
1374 development platform that supports the QorIQ LS1088A
1375 Layerscape Architecture processor.
1377 config TARGET_LS1021AQDS
1378 bool "Support ls1021aqds"
1380 select ARCH_SUPPORT_PSCI
1381 select BOARD_EARLY_INIT_F
1382 select BOARD_LATE_INIT
1384 select CPU_V7_HAS_NONSEC
1385 select CPU_V7_HAS_VIRT
1386 select LS1_DEEP_SLEEP
1389 select FSL_DDR_INTERACTIVE
1392 config TARGET_LS1021ATWR
1393 bool "Support ls1021atwr"
1395 select ARCH_SUPPORT_PSCI
1396 select BOARD_EARLY_INIT_F
1397 select BOARD_LATE_INIT
1399 select CPU_V7_HAS_NONSEC
1400 select CPU_V7_HAS_VIRT
1401 select LS1_DEEP_SLEEP
1405 config TARGET_LS1021ATSN
1406 bool "Support ls1021atsn"
1408 select ARCH_SUPPORT_PSCI
1409 select BOARD_EARLY_INIT_F
1410 select BOARD_LATE_INIT
1412 select CPU_V7_HAS_NONSEC
1413 select CPU_V7_HAS_VIRT
1414 select LS1_DEEP_SLEEP
1418 config TARGET_LS1021AIOT
1419 bool "Support ls1021aiot"
1421 select ARCH_SUPPORT_PSCI
1422 select BOARD_LATE_INIT
1424 select CPU_V7_HAS_NONSEC
1425 select CPU_V7_HAS_VIRT
1429 Support for Freescale LS1021AIOT platform.
1430 The LS1021A Freescale board (IOT) is a high-performance
1431 development platform that supports the QorIQ LS1021A
1432 Layerscape Architecture processor.
1434 config TARGET_LS1043AQDS
1435 bool "Support ls1043aqds"
1438 select ARMV8_MULTIENTRY
1439 select ARCH_SUPPORT_TFABOOT
1440 select BOARD_EARLY_INIT_F
1441 select BOARD_LATE_INIT
1443 select FSL_DDR_INTERACTIVE if !SPL
1447 Support for Freescale LS1043AQDS platform.
1449 config TARGET_LS1043ARDB
1450 bool "Support ls1043ardb"
1453 select ARMV8_MULTIENTRY
1454 select ARCH_SUPPORT_TFABOOT
1455 select BOARD_EARLY_INIT_F
1456 select BOARD_LATE_INIT
1459 Support for Freescale LS1043ARDB platform.
1461 config TARGET_LS1046AQDS
1462 bool "Support ls1046aqds"
1465 select ARMV8_MULTIENTRY
1466 select ARCH_SUPPORT_TFABOOT
1467 select BOARD_EARLY_INIT_F
1468 select BOARD_LATE_INIT
1469 select DM_SPI_FLASH if DM_SPI
1471 select FSL_DDR_BIST if !SPL
1472 select FSL_DDR_INTERACTIVE if !SPL
1473 select FSL_DDR_INTERACTIVE if !SPL
1476 Support for Freescale LS1046AQDS platform.
1477 The LS1046A Development System (QDS) is a high-performance
1478 development platform that supports the QorIQ LS1046A
1479 Layerscape Architecture processor.
1481 config TARGET_LS1046ARDB
1482 bool "Support ls1046ardb"
1485 select ARMV8_MULTIENTRY
1486 select ARCH_SUPPORT_TFABOOT
1487 select BOARD_EARLY_INIT_F
1488 select BOARD_LATE_INIT
1489 select DM_SPI_FLASH if DM_SPI
1490 select POWER_MC34VR500
1493 select FSL_DDR_INTERACTIVE if !SPL
1496 Support for Freescale LS1046ARDB platform.
1497 The LS1046A Reference Design Board (RDB) is a high-performance
1498 development platform that supports the QorIQ LS1046A
1499 Layerscape Architecture processor.
1501 config TARGET_LS1046AFRWY
1502 bool "Support ls1046afrwy"
1505 select ARMV8_MULTIENTRY
1506 select ARCH_SUPPORT_TFABOOT
1507 select BOARD_EARLY_INIT_F
1508 select BOARD_LATE_INIT
1509 select DM_SPI_FLASH if DM_SPI
1512 Support for Freescale LS1046AFRWY platform.
1513 The LS1046A Freeway Board (FRWY) is a high-performance
1514 development platform that supports the QorIQ LS1046A
1515 Layerscape Architecture processor.
1517 config TARGET_COLIBRI_PXA270
1518 bool "Support colibri_pxa270"
1521 config ARCH_UNIPHIER
1522 bool "Socionext UniPhier SoCs"
1523 select BOARD_LATE_INIT
1531 select OF_BOARD_SETUP
1535 select SPL_BOARD_INIT if SPL
1536 select SPL_DM if SPL
1537 select SPL_LIBCOMMON_SUPPORT if SPL
1538 select SPL_LIBGENERIC_SUPPORT if SPL
1539 select SPL_OF_CONTROL if SPL
1540 select SPL_PINCTRL if SPL
1543 imply DISTRO_DEFAULTS
1546 Support for UniPhier SoC family developed by Socionext Inc.
1547 (formerly, System LSI Business Division of Panasonic Corporation)
1550 bool "Support STMicroelectronics STM32 MCU with cortex M"
1557 bool "Support STMicrolectronics SoCs"
1566 Support for STMicroelectronics STiH407/10 SoC family.
1567 This SoC is used on Linaro 96Board STiH410-B2260
1570 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1571 select ARCH_MISC_INIT
1572 select BOARD_LATE_INIT
1581 select OF_SYSTEM_SETUP
1587 select SYS_THUMB_BUILD
1591 imply OF_LIBFDT_OVERLAY
1592 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1595 Support for STM32MP SoC family developed by STMicroelectronics,
1596 MPUs based on ARM cortex A core
1597 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1598 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1600 SPL is the unsecure FSBL for the basic boot chain.
1602 config ARCH_ROCKCHIP
1603 bool "Support Rockchip SoCs"
1614 select DM_USB if USB
1615 select ENABLE_ARM_SOC_BOOT0_HOOK
1618 select SPL_DM if SPL
1620 select SYS_THUMB_BUILD if !ARM64
1623 imply DEBUG_UART_BOARD_INIT
1624 imply DISTRO_DEFAULTS
1626 imply SARADC_ROCKCHIP
1628 imply SPL_SYS_MALLOC_SIMPLE
1631 imply USB_FUNCTION_FASTBOOT
1633 config TARGET_THUNDERX_88XX
1634 bool "Support ThunderX 88xx"
1638 select SYS_CACHE_SHIFT_7
1641 bool "Support Aspeed SoCs"
1646 config TARGET_DURIAN
1647 bool "Support Phytium Durian Platform"
1650 Support for durian platform.
1651 It has 2GB Sdram, uart and pcie.
1655 config ARCH_SUPPORT_TFABOOT
1659 bool "Support for booting from TF-A"
1660 depends on ARCH_SUPPORT_TFABOOT
1663 Enabling this will make a U-Boot binary that is capable of being
1664 booted via TF-A (Trusted Firmware for Cortex-A).
1666 config TI_SECURE_DEVICE
1667 bool "HS Device Type Support"
1668 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1670 If a high secure (HS) device type is being used, this config
1671 must be set. This option impacts various aspects of the
1672 build system (to create signed boot images that can be
1673 authenticated) and the code. See the doc/README.ti-secure
1674 file for further details.
1676 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1677 config ISW_ENTRY_ADDR
1678 hex "Address in memory or XIP address of bootloader entry point"
1679 default 0x402F4000 if AM43XX
1680 default 0x402F0400 if AM33XX
1681 default 0x40301350 if OMAP54XX
1683 After any reset, the boot ROM searches the boot media for a valid
1684 boot image. For non-XIP devices, the ROM then copies the image into
1685 internal memory. For all boot modes, after the ROM processes the
1686 boot image it eventually computes the entry point address depending
1687 on the device type (secure/non-secure), boot media (xip/non-xip) and
1691 source "arch/arm/mach-aspeed/Kconfig"
1693 source "arch/arm/mach-at91/Kconfig"
1695 source "arch/arm/mach-bcm283x/Kconfig"
1697 source "arch/arm/mach-bcmstb/Kconfig"
1699 source "arch/arm/mach-davinci/Kconfig"
1701 source "arch/arm/mach-exynos/Kconfig"
1703 source "arch/arm/mach-highbank/Kconfig"
1705 source "arch/arm/mach-integrator/Kconfig"
1707 source "arch/arm/mach-k3/Kconfig"
1709 source "arch/arm/mach-keystone/Kconfig"
1711 source "arch/arm/mach-kirkwood/Kconfig"
1713 source "arch/arm/cpu/arm926ejs/lpc32xx/Kconfig"
1715 source "arch/arm/mach-mvebu/Kconfig"
1717 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1719 source "arch/arm/mach-imx/mx2/Kconfig"
1721 source "arch/arm/mach-imx/mx3/Kconfig"
1723 source "arch/arm/mach-imx/mx5/Kconfig"
1725 source "arch/arm/mach-imx/mx6/Kconfig"
1727 source "arch/arm/mach-imx/mx7/Kconfig"
1729 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1731 source "arch/arm/mach-imx/imx8/Kconfig"
1733 source "arch/arm/mach-imx/imx8m/Kconfig"
1735 source "arch/arm/mach-imx/mxs/Kconfig"
1737 source "arch/arm/mach-omap2/Kconfig"
1739 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1741 source "arch/arm/mach-orion5x/Kconfig"
1743 source "arch/arm/mach-owl/Kconfig"
1745 source "arch/arm/mach-rmobile/Kconfig"
1747 source "arch/arm/mach-meson/Kconfig"
1749 source "arch/arm/mach-mediatek/Kconfig"
1751 source "arch/arm/mach-qemu/Kconfig"
1753 source "arch/arm/mach-rockchip/Kconfig"
1755 source "arch/arm/mach-s5pc1xx/Kconfig"
1757 source "arch/arm/mach-snapdragon/Kconfig"
1759 source "arch/arm/mach-socfpga/Kconfig"
1761 source "arch/arm/mach-sti/Kconfig"
1763 source "arch/arm/mach-stm32/Kconfig"
1765 source "arch/arm/mach-stm32mp/Kconfig"
1767 source "arch/arm/mach-sunxi/Kconfig"
1769 source "arch/arm/mach-tegra/Kconfig"
1771 source "arch/arm/mach-uniphier/Kconfig"
1773 source "arch/arm/cpu/armv7/vf610/Kconfig"
1775 source "arch/arm/mach-zynq/Kconfig"
1777 source "arch/arm/mach-zynqmp/Kconfig"
1779 source "arch/arm/mach-versal/Kconfig"
1781 source "arch/arm/mach-zynqmp-r5/Kconfig"
1783 source "arch/arm/cpu/armv7/Kconfig"
1785 source "arch/arm/cpu/armv8/Kconfig"
1787 source "arch/arm/mach-imx/Kconfig"
1789 source "board/bosch/shc/Kconfig"
1790 source "board/bosch/guardian/Kconfig"
1791 source "board/CarMediaLab/flea3/Kconfig"
1792 source "board/Marvell/aspenite/Kconfig"
1793 source "board/Marvell/gplugd/Kconfig"
1794 source "board/armadeus/apf27/Kconfig"
1795 source "board/armltd/vexpress/Kconfig"
1796 source "board/armltd/vexpress64/Kconfig"
1797 source "board/broadcom/bcm23550_w1d/Kconfig"
1798 source "board/broadcom/bcm28155_ap/Kconfig"
1799 source "board/broadcom/bcm963158/Kconfig"
1800 source "board/broadcom/bcm968580xref/Kconfig"
1801 source "board/broadcom/bcmcygnus/Kconfig"
1802 source "board/broadcom/bcmnsp/Kconfig"
1803 source "board/broadcom/bcmns2/Kconfig"
1804 source "board/cavium/thunderx/Kconfig"
1805 source "board/cirrus/edb93xx/Kconfig"
1806 source "board/eets/pdu001/Kconfig"
1807 source "board/emulation/qemu-arm/Kconfig"
1808 source "board/freescale/ls2080a/Kconfig"
1809 source "board/freescale/ls2080aqds/Kconfig"
1810 source "board/freescale/ls2080ardb/Kconfig"
1811 source "board/freescale/ls1088a/Kconfig"
1812 source "board/freescale/ls1028a/Kconfig"
1813 source "board/freescale/ls1021aqds/Kconfig"
1814 source "board/freescale/ls1043aqds/Kconfig"
1815 source "board/freescale/ls1021atwr/Kconfig"
1816 source "board/freescale/ls1021atsn/Kconfig"
1817 source "board/freescale/ls1021aiot/Kconfig"
1818 source "board/freescale/ls1046aqds/Kconfig"
1819 source "board/freescale/ls1043ardb/Kconfig"
1820 source "board/freescale/ls1046ardb/Kconfig"
1821 source "board/freescale/ls1046afrwy/Kconfig"
1822 source "board/freescale/ls1012aqds/Kconfig"
1823 source "board/freescale/ls1012ardb/Kconfig"
1824 source "board/freescale/ls1012afrdm/Kconfig"
1825 source "board/freescale/lx2160a/Kconfig"
1826 source "board/freescale/mx35pdk/Kconfig"
1827 source "board/freescale/s32v234evb/Kconfig"
1828 source "board/grinn/chiliboard/Kconfig"
1829 source "board/gumstix/pepper/Kconfig"
1830 source "board/hisilicon/hikey/Kconfig"
1831 source "board/hisilicon/hikey960/Kconfig"
1832 source "board/hisilicon/poplar/Kconfig"
1833 source "board/isee/igep003x/Kconfig"
1834 source "board/phytec/pcm051/Kconfig"
1835 source "board/silica/pengwyn/Kconfig"
1836 source "board/spear/spear300/Kconfig"
1837 source "board/spear/spear310/Kconfig"
1838 source "board/spear/spear320/Kconfig"
1839 source "board/spear/spear600/Kconfig"
1840 source "board/spear/x600/Kconfig"
1841 source "board/st/stv0991/Kconfig"
1842 source "board/tcl/sl50/Kconfig"
1843 source "board/ucRobotics/bubblegum_96/Kconfig"
1844 source "board/birdland/bav335x/Kconfig"
1845 source "board/toradex/colibri_pxa270/Kconfig"
1846 source "board/variscite/dart_6ul/Kconfig"
1847 source "board/vscom/baltos/Kconfig"
1848 source "board/woodburn/Kconfig"
1849 source "board/xilinx/Kconfig"
1850 source "board/xilinx/zynq/Kconfig"
1851 source "board/xilinx/zynqmp/Kconfig"
1852 source "board/phytium/durian/Kconfig"
1854 source "arch/arm/Kconfig.debug"
1859 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
1860 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
1861 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64