1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
15 select INIT_SP_RELATIVE
17 U-Boot expects to be linked to a specific hard-coded address, and to
18 be loaded to and run from that address. This option lifts that
19 restriction, thus allowing the code to be loaded to and executed
20 from almost any address. This logic relies on the relocation
21 information that is embedded in the binary to support U-Boot
22 relocating itself to the top-of-RAM later during execution.
24 config INIT_SP_RELATIVE
25 bool "Specify the early stack pointer relative to the .bss section"
27 U-Boot typically uses a hard-coded value for the stack pointer
28 before relocation. Enable this option to instead calculate the
29 initial SP at run-time. This is useful to avoid hard-coding addresses
30 into U-Boot, so that it can be loaded and executed at arbitrary
31 addresses and thus avoid using arbitrary addresses at runtime.
33 If this option is enabled, the early stack pointer is set to
34 &_bss_start with a offset value added. The offset is specified by
35 SYS_INIT_SP_BSS_OFFSET.
37 config SYS_INIT_SP_BSS_OFFSET
38 int "Early stack offset from the .bss base address"
39 depends on INIT_SP_RELATIVE
42 This option's value is the offset added to &_bss_start in order to
43 calculate the stack pointer. This offset should be large enough so
44 that the early malloc region, global data (gd), and early stack usage
45 do not overlap any appended DTB.
47 config LINUX_KERNEL_IMAGE_HEADER
50 Place a Linux kernel image header at the start of the U-Boot binary.
51 The format of the header is described in the Linux kernel source at
52 Documentation/arm64/booting.txt. This feature is useful since the
53 image header reports the amount of memory (BSS and similar) that
54 U-Boot needs to use, but which isn't part of the binary.
56 if LINUX_KERNEL_IMAGE_HEADER
57 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
60 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
61 TEXT_OFFSET value written to the Linux kernel image header.
68 ARM GICV3 Interrupt translation service (ITS).
69 Basic support for programming locality specific peripheral
70 interrupts (LPI) configuration tables and enable LPI tables.
71 LPI configuration table can be used by u-boot or Linux.
72 ARM GICV3 has limitation, once the LPI table is enabled, LPI
73 configuration table can not be re-programmed, unless GICV3 reset.
77 default y if ARM64 && !POSITION_INDEPENDENT
79 config DMA_ADDR_T_64BIT
89 # Used for compatibility with asm files copied from the kernel
90 config ARM_ASM_UNIFIED
94 # Used for compatibility with asm files copied from the kernel
99 bool "Do not enable icache"
102 Do not enable instruction cache in U-Boot.
104 config SPL_SYS_ICACHE_OFF
105 bool "Do not enable icache in SPL"
107 default SYS_ICACHE_OFF
109 Do not enable instruction cache in SPL.
111 config SYS_DCACHE_OFF
112 bool "Do not enable dcache"
115 Do not enable data cache in U-Boot.
117 config SPL_SYS_DCACHE_OFF
118 bool "Do not enable dcache in SPL"
120 default SYS_DCACHE_OFF
122 Do not enable data cache in SPL.
124 config SYS_ARM_CACHE_CP15
125 bool "CP15 based cache enabling support"
127 Select this if your processor suports enabling caches by using
131 bool "MMU-based Paged Memory Management Support"
132 select SYS_ARM_CACHE_CP15
134 Select if you want MMU-based virtualised addressing space
135 support via paged memory management.
138 bool 'Use the ARM v7 PMSA Compliant MPU'
140 Some ARM systems without an MMU have instead a Memory Protection
141 Unit (MPU) that defines the type and permissions for regions of
143 If your CPU has an MPU then you should choose 'y' here unless you
144 know that you do not want to use the MPU.
146 # If set, the workarounds for these ARM errata are applied early during U-Boot
147 # startup. Note that in general these options force the workarounds to be
148 # applied; no CPU-type/version detection exists, unlike the similar options in
149 # the Linux kernel. Do not set these options unless they apply! Also note that
150 # the following can be machine-specific errata. These do have ability to
151 # provide rudimentary version and machine-specific checks, but expect no
153 # CONFIG_ARM_ERRATA_430973
154 # CONFIG_ARM_ERRATA_454179
155 # CONFIG_ARM_ERRATA_621766
156 # CONFIG_ARM_ERRATA_798870
157 # CONFIG_ARM_ERRATA_801819
158 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
159 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
161 config ARM_ERRATA_430973
164 config ARM_ERRATA_454179
167 config ARM_ERRATA_621766
170 config ARM_ERRATA_716044
173 config ARM_ERRATA_725233
176 config ARM_ERRATA_742230
179 config ARM_ERRATA_743622
182 config ARM_ERRATA_751472
185 config ARM_ERRATA_761320
188 config ARM_ERRATA_773022
191 config ARM_ERRATA_774769
194 config ARM_ERRATA_794072
197 config ARM_ERRATA_798870
200 config ARM_ERRATA_801819
203 config ARM_ERRATA_826974
206 config ARM_ERRATA_828024
209 config ARM_ERRATA_829520
212 config ARM_ERRATA_833069
215 config ARM_ERRATA_833471
218 config ARM_ERRATA_845369
221 config ARM_ERRATA_852421
224 config ARM_ERRATA_852423
227 config ARM_ERRATA_855873
230 config ARM_CORTEX_A8_CVE_2017_5715
233 config ARM_CORTEX_A15_CVE_2017_5715
238 select SYS_CACHE_SHIFT_5
243 select SYS_CACHE_SHIFT_5
248 select SYS_CACHE_SHIFT_5
253 select SYS_CACHE_SHIFT_5
258 select SYS_CACHE_SHIFT_5
264 select SYS_CACHE_SHIFT_5
271 select SYS_CACHE_SHIFT_6
278 select SYS_CACHE_SHIFT_5
279 select SYS_THUMB_BUILD
285 select SYS_ARM_CACHE_CP15
287 select SYS_CACHE_SHIFT_6
291 select SYS_CACHE_SHIFT_5
296 select SYS_CACHE_SHIFT_5
300 default "arm720t" if CPU_ARM720T
301 default "arm920t" if CPU_ARM920T
302 default "arm926ejs" if CPU_ARM926EJS
303 default "arm946es" if CPU_ARM946ES
304 default "arm1136" if CPU_ARM1136
305 default "arm1176" if CPU_ARM1176
306 default "armv7" if CPU_V7A
307 default "armv7" if CPU_V7R
308 default "armv7m" if CPU_V7M
309 default "pxa" if CPU_PXA
310 default "sa1100" if CPU_SA1100
311 default "armv8" if ARM64
315 default 4 if CPU_ARM720T
316 default 4 if CPU_ARM920T
317 default 5 if CPU_ARM926EJS
318 default 5 if CPU_ARM946ES
319 default 6 if CPU_ARM1136
320 default 6 if CPU_ARM1176
325 default 4 if CPU_SA1100
328 config SYS_CACHE_SHIFT_5
331 config SYS_CACHE_SHIFT_6
334 config SYS_CACHE_SHIFT_7
337 config SYS_CACHELINE_SIZE
339 default 128 if SYS_CACHE_SHIFT_7
340 default 64 if SYS_CACHE_SHIFT_6
341 default 32 if SYS_CACHE_SHIFT_5
344 bool "Enable ARCH_CPU_INIT"
346 Some architectures require a call to arch_cpu_init().
347 Say Y here to enable it
349 config SYS_ARCH_TIMER
350 bool "ARM Generic Timer support"
351 depends on CPU_V7A || ARM64
354 The ARM Generic Timer (aka arch-timer) provides an architected
355 interface to a timer source on an SoC.
356 It is mandatory for ARMv8 implementation and widely available
360 bool "Support for ARM SMC Calling Convention (SMCCC)"
361 depends on CPU_V7A || ARM64
364 Say Y here if you want to enable ARM SMC Calling Convention.
365 This should be enabled if U-Boot needs to communicate with system
366 firmware (for example, PSCI) according to SMCCC.
369 bool "support boot from semihosting"
371 In emulated environments, semihosting is a way for
372 the hosted environment to call out to the emulator to
373 retrieve files from the host machine.
375 config SYS_THUMB_BUILD
376 bool "Build U-Boot using the Thumb instruction set"
379 Use this flag to build U-Boot using the Thumb instruction set for
380 ARM architectures. Thumb instruction set provides better code
381 density. For ARM architectures that support Thumb2 this flag will
382 result in Thumb2 code generated by GCC.
384 config SPL_SYS_THUMB_BUILD
385 bool "Build SPL using the Thumb instruction set"
386 default y if SYS_THUMB_BUILD
387 depends on !ARM64 && SPL
389 Use this flag to build SPL using the Thumb instruction set for
390 ARM architectures. Thumb instruction set provides better code
391 density. For ARM architectures that support Thumb2 this flag will
392 result in Thumb2 code generated by GCC.
394 config TPL_SYS_THUMB_BUILD
395 bool "Build TPL using the Thumb instruction set"
396 default y if SYS_THUMB_BUILD
397 depends on TPL && !ARM64
399 Use this flag to build TPL using the Thumb instruction set for
400 ARM architectures. Thumb instruction set provides better code
401 density. For ARM architectures that support Thumb2 this flag will
402 result in Thumb2 code generated by GCC.
405 config SYS_L2CACHE_OFF
408 If SoC does not support L2CACHE or one does not want to enable
409 L2CACHE, choose this option.
411 config ENABLE_ARM_SOC_BOOT0_HOOK
412 bool "prepare BOOT0 header"
414 If the SoC's BOOT0 requires a header area filled with (magic)
415 values, then choose this option, and create a file included as
416 <asm/arch/boot0.h> which contains the required assembler code.
418 config ARM_CORTEX_CPU_IS_UP
422 config USE_ARCH_MEMCPY
423 bool "Use an assembly optimized implementation of memcpy"
427 Enable the generation of an optimized version of memcpy.
428 Such an implementation may be faster under some conditions
429 but may increase the binary size.
431 config SPL_USE_ARCH_MEMCPY
432 bool "Use an assembly optimized implementation of memcpy for SPL"
433 default y if USE_ARCH_MEMCPY
434 depends on !ARM64 && SPL
436 Enable the generation of an optimized version of memcpy.
437 Such an implementation may be faster under some conditions
438 but may increase the binary size.
440 config TPL_USE_ARCH_MEMCPY
441 bool "Use an assembly optimized implementation of memcpy for TPL"
442 default y if USE_ARCH_MEMCPY
443 depends on !ARM64 && TPL
445 Enable the generation of an optimized version of memcpy.
446 Such an implementation may be faster under some conditions
447 but may increase the binary size.
449 config USE_ARCH_MEMSET
450 bool "Use an assembly optimized implementation of memset"
454 Enable the generation of an optimized version of memset.
455 Such an implementation may be faster under some conditions
456 but may increase the binary size.
458 config SPL_USE_ARCH_MEMSET
459 bool "Use an assembly optimized implementation of memset for SPL"
460 default y if USE_ARCH_MEMSET
461 depends on !ARM64 && SPL
463 Enable the generation of an optimized version of memset.
464 Such an implementation may be faster under some conditions
465 but may increase the binary size.
467 config TPL_USE_ARCH_MEMSET
468 bool "Use an assembly optimized implementation of memset for TPL"
469 default y if USE_ARCH_MEMSET
470 depends on !ARM64 && TPL
472 Enable the generation of an optimized version of memset.
473 Such an implementation may be faster under some conditions
474 but may increase the binary size.
476 config SET_STACK_SIZE
477 bool "Enable an option to set max stack size that can be used"
478 default y if ARCH_VERSAL || ARCH_ZYNQMP || ARCH_ZYNQ
480 This will enable an option to set max stack size that can be
484 hex "Define max stack size that can be used by U-Boot"
485 depends on SET_STACK_SIZE
486 default 0x4000000 if ARCH_VERSAL || ARCH_ZYNQMP
487 default 0x1000000 if ARCH_ZYNQ
489 Define Max stack size that can be used by U-Boot so that the
490 initrd_high will be calculated as base stack pointer minus this
493 config ARM64_SUPPORT_AARCH32
494 bool "ARM64 system support AArch32 execution state"
496 default y if !TARGET_THUNDERX_88XX
498 This ARM64 system supports AArch32 execution state.
501 prompt "Target select"
506 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
508 config TARGET_EDB93XX
509 bool "Support edb93xx"
513 config TARGET_ASPENITE
514 bool "Support aspenite"
518 bool "Support gplugd"
526 Support for TI's DaVinci platform.
529 bool "Marvell Kirkwood"
530 select ARCH_MISC_INIT
531 select BOARD_EARLY_INIT_F
535 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
555 config TARGET_SPEAR300
556 bool "Support spear300"
557 select BOARD_EARLY_INIT_F
562 config TARGET_SPEAR310
563 bool "Support spear310"
564 select BOARD_EARLY_INIT_F
569 config TARGET_SPEAR320
570 bool "Support spear320"
571 select BOARD_EARLY_INIT_F
576 config TARGET_SPEAR600
577 bool "Support spear600"
578 select BOARD_EARLY_INIT_F
583 config TARGET_STV0991
584 bool "Support stv0991"
597 select BOARD_LATE_INIT
606 config TARGET_MX35PDK
607 bool "Support mx35pdk"
608 select BOARD_LATE_INIT
612 bool "Broadcom BCM283X family"
618 select SERIAL_SEARCH_ALL
623 bool "Broadcom BCM63158 family"
629 bool "Broadcom BCM68360 family"
635 bool "Broadcom BCM6858 family"
640 config TARGET_VEXPRESS_CA15_TC2
641 bool "Support vexpress_ca15_tc2"
643 select CPU_V7_HAS_NONSEC
644 select CPU_V7_HAS_VIRT
648 bool "Broadcom BCM7XXX family"
652 select OF_PRIOR_STAGE
655 This enables support for Broadcom ARM-based set-top box
656 chipsets, including the 7445 family of chips.
658 config TARGET_VEXPRESS_CA5X2
659 bool "Support vexpress_ca5x2"
663 config TARGET_VEXPRESS_CA9X4
664 bool "Support vexpress_ca9x4"
668 config TARGET_BCM23550_W1D
669 bool "Support bcm23550_w1d"
674 config TARGET_BCM28155_AP
675 bool "Support bcm28155_ap"
680 config TARGET_BCMCYGNUS
681 bool "Support bcmcygnus"
684 imply BCM_SF2_ETH_GMAC
692 bool "Support bcmnsp"
696 bool "Support Broadcom Northstar2"
699 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
700 ARMv8 Cortex-A57 processors targeting a broad range of networking
704 bool "Samsung EXYNOS"
713 imply SYS_THUMB_BUILD
718 bool "Samsung S5PC1XX"
727 bool "Calxeda Highbank"
731 config ARCH_INTEGRATOR
732 bool "ARM Ltd. Integrator family"
743 select SYS_ARCH_TIMER
744 select SYS_THUMB_BUILD
750 bool "Texas Instruments' K3 Architecture"
755 config ARCH_OMAP2PLUS
758 select SPL_BOARD_INIT if SPL
759 select SPL_STACK_R if SPL
765 imply DISTRO_DEFAULTS
768 Support for the Meson SoC family developed by Amlogic Inc.,
769 targeted at media players and tablet computers. We currently
770 support the S905 (GXBaby) 64-bit SoC.
777 select SPL_LIBCOMMON_SUPPORT if SPL
778 select SPL_LIBGENERIC_SUPPORT if SPL
779 select SPL_OF_CONTROL if SPL
782 Support for the MediaTek SoCs family developed by MediaTek Inc.
783 Please refer to doc/README.mediatek for more information.
786 bool "NXP LPC32xx platform"
796 bool "NXP i.MX8 platform"
800 select ENABLE_ARM_SOC_BOOT0_HOOK
803 bool "NXP i.MX8M platform"
810 bool "NXP i.MXRT platform"
818 bool "NXP i.MX23 family"
829 bool "NXP i.MX28 family"
835 bool "NXP i.MX31 family"
841 select ROM_UNIFIED_SECTIONS
843 imply SYS_THUMB_BUILD
847 select ARCH_MISC_INIT
848 select BOARD_EARLY_INIT_F
850 select SYS_FSL_HAS_SEC if IMX_HAB
851 select SYS_FSL_SEC_COMPAT_4
852 select SYS_FSL_SEC_LE
854 imply SYS_THUMB_BUILD
859 select SYS_FSL_HAS_SEC if IMX_HAB
860 select SYS_FSL_SEC_COMPAT_4
861 select SYS_FSL_SEC_LE
863 imply SYS_THUMB_BUILD
867 default "arch/arm/mach-omap2/u-boot-spl.lds"
872 select BOARD_EARLY_INIT_F
877 bool "Actions Semi OWL SoCs"
884 select CONFIG_SYS_RELOC_GD_ENV_ADDR
888 bool "QEMU Virtual Platform"
889 select ARCH_SUPPORT_TFABOOT
899 bool "Renesas ARM SoCs"
900 select BOARD_EARLY_INIT_F if !RZA1
905 imply SYS_THUMB_BUILD
906 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
908 config TARGET_S32V234EVB
909 bool "Support s32v234evb"
911 select SYS_FSL_ERRATUM_ESDHC111
913 config ARCH_SNAPDRAGON
914 bool "Qualcomm Snapdragon SoCs"
927 bool "Altera SOCFPGA family"
928 select ARCH_EARLY_INIT_R
929 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
930 select ARM64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
931 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
934 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
936 select SPL_DM_RESET if DM_RESET
938 select SPL_LIBCOMMON_SUPPORT
939 select SPL_LIBGENERIC_SUPPORT
940 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
941 select SPL_OF_CONTROL
942 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
943 select SPL_SERIAL_SUPPORT
945 select SPL_WATCHDOG_SUPPORT
948 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
950 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
951 select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
960 imply SPL_LIBDISK_SUPPORT
961 imply SPL_MMC_SUPPORT
962 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
963 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
964 imply SPL_SPI_FLASH_SUPPORT
965 imply SPL_SPI_SUPPORT
969 bool "Support sunxi (Allwinner) SoCs"
972 select CMD_MMC if MMC
973 select CMD_USB if DISTRO_DEFAULTS
980 select DM_SCSI if SCSI
982 select DM_USB if DISTRO_DEFAULTS
983 select OF_BOARD_SETUP
986 select SPECIFY_CONSOLE_INDEX
987 select SPL_STACK_R if SPL
988 select SPL_SYS_MALLOC_SIMPLE if SPL
989 select SPL_SYS_THUMB_BUILD if !ARM64
992 select SYS_THUMB_BUILD if !ARM64
993 select USB if DISTRO_DEFAULTS
994 select USB_KEYBOARD if DISTRO_DEFAULTS
995 select USB_STORAGE if DISTRO_DEFAULTS
996 select SPL_USE_TINY_PRINTF
998 select SYS_RELOC_GD_ENV_ADDR
1001 imply CMD_UBI if MTD_RAW_NAND
1002 imply DISTRO_DEFAULTS
1005 imply OF_LIBFDT_OVERLAY
1006 imply PRE_CONSOLE_BUFFER
1007 imply SPL_GPIO_SUPPORT
1008 imply SPL_LIBCOMMON_SUPPORT
1009 imply SPL_LIBGENERIC_SUPPORT
1010 imply SPL_MMC_SUPPORT if MMC
1011 imply SPL_POWER_SUPPORT
1012 imply SPL_SERIAL_SUPPORT
1016 bool "ST-Ericsson U8500 Series"
1020 select DM_MMC if MMC
1022 select DM_USB if USB
1026 imply ARM_PL180_MMCI
1028 imply NOMADIK_MTU_TIMER
1031 imply SYSRESET_SYSCON
1034 bool "Support Xilinx Versal Platform"
1038 select DM_ETH if NET
1039 select DM_MMC if MMC
1042 imply BOARD_LATE_INIT
1045 bool "Freescale Vybrid"
1047 select SYS_FSL_ERRATUM_ESDHC111
1052 bool "Xilinx Zynq based platform"
1057 select DM_ETH if NET
1058 select DM_MMC if MMC
1062 select DM_USB if USB
1065 select SPL_BOARD_INIT if SPL
1066 select SPL_CLK if SPL
1067 select SPL_DM if SPL
1068 select SPL_OF_CONTROL if SPL
1069 select SPL_SEPARATE_BSS if SPL
1071 imply ARCH_EARLY_INIT_R
1072 imply BOARD_LATE_INIT
1078 config ARCH_ZYNQMP_R5
1079 bool "Xilinx ZynqMP R5 based platform"
1083 select DM_ETH if NET
1084 select DM_MMC if MMC
1091 bool "Xilinx ZynqMP based platform"
1095 select DM_ETH if NET
1097 select DM_MMC if MMC
1099 select DM_SPI if SPI
1100 select DM_SPI_FLASH if DM_SPI
1101 select DM_USB if USB
1104 select SPL_BOARD_INIT if SPL
1105 select SPL_CLK if SPL
1106 select SPL_DM_MAILBOX if SPL
1107 select SPL_FIRMWARE if SPL
1108 select SPL_SEPARATE_BSS if SPL
1111 imply BOARD_LATE_INIT
1119 imply DISTRO_DEFAULTS
1122 config TARGET_VEXPRESS64_AEMV8A
1123 bool "Support vexpress_aemv8a"
1127 config TARGET_VEXPRESS64_BASE_FVP
1128 bool "Support Versatile Express ARMv8a FVP BASE model"
1133 config TARGET_VEXPRESS64_JUNO
1134 bool "Support Versatile Express Juno Development Platform"
1138 config TARGET_LS2080A_EMU
1139 bool "Support ls2080a_emu"
1142 select ARMV8_MULTIENTRY
1143 select FSL_DDR_SYNC_REFRESH
1145 Support for Freescale LS2080A_EMU platform.
1146 The LS2080A Development System (EMULATOR) is a pre-silicon
1147 development platform that supports the QorIQ LS2080A
1148 Layerscape Architecture processor.
1150 config TARGET_LS2080A_SIMU
1151 bool "Support ls2080a_simu"
1154 select ARMV8_MULTIENTRY
1155 select BOARD_LATE_INIT
1157 Support for Freescale LS2080A_SIMU platform.
1158 The LS2080A Development System (QDS) is a pre silicon
1159 development platform that supports the QorIQ LS2080A
1160 Layerscape Architecture processor.
1162 config TARGET_LS1088AQDS
1163 bool "Support ls1088aqds"
1166 select ARMV8_MULTIENTRY
1167 select ARCH_SUPPORT_TFABOOT
1168 select BOARD_LATE_INIT
1170 select FSL_DDR_INTERACTIVE if !SD_BOOT
1172 Support for NXP LS1088AQDS platform.
1173 The LS1088A Development System (QDS) is a high-performance
1174 development platform that supports the QorIQ LS1088A
1175 Layerscape Architecture processor.
1177 config TARGET_LS2080AQDS
1178 bool "Support ls2080aqds"
1181 select ARMV8_MULTIENTRY
1182 select ARCH_SUPPORT_TFABOOT
1183 select BOARD_LATE_INIT
1188 select FSL_DDR_INTERACTIVE if !SPL
1190 Support for Freescale LS2080AQDS platform.
1191 The LS2080A Development System (QDS) is a high-performance
1192 development platform that supports the QorIQ LS2080A
1193 Layerscape Architecture processor.
1195 config TARGET_LS2080ARDB
1196 bool "Support ls2080ardb"
1199 select ARMV8_MULTIENTRY
1200 select ARCH_SUPPORT_TFABOOT
1201 select BOARD_LATE_INIT
1204 select FSL_DDR_INTERACTIVE if !SPL
1208 Support for Freescale LS2080ARDB platform.
1209 The LS2080A Reference design board (RDB) is a high-performance
1210 development platform that supports the QorIQ LS2080A
1211 Layerscape Architecture processor.
1213 config TARGET_LS2081ARDB
1214 bool "Support ls2081ardb"
1217 select ARMV8_MULTIENTRY
1218 select BOARD_LATE_INIT
1221 Support for Freescale LS2081ARDB platform.
1222 The LS2081A Reference design board (RDB) is a high-performance
1223 development platform that supports the QorIQ LS2081A/LS2041A
1224 Layerscape Architecture processor.
1226 config TARGET_LX2160ARDB
1227 bool "Support lx2160ardb"
1230 select ARMV8_MULTIENTRY
1231 select ARCH_SUPPORT_TFABOOT
1232 select BOARD_LATE_INIT
1234 Support for NXP LX2160ARDB platform.
1235 The lx2160ardb (LX2160A Reference design board (RDB)
1236 is a high-performance development platform that supports the
1237 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1239 config TARGET_LX2160AQDS
1240 bool "Support lx2160aqds"
1243 select ARMV8_MULTIENTRY
1244 select ARCH_SUPPORT_TFABOOT
1245 select BOARD_LATE_INIT
1247 Support for NXP LX2160AQDS platform.
1248 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1249 is a high-performance development platform that supports the
1250 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1253 bool "Support HiKey 96boards Consumer Edition Platform"
1260 select SPECIFY_CONSOLE_INDEX
1263 Support for HiKey 96boards platform. It features a HI6220
1264 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1266 config TARGET_HIKEY960
1267 bool "Support HiKey960 96boards Consumer Edition Platform"
1275 Support for HiKey960 96boards platform. It features a HI3660
1276 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1278 config TARGET_POPLAR
1279 bool "Support Poplar 96boards Enterprise Edition Platform"
1288 Support for Poplar 96boards EE platform. It features a HI3798cv200
1289 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1290 making it capable of running any commercial set-top solution based on
1293 config TARGET_LS1012AQDS
1294 bool "Support ls1012aqds"
1297 select ARCH_SUPPORT_TFABOOT
1298 select BOARD_LATE_INIT
1300 Support for Freescale LS1012AQDS platform.
1301 The LS1012A Development System (QDS) is a high-performance
1302 development platform that supports the QorIQ LS1012A
1303 Layerscape Architecture processor.
1305 config TARGET_LS1012ARDB
1306 bool "Support ls1012ardb"
1309 select ARCH_SUPPORT_TFABOOT
1310 select BOARD_LATE_INIT
1314 Support for Freescale LS1012ARDB platform.
1315 The LS1012A Reference design board (RDB) is a high-performance
1316 development platform that supports the QorIQ LS1012A
1317 Layerscape Architecture processor.
1319 config TARGET_LS1012A2G5RDB
1320 bool "Support ls1012a2g5rdb"
1323 select ARCH_SUPPORT_TFABOOT
1324 select BOARD_LATE_INIT
1327 Support for Freescale LS1012A2G5RDB platform.
1328 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1329 development platform that supports the QorIQ LS1012A
1330 Layerscape Architecture processor.
1332 config TARGET_LS1012AFRWY
1333 bool "Support ls1012afrwy"
1336 select ARCH_SUPPORT_TFABOOT
1337 select BOARD_LATE_INIT
1341 Support for Freescale LS1012AFRWY platform.
1342 The LS1012A FRWY board (FRWY) is a high-performance
1343 development platform that supports the QorIQ LS1012A
1344 Layerscape Architecture processor.
1346 config TARGET_LS1012AFRDM
1347 bool "Support ls1012afrdm"
1350 select ARCH_SUPPORT_TFABOOT
1352 Support for Freescale LS1012AFRDM platform.
1353 The LS1012A Freedom board (FRDM) is a high-performance
1354 development platform that supports the QorIQ LS1012A
1355 Layerscape Architecture processor.
1357 config TARGET_LS1028AQDS
1358 bool "Support ls1028aqds"
1361 select ARMV8_MULTIENTRY
1362 select ARCH_SUPPORT_TFABOOT
1363 select BOARD_LATE_INIT
1365 Support for Freescale LS1028AQDS platform
1366 The LS1028A Development System (QDS) is a high-performance
1367 development platform that supports the QorIQ LS1028A
1368 Layerscape Architecture processor.
1370 config TARGET_LS1028ARDB
1371 bool "Support ls1028ardb"
1374 select ARMV8_MULTIENTRY
1375 select ARCH_SUPPORT_TFABOOT
1376 select BOARD_LATE_INIT
1378 Support for Freescale LS1028ARDB platform
1379 The LS1028A Development System (RDB) is a high-performance
1380 development platform that supports the QorIQ LS1028A
1381 Layerscape Architecture processor.
1383 config TARGET_LS1088ARDB
1384 bool "Support ls1088ardb"
1387 select ARMV8_MULTIENTRY
1388 select ARCH_SUPPORT_TFABOOT
1389 select BOARD_LATE_INIT
1391 select FSL_DDR_INTERACTIVE if !SD_BOOT
1393 Support for NXP LS1088ARDB platform.
1394 The LS1088A Reference design board (RDB) is a high-performance
1395 development platform that supports the QorIQ LS1088A
1396 Layerscape Architecture processor.
1398 config TARGET_LS1021AQDS
1399 bool "Support ls1021aqds"
1401 select ARCH_SUPPORT_PSCI
1402 select BOARD_EARLY_INIT_F
1403 select BOARD_LATE_INIT
1405 select CPU_V7_HAS_NONSEC
1406 select CPU_V7_HAS_VIRT
1407 select LS1_DEEP_SLEEP
1410 select FSL_DDR_INTERACTIVE
1413 config TARGET_LS1021ATWR
1414 bool "Support ls1021atwr"
1416 select ARCH_SUPPORT_PSCI
1417 select BOARD_EARLY_INIT_F
1418 select BOARD_LATE_INIT
1420 select CPU_V7_HAS_NONSEC
1421 select CPU_V7_HAS_VIRT
1422 select LS1_DEEP_SLEEP
1426 config TARGET_LS1021ATSN
1427 bool "Support ls1021atsn"
1429 select ARCH_SUPPORT_PSCI
1430 select BOARD_EARLY_INIT_F
1431 select BOARD_LATE_INIT
1433 select CPU_V7_HAS_NONSEC
1434 select CPU_V7_HAS_VIRT
1435 select LS1_DEEP_SLEEP
1439 config TARGET_LS1021AIOT
1440 bool "Support ls1021aiot"
1442 select ARCH_SUPPORT_PSCI
1443 select BOARD_LATE_INIT
1445 select CPU_V7_HAS_NONSEC
1446 select CPU_V7_HAS_VIRT
1450 Support for Freescale LS1021AIOT platform.
1451 The LS1021A Freescale board (IOT) is a high-performance
1452 development platform that supports the QorIQ LS1021A
1453 Layerscape Architecture processor.
1455 config TARGET_LS1043AQDS
1456 bool "Support ls1043aqds"
1459 select ARMV8_MULTIENTRY
1460 select ARCH_SUPPORT_TFABOOT
1461 select BOARD_EARLY_INIT_F
1462 select BOARD_LATE_INIT
1464 select FSL_DDR_INTERACTIVE if !SPL
1468 Support for Freescale LS1043AQDS platform.
1470 config TARGET_LS1043ARDB
1471 bool "Support ls1043ardb"
1474 select ARMV8_MULTIENTRY
1475 select ARCH_SUPPORT_TFABOOT
1476 select BOARD_EARLY_INIT_F
1477 select BOARD_LATE_INIT
1480 Support for Freescale LS1043ARDB platform.
1482 config TARGET_LS1046AQDS
1483 bool "Support ls1046aqds"
1486 select ARMV8_MULTIENTRY
1487 select ARCH_SUPPORT_TFABOOT
1488 select BOARD_EARLY_INIT_F
1489 select BOARD_LATE_INIT
1490 select DM_SPI_FLASH if DM_SPI
1492 select FSL_DDR_BIST if !SPL
1493 select FSL_DDR_INTERACTIVE if !SPL
1494 select FSL_DDR_INTERACTIVE if !SPL
1497 Support for Freescale LS1046AQDS platform.
1498 The LS1046A Development System (QDS) is a high-performance
1499 development platform that supports the QorIQ LS1046A
1500 Layerscape Architecture processor.
1502 config TARGET_LS1046ARDB
1503 bool "Support ls1046ardb"
1506 select ARMV8_MULTIENTRY
1507 select ARCH_SUPPORT_TFABOOT
1508 select BOARD_EARLY_INIT_F
1509 select BOARD_LATE_INIT
1510 select DM_SPI_FLASH if DM_SPI
1511 select POWER_MC34VR500
1514 select FSL_DDR_INTERACTIVE if !SPL
1517 Support for Freescale LS1046ARDB platform.
1518 The LS1046A Reference Design Board (RDB) is a high-performance
1519 development platform that supports the QorIQ LS1046A
1520 Layerscape Architecture processor.
1522 config TARGET_LS1046AFRWY
1523 bool "Support ls1046afrwy"
1526 select ARMV8_MULTIENTRY
1527 select ARCH_SUPPORT_TFABOOT
1528 select BOARD_EARLY_INIT_F
1529 select BOARD_LATE_INIT
1530 select DM_SPI_FLASH if DM_SPI
1533 Support for Freescale LS1046AFRWY platform.
1534 The LS1046A Freeway Board (FRWY) is a high-performance
1535 development platform that supports the QorIQ LS1046A
1536 Layerscape Architecture processor.
1538 config TARGET_COLIBRI_PXA270
1539 bool "Support colibri_pxa270"
1542 config ARCH_UNIPHIER
1543 bool "Socionext UniPhier SoCs"
1544 select BOARD_LATE_INIT
1553 select OF_BOARD_SETUP
1557 select SPL_BOARD_INIT if SPL
1558 select SPL_DM if SPL
1559 select SPL_LIBCOMMON_SUPPORT if SPL
1560 select SPL_LIBGENERIC_SUPPORT if SPL
1561 select SPL_OF_CONTROL if SPL
1562 select SPL_PINCTRL if SPL
1565 imply DISTRO_DEFAULTS
1568 Support for UniPhier SoC family developed by Socionext Inc.
1569 (formerly, System LSI Business Division of Panasonic Corporation)
1572 bool "Support STMicroelectronics STM32 MCU with cortex M"
1579 bool "Support STMicrolectronics SoCs"
1588 Support for STMicroelectronics STiH407/10 SoC family.
1589 This SoC is used on Linaro 96Board STiH410-B2260
1592 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1593 select ARCH_MISC_INIT
1594 select ARCH_SUPPORT_TFABOOT
1595 select BOARD_LATE_INIT
1604 select OF_SYSTEM_SETUP
1610 select SYS_THUMB_BUILD
1614 imply OF_LIBFDT_OVERLAY
1615 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1618 Support for STM32MP SoC family developed by STMicroelectronics,
1619 MPUs based on ARM cortex A core
1620 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1621 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1623 SPL is the unsecure FSBL for the basic boot chain.
1625 config ARCH_ROCKCHIP
1626 bool "Support Rockchip SoCs"
1628 select BINMAN if !ARM64
1638 select DM_USB if USB
1639 select ENABLE_ARM_SOC_BOOT0_HOOK
1642 select SPL_DM if SPL
1644 select SYS_THUMB_BUILD if !ARM64
1647 imply DEBUG_UART_BOARD_INIT
1648 imply DISTRO_DEFAULTS
1650 imply SARADC_ROCKCHIP
1652 imply SPL_SYS_MALLOC_SIMPLE
1655 imply USB_FUNCTION_FASTBOOT
1657 config TARGET_THUNDERX_88XX
1658 bool "Support ThunderX 88xx"
1662 select SYS_CACHE_SHIFT_7
1665 bool "Support Aspeed SoCs"
1670 config TARGET_DURIAN
1671 bool "Support Phytium Durian Platform"
1674 Support for durian platform.
1675 It has 2GB Sdram, uart and pcie.
1677 config TARGET_PRESIDIO_ASIC
1678 bool "Support Cortina Presidio ASIC Platform"
1683 config ARCH_SUPPORT_TFABOOT
1687 bool "Support for booting from TF-A"
1688 depends on ARCH_SUPPORT_TFABOOT
1691 Enabling this will make a U-Boot binary that is capable of being
1692 booted via TF-A (Trusted Firmware for Cortex-A).
1694 config TI_SECURE_DEVICE
1695 bool "HS Device Type Support"
1696 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1698 If a high secure (HS) device type is being used, this config
1699 must be set. This option impacts various aspects of the
1700 build system (to create signed boot images that can be
1701 authenticated) and the code. See the doc/README.ti-secure
1702 file for further details.
1704 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1705 config ISW_ENTRY_ADDR
1706 hex "Address in memory or XIP address of bootloader entry point"
1707 default 0x402F4000 if AM43XX
1708 default 0x402F0400 if AM33XX
1709 default 0x40301350 if OMAP54XX
1711 After any reset, the boot ROM searches the boot media for a valid
1712 boot image. For non-XIP devices, the ROM then copies the image into
1713 internal memory. For all boot modes, after the ROM processes the
1714 boot image it eventually computes the entry point address depending
1715 on the device type (secure/non-secure), boot media (xip/non-xip) and
1719 source "arch/arm/mach-aspeed/Kconfig"
1721 source "arch/arm/mach-at91/Kconfig"
1723 source "arch/arm/mach-bcm283x/Kconfig"
1725 source "arch/arm/mach-bcmstb/Kconfig"
1727 source "arch/arm/mach-davinci/Kconfig"
1729 source "arch/arm/mach-exynos/Kconfig"
1731 source "arch/arm/mach-highbank/Kconfig"
1733 source "arch/arm/mach-integrator/Kconfig"
1735 source "arch/arm/mach-k3/Kconfig"
1737 source "arch/arm/mach-keystone/Kconfig"
1739 source "arch/arm/mach-kirkwood/Kconfig"
1741 source "arch/arm/cpu/arm926ejs/lpc32xx/Kconfig"
1743 source "arch/arm/mach-mvebu/Kconfig"
1745 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1747 source "arch/arm/mach-imx/mx2/Kconfig"
1749 source "arch/arm/mach-imx/mx3/Kconfig"
1751 source "arch/arm/mach-imx/mx5/Kconfig"
1753 source "arch/arm/mach-imx/mx6/Kconfig"
1755 source "arch/arm/mach-imx/mx7/Kconfig"
1757 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1759 source "arch/arm/mach-imx/imx8/Kconfig"
1761 source "arch/arm/mach-imx/imx8m/Kconfig"
1763 source "arch/arm/mach-imx/imxrt/Kconfig"
1765 source "arch/arm/mach-imx/mxs/Kconfig"
1767 source "arch/arm/mach-omap2/Kconfig"
1769 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1771 source "arch/arm/mach-orion5x/Kconfig"
1773 source "arch/arm/mach-owl/Kconfig"
1775 source "arch/arm/mach-rmobile/Kconfig"
1777 source "arch/arm/mach-meson/Kconfig"
1779 source "arch/arm/mach-mediatek/Kconfig"
1781 source "arch/arm/mach-qemu/Kconfig"
1783 source "arch/arm/mach-rockchip/Kconfig"
1785 source "arch/arm/mach-s5pc1xx/Kconfig"
1787 source "arch/arm/mach-snapdragon/Kconfig"
1789 source "arch/arm/mach-socfpga/Kconfig"
1791 source "arch/arm/mach-sti/Kconfig"
1793 source "arch/arm/mach-stm32/Kconfig"
1795 source "arch/arm/mach-stm32mp/Kconfig"
1797 source "arch/arm/mach-sunxi/Kconfig"
1799 source "arch/arm/mach-tegra/Kconfig"
1801 source "arch/arm/mach-u8500/Kconfig"
1803 source "arch/arm/mach-uniphier/Kconfig"
1805 source "arch/arm/cpu/armv7/vf610/Kconfig"
1807 source "arch/arm/mach-zynq/Kconfig"
1809 source "arch/arm/mach-zynqmp/Kconfig"
1811 source "arch/arm/mach-versal/Kconfig"
1813 source "arch/arm/mach-zynqmp-r5/Kconfig"
1815 source "arch/arm/cpu/armv7/Kconfig"
1817 source "arch/arm/cpu/armv8/Kconfig"
1819 source "arch/arm/mach-imx/Kconfig"
1821 source "board/bosch/shc/Kconfig"
1822 source "board/bosch/guardian/Kconfig"
1823 source "board/CarMediaLab/flea3/Kconfig"
1824 source "board/Marvell/aspenite/Kconfig"
1825 source "board/Marvell/gplugd/Kconfig"
1826 source "board/armadeus/apf27/Kconfig"
1827 source "board/armltd/vexpress/Kconfig"
1828 source "board/armltd/vexpress64/Kconfig"
1829 source "board/cortina/presidio-asic/Kconfig"
1830 source "board/broadcom/bcm23550_w1d/Kconfig"
1831 source "board/broadcom/bcm28155_ap/Kconfig"
1832 source "board/broadcom/bcm963158/Kconfig"
1833 source "board/broadcom/bcm968360bg/Kconfig"
1834 source "board/broadcom/bcm968580xref/Kconfig"
1835 source "board/broadcom/bcmcygnus/Kconfig"
1836 source "board/broadcom/bcmnsp/Kconfig"
1837 source "board/broadcom/bcmns2/Kconfig"
1838 source "board/cavium/thunderx/Kconfig"
1839 source "board/cirrus/edb93xx/Kconfig"
1840 source "board/eets/pdu001/Kconfig"
1841 source "board/emulation/qemu-arm/Kconfig"
1842 source "board/freescale/ls2080a/Kconfig"
1843 source "board/freescale/ls2080aqds/Kconfig"
1844 source "board/freescale/ls2080ardb/Kconfig"
1845 source "board/freescale/ls1088a/Kconfig"
1846 source "board/freescale/ls1028a/Kconfig"
1847 source "board/freescale/ls1021aqds/Kconfig"
1848 source "board/freescale/ls1043aqds/Kconfig"
1849 source "board/freescale/ls1021atwr/Kconfig"
1850 source "board/freescale/ls1021atsn/Kconfig"
1851 source "board/freescale/ls1021aiot/Kconfig"
1852 source "board/freescale/ls1046aqds/Kconfig"
1853 source "board/freescale/ls1043ardb/Kconfig"
1854 source "board/freescale/ls1046ardb/Kconfig"
1855 source "board/freescale/ls1046afrwy/Kconfig"
1856 source "board/freescale/ls1012aqds/Kconfig"
1857 source "board/freescale/ls1012ardb/Kconfig"
1858 source "board/freescale/ls1012afrdm/Kconfig"
1859 source "board/freescale/lx2160a/Kconfig"
1860 source "board/freescale/mx35pdk/Kconfig"
1861 source "board/freescale/s32v234evb/Kconfig"
1862 source "board/grinn/chiliboard/Kconfig"
1863 source "board/gumstix/pepper/Kconfig"
1864 source "board/hisilicon/hikey/Kconfig"
1865 source "board/hisilicon/hikey960/Kconfig"
1866 source "board/hisilicon/poplar/Kconfig"
1867 source "board/isee/igep003x/Kconfig"
1868 source "board/phytec/pcm051/Kconfig"
1869 source "board/silica/pengwyn/Kconfig"
1870 source "board/spear/spear300/Kconfig"
1871 source "board/spear/spear310/Kconfig"
1872 source "board/spear/spear320/Kconfig"
1873 source "board/spear/spear600/Kconfig"
1874 source "board/spear/x600/Kconfig"
1875 source "board/st/stv0991/Kconfig"
1876 source "board/tcl/sl50/Kconfig"
1877 source "board/birdland/bav335x/Kconfig"
1878 source "board/toradex/colibri_pxa270/Kconfig"
1879 source "board/variscite/dart_6ul/Kconfig"
1880 source "board/vscom/baltos/Kconfig"
1881 source "board/xilinx/Kconfig"
1882 source "board/xilinx/zynq/Kconfig"
1883 source "board/xilinx/zynqmp/Kconfig"
1884 source "board/phytium/durian/Kconfig"
1886 source "arch/arm/Kconfig.debug"
1891 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
1892 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
1893 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64