1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed from
19 almost any 4K aligned address. This logic relies on the relocation
20 information that is embedded in the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
25 default n if ARCH_QEMU
26 default y if POSITION_INDEPENDENT
28 U-Boot typically uses a hard-coded value for the stack pointer
29 before relocation. Enable this option to instead calculate the
30 initial SP at run-time. This is useful to avoid hard-coding addresses
31 into U-Boot, so that it can be loaded and executed at arbitrary
32 addresses and thus avoid using arbitrary addresses at runtime.
34 If this option is enabled, the early stack pointer is set to
35 &_bss_start with a offset value added. The offset is specified by
36 SYS_INIT_SP_BSS_OFFSET.
38 config SYS_INIT_SP_BSS_OFFSET
39 int "Early stack offset from the .bss base address"
40 depends on INIT_SP_RELATIVE
43 This option's value is the offset added to &_bss_start in order to
44 calculate the stack pointer. This offset should be large enough so
45 that the early malloc region, global data (gd), and early stack usage
46 do not overlap any appended DTB.
48 config LINUX_KERNEL_IMAGE_HEADER
51 Place a Linux kernel image header at the start of the U-Boot binary.
52 The format of the header is described in the Linux kernel source at
53 Documentation/arm64/booting.txt. This feature is useful since the
54 image header reports the amount of memory (BSS and similar) that
55 U-Boot needs to use, but which isn't part of the binary.
57 if LINUX_KERNEL_IMAGE_HEADER
58 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
61 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
62 TEXT_OFFSET value written to the Linux kernel image header.
71 ARM GICV3 Interrupt translation service (ITS).
72 Basic support for programming locality specific peripheral
73 interrupts (LPI) configuration tables and enable LPI tables.
74 LPI configuration table can be used by u-boot or Linux.
75 ARM GICV3 has limitation, once the LPI table is enabled, LPI
76 configuration table can not be re-programmed, unless GICV3 reset.
82 config DMA_ADDR_T_64BIT
92 # Used for compatibility with asm files copied from the kernel
93 config ARM_ASM_UNIFIED
97 # Used for compatibility with asm files copied from the kernel
101 config SYS_ICACHE_OFF
102 bool "Do not enable icache"
105 Do not enable instruction cache in U-Boot.
107 config SPL_SYS_ICACHE_OFF
108 bool "Do not enable icache in SPL"
110 default SYS_ICACHE_OFF
112 Do not enable instruction cache in SPL.
114 config SYS_DCACHE_OFF
115 bool "Do not enable dcache"
118 Do not enable data cache in U-Boot.
120 config SPL_SYS_DCACHE_OFF
121 bool "Do not enable dcache in SPL"
123 default SYS_DCACHE_OFF
125 Do not enable data cache in SPL.
127 config SYS_ARM_CACHE_CP15
128 bool "CP15 based cache enabling support"
130 Select this if your processor suports enabling caches by using
134 bool "MMU-based Paged Memory Management Support"
135 select SYS_ARM_CACHE_CP15
137 Select if you want MMU-based virtualised addressing space
138 support via paged memory management.
141 bool 'Use the ARM v7 PMSA Compliant MPU'
143 Some ARM systems without an MMU have instead a Memory Protection
144 Unit (MPU) that defines the type and permissions for regions of
146 If your CPU has an MPU then you should choose 'y' here unless you
147 know that you do not want to use the MPU.
149 # If set, the workarounds for these ARM errata are applied early during U-Boot
150 # startup. Note that in general these options force the workarounds to be
151 # applied; no CPU-type/version detection exists, unlike the similar options in
152 # the Linux kernel. Do not set these options unless they apply! Also note that
153 # the following can be machine-specific errata. These do have ability to
154 # provide rudimentary version and machine-specific checks, but expect no
156 # CONFIG_ARM_ERRATA_430973
157 # CONFIG_ARM_ERRATA_454179
158 # CONFIG_ARM_ERRATA_621766
159 # CONFIG_ARM_ERRATA_798870
160 # CONFIG_ARM_ERRATA_801819
161 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
162 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
164 config ARM_ERRATA_430973
167 config ARM_ERRATA_454179
170 config ARM_ERRATA_621766
173 config ARM_ERRATA_716044
176 config ARM_ERRATA_725233
179 config ARM_ERRATA_742230
182 config ARM_ERRATA_743622
185 config ARM_ERRATA_751472
188 config ARM_ERRATA_761320
191 config ARM_ERRATA_773022
194 config ARM_ERRATA_774769
197 config ARM_ERRATA_794072
200 config ARM_ERRATA_798870
203 config ARM_ERRATA_801819
206 config ARM_ERRATA_826974
209 config ARM_ERRATA_828024
212 config ARM_ERRATA_829520
215 config ARM_ERRATA_833069
218 config ARM_ERRATA_833471
221 config ARM_ERRATA_845369
224 config ARM_ERRATA_852421
227 config ARM_ERRATA_852423
230 config ARM_ERRATA_855873
233 config ARM_CORTEX_A8_CVE_2017_5715
236 config ARM_CORTEX_A15_CVE_2017_5715
241 select SYS_CACHE_SHIFT_5
246 select SYS_CACHE_SHIFT_5
251 select SYS_CACHE_SHIFT_5
256 select SYS_CACHE_SHIFT_5
261 select SYS_CACHE_SHIFT_5
267 select SYS_CACHE_SHIFT_5
274 select SYS_CACHE_SHIFT_6
281 select SYS_CACHE_SHIFT_5
282 select SYS_THUMB_BUILD
288 select SYS_ARM_CACHE_CP15
290 select SYS_CACHE_SHIFT_6
294 select SYS_CACHE_SHIFT_5
299 select SYS_CACHE_SHIFT_5
303 default "arm720t" if CPU_ARM720T
304 default "arm920t" if CPU_ARM920T
305 default "arm926ejs" if CPU_ARM926EJS
306 default "arm946es" if CPU_ARM946ES
307 default "arm1136" if CPU_ARM1136
308 default "arm1176" if CPU_ARM1176
309 default "armv7" if CPU_V7A
310 default "armv7" if CPU_V7R
311 default "armv7m" if CPU_V7M
312 default "pxa" if CPU_PXA
313 default "sa1100" if CPU_SA1100
314 default "armv8" if ARM64
318 default 4 if CPU_ARM720T
319 default 4 if CPU_ARM920T
320 default 5 if CPU_ARM926EJS
321 default 5 if CPU_ARM946ES
322 default 6 if CPU_ARM1136
323 default 6 if CPU_ARM1176
328 default 4 if CPU_SA1100
331 config SYS_CACHE_SHIFT_5
334 config SYS_CACHE_SHIFT_6
337 config SYS_CACHE_SHIFT_7
340 config SYS_CACHELINE_SIZE
342 default 128 if SYS_CACHE_SHIFT_7
343 default 64 if SYS_CACHE_SHIFT_6
344 default 32 if SYS_CACHE_SHIFT_5
347 prompt "Select the ARM data write cache policy"
348 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
349 TARGET_BCMNSP || CPU_PXA || RZA1
350 default SYS_ARM_CACHE_WRITEBACK
352 config SYS_ARM_CACHE_WRITEBACK
353 bool "Write-back (WB)"
355 A write updates the cache only and marks the cache line as dirty.
356 External memory is updated only when the line is evicted or explicitly
359 config SYS_ARM_CACHE_WRITETHROUGH
360 bool "Write-through (WT)"
362 A write updates both the cache and the external memory system.
363 This does not mark the cache line as dirty.
365 config SYS_ARM_CACHE_WRITEALLOC
366 bool "Write allocation (WA)"
368 A cache line is allocated on a write miss. This means that executing a
369 store instruction on the processor might cause a burst read to occur.
370 There is a linefill to obtain the data for the cache line, before the
375 bool "Enable ARCH_CPU_INIT"
377 Some architectures require a call to arch_cpu_init().
378 Say Y here to enable it
380 config SYS_ARCH_TIMER
381 bool "ARM Generic Timer support"
382 depends on CPU_V7A || ARM64
385 The ARM Generic Timer (aka arch-timer) provides an architected
386 interface to a timer source on an SoC.
387 It is mandatory for ARMv8 implementation and widely available
391 bool "Support for ARM SMC Calling Convention (SMCCC)"
392 depends on CPU_V7A || ARM64
395 Say Y here if you want to enable ARM SMC Calling Convention.
396 This should be enabled if U-Boot needs to communicate with system
397 firmware (for example, PSCI) according to SMCCC.
400 bool "support boot from semihosting"
402 In emulated environments, semihosting is a way for
403 the hosted environment to call out to the emulator to
404 retrieve files from the host machine.
406 config SYS_THUMB_BUILD
407 bool "Build U-Boot using the Thumb instruction set"
410 Use this flag to build U-Boot using the Thumb instruction set for
411 ARM architectures. Thumb instruction set provides better code
412 density. For ARM architectures that support Thumb2 this flag will
413 result in Thumb2 code generated by GCC.
415 config SPL_SYS_THUMB_BUILD
416 bool "Build SPL using the Thumb instruction set"
417 default y if SYS_THUMB_BUILD
418 depends on !ARM64 && SPL
420 Use this flag to build SPL using the Thumb instruction set for
421 ARM architectures. Thumb instruction set provides better code
422 density. For ARM architectures that support Thumb2 this flag will
423 result in Thumb2 code generated by GCC.
425 config TPL_SYS_THUMB_BUILD
426 bool "Build TPL using the Thumb instruction set"
427 default y if SYS_THUMB_BUILD
428 depends on TPL && !ARM64
430 Use this flag to build TPL using the Thumb instruction set for
431 ARM architectures. Thumb instruction set provides better code
432 density. For ARM architectures that support Thumb2 this flag will
433 result in Thumb2 code generated by GCC.
436 config SYS_L2CACHE_OFF
439 If SoC does not support L2CACHE or one does not want to enable
440 L2CACHE, choose this option.
442 config ENABLE_ARM_SOC_BOOT0_HOOK
443 bool "prepare BOOT0 header"
445 If the SoC's BOOT0 requires a header area filled with (magic)
446 values, then choose this option, and create a file included as
447 <asm/arch/boot0.h> which contains the required assembler code.
449 config ARM_CORTEX_CPU_IS_UP
453 config USE_ARCH_MEMCPY
454 bool "Use an assembly optimized implementation of memcpy"
458 Enable the generation of an optimized version of memcpy.
459 Such an implementation may be faster under some conditions
460 but may increase the binary size.
462 config SPL_USE_ARCH_MEMCPY
463 bool "Use an assembly optimized implementation of memcpy for SPL"
464 default y if USE_ARCH_MEMCPY
465 depends on !ARM64 && SPL
467 Enable the generation of an optimized version of memcpy.
468 Such an implementation may be faster under some conditions
469 but may increase the binary size.
471 config TPL_USE_ARCH_MEMCPY
472 bool "Use an assembly optimized implementation of memcpy for TPL"
473 default y if USE_ARCH_MEMCPY
474 depends on !ARM64 && TPL
476 Enable the generation of an optimized version of memcpy.
477 Such an implementation may be faster under some conditions
478 but may increase the binary size.
480 config USE_ARCH_MEMSET
481 bool "Use an assembly optimized implementation of memset"
485 Enable the generation of an optimized version of memset.
486 Such an implementation may be faster under some conditions
487 but may increase the binary size.
489 config SPL_USE_ARCH_MEMSET
490 bool "Use an assembly optimized implementation of memset for SPL"
491 default y if USE_ARCH_MEMSET
492 depends on !ARM64 && SPL
494 Enable the generation of an optimized version of memset.
495 Such an implementation may be faster under some conditions
496 but may increase the binary size.
498 config TPL_USE_ARCH_MEMSET
499 bool "Use an assembly optimized implementation of memset for TPL"
500 default y if USE_ARCH_MEMSET
501 depends on !ARM64 && TPL
503 Enable the generation of an optimized version of memset.
504 Such an implementation may be faster under some conditions
505 but may increase the binary size.
507 config ARM64_SUPPORT_AARCH32
508 bool "ARM64 system support AArch32 execution state"
510 default y if !TARGET_THUNDERX_88XX
512 This ARM64 system supports AArch32 execution state.
515 prompt "Target select"
520 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
521 select SPL_SEPARATE_BSS if SPL
523 config TARGET_EDB93XX
524 bool "Support edb93xx"
528 config TARGET_ASPENITE
529 bool "Support aspenite"
533 bool "Support gplugd"
539 select SPL_DM_SPI if SPL
542 Support for TI's DaVinci platform.
545 bool "Marvell Kirkwood"
546 select ARCH_MISC_INIT
547 select BOARD_EARLY_INIT_F
551 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
557 select SPL_DM_SPI if SPL
558 select SPL_DM_SPI_FLASH if SPL
573 config TARGET_SPEAR300
574 bool "Support spear300"
575 select BOARD_EARLY_INIT_F
580 config TARGET_SPEAR310
581 bool "Support spear310"
582 select BOARD_EARLY_INIT_F
587 config TARGET_SPEAR320
588 bool "Support spear320"
589 select BOARD_EARLY_INIT_F
594 config TARGET_SPEAR600
595 bool "Support spear600"
596 select BOARD_EARLY_INIT_F
601 config TARGET_STV0991
602 bool "Support stv0991"
615 select BOARD_LATE_INIT
625 bool "Broadcom BCM283X family"
631 select SERIAL_SEARCH_ALL
636 bool "Broadcom BCM63158 family"
642 bool "Broadcom BCM68360 family"
648 bool "Broadcom BCM6858 family"
653 config TARGET_VEXPRESS_CA15_TC2
654 bool "Support vexpress_ca15_tc2"
656 select CPU_V7_HAS_NONSEC
657 select CPU_V7_HAS_VIRT
661 bool "Broadcom BCM7XXX family"
665 select OF_PRIOR_STAGE
668 This enables support for Broadcom ARM-based set-top box
669 chipsets, including the 7445 family of chips.
671 config TARGET_VEXPRESS_CA5X2
672 bool "Support vexpress_ca5x2"
676 config TARGET_VEXPRESS_CA9X4
677 bool "Support vexpress_ca9x4"
681 config TARGET_BCM23550_W1D
682 bool "Support bcm23550_w1d"
687 config TARGET_BCM28155_AP
688 bool "Support bcm28155_ap"
693 config TARGET_BCMCYGNUS
694 bool "Support bcmcygnus"
697 imply BCM_SF2_ETH_GMAC
705 bool "Support bcmnsp"
709 bool "Support Broadcom Northstar2"
712 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
713 ARMv8 Cortex-A57 processors targeting a broad range of networking
717 bool "Support Broadcom NS3"
719 select BOARD_LATE_INIT
721 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
722 ARMv8 Cortex-A72 processors targeting a broad range of networking
726 bool "Samsung EXYNOS"
735 imply SYS_THUMB_BUILD
740 bool "Samsung S5PC1XX"
749 bool "Calxeda Highbank"
753 config ARCH_INTEGRATOR
754 bool "ARM Ltd. Integrator family"
761 bool "Qualcomm IPQ40xx SoCs"
779 select SYS_ARCH_TIMER
780 select SYS_THUMB_BUILD
786 bool "Texas Instruments' K3 Architecture"
791 config ARCH_OMAP2PLUS
794 select SPL_BOARD_INIT if SPL
795 select SPL_STACK_R if SPL
797 imply TI_SYSC if DM && OF_CONTROL
802 imply DISTRO_DEFAULTS
805 Support for the Meson SoC family developed by Amlogic Inc.,
806 targeted at media players and tablet computers. We currently
807 support the S905 (GXBaby) 64-bit SoC.
814 select SPL_LIBCOMMON_SUPPORT if SPL
815 select SPL_LIBGENERIC_SUPPORT if SPL
816 select SPL_OF_CONTROL if SPL
819 Support for the MediaTek SoCs family developed by MediaTek Inc.
820 Please refer to doc/README.mediatek for more information.
823 bool "NXP LPC32xx platform"
833 bool "NXP i.MX8 platform"
837 select ENABLE_ARM_SOC_BOOT0_HOOK
840 bool "NXP i.MX8M platform"
842 select SYS_FSL_HAS_SEC if IMX_HAB
843 select SYS_FSL_SEC_COMPAT_4
844 select SYS_FSL_SEC_LE
850 bool "NXP i.MXRT platform"
858 bool "NXP i.MX23 family"
869 bool "NXP i.MX28 family"
875 bool "NXP i.MX31 family"
881 select SYS_FSL_HAS_SEC if IMX_HAB
882 select SYS_FSL_SEC_COMPAT_4
883 select SYS_FSL_SEC_LE
884 select ROM_UNIFIED_SECTIONS
886 imply SYS_THUMB_BUILD
890 select ARCH_MISC_INIT
892 select SYS_FSL_HAS_SEC if IMX_HAB
893 select SYS_FSL_SEC_COMPAT_4
894 select SYS_FSL_SEC_LE
895 imply BOARD_EARLY_INIT_F
897 imply SYS_THUMB_BUILD
902 select SYS_FSL_HAS_SEC
903 select SYS_FSL_SEC_COMPAT_4
904 select SYS_FSL_SEC_LE
906 imply SYS_THUMB_BUILD
910 default "arch/arm/mach-omap2/u-boot-spl.lds"
915 select BOARD_EARLY_INIT_F
920 bool "Nexell S5P4418/S5P6818 SoC"
921 select ENABLE_ARM_SOC_BOOT0_HOOK
925 bool "Actions Semi OWL SoCs"
933 select SYS_RELOC_GD_ENV_ADDR
937 bool "QEMU Virtual Platform"
948 bool "Renesas ARM SoCs"
951 imply BOARD_EARLY_INIT_F
954 imply SYS_THUMB_BUILD
955 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
957 config TARGET_S32V234EVB
958 bool "Support s32v234evb"
960 select SYS_FSL_ERRATUM_ESDHC111
962 config ARCH_SNAPDRAGON
963 bool "Qualcomm Snapdragon SoCs"
976 bool "Altera SOCFPGA family"
977 select ARCH_EARLY_INIT_R
978 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
979 select ARM64 if TARGET_SOCFPGA_SOC64
980 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
983 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
985 select SPL_DM_RESET if DM_RESET
987 select SPL_LIBCOMMON_SUPPORT
988 select SPL_LIBGENERIC_SUPPORT
989 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
990 select SPL_OF_CONTROL
991 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
992 select SPL_SERIAL_SUPPORT
994 select SPL_WATCHDOG_SUPPORT
997 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
999 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1000 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1010 imply SPL_DM_SPI_FLASH
1011 imply SPL_LIBDISK_SUPPORT
1012 imply SPL_MMC_SUPPORT
1013 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1014 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1015 imply SPL_SPI_FLASH_SUPPORT
1016 imply SPL_SPI_SUPPORT
1020 bool "Support sunxi (Allwinner) SoCs"
1023 select CMD_MMC if MMC
1024 select CMD_USB if DISTRO_DEFAULTS
1030 select DM_MMC if MMC
1031 select DM_SCSI if SCSI
1033 select DM_USB if DISTRO_DEFAULTS
1034 select OF_BOARD_SETUP
1037 select SPECIFY_CONSOLE_INDEX
1038 select SPL_STACK_R if SPL
1039 select SPL_SYS_MALLOC_SIMPLE if SPL
1040 select SPL_SYS_THUMB_BUILD if !ARM64
1043 select SYS_THUMB_BUILD if !ARM64
1044 select USB if DISTRO_DEFAULTS
1045 select USB_KEYBOARD if DISTRO_DEFAULTS
1046 select USB_STORAGE if DISTRO_DEFAULTS
1047 select SPL_USE_TINY_PRINTF
1049 select SYS_RELOC_GD_ENV_ADDR
1050 imply BOARD_LATE_INIT
1053 imply CMD_UBI if MTD_RAW_NAND
1054 imply DISTRO_DEFAULTS
1057 imply OF_LIBFDT_OVERLAY
1058 imply PRE_CONSOLE_BUFFER
1059 imply SPL_GPIO_SUPPORT
1060 imply SPL_LIBCOMMON_SUPPORT
1061 imply SPL_LIBGENERIC_SUPPORT
1062 imply SPL_MMC_SUPPORT if MMC
1063 imply SPL_POWER_SUPPORT
1064 imply SPL_SERIAL_SUPPORT
1068 bool "ST-Ericsson U8500 Series"
1072 select DM_MMC if MMC
1074 select DM_USB if USB
1078 imply ARM_PL180_MMCI
1080 imply NOMADIK_MTU_TIMER
1083 imply SYSRESET_SYSCON
1086 bool "Support Xilinx Versal Platform"
1090 select DM_ETH if NET
1091 select DM_MMC if MMC
1094 imply BOARD_LATE_INIT
1095 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1098 bool "Freescale Vybrid"
1100 select SYS_FSL_ERRATUM_ESDHC111
1105 bool "Xilinx Zynq based platform"
1110 select DM_ETH if NET
1111 select DM_MMC if MMC
1115 select DM_USB if USB
1118 select SPL_BOARD_INIT if SPL
1119 select SPL_CLK if SPL
1120 select SPL_DM if SPL
1121 select SPL_DM_SPI if SPL
1122 select SPL_DM_SPI_FLASH if SPL
1123 select SPL_OF_CONTROL if SPL
1124 select SPL_SEPARATE_BSS if SPL
1126 imply ARCH_EARLY_INIT_R
1127 imply BOARD_LATE_INIT
1131 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1134 config ARCH_ZYNQMP_R5
1135 bool "Xilinx ZynqMP R5 based platform"
1139 select DM_ETH if NET
1140 select DM_MMC if MMC
1147 bool "Xilinx ZynqMP based platform"
1151 select DM_ETH if NET
1153 select DM_MMC if MMC
1155 select DM_SPI if SPI
1156 select DM_SPI_FLASH if DM_SPI
1157 select DM_USB if USB
1160 select SPL_BOARD_INIT if SPL
1161 select SPL_CLK if SPL
1162 select SPL_DM if SPL
1163 select SPL_DM_SPI if SPI && SPL_DM
1164 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1165 select SPL_DM_MAILBOX if SPL
1166 select SPL_FIRMWARE if SPL
1167 select SPL_SEPARATE_BSS if SPL
1170 imply BOARD_LATE_INIT
1172 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1179 imply DISTRO_DEFAULTS
1182 config TARGET_VEXPRESS64_AEMV8A
1183 bool "Support vexpress_aemv8a"
1187 config TARGET_VEXPRESS64_BASE_FVP
1188 bool "Support Versatile Express ARMv8a FVP BASE model"
1193 config TARGET_VEXPRESS64_JUNO
1194 bool "Support Versatile Express Juno Development Platform"
1209 config TARGET_TOTAL_COMPUTE
1210 bool "Support Total Compute Platform"
1218 config TARGET_LS2080A_EMU
1219 bool "Support ls2080a_emu"
1222 select ARMV8_MULTIENTRY
1223 select FSL_DDR_SYNC_REFRESH
1225 Support for Freescale LS2080A_EMU platform.
1226 The LS2080A Development System (EMULATOR) is a pre-silicon
1227 development platform that supports the QorIQ LS2080A
1228 Layerscape Architecture processor.
1230 config TARGET_LS1088AQDS
1231 bool "Support ls1088aqds"
1234 select ARMV8_MULTIENTRY
1235 select ARCH_SUPPORT_TFABOOT
1236 select BOARD_LATE_INIT
1238 select FSL_DDR_INTERACTIVE if !SD_BOOT
1240 Support for NXP LS1088AQDS platform.
1241 The LS1088A Development System (QDS) is a high-performance
1242 development platform that supports the QorIQ LS1088A
1243 Layerscape Architecture processor.
1245 config TARGET_LS2080AQDS
1246 bool "Support ls2080aqds"
1249 select ARMV8_MULTIENTRY
1250 select ARCH_SUPPORT_TFABOOT
1251 select BOARD_LATE_INIT
1256 select FSL_DDR_INTERACTIVE if !SPL
1258 Support for Freescale LS2080AQDS platform.
1259 The LS2080A Development System (QDS) is a high-performance
1260 development platform that supports the QorIQ LS2080A
1261 Layerscape Architecture processor.
1263 config TARGET_LS2080ARDB
1264 bool "Support ls2080ardb"
1267 select ARMV8_MULTIENTRY
1268 select ARCH_SUPPORT_TFABOOT
1269 select BOARD_LATE_INIT
1272 select FSL_DDR_INTERACTIVE if !SPL
1276 Support for Freescale LS2080ARDB platform.
1277 The LS2080A Reference design board (RDB) is a high-performance
1278 development platform that supports the QorIQ LS2080A
1279 Layerscape Architecture processor.
1281 config TARGET_LS2081ARDB
1282 bool "Support ls2081ardb"
1285 select ARMV8_MULTIENTRY
1286 select BOARD_LATE_INIT
1289 Support for Freescale LS2081ARDB platform.
1290 The LS2081A Reference design board (RDB) is a high-performance
1291 development platform that supports the QorIQ LS2081A/LS2041A
1292 Layerscape Architecture processor.
1294 config TARGET_LX2160ARDB
1295 bool "Support lx2160ardb"
1298 select ARMV8_MULTIENTRY
1299 select ARCH_SUPPORT_TFABOOT
1300 select BOARD_LATE_INIT
1302 Support for NXP LX2160ARDB platform.
1303 The lx2160ardb (LX2160A Reference design board (RDB)
1304 is a high-performance development platform that supports the
1305 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1307 config TARGET_LX2160AQDS
1308 bool "Support lx2160aqds"
1311 select ARMV8_MULTIENTRY
1312 select ARCH_SUPPORT_TFABOOT
1313 select BOARD_LATE_INIT
1315 Support for NXP LX2160AQDS platform.
1316 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1317 is a high-performance development platform that supports the
1318 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1320 config TARGET_LX2162AQDS
1321 bool "Support lx2162aqds"
1323 select ARCH_MISC_INIT
1325 select ARMV8_MULTIENTRY
1326 select ARCH_SUPPORT_TFABOOT
1327 select BOARD_LATE_INIT
1329 Support for NXP LX2162AQDS platform.
1330 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1333 bool "Support HiKey 96boards Consumer Edition Platform"
1340 select SPECIFY_CONSOLE_INDEX
1343 Support for HiKey 96boards platform. It features a HI6220
1344 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1346 config TARGET_HIKEY960
1347 bool "Support HiKey960 96boards Consumer Edition Platform"
1355 Support for HiKey960 96boards platform. It features a HI3660
1356 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1358 config TARGET_POPLAR
1359 bool "Support Poplar 96boards Enterprise Edition Platform"
1368 Support for Poplar 96boards EE platform. It features a HI3798cv200
1369 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1370 making it capable of running any commercial set-top solution based on
1373 config TARGET_LS1012AQDS
1374 bool "Support ls1012aqds"
1377 select ARCH_SUPPORT_TFABOOT
1378 select BOARD_LATE_INIT
1380 Support for Freescale LS1012AQDS platform.
1381 The LS1012A Development System (QDS) is a high-performance
1382 development platform that supports the QorIQ LS1012A
1383 Layerscape Architecture processor.
1385 config TARGET_LS1012ARDB
1386 bool "Support ls1012ardb"
1389 select ARCH_SUPPORT_TFABOOT
1390 select BOARD_LATE_INIT
1394 Support for Freescale LS1012ARDB platform.
1395 The LS1012A Reference design board (RDB) is a high-performance
1396 development platform that supports the QorIQ LS1012A
1397 Layerscape Architecture processor.
1399 config TARGET_LS1012A2G5RDB
1400 bool "Support ls1012a2g5rdb"
1403 select ARCH_SUPPORT_TFABOOT
1404 select BOARD_LATE_INIT
1407 Support for Freescale LS1012A2G5RDB platform.
1408 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1409 development platform that supports the QorIQ LS1012A
1410 Layerscape Architecture processor.
1412 config TARGET_LS1012AFRWY
1413 bool "Support ls1012afrwy"
1416 select ARCH_SUPPORT_TFABOOT
1417 select BOARD_LATE_INIT
1421 Support for Freescale LS1012AFRWY platform.
1422 The LS1012A FRWY board (FRWY) is a high-performance
1423 development platform that supports the QorIQ LS1012A
1424 Layerscape Architecture processor.
1426 config TARGET_LS1012AFRDM
1427 bool "Support ls1012afrdm"
1430 select ARCH_SUPPORT_TFABOOT
1432 Support for Freescale LS1012AFRDM platform.
1433 The LS1012A Freedom board (FRDM) is a high-performance
1434 development platform that supports the QorIQ LS1012A
1435 Layerscape Architecture processor.
1437 config TARGET_LS1028AQDS
1438 bool "Support ls1028aqds"
1441 select ARMV8_MULTIENTRY
1442 select ARCH_SUPPORT_TFABOOT
1443 select BOARD_LATE_INIT
1445 Support for Freescale LS1028AQDS platform
1446 The LS1028A Development System (QDS) is a high-performance
1447 development platform that supports the QorIQ LS1028A
1448 Layerscape Architecture processor.
1450 config TARGET_LS1028ARDB
1451 bool "Support ls1028ardb"
1454 select ARMV8_MULTIENTRY
1455 select ARCH_SUPPORT_TFABOOT
1456 select BOARD_LATE_INIT
1458 Support for Freescale LS1028ARDB platform
1459 The LS1028A Development System (RDB) is a high-performance
1460 development platform that supports the QorIQ LS1028A
1461 Layerscape Architecture processor.
1463 config TARGET_LS1088ARDB
1464 bool "Support ls1088ardb"
1467 select ARMV8_MULTIENTRY
1468 select ARCH_SUPPORT_TFABOOT
1469 select BOARD_LATE_INIT
1471 select FSL_DDR_INTERACTIVE if !SD_BOOT
1473 Support for NXP LS1088ARDB platform.
1474 The LS1088A Reference design board (RDB) is a high-performance
1475 development platform that supports the QorIQ LS1088A
1476 Layerscape Architecture processor.
1478 config TARGET_LS1021AQDS
1479 bool "Support ls1021aqds"
1481 select ARCH_SUPPORT_PSCI
1482 select BOARD_EARLY_INIT_F
1483 select BOARD_LATE_INIT
1485 select CPU_V7_HAS_NONSEC
1486 select CPU_V7_HAS_VIRT
1487 select LS1_DEEP_SLEEP
1490 select FSL_DDR_INTERACTIVE
1491 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1492 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1495 config TARGET_LS1021ATWR
1496 bool "Support ls1021atwr"
1498 select ARCH_SUPPORT_PSCI
1499 select BOARD_EARLY_INIT_F
1500 select BOARD_LATE_INIT
1502 select CPU_V7_HAS_NONSEC
1503 select CPU_V7_HAS_VIRT
1504 select LS1_DEEP_SLEEP
1506 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1509 config TARGET_LS1021ATSN
1510 bool "Support ls1021atsn"
1512 select ARCH_SUPPORT_PSCI
1513 select BOARD_EARLY_INIT_F
1514 select BOARD_LATE_INIT
1516 select CPU_V7_HAS_NONSEC
1517 select CPU_V7_HAS_VIRT
1518 select LS1_DEEP_SLEEP
1522 config TARGET_LS1021AIOT
1523 bool "Support ls1021aiot"
1525 select ARCH_SUPPORT_PSCI
1526 select BOARD_LATE_INIT
1528 select CPU_V7_HAS_NONSEC
1529 select CPU_V7_HAS_VIRT
1531 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1534 Support for Freescale LS1021AIOT platform.
1535 The LS1021A Freescale board (IOT) is a high-performance
1536 development platform that supports the QorIQ LS1021A
1537 Layerscape Architecture processor.
1539 config TARGET_LS1043AQDS
1540 bool "Support ls1043aqds"
1543 select ARMV8_MULTIENTRY
1544 select ARCH_SUPPORT_TFABOOT
1545 select BOARD_EARLY_INIT_F
1546 select BOARD_LATE_INIT
1548 select FSL_DDR_INTERACTIVE if !SPL
1549 select FSL_DSPI if !SPL_NO_DSPI
1550 select DM_SPI_FLASH if FSL_DSPI
1554 Support for Freescale LS1043AQDS platform.
1556 config TARGET_LS1043ARDB
1557 bool "Support ls1043ardb"
1560 select ARMV8_MULTIENTRY
1561 select ARCH_SUPPORT_TFABOOT
1562 select BOARD_EARLY_INIT_F
1563 select BOARD_LATE_INIT
1565 select FSL_DSPI if !SPL_NO_DSPI
1566 select DM_SPI_FLASH if FSL_DSPI
1568 Support for Freescale LS1043ARDB platform.
1570 config TARGET_LS1046AQDS
1571 bool "Support ls1046aqds"
1574 select ARMV8_MULTIENTRY
1575 select ARCH_SUPPORT_TFABOOT
1576 select BOARD_EARLY_INIT_F
1577 select BOARD_LATE_INIT
1578 select DM_SPI_FLASH if DM_SPI
1580 select FSL_DDR_BIST if !SPL
1581 select FSL_DDR_INTERACTIVE if !SPL
1582 select FSL_DDR_INTERACTIVE if !SPL
1585 Support for Freescale LS1046AQDS platform.
1586 The LS1046A Development System (QDS) is a high-performance
1587 development platform that supports the QorIQ LS1046A
1588 Layerscape Architecture processor.
1590 config TARGET_LS1046ARDB
1591 bool "Support ls1046ardb"
1594 select ARMV8_MULTIENTRY
1595 select ARCH_SUPPORT_TFABOOT
1596 select BOARD_EARLY_INIT_F
1597 select BOARD_LATE_INIT
1598 select DM_SPI_FLASH if DM_SPI
1599 select POWER_MC34VR500
1602 select FSL_DDR_INTERACTIVE if !SPL
1605 Support for Freescale LS1046ARDB platform.
1606 The LS1046A Reference Design Board (RDB) is a high-performance
1607 development platform that supports the QorIQ LS1046A
1608 Layerscape Architecture processor.
1610 config TARGET_LS1046AFRWY
1611 bool "Support ls1046afrwy"
1614 select ARMV8_MULTIENTRY
1615 select ARCH_SUPPORT_TFABOOT
1616 select BOARD_EARLY_INIT_F
1617 select BOARD_LATE_INIT
1618 select DM_SPI_FLASH if DM_SPI
1621 Support for Freescale LS1046AFRWY platform.
1622 The LS1046A Freeway Board (FRWY) is a high-performance
1623 development platform that supports the QorIQ LS1046A
1624 Layerscape Architecture processor.
1630 select ARMV8_MULTIENTRY
1634 Support for Kontron SMARC-sAL28 board.
1636 config TARGET_COLIBRI_PXA270
1637 bool "Support colibri_pxa270"
1640 config ARCH_UNIPHIER
1641 bool "Socionext UniPhier SoCs"
1642 select BOARD_LATE_INIT
1652 select OF_BOARD_SETUP
1656 select SPL_BOARD_INIT if SPL
1657 select SPL_DM if SPL
1658 select SPL_LIBCOMMON_SUPPORT if SPL
1659 select SPL_LIBGENERIC_SUPPORT if SPL
1660 select SPL_OF_CONTROL if SPL
1661 select SPL_PINCTRL if SPL
1664 imply DISTRO_DEFAULTS
1667 Support for UniPhier SoC family developed by Socionext Inc.
1668 (formerly, System LSI Business Division of Panasonic Corporation)
1671 bool "Support STMicroelectronics STM32 MCU with cortex M"
1678 bool "Support STMicrolectronics SoCs"
1687 Support for STMicroelectronics STiH407/10 SoC family.
1688 This SoC is used on Linaro 96Board STiH410-B2260
1691 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1692 select ARCH_MISC_INIT
1693 select ARCH_SUPPORT_TFABOOT
1694 select BOARD_LATE_INIT
1703 select OF_SYSTEM_SETUP
1709 select SYS_THUMB_BUILD
1713 imply OF_LIBFDT_OVERLAY
1714 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1717 Support for STM32MP SoC family developed by STMicroelectronics,
1718 MPUs based on ARM cortex A core
1719 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1720 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1722 SPL is the unsecure FSBL for the basic boot chain.
1724 config ARCH_ROCKCHIP
1725 bool "Support Rockchip SoCs"
1727 select BINMAN if SPL_OPTEE
1737 select DM_USB if USB
1738 select ENABLE_ARM_SOC_BOOT0_HOOK
1741 select SPL_DM if SPL
1742 select SPL_DM_SPI if SPL
1743 select SPL_DM_SPI_FLASH if SPL
1745 select SYS_THUMB_BUILD if !ARM64
1748 imply DEBUG_UART_BOARD_INIT
1749 imply DISTRO_DEFAULTS
1751 imply SARADC_ROCKCHIP
1753 imply SPL_SYS_MALLOC_SIMPLE
1756 imply USB_FUNCTION_FASTBOOT
1758 config ARCH_OCTEONTX
1759 bool "Support OcteonTX SoCs"
1765 select BOARD_LATE_INIT
1766 select SYS_CACHE_SHIFT_7
1768 config ARCH_OCTEONTX2
1769 bool "Support OcteonTX2 SoCs"
1775 select BOARD_LATE_INIT
1776 select SYS_CACHE_SHIFT_7
1778 config TARGET_THUNDERX_88XX
1779 bool "Support ThunderX 88xx"
1783 select SYS_CACHE_SHIFT_7
1786 bool "Support Aspeed SoCs"
1791 config TARGET_DURIAN
1792 bool "Support Phytium Durian Platform"
1795 Support for durian platform.
1796 It has 2GB Sdram, uart and pcie.
1798 config TARGET_PRESIDIO_ASIC
1799 bool "Support Cortina Presidio ASIC Platform"
1802 config TARGET_XENGUEST_ARM64
1803 bool "Xen guest ARM64"
1807 select LINUX_KERNEL_IMAGE_HEADER
1812 config ARCH_SUPPORT_TFABOOT
1816 bool "Support for booting from TF-A"
1817 depends on ARCH_SUPPORT_TFABOOT
1820 Some platforms support the setup of secure registers (for instance
1821 for CPU errata handling) or provide secure services like PSCI.
1822 Those services could also be provided by other firmware parts
1823 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
1824 does not need to (and cannot) execute this code.
1825 Enabling this option will make a U-Boot binary that is relying
1826 on other firmware layers to provide secure functionality.
1828 config TI_SECURE_DEVICE
1829 bool "HS Device Type Support"
1830 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1832 If a high secure (HS) device type is being used, this config
1833 must be set. This option impacts various aspects of the
1834 build system (to create signed boot images that can be
1835 authenticated) and the code. See the doc/README.ti-secure
1836 file for further details.
1838 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1839 config ISW_ENTRY_ADDR
1840 hex "Address in memory or XIP address of bootloader entry point"
1841 default 0x402F4000 if AM43XX
1842 default 0x402F0400 if AM33XX
1843 default 0x40301350 if OMAP54XX
1845 After any reset, the boot ROM searches the boot media for a valid
1846 boot image. For non-XIP devices, the ROM then copies the image into
1847 internal memory. For all boot modes, after the ROM processes the
1848 boot image it eventually computes the entry point address depending
1849 on the device type (secure/non-secure), boot media (xip/non-xip) and
1853 source "arch/arm/mach-aspeed/Kconfig"
1855 source "arch/arm/mach-at91/Kconfig"
1857 source "arch/arm/mach-bcm283x/Kconfig"
1859 source "arch/arm/mach-bcmstb/Kconfig"
1861 source "arch/arm/mach-davinci/Kconfig"
1863 source "arch/arm/mach-exynos/Kconfig"
1865 source "arch/arm/mach-highbank/Kconfig"
1867 source "arch/arm/mach-integrator/Kconfig"
1869 source "arch/arm/mach-ipq40xx/Kconfig"
1871 source "arch/arm/mach-k3/Kconfig"
1873 source "arch/arm/mach-keystone/Kconfig"
1875 source "arch/arm/mach-kirkwood/Kconfig"
1877 source "arch/arm/mach-lpc32xx/Kconfig"
1879 source "arch/arm/mach-mvebu/Kconfig"
1881 source "arch/arm/mach-octeontx/Kconfig"
1883 source "arch/arm/mach-octeontx2/Kconfig"
1885 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1887 source "arch/arm/mach-imx/mx2/Kconfig"
1889 source "arch/arm/mach-imx/mx3/Kconfig"
1891 source "arch/arm/mach-imx/mx5/Kconfig"
1893 source "arch/arm/mach-imx/mx6/Kconfig"
1895 source "arch/arm/mach-imx/mx7/Kconfig"
1897 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1899 source "arch/arm/mach-imx/imx8/Kconfig"
1901 source "arch/arm/mach-imx/imx8m/Kconfig"
1903 source "arch/arm/mach-imx/imxrt/Kconfig"
1905 source "arch/arm/mach-imx/mxs/Kconfig"
1907 source "arch/arm/mach-omap2/Kconfig"
1909 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1911 source "arch/arm/mach-orion5x/Kconfig"
1913 source "arch/arm/mach-owl/Kconfig"
1915 source "arch/arm/mach-rmobile/Kconfig"
1917 source "arch/arm/mach-meson/Kconfig"
1919 source "arch/arm/mach-mediatek/Kconfig"
1921 source "arch/arm/mach-qemu/Kconfig"
1923 source "arch/arm/mach-rockchip/Kconfig"
1925 source "arch/arm/mach-s5pc1xx/Kconfig"
1927 source "arch/arm/mach-snapdragon/Kconfig"
1929 source "arch/arm/mach-socfpga/Kconfig"
1931 source "arch/arm/mach-sti/Kconfig"
1933 source "arch/arm/mach-stm32/Kconfig"
1935 source "arch/arm/mach-stm32mp/Kconfig"
1937 source "arch/arm/mach-sunxi/Kconfig"
1939 source "arch/arm/mach-tegra/Kconfig"
1941 source "arch/arm/mach-u8500/Kconfig"
1943 source "arch/arm/mach-uniphier/Kconfig"
1945 source "arch/arm/cpu/armv7/vf610/Kconfig"
1947 source "arch/arm/mach-zynq/Kconfig"
1949 source "arch/arm/mach-zynqmp/Kconfig"
1951 source "arch/arm/mach-versal/Kconfig"
1953 source "arch/arm/mach-zynqmp-r5/Kconfig"
1955 source "arch/arm/cpu/armv7/Kconfig"
1957 source "arch/arm/cpu/armv8/Kconfig"
1959 source "arch/arm/mach-imx/Kconfig"
1961 source "arch/arm/mach-nexell/Kconfig"
1963 source "board/armltd/total_compute/Kconfig"
1965 source "board/bosch/shc/Kconfig"
1966 source "board/bosch/guardian/Kconfig"
1967 source "board/CarMediaLab/flea3/Kconfig"
1968 source "board/Marvell/aspenite/Kconfig"
1969 source "board/Marvell/gplugd/Kconfig"
1970 source "board/Marvell/octeontx/Kconfig"
1971 source "board/Marvell/octeontx2/Kconfig"
1972 source "board/armadeus/apf27/Kconfig"
1973 source "board/armltd/vexpress/Kconfig"
1974 source "board/armltd/vexpress64/Kconfig"
1975 source "board/cortina/presidio-asic/Kconfig"
1976 source "board/broadcom/bcm23550_w1d/Kconfig"
1977 source "board/broadcom/bcm28155_ap/Kconfig"
1978 source "board/broadcom/bcm963158/Kconfig"
1979 source "board/broadcom/bcm968360bg/Kconfig"
1980 source "board/broadcom/bcm968580xref/Kconfig"
1981 source "board/broadcom/bcmcygnus/Kconfig"
1982 source "board/broadcom/bcmnsp/Kconfig"
1983 source "board/broadcom/bcmns2/Kconfig"
1984 source "board/broadcom/bcmns3/Kconfig"
1985 source "board/cavium/thunderx/Kconfig"
1986 source "board/cirrus/edb93xx/Kconfig"
1987 source "board/eets/pdu001/Kconfig"
1988 source "board/emulation/qemu-arm/Kconfig"
1989 source "board/freescale/ls2080aqds/Kconfig"
1990 source "board/freescale/ls2080ardb/Kconfig"
1991 source "board/freescale/ls1088a/Kconfig"
1992 source "board/freescale/ls1028a/Kconfig"
1993 source "board/freescale/ls1021aqds/Kconfig"
1994 source "board/freescale/ls1043aqds/Kconfig"
1995 source "board/freescale/ls1021atwr/Kconfig"
1996 source "board/freescale/ls1021atsn/Kconfig"
1997 source "board/freescale/ls1021aiot/Kconfig"
1998 source "board/freescale/ls1046aqds/Kconfig"
1999 source "board/freescale/ls1043ardb/Kconfig"
2000 source "board/freescale/ls1046ardb/Kconfig"
2001 source "board/freescale/ls1046afrwy/Kconfig"
2002 source "board/freescale/ls1012aqds/Kconfig"
2003 source "board/freescale/ls1012ardb/Kconfig"
2004 source "board/freescale/ls1012afrdm/Kconfig"
2005 source "board/freescale/lx2160a/Kconfig"
2006 source "board/freescale/s32v234evb/Kconfig"
2007 source "board/grinn/chiliboard/Kconfig"
2008 source "board/hisilicon/hikey/Kconfig"
2009 source "board/hisilicon/hikey960/Kconfig"
2010 source "board/hisilicon/poplar/Kconfig"
2011 source "board/isee/igep003x/Kconfig"
2012 source "board/kontron/sl28/Kconfig"
2013 source "board/myir/mys_6ulx/Kconfig"
2014 source "board/spear/spear300/Kconfig"
2015 source "board/spear/spear310/Kconfig"
2016 source "board/spear/spear320/Kconfig"
2017 source "board/spear/spear600/Kconfig"
2018 source "board/spear/x600/Kconfig"
2019 source "board/st/stv0991/Kconfig"
2020 source "board/tcl/sl50/Kconfig"
2021 source "board/toradex/colibri_pxa270/Kconfig"
2022 source "board/variscite/dart_6ul/Kconfig"
2023 source "board/vscom/baltos/Kconfig"
2024 source "board/phytium/durian/Kconfig"
2025 source "board/xen/xenguest_arm64/Kconfig"
2027 source "arch/arm/Kconfig.debug"
2032 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2033 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2034 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64