1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed
19 from almost any address. This logic relies on the relocation
20 information that is embedded into the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
26 U-Boot typically uses a hard-coded value for the stack pointer
27 before relocation. Enable this option to instead calculate the
28 initial SP at run-time. This is useful to avoid hard-coding addresses
29 into U-Boot, so that can be loaded and executed at arbitrary
30 addresses and thus avoid using arbitrary addresses at runtime.
32 If this option is enabled, the early stack pointer is set to
33 &_bss_start with a offset value added. The offset is specified by
34 SYS_INIT_SP_BSS_OFFSET.
36 config SYS_INIT_SP_BSS_OFFSET
37 int "Early stack offset from the .bss base address"
38 depends on INIT_SP_RELATIVE
41 This option's value is the offset added to &_bss_start in order to
42 calculate the stack pointer. This offset should be large enough so
43 that the early malloc region, global data (gd), and early stack usage
44 do not overlap any appended DTB.
46 config LINUX_KERNEL_IMAGE_HEADER
49 Place a Linux kernel image header at the start of the U-Boot binary.
50 The format of the header is described in the Linux kernel source at
51 Documentation/arm64/booting.txt. This feature is useful since the
52 image header reports the amount of memory (BSS and similar) that
53 U-Boot needs to use, but which isn't part of the binary.
55 if LINUX_KERNEL_IMAGE_HEADER
56 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
59 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
60 TEXT_OFFSET value written in to the Linux kernel image header.
66 default y if ARM64 && !POSITION_INDEPENDENT
68 config DMA_ADDR_T_64BIT
78 # Used for compatibility with asm files copied from the kernel
79 config ARM_ASM_UNIFIED
83 # Used for compatibility with asm files copied from the kernel
88 bool "Do not enable icache"
91 Do not enable instruction cache in U-Boot.
93 config SPL_SYS_ICACHE_OFF
94 bool "Do not enable icache in SPL"
96 default SYS_ICACHE_OFF
98 Do not enable instruction cache in SPL.
100 config SYS_DCACHE_OFF
101 bool "Do not enable dcache"
104 Do not enable data cache in U-Boot.
106 config SPL_SYS_DCACHE_OFF
107 bool "Do not enable dcache in SPL"
109 default SYS_DCACHE_OFF
111 Do not enable data cache in SPL.
113 config SYS_ARM_CACHE_CP15
114 bool "CP15 based cache enabling support"
116 Select this if your processor suports enabling caches by using
120 bool "MMU-based Paged Memory Management Support"
121 select SYS_ARM_CACHE_CP15
123 Select if you want MMU-based virtualised addressing space
124 support by paged memory management.
127 bool 'Use the ARM v7 PMSA Compliant MPU'
129 Some ARM systems without an MMU have instead a Memory Protection
130 Unit (MPU) that defines the type and permissions for regions of
132 If your CPU has an MPU then you should choose 'y' here unless you
133 know that you do not want to use the MPU.
135 # If set, the workarounds for these ARM errata are applied early during U-Boot
136 # startup. Note that in general these options force the workarounds to be
137 # applied; no CPU-type/version detection exists, unlike the similar options in
138 # the Linux kernel. Do not set these options unless they apply! Also note that
139 # the following can be machine specific errata. These do have ability to
140 # provide rudimentary version and machine specific checks, but expect no
142 # CONFIG_ARM_ERRATA_430973
143 # CONFIG_ARM_ERRATA_454179
144 # CONFIG_ARM_ERRATA_621766
145 # CONFIG_ARM_ERRATA_798870
146 # CONFIG_ARM_ERRATA_801819
147 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
148 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
150 config ARM_ERRATA_430973
153 config ARM_ERRATA_454179
156 config ARM_ERRATA_621766
159 config ARM_ERRATA_716044
162 config ARM_ERRATA_725233
165 config ARM_ERRATA_742230
168 config ARM_ERRATA_743622
171 config ARM_ERRATA_751472
174 config ARM_ERRATA_761320
177 config ARM_ERRATA_773022
180 config ARM_ERRATA_774769
183 config ARM_ERRATA_794072
186 config ARM_ERRATA_798870
189 config ARM_ERRATA_801819
192 config ARM_ERRATA_826974
195 config ARM_ERRATA_828024
198 config ARM_ERRATA_829520
201 config ARM_ERRATA_833069
204 config ARM_ERRATA_833471
207 config ARM_ERRATA_845369
210 config ARM_ERRATA_852421
213 config ARM_ERRATA_852423
216 config ARM_ERRATA_855873
219 config ARM_CORTEX_A8_CVE_2017_5715
222 config ARM_CORTEX_A15_CVE_2017_5715
227 select SYS_CACHE_SHIFT_5
232 select SYS_CACHE_SHIFT_5
237 select SYS_CACHE_SHIFT_5
242 select SYS_CACHE_SHIFT_5
247 select SYS_CACHE_SHIFT_5
253 select SYS_CACHE_SHIFT_5
260 select SYS_CACHE_SHIFT_6
267 select SYS_CACHE_SHIFT_5
268 select SYS_THUMB_BUILD
274 select SYS_ARM_CACHE_CP15
276 select SYS_CACHE_SHIFT_6
280 select SYS_CACHE_SHIFT_5
285 select SYS_CACHE_SHIFT_5
289 default "arm720t" if CPU_ARM720T
290 default "arm920t" if CPU_ARM920T
291 default "arm926ejs" if CPU_ARM926EJS
292 default "arm946es" if CPU_ARM946ES
293 default "arm1136" if CPU_ARM1136
294 default "arm1176" if CPU_ARM1176
295 default "armv7" if CPU_V7A
296 default "armv7" if CPU_V7R
297 default "armv7m" if CPU_V7M
298 default "pxa" if CPU_PXA
299 default "sa1100" if CPU_SA1100
300 default "armv8" if ARM64
304 default 4 if CPU_ARM720T
305 default 4 if CPU_ARM920T
306 default 5 if CPU_ARM926EJS
307 default 5 if CPU_ARM946ES
308 default 6 if CPU_ARM1136
309 default 6 if CPU_ARM1176
314 default 4 if CPU_SA1100
317 config SYS_CACHE_SHIFT_5
320 config SYS_CACHE_SHIFT_6
323 config SYS_CACHE_SHIFT_7
326 config SYS_CACHELINE_SIZE
328 default 128 if SYS_CACHE_SHIFT_7
329 default 64 if SYS_CACHE_SHIFT_6
330 default 32 if SYS_CACHE_SHIFT_5
332 config SYS_ARCH_TIMER
333 bool "ARM Generic Timer support"
334 depends on CPU_V7A || ARM64
337 The ARM Generic Timer (aka arch-timer) provides an architected
338 interface to a timer source on an SoC.
339 It is mandantory for ARMv8 implementation and widely available
343 bool "Support for ARM SMC Calling Convention (SMCCC)"
344 depends on CPU_V7A || ARM64
347 Say Y here if you want to enable ARM SMC Calling Convention.
348 This should be enabled if U-Boot needs to communicate with system
349 firmware (for example, PSCI) according to SMCCC.
352 bool "support boot from semihosting"
354 In emulated environments, semihosting is a way for
355 the hosted environment to call out to the emulator to
356 retrieve files from the host machine.
358 config SYS_THUMB_BUILD
359 bool "Build U-Boot using the Thumb instruction set"
362 Use this flag to build U-Boot using the Thumb instruction set for
363 ARM architectures. Thumb instruction set provides better code
364 density. For ARM architectures that support Thumb2 this flag will
365 result in Thumb2 code generated by GCC.
367 config SPL_SYS_THUMB_BUILD
368 bool "Build SPL using the Thumb instruction set"
369 default y if SYS_THUMB_BUILD
372 Use this flag to build SPL using the Thumb instruction set for
373 ARM architectures. Thumb instruction set provides better code
374 density. For ARM architectures that support Thumb2 this flag will
375 result in Thumb2 code generated by GCC.
377 config TPL_SYS_THUMB_BUILD
378 bool "Build TPL using the Thumb instruction set"
379 default y if SYS_THUMB_BUILD
380 depends on TPL && !ARM64
382 Use this flag to build SPL using the Thumb instruction set for
383 ARM architectures. Thumb instruction set provides better code
384 density. For ARM architectures that support Thumb2 this flag will
385 result in Thumb2 code generated by GCC.
388 config SYS_L2CACHE_OFF
391 If SoC does not support L2CACHE or one do not want to enable
392 L2CACHE, choose this option.
394 config ENABLE_ARM_SOC_BOOT0_HOOK
395 bool "prepare BOOT0 header"
397 If the SoC's BOOT0 requires a header area filled with (magic)
398 values, then choose this option, and create a file included as
399 <asm/arch/boot0.h> which contains the required assembler code.
401 config ARM_CORTEX_CPU_IS_UP
405 config USE_ARCH_MEMCPY
406 bool "Use an assembly optimized implementation of memcpy"
410 Enable the generation of an optimized version of memcpy.
411 Such implementation may be faster under some conditions
412 but may increase the binary size.
414 config SPL_USE_ARCH_MEMCPY
415 bool "Use an assembly optimized implementation of memcpy for SPL"
416 default y if USE_ARCH_MEMCPY
419 Enable the generation of an optimized version of memcpy.
420 Such implementation may be faster under some conditions
421 but may increase the binary size.
423 config TPL_USE_ARCH_MEMCPY
424 bool "Use an assembly optimized implementation of memcpy for TPL"
425 default y if USE_ARCH_MEMCPY
428 Enable the generation of an optimized version of memcpy.
429 Such implementation may be faster under some conditions
430 but may increase the binary size.
432 config USE_ARCH_MEMSET
433 bool "Use an assembly optimized implementation of memset"
437 Enable the generation of an optimized version of memset.
438 Such implementation may be faster under some conditions
439 but may increase the binary size.
441 config SPL_USE_ARCH_MEMSET
442 bool "Use an assembly optimized implementation of memset for SPL"
443 default y if USE_ARCH_MEMSET
446 Enable the generation of an optimized version of memset.
447 Such implementation may be faster under some conditions
448 but may increase the binary size.
450 config TPL_USE_ARCH_MEMSET
451 bool "Use an assembly optimized implementation of memset for TPL"
452 default y if USE_ARCH_MEMSET
455 Enable the generation of an optimized version of memset.
456 Such implementation may be faster under some conditions
457 but may increase the binary size.
459 config ARM64_SUPPORT_AARCH32
460 bool "ARM64 system support AArch32 execution state"
461 default y if ARM64 && !TARGET_THUNDERX_88XX
463 This ARM64 system supports AArch32 execution state.
466 prompt "Target select"
471 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
473 config TARGET_EDB93XX
474 bool "Support edb93xx"
478 config TARGET_ASPENITE
479 bool "Support aspenite"
483 bool "Support gplugd"
491 Support for TI's DaVinci platform.
494 bool "Marvell Kirkwood"
495 select ARCH_MISC_INIT
496 select BOARD_EARLY_INIT_F
500 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
520 config TARGET_SPEAR300
521 bool "Support spear300"
522 select BOARD_EARLY_INIT_F
527 config TARGET_SPEAR310
528 bool "Support spear310"
529 select BOARD_EARLY_INIT_F
534 config TARGET_SPEAR320
535 bool "Support spear320"
536 select BOARD_EARLY_INIT_F
541 config TARGET_SPEAR600
542 bool "Support spear600"
543 select BOARD_EARLY_INIT_F
548 config TARGET_STV0991
549 bool "Support stv0991"
562 select BOARD_LATE_INIT
567 config TARGET_WOODBURN
568 bool "Support woodburn"
571 config TARGET_WOODBURN_SD
572 bool "Support woodburn_sd"
580 config TARGET_MX35PDK
581 bool "Support mx35pdk"
582 select BOARD_LATE_INIT
586 bool "Broadcom BCM283X family"
592 select SERIAL_SEARCH_ALL
597 bool "Broadcom BCM63158 family"
603 bool "Broadcom BCM6858 family"
608 config TARGET_VEXPRESS_CA15_TC2
609 bool "Support vexpress_ca15_tc2"
611 select CPU_V7_HAS_NONSEC
612 select CPU_V7_HAS_VIRT
616 bool "Broadcom BCM7XXX family"
620 select OF_PRIOR_STAGE
623 This enables support for Broadcom ARM-based set-top box
624 chipsets, including the 7445 family of chips.
626 config TARGET_VEXPRESS_CA5X2
627 bool "Support vexpress_ca5x2"
631 config TARGET_VEXPRESS_CA9X4
632 bool "Support vexpress_ca9x4"
636 config TARGET_BCM23550_W1D
637 bool "Support bcm23550_w1d"
642 config TARGET_BCM28155_AP
643 bool "Support bcm28155_ap"
648 config TARGET_BCMCYGNUS
649 bool "Support bcmcygnus"
652 imply BCM_SF2_ETH_GMAC
660 bool "Support bcmnsp"
664 bool "Support Broadcom Northstar2"
667 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
668 ARMv8 Cortex-A57 processors targeting a broad range of networking
672 bool "Samsung EXYNOS"
681 imply SYS_THUMB_BUILD
686 bool "Samsung S5PC1XX"
695 bool "Calxeda Highbank"
699 config ARCH_INTEGRATOR
700 bool "ARM Ltd. Integrator family"
711 select SYS_ARCH_TIMER
712 select SYS_THUMB_BUILD
718 bool "Texas Instruments' K3 Architecture"
723 config ARCH_OMAP2PLUS
726 select SPL_BOARD_INIT if SPL
727 select SPL_STACK_R if SPL
733 imply DISTRO_DEFAULTS
735 Support for the Meson SoC family developed by Amlogic Inc.,
736 targeted at media players and tablet computers. We currently
737 support the S905 (GXBaby) 64-bit SoC.
745 select SPL_LIBCOMMON_SUPPORT if SPL
746 select SPL_LIBGENERIC_SUPPORT if SPL
747 select SPL_OF_CONTROL if SPL
750 Support for the MediaTek SoCs family developed by MediaTek Inc.
751 Please refer to doc/README.mediatek for more information.
754 bool "NXP LPC32xx platform"
764 bool "NXP i.MX8 platform"
770 bool "NXP i.MX8M platform"
777 bool "NXP i.MX23 family"
788 bool "NXP i.MX28 family"
794 bool "NXP i.MX31 family"
800 select ROM_UNIFIED_SECTIONS
805 select ARCH_MISC_INIT
806 select BOARD_EARLY_INIT_F
808 select SYS_FSL_HAS_SEC if SECURE_BOOT
809 select SYS_FSL_SEC_COMPAT_4
810 select SYS_FSL_SEC_LE
816 select SYS_FSL_HAS_SEC if SECURE_BOOT
817 select SYS_FSL_SEC_COMPAT_4
818 select SYS_FSL_SEC_LE
819 select SYS_THUMB_BUILD if SPL
824 default "arch/arm/mach-omap2/u-boot-spl.lds"
829 select BOARD_EARLY_INIT_F
834 bool "Actions Semi OWL SoCs"
842 bool "QEMU Virtual Platform"
852 bool "Renesas ARM SoCs"
853 select BOARD_EARLY_INIT_F if !RZA1
858 imply SYS_THUMB_BUILD
859 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
861 config TARGET_S32V234EVB
862 bool "Support s32v234evb"
864 select SYS_FSL_ERRATUM_ESDHC111
866 config ARCH_SNAPDRAGON
867 bool "Qualcomm Snapdragon SoCs"
880 bool "Altera SOCFPGA family"
881 select ARCH_EARLY_INIT_R
882 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
883 select ARM64 if TARGET_SOCFPGA_STRATIX10
884 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
887 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
889 select SPL_DM_RESET if DM_RESET
891 select SPL_LIBCOMMON_SUPPORT
892 select SPL_LIBGENERIC_SUPPORT
893 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
894 select SPL_OF_CONTROL
895 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10
896 select SPL_SERIAL_SUPPORT
897 select SPL_WATCHDOG_SUPPORT
900 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
909 imply SPL_LIBDISK_SUPPORT
910 imply SPL_MMC_SUPPORT
911 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
912 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
913 imply SPL_SPI_FLASH_SUPPORT
914 imply SPL_SPI_SUPPORT
918 bool "Support sunxi (Allwinner) SoCs"
921 select CMD_MMC if MMC
922 select CMD_USB if DISTRO_DEFAULTS
929 select DM_SCSI if SCSI
931 select DM_USB if DISTRO_DEFAULTS
932 select OF_BOARD_SETUP
935 select SPECIFY_CONSOLE_INDEX
936 select SPL_STACK_R if SPL
937 select SPL_SYS_MALLOC_SIMPLE if SPL
938 select SPL_SYS_THUMB_BUILD if !ARM64
941 select SYS_THUMB_BUILD if !ARM64
942 select USB if DISTRO_DEFAULTS
943 select USB_KEYBOARD if DISTRO_DEFAULTS
944 select USB_STORAGE if DISTRO_DEFAULTS
945 select USE_TINY_PRINTF
948 imply CMD_UBI if NAND
949 imply DISTRO_DEFAULTS
952 imply OF_LIBFDT_OVERLAY
953 imply PRE_CONSOLE_BUFFER
954 imply SPL_GPIO_SUPPORT
955 imply SPL_LIBCOMMON_SUPPORT
956 imply SPL_LIBGENERIC_SUPPORT
957 imply SPL_MMC_SUPPORT if MMC
958 imply SPL_POWER_SUPPORT
959 imply SPL_SERIAL_SUPPORT
963 bool "Support Xilinx Versal Platform"
973 bool "Freescale Vybrid"
975 select SYS_FSL_ERRATUM_ESDHC111
980 bool "Xilinx Zynq based platform"
981 select BOARD_EARLY_INIT_F if WDT
994 select SPL_BOARD_INIT if SPL
995 select SPL_CLK if SPL
997 select SPL_OF_CONTROL if SPL
998 select SPL_SEPARATE_BSS if SPL
1000 imply ARCH_EARLY_INIT_R
1001 imply BOARD_LATE_INIT
1007 config ARCH_ZYNQMP_R5
1008 bool "Xilinx ZynqMP R5 based platform"
1012 select DM_ETH if NET
1013 select DM_MMC if MMC
1020 bool "Xilinx ZynqMP based platform"
1024 select DM_ETH if NET
1025 select DM_MMC if MMC
1027 select DM_SPI if SPI
1028 select DM_SPI_FLASH if DM_SPI
1029 select DM_USB if USB
1031 select SPL_BOARD_INIT if SPL
1032 select SPL_CLK if SPL
1033 select SPL_SEPARATE_BSS if SPL
1035 imply BOARD_LATE_INIT
1043 imply DISTRO_DEFAULTS
1046 config TARGET_VEXPRESS64_AEMV8A
1047 bool "Support vexpress_aemv8a"
1051 config TARGET_VEXPRESS64_BASE_FVP
1052 bool "Support Versatile Express ARMv8a FVP BASE model"
1057 config TARGET_VEXPRESS64_BASE_FVP_DRAM
1058 bool "Support Versatile Express ARMv8a FVP BASE model booting from DRAM"
1062 This target is derived from TARGET_VEXPRESS64_BASE_FVP and over-rides
1063 the default config to allow the user to load the images directly into
1064 DRAM using model parameters rather than by using semi-hosting to load
1065 the files from the host filesystem.
1067 config TARGET_VEXPRESS64_JUNO
1068 bool "Support Versatile Express Juno Development Platform"
1072 config TARGET_LS2080A_EMU
1073 bool "Support ls2080a_emu"
1075 select ARCH_MISC_INIT
1077 select ARMV8_MULTIENTRY
1078 select FSL_DDR_SYNC_REFRESH
1080 Support for Freescale LS2080A_EMU platform
1081 The LS2080A Development System (EMULATOR) is a pre silicon
1082 development platform that supports the QorIQ LS2080A
1083 Layerscape Architecture processor.
1085 config TARGET_LS2080A_SIMU
1086 bool "Support ls2080a_simu"
1088 select ARCH_MISC_INIT
1090 select ARMV8_MULTIENTRY
1092 Support for Freescale LS2080A_SIMU platform
1093 The LS2080A Development System (QDS) is a pre silicon
1094 development platform that supports the QorIQ LS2080A
1095 Layerscape Architecture processor.
1097 config TARGET_LS1088AQDS
1098 bool "Support ls1088aqds"
1100 select ARCH_MISC_INIT
1102 select ARMV8_MULTIENTRY
1103 select ARCH_SUPPORT_TFABOOT
1104 select BOARD_LATE_INIT
1106 select FSL_DDR_INTERACTIVE if !SD_BOOT
1108 Support for NXP LS1088AQDS platform
1109 The LS1088A Development System (QDS) is a high-performance
1110 development platform that supports the QorIQ LS1088A
1111 Layerscape Architecture processor.
1113 config TARGET_LS2080AQDS
1114 bool "Support ls2080aqds"
1116 select ARCH_MISC_INIT
1118 select ARMV8_MULTIENTRY
1119 select ARCH_SUPPORT_TFABOOT
1120 select BOARD_LATE_INIT
1125 select FSL_DDR_INTERACTIVE if !SPL
1127 Support for Freescale LS2080AQDS platform
1128 The LS2080A Development System (QDS) is a high-performance
1129 development platform that supports the QorIQ LS2080A
1130 Layerscape Architecture processor.
1132 config TARGET_LS2080ARDB
1133 bool "Support ls2080ardb"
1135 select ARCH_MISC_INIT
1137 select ARMV8_MULTIENTRY
1138 select ARCH_SUPPORT_TFABOOT
1139 select BOARD_LATE_INIT
1142 select FSL_DDR_INTERACTIVE if !SPL
1146 Support for Freescale LS2080ARDB platform.
1147 The LS2080A Reference design board (RDB) is a high-performance
1148 development platform that supports the QorIQ LS2080A
1149 Layerscape Architecture processor.
1151 config TARGET_LS2081ARDB
1152 bool "Support ls2081ardb"
1154 select ARCH_MISC_INIT
1156 select ARMV8_MULTIENTRY
1157 select BOARD_LATE_INIT
1160 Support for Freescale LS2081ARDB platform.
1161 The LS2081A Reference design board (RDB) is a high-performance
1162 development platform that supports the QorIQ LS2081A/LS2041A
1163 Layerscape Architecture processor.
1165 config TARGET_LX2160ARDB
1166 bool "Support lx2160ardb"
1168 select ARCH_MISC_INIT
1170 select ARMV8_MULTIENTRY
1171 select ARCH_SUPPORT_TFABOOT
1172 select BOARD_LATE_INIT
1174 Support for NXP LX2160ARDB platform.
1175 The lx2160ardb (LX2160A Reference design board (RDB)
1176 is a high-performance development platform that supports the
1177 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1179 config TARGET_LX2160AQDS
1180 bool "Support lx2160aqds"
1182 select ARCH_MISC_INIT
1184 select ARMV8_MULTIENTRY
1185 select ARCH_SUPPORT_TFABOOT
1186 select BOARD_LATE_INIT
1188 Support for NXP LX2160AQDS platform.
1189 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1190 is a high-performance development platform that supports the
1191 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1194 bool "Support HiKey 96boards Consumer Edition Platform"
1201 select SPECIFY_CONSOLE_INDEX
1204 Support for HiKey 96boards platform. It features a HI6220
1205 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1207 config TARGET_POPLAR
1208 bool "Support Poplar 96boards Enterprise Edition Platform"
1217 Support for Poplar 96boards EE platform. It features a HI3798cv200
1218 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1219 making it capable of running any commercial set-top solution based on
1222 config TARGET_LS1012AQDS
1223 bool "Support ls1012aqds"
1226 select ARCH_SUPPORT_TFABOOT
1227 select BOARD_LATE_INIT
1229 Support for Freescale LS1012AQDS platform.
1230 The LS1012A Development System (QDS) is a high-performance
1231 development platform that supports the QorIQ LS1012A
1232 Layerscape Architecture processor.
1234 config TARGET_LS1012ARDB
1235 bool "Support ls1012ardb"
1238 select ARCH_SUPPORT_TFABOOT
1239 select BOARD_LATE_INIT
1243 Support for Freescale LS1012ARDB platform.
1244 The LS1012A Reference design board (RDB) is a high-performance
1245 development platform that supports the QorIQ LS1012A
1246 Layerscape Architecture processor.
1248 config TARGET_LS1012A2G5RDB
1249 bool "Support ls1012a2g5rdb"
1252 select ARCH_SUPPORT_TFABOOT
1253 select BOARD_LATE_INIT
1256 Support for Freescale LS1012A2G5RDB platform.
1257 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1258 development platform that supports the QorIQ LS1012A
1259 Layerscape Architecture processor.
1261 config TARGET_LS1012AFRWY
1262 bool "Support ls1012afrwy"
1265 select ARCH_SUPPORT_TFABOOT
1266 select BOARD_LATE_INIT
1270 Support for Freescale LS1012AFRWY platform.
1271 The LS1012A FRWY board (FRWY) is a high-performance
1272 development platform that supports the QorIQ LS1012A
1273 Layerscape Architecture processor.
1275 config TARGET_LS1012AFRDM
1276 bool "Support ls1012afrdm"
1279 select ARCH_SUPPORT_TFABOOT
1281 Support for Freescale LS1012AFRDM platform.
1282 The LS1012A Freedom board (FRDM) is a high-performance
1283 development platform that supports the QorIQ LS1012A
1284 Layerscape Architecture processor.
1286 config TARGET_LS1028AQDS
1287 bool "Support ls1028aqds"
1290 select ARMV8_MULTIENTRY
1291 select ARCH_SUPPORT_TFABOOT
1293 Support for Freescale LS1028AQDS platform
1294 The LS1028A Development System (QDS) is a high-performance
1295 development platform that supports the QorIQ LS1028A
1296 Layerscape Architecture processor.
1298 config TARGET_LS1028ARDB
1299 bool "Support ls1028ardb"
1302 select ARMV8_MULTIENTRY
1303 select ARCH_SUPPORT_TFABOOT
1305 Support for Freescale LS1028ARDB platform
1306 The LS1028A Development System (RDB) is a high-performance
1307 development platform that supports the QorIQ LS1028A
1308 Layerscape Architecture processor.
1310 config TARGET_LS1088ARDB
1311 bool "Support ls1088ardb"
1313 select ARCH_MISC_INIT
1315 select ARMV8_MULTIENTRY
1316 select ARCH_SUPPORT_TFABOOT
1317 select BOARD_LATE_INIT
1319 select FSL_DDR_INTERACTIVE if !SD_BOOT
1321 Support for NXP LS1088ARDB platform.
1322 The LS1088A Reference design board (RDB) is a high-performance
1323 development platform that supports the QorIQ LS1088A
1324 Layerscape Architecture processor.
1326 config TARGET_LS1021AQDS
1327 bool "Support ls1021aqds"
1329 select ARCH_SUPPORT_PSCI
1330 select BOARD_EARLY_INIT_F
1331 select BOARD_LATE_INIT
1333 select CPU_V7_HAS_NONSEC
1334 select CPU_V7_HAS_VIRT
1335 select LS1_DEEP_SLEEP
1338 select FSL_DDR_INTERACTIVE
1341 config TARGET_LS1021ATWR
1342 bool "Support ls1021atwr"
1344 select ARCH_SUPPORT_PSCI
1345 select BOARD_EARLY_INIT_F
1346 select BOARD_LATE_INIT
1348 select CPU_V7_HAS_NONSEC
1349 select CPU_V7_HAS_VIRT
1350 select LS1_DEEP_SLEEP
1354 config TARGET_LS1021AIOT
1355 bool "Support ls1021aiot"
1357 select ARCH_SUPPORT_PSCI
1358 select BOARD_LATE_INIT
1360 select CPU_V7_HAS_NONSEC
1361 select CPU_V7_HAS_VIRT
1365 Support for Freescale LS1021AIOT platform.
1366 The LS1021A Freescale board (IOT) is a high-performance
1367 development platform that supports the QorIQ LS1021A
1368 Layerscape Architecture processor.
1370 config TARGET_LS1043AQDS
1371 bool "Support ls1043aqds"
1374 select ARMV8_MULTIENTRY
1375 select ARCH_SUPPORT_TFABOOT
1376 select BOARD_EARLY_INIT_F
1377 select BOARD_LATE_INIT
1379 select FSL_DDR_INTERACTIVE if !SPL
1383 Support for Freescale LS1043AQDS platform.
1385 config TARGET_LS1043ARDB
1386 bool "Support ls1043ardb"
1389 select ARMV8_MULTIENTRY
1390 select ARCH_SUPPORT_TFABOOT
1391 select BOARD_EARLY_INIT_F
1392 select BOARD_LATE_INIT
1395 Support for Freescale LS1043ARDB platform.
1397 config TARGET_LS1046AQDS
1398 bool "Support ls1046aqds"
1401 select ARMV8_MULTIENTRY
1402 select ARCH_SUPPORT_TFABOOT
1403 select BOARD_EARLY_INIT_F
1404 select BOARD_LATE_INIT
1405 select DM_SPI_FLASH if DM_SPI
1407 select FSL_DDR_BIST if !SPL
1408 select FSL_DDR_INTERACTIVE if !SPL
1409 select FSL_DDR_INTERACTIVE if !SPL
1412 Support for Freescale LS1046AQDS platform.
1413 The LS1046A Development System (QDS) is a high-performance
1414 development platform that supports the QorIQ LS1046A
1415 Layerscape Architecture processor.
1417 config TARGET_LS1046ARDB
1418 bool "Support ls1046ardb"
1421 select ARMV8_MULTIENTRY
1422 select ARCH_SUPPORT_TFABOOT
1423 select BOARD_EARLY_INIT_F
1424 select BOARD_LATE_INIT
1425 select DM_SPI_FLASH if DM_SPI
1426 select POWER_MC34VR500
1429 select FSL_DDR_INTERACTIVE if !SPL
1432 Support for Freescale LS1046ARDB platform.
1433 The LS1046A Reference Design Board (RDB) is a high-performance
1434 development platform that supports the QorIQ LS1046A
1435 Layerscape Architecture processor.
1437 config TARGET_LS1046AFRWY
1438 bool "Support ls1046afrwy"
1441 select ARMV8_MULTIENTRY
1442 select ARCH_SUPPORT_TFABOOT
1443 select BOARD_EARLY_INIT_F
1444 select BOARD_LATE_INIT
1445 select DM_SPI_FLASH if DM_SPI
1448 Support for Freescale LS1046AFRWY platform.
1449 The LS1046A Freeway Board (FRWY) is a high-performance
1450 development platform that supports the QorIQ LS1046A
1451 Layerscape Architecture processor.
1453 bool "Support h2200"
1456 config TARGET_COLIBRI_PXA270
1457 bool "Support colibri_pxa270"
1460 config ARCH_UNIPHIER
1461 bool "Socionext UniPhier SoCs"
1462 select BOARD_LATE_INIT
1470 select OF_BOARD_SETUP
1474 select SPL_BOARD_INIT if SPL
1475 select SPL_DM if SPL
1476 select SPL_LIBCOMMON_SUPPORT if SPL
1477 select SPL_LIBGENERIC_SUPPORT if SPL
1478 select SPL_OF_CONTROL if SPL
1479 select SPL_PINCTRL if SPL
1482 imply DISTRO_DEFAULTS
1485 Support for UniPhier SoC family developed by Socionext Inc.
1486 (formerly, System LSI Business Division of Panasonic Corporation)
1489 bool "Support STMicroelectronics STM32 MCU with cortex M"
1496 bool "Support STMicrolectronics SoCs"
1505 Support for STMicroelectronics STiH407/10 SoC family.
1506 This SoC is used on Linaro 96Board STiH410-B2260
1509 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1510 select ARCH_MISC_INIT
1511 select BOARD_LATE_INIT
1520 select OF_SYSTEM_SETUP
1526 select SYS_THUMB_BUILD
1530 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1533 Support for STM32MP SoC family developed by STMicroelectronics,
1534 MPUs based on ARM cortex A core
1535 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1536 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1538 SPL is the unsecure FSBL for the basic boot chain.
1540 config ARCH_ROCKCHIP
1541 bool "Support Rockchip SoCs"
1552 select DM_USB if USB
1553 select ENABLE_ARM_SOC_BOOT0_HOOK
1556 select SPL_DM if SPL
1557 select SPL_SYS_MALLOC_SIMPLE if SPL
1559 select SYS_THUMB_BUILD if !ARM64
1562 imply DEBUG_UART_BOARD_INIT
1563 imply DISTRO_DEFAULTS
1565 imply SARADC_ROCKCHIP
1569 imply USB_FUNCTION_FASTBOOT
1571 config TARGET_THUNDERX_88XX
1572 bool "Support ThunderX 88xx"
1576 select SYS_CACHE_SHIFT_7
1579 bool "Support Aspeed SoCs"
1586 config ARCH_SUPPORT_TFABOOT
1590 bool "Support for booting from TF-A"
1591 depends on ARCH_SUPPORT_TFABOOT
1594 Enabling this will make a U-Boot binary that is capable of being
1597 config TI_SECURE_DEVICE
1598 bool "HS Device Type Support"
1599 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1601 If a high secure (HS) device type is being used, this config
1602 must be set. This option impacts various aspects of the
1603 build system (to create signed boot images that can be
1604 authenticated) and the code. See the doc/README.ti-secure
1605 file for further details.
1607 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1608 config ISW_ENTRY_ADDR
1609 hex "Address in memory or XIP address of bootloader entry point"
1610 default 0x402F4000 if AM43XX
1611 default 0x402F0400 if AM33XX
1612 default 0x40301350 if OMAP54XX
1614 After any reset, the boot ROM searches the boot media for a valid
1615 boot image. For non-XIP devices, the ROM then copies the image into
1616 internal memory. For all boot modes, after the ROM processes the
1617 boot image it eventually computes the entry point address depending
1618 on the device type (secure/non-secure), boot media (xip/non-xip) and
1622 source "arch/arm/mach-aspeed/Kconfig"
1624 source "arch/arm/mach-at91/Kconfig"
1626 source "arch/arm/mach-bcm283x/Kconfig"
1628 source "arch/arm/mach-bcmstb/Kconfig"
1630 source "arch/arm/mach-davinci/Kconfig"
1632 source "arch/arm/mach-exynos/Kconfig"
1634 source "arch/arm/mach-highbank/Kconfig"
1636 source "arch/arm/mach-integrator/Kconfig"
1638 source "arch/arm/mach-k3/Kconfig"
1640 source "arch/arm/mach-keystone/Kconfig"
1642 source "arch/arm/mach-kirkwood/Kconfig"
1644 source "arch/arm/cpu/arm926ejs/lpc32xx/Kconfig"
1646 source "arch/arm/mach-mvebu/Kconfig"
1648 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1650 source "arch/arm/mach-imx/mx2/Kconfig"
1652 source "arch/arm/mach-imx/mx3/Kconfig"
1654 source "arch/arm/mach-imx/mx5/Kconfig"
1656 source "arch/arm/mach-imx/mx6/Kconfig"
1658 source "arch/arm/mach-imx/mx7/Kconfig"
1660 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1662 source "arch/arm/mach-imx/imx8/Kconfig"
1664 source "arch/arm/mach-imx/imx8m/Kconfig"
1666 source "arch/arm/mach-imx/mxs/Kconfig"
1668 source "arch/arm/mach-omap2/Kconfig"
1670 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1672 source "arch/arm/mach-orion5x/Kconfig"
1674 source "arch/arm/mach-owl/Kconfig"
1676 source "arch/arm/mach-rmobile/Kconfig"
1678 source "arch/arm/mach-meson/Kconfig"
1680 source "arch/arm/mach-mediatek/Kconfig"
1682 source "arch/arm/mach-qemu/Kconfig"
1684 source "arch/arm/mach-rockchip/Kconfig"
1686 source "arch/arm/mach-s5pc1xx/Kconfig"
1688 source "arch/arm/mach-snapdragon/Kconfig"
1690 source "arch/arm/mach-socfpga/Kconfig"
1692 source "arch/arm/mach-sti/Kconfig"
1694 source "arch/arm/mach-stm32/Kconfig"
1696 source "arch/arm/mach-stm32mp/Kconfig"
1698 source "arch/arm/mach-sunxi/Kconfig"
1700 source "arch/arm/mach-tegra/Kconfig"
1702 source "arch/arm/mach-uniphier/Kconfig"
1704 source "arch/arm/cpu/armv7/vf610/Kconfig"
1706 source "arch/arm/mach-zynq/Kconfig"
1708 source "arch/arm/mach-zynqmp/Kconfig"
1710 source "arch/arm/mach-versal/Kconfig"
1712 source "arch/arm/mach-zynqmp-r5/Kconfig"
1714 source "arch/arm/cpu/armv7/Kconfig"
1716 source "arch/arm/cpu/armv8/Kconfig"
1718 source "arch/arm/mach-imx/Kconfig"
1720 source "board/bosch/shc/Kconfig"
1721 source "board/bosch/guardian/Kconfig"
1722 source "board/CarMediaLab/flea3/Kconfig"
1723 source "board/Marvell/aspenite/Kconfig"
1724 source "board/Marvell/gplugd/Kconfig"
1725 source "board/armadeus/apf27/Kconfig"
1726 source "board/armltd/vexpress/Kconfig"
1727 source "board/armltd/vexpress64/Kconfig"
1728 source "board/broadcom/bcm23550_w1d/Kconfig"
1729 source "board/broadcom/bcm28155_ap/Kconfig"
1730 source "board/broadcom/bcm963158/Kconfig"
1731 source "board/broadcom/bcm968580xref/Kconfig"
1732 source "board/broadcom/bcmcygnus/Kconfig"
1733 source "board/broadcom/bcmnsp/Kconfig"
1734 source "board/broadcom/bcmns2/Kconfig"
1735 source "board/cavium/thunderx/Kconfig"
1736 source "board/cirrus/edb93xx/Kconfig"
1737 source "board/eets/pdu001/Kconfig"
1738 source "board/emulation/qemu-arm/Kconfig"
1739 source "board/freescale/ls2080a/Kconfig"
1740 source "board/freescale/ls2080aqds/Kconfig"
1741 source "board/freescale/ls2080ardb/Kconfig"
1742 source "board/freescale/ls1088a/Kconfig"
1743 source "board/freescale/ls1028a/Kconfig"
1744 source "board/freescale/ls1021aqds/Kconfig"
1745 source "board/freescale/ls1043aqds/Kconfig"
1746 source "board/freescale/ls1021atwr/Kconfig"
1747 source "board/freescale/ls1021aiot/Kconfig"
1748 source "board/freescale/ls1046aqds/Kconfig"
1749 source "board/freescale/ls1043ardb/Kconfig"
1750 source "board/freescale/ls1046ardb/Kconfig"
1751 source "board/freescale/ls1046afrwy/Kconfig"
1752 source "board/freescale/ls1012aqds/Kconfig"
1753 source "board/freescale/ls1012ardb/Kconfig"
1754 source "board/freescale/ls1012afrdm/Kconfig"
1755 source "board/freescale/lx2160a/Kconfig"
1756 source "board/freescale/mx35pdk/Kconfig"
1757 source "board/freescale/s32v234evb/Kconfig"
1758 source "board/grinn/chiliboard/Kconfig"
1759 source "board/gumstix/pepper/Kconfig"
1760 source "board/h2200/Kconfig"
1761 source "board/hisilicon/hikey/Kconfig"
1762 source "board/hisilicon/poplar/Kconfig"
1763 source "board/isee/igep003x/Kconfig"
1764 source "board/phytec/pcm051/Kconfig"
1765 source "board/silica/pengwyn/Kconfig"
1766 source "board/spear/spear300/Kconfig"
1767 source "board/spear/spear310/Kconfig"
1768 source "board/spear/spear320/Kconfig"
1769 source "board/spear/spear600/Kconfig"
1770 source "board/spear/x600/Kconfig"
1771 source "board/st/stv0991/Kconfig"
1772 source "board/tcl/sl50/Kconfig"
1773 source "board/ucRobotics/bubblegum_96/Kconfig"
1774 source "board/birdland/bav335x/Kconfig"
1775 source "board/toradex/colibri_pxa270/Kconfig"
1776 source "board/variscite/dart_6ul/Kconfig"
1777 source "board/vscom/baltos/Kconfig"
1778 source "board/woodburn/Kconfig"
1779 source "board/xilinx/Kconfig"
1780 source "board/xilinx/zynq/Kconfig"
1781 source "board/xilinx/zynqmp/Kconfig"
1783 source "arch/arm/Kconfig.debug"
1788 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
1789 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
1790 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64