1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed
19 from almost any address. This logic relies on the relocation
20 information that is embedded into the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config SYS_INIT_SP_BSS_OFFSET
26 U-Boot typically uses a hard-coded value for the stack pointer
27 before relocation. Define this option to instead calculate the
28 initial SP at run-time. This is useful to avoid hard-coding addresses
29 into U-Boot, so that can be loaded and executed at arbitrary
30 addresses and thus avoid using arbitrary addresses at runtime. This
31 option's value is the offset added to &_bss_start in order to
32 calculate the stack pointer. This offset should be large enough so
33 that the early malloc region, global data (gd), and early stack usage
34 do not overlap any appended DTB.
36 config LINUX_KERNEL_IMAGE_HEADER
39 Place a Linux kernel image header at the start of the U-Boot binary.
40 The format of the header is described in the Linux kernel source at
41 Documentation/arm64/booting.txt. This feature is useful since the
42 image header reports the amount of memory (BSS and similar) that
43 U-Boot needs to use, but which isn't part of the binary.
45 if LINUX_KERNEL_IMAGE_HEADER
46 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
49 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
50 TEXT_OFFSET value written in to the Linux kernel image header.
56 default y if ARM64 && !POSITION_INDEPENDENT
58 config DMA_ADDR_T_64BIT
68 # Used for compatibility with asm files copied from the kernel
69 config ARM_ASM_UNIFIED
73 # Used for compatibility with asm files copied from the kernel
77 config SYS_ARM_CACHE_CP15
78 bool "CP15 based cache enabling support"
80 Select this if your processor suports enabling caches by using
84 bool "MMU-based Paged Memory Management Support"
85 select SYS_ARM_CACHE_CP15
87 Select if you want MMU-based virtualised addressing space
88 support by paged memory management.
91 bool 'Use the ARM v7 PMSA Compliant MPU'
93 Some ARM systems without an MMU have instead a Memory Protection
94 Unit (MPU) that defines the type and permissions for regions of
96 If your CPU has an MPU then you should choose 'y' here unless you
97 know that you do not want to use the MPU.
99 # If set, the workarounds for these ARM errata are applied early during U-Boot
100 # startup. Note that in general these options force the workarounds to be
101 # applied; no CPU-type/version detection exists, unlike the similar options in
102 # the Linux kernel. Do not set these options unless they apply! Also note that
103 # the following can be machine specific errata. These do have ability to
104 # provide rudimentary version and machine specific checks, but expect no
106 # CONFIG_ARM_ERRATA_430973
107 # CONFIG_ARM_ERRATA_454179
108 # CONFIG_ARM_ERRATA_621766
109 # CONFIG_ARM_ERRATA_798870
110 # CONFIG_ARM_ERRATA_801819
111 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
112 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
114 config ARM_ERRATA_430973
117 config ARM_ERRATA_454179
120 config ARM_ERRATA_621766
123 config ARM_ERRATA_716044
126 config ARM_ERRATA_725233
129 config ARM_ERRATA_742230
132 config ARM_ERRATA_743622
135 config ARM_ERRATA_751472
138 config ARM_ERRATA_761320
141 config ARM_ERRATA_773022
144 config ARM_ERRATA_774769
147 config ARM_ERRATA_794072
150 config ARM_ERRATA_798870
153 config ARM_ERRATA_801819
156 config ARM_ERRATA_826974
159 config ARM_ERRATA_828024
162 config ARM_ERRATA_829520
165 config ARM_ERRATA_833069
168 config ARM_ERRATA_833471
171 config ARM_ERRATA_845369
174 config ARM_ERRATA_852421
177 config ARM_ERRATA_852423
180 config ARM_ERRATA_855873
183 config ARM_CORTEX_A8_CVE_2017_5715
186 config ARM_CORTEX_A15_CVE_2017_5715
191 select SYS_CACHE_SHIFT_5
196 select SYS_CACHE_SHIFT_5
201 select SYS_CACHE_SHIFT_5
206 select SYS_CACHE_SHIFT_5
211 select SYS_CACHE_SHIFT_5
217 select SYS_CACHE_SHIFT_5
224 select SYS_CACHE_SHIFT_6
231 select SYS_CACHE_SHIFT_5
232 select SYS_THUMB_BUILD
238 select SYS_ARM_CACHE_CP15
240 select SYS_CACHE_SHIFT_6
244 select SYS_CACHE_SHIFT_5
249 select SYS_CACHE_SHIFT_5
253 default "arm720t" if CPU_ARM720T
254 default "arm920t" if CPU_ARM920T
255 default "arm926ejs" if CPU_ARM926EJS
256 default "arm946es" if CPU_ARM946ES
257 default "arm1136" if CPU_ARM1136
258 default "arm1176" if CPU_ARM1176
259 default "armv7" if CPU_V7A
260 default "armv7" if CPU_V7R
261 default "armv7m" if CPU_V7M
262 default "pxa" if CPU_PXA
263 default "sa1100" if CPU_SA1100
264 default "armv8" if ARM64
268 default 4 if CPU_ARM720T
269 default 4 if CPU_ARM920T
270 default 5 if CPU_ARM926EJS
271 default 5 if CPU_ARM946ES
272 default 6 if CPU_ARM1136
273 default 6 if CPU_ARM1176
278 default 4 if CPU_SA1100
281 config SYS_CACHE_SHIFT_5
284 config SYS_CACHE_SHIFT_6
287 config SYS_CACHE_SHIFT_7
290 config SYS_CACHELINE_SIZE
292 default 128 if SYS_CACHE_SHIFT_7
293 default 64 if SYS_CACHE_SHIFT_6
294 default 32 if SYS_CACHE_SHIFT_5
296 config SYS_ARCH_TIMER
297 bool "ARM Generic Timer support"
298 depends on CPU_V7A || ARM64
301 The ARM Generic Timer (aka arch-timer) provides an architected
302 interface to a timer source on an SoC.
303 It is mandantory for ARMv8 implementation and widely available
307 bool "Support for ARM SMC Calling Convention (SMCCC)"
308 depends on CPU_V7A || ARM64
311 Say Y here if you want to enable ARM SMC Calling Convention.
312 This should be enabled if U-Boot needs to communicate with system
313 firmware (for example, PSCI) according to SMCCC.
316 bool "support boot from semihosting"
318 In emulated environments, semihosting is a way for
319 the hosted environment to call out to the emulator to
320 retrieve files from the host machine.
322 config SYS_THUMB_BUILD
323 bool "Build U-Boot using the Thumb instruction set"
326 Use this flag to build U-Boot using the Thumb instruction set for
327 ARM architectures. Thumb instruction set provides better code
328 density. For ARM architectures that support Thumb2 this flag will
329 result in Thumb2 code generated by GCC.
331 config SPL_SYS_THUMB_BUILD
332 bool "Build SPL using the Thumb instruction set"
333 default y if SYS_THUMB_BUILD
336 Use this flag to build SPL using the Thumb instruction set for
337 ARM architectures. Thumb instruction set provides better code
338 density. For ARM architectures that support Thumb2 this flag will
339 result in Thumb2 code generated by GCC.
341 config SYS_L2CACHE_OFF
344 If SoC does not support L2CACHE or one do not want to enable
345 L2CACHE, choose this option.
347 config ENABLE_ARM_SOC_BOOT0_HOOK
348 bool "prepare BOOT0 header"
350 If the SoC's BOOT0 requires a header area filled with (magic)
351 values, then choose this option, and create a file included as
352 <asm/arch/boot0.h> which contains the required assembler code.
354 config ARM_CORTEX_CPU_IS_UP
358 config USE_ARCH_MEMCPY
359 bool "Use an assembly optimized implementation of memcpy"
363 Enable the generation of an optimized version of memcpy.
364 Such implementation may be faster under some conditions
365 but may increase the binary size.
367 config SPL_USE_ARCH_MEMCPY
368 bool "Use an assembly optimized implementation of memcpy for SPL"
369 default y if USE_ARCH_MEMCPY
372 Enable the generation of an optimized version of memcpy.
373 Such implementation may be faster under some conditions
374 but may increase the binary size.
376 config USE_ARCH_MEMSET
377 bool "Use an assembly optimized implementation of memset"
381 Enable the generation of an optimized version of memset.
382 Such implementation may be faster under some conditions
383 but may increase the binary size.
385 config SPL_USE_ARCH_MEMSET
386 bool "Use an assembly optimized implementation of memset for SPL"
387 default y if USE_ARCH_MEMSET
390 Enable the generation of an optimized version of memset.
391 Such implementation may be faster under some conditions
392 but may increase the binary size.
394 config ARM64_SUPPORT_AARCH32
395 bool "ARM64 system support AArch32 execution state"
396 default y if ARM64 && !TARGET_THUNDERX_88XX
398 This ARM64 system supports AArch32 execution state.
401 prompt "Target select"
406 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
408 config TARGET_EDB93XX
409 bool "Support edb93xx"
413 config TARGET_ASPENITE
414 bool "Support aspenite"
418 bool "Support gplugd"
426 Support for TI's DaVinci platform.
429 bool "Marvell Kirkwood"
430 select ARCH_MISC_INIT
431 select BOARD_EARLY_INIT_F
435 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
455 config TARGET_SPEAR300
456 bool "Support spear300"
457 select BOARD_EARLY_INIT_F
462 config TARGET_SPEAR310
463 bool "Support spear310"
464 select BOARD_EARLY_INIT_F
469 config TARGET_SPEAR320
470 bool "Support spear320"
471 select BOARD_EARLY_INIT_F
476 config TARGET_SPEAR600
477 bool "Support spear600"
478 select BOARD_EARLY_INIT_F
483 config TARGET_STV0991
484 bool "Support stv0991"
497 select BOARD_LATE_INIT
502 config TARGET_WOODBURN
503 bool "Support woodburn"
506 config TARGET_WOODBURN_SD
507 bool "Support woodburn_sd"
515 config TARGET_MX35PDK
516 bool "Support mx35pdk"
517 select BOARD_LATE_INIT
521 bool "Broadcom BCM283X family"
527 select SERIAL_SEARCH_ALL
532 bool "Broadcom BCM63158 family"
538 bool "Broadcom BCM6858 family"
543 config TARGET_VEXPRESS_CA15_TC2
544 bool "Support vexpress_ca15_tc2"
546 select CPU_V7_HAS_NONSEC
547 select CPU_V7_HAS_VIRT
551 bool "Broadcom BCM7XXX family"
555 select OF_PRIOR_STAGE
558 This enables support for Broadcom ARM-based set-top box
559 chipsets, including the 7445 family of chips.
561 config TARGET_VEXPRESS_CA5X2
562 bool "Support vexpress_ca5x2"
566 config TARGET_VEXPRESS_CA9X4
567 bool "Support vexpress_ca9x4"
571 config TARGET_BCM23550_W1D
572 bool "Support bcm23550_w1d"
577 config TARGET_BCM28155_AP
578 bool "Support bcm28155_ap"
583 config TARGET_BCMCYGNUS
584 bool "Support bcmcygnus"
587 imply BCM_SF2_ETH_GMAC
595 bool "Support bcmnsp"
599 bool "Support Broadcom Northstar2"
602 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
603 ARMv8 Cortex-A57 processors targeting a broad range of networking
607 bool "Samsung EXYNOS"
616 imply SYS_THUMB_BUILD
621 bool "Samsung S5PC1XX"
630 bool "Calxeda Highbank"
634 config ARCH_INTEGRATOR
635 bool "ARM Ltd. Integrator family"
646 select SYS_ARCH_TIMER
647 select SYS_THUMB_BUILD
653 bool "Texas Instruments' K3 Architecture"
658 config ARCH_OMAP2PLUS
661 select SPL_BOARD_INIT if SPL
662 select SPL_STACK_R if SPL
668 imply DISTRO_DEFAULTS
670 Support for the Meson SoC family developed by Amlogic Inc.,
671 targeted at media players and tablet computers. We currently
672 support the S905 (GXBaby) 64-bit SoC.
680 select SPL_LIBCOMMON_SUPPORT if SPL
681 select SPL_LIBGENERIC_SUPPORT if SPL
682 select SPL_OF_CONTROL if SPL
685 Support for the MediaTek SoCs family developed by MediaTek Inc.
686 Please refer to doc/README.mediatek for more information.
689 bool "NXP LPC32xx platform"
699 bool "NXP i.MX8 platform"
705 bool "NXP i.MX8M platform"
712 bool "NXP i.MX23 family"
723 bool "NXP i.MX28 family"
729 bool "NXP i.MX31 family"
735 select ROM_UNIFIED_SECTIONS
740 select ARCH_MISC_INIT
741 select BOARD_EARLY_INIT_F
743 select SYS_FSL_HAS_SEC if SECURE_BOOT
744 select SYS_FSL_SEC_COMPAT_4
745 select SYS_FSL_SEC_LE
751 select SYS_FSL_HAS_SEC if SECURE_BOOT
752 select SYS_FSL_SEC_COMPAT_4
753 select SYS_FSL_SEC_LE
754 select SYS_THUMB_BUILD if SPL
759 default "arch/arm/mach-omap2/u-boot-spl.lds"
764 select BOARD_EARLY_INIT_F
769 bool "Actions Semi OWL SoCs"
777 bool "QEMU Virtual Platform"
787 bool "Renesas ARM SoCs"
788 select BOARD_EARLY_INIT_F
793 imply SYS_THUMB_BUILD
794 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
796 config TARGET_S32V234EVB
797 bool "Support s32v234evb"
799 select SYS_FSL_ERRATUM_ESDHC111
801 config ARCH_SNAPDRAGON
802 bool "Qualcomm Snapdragon SoCs"
815 bool "Altera SOCFPGA family"
816 select ARCH_EARLY_INIT_R
817 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
818 select ARM64 if TARGET_SOCFPGA_STRATIX10
819 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
822 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
824 select SPL_DM_RESET if DM_RESET
826 select SPL_LIBCOMMON_SUPPORT
827 select SPL_LIBGENERIC_SUPPORT
828 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
829 select SPL_OF_CONTROL
830 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10
831 select SPL_SERIAL_SUPPORT
832 select SPL_WATCHDOG_SUPPORT
835 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
842 imply SPL_LIBDISK_SUPPORT
843 imply SPL_MMC_SUPPORT
844 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
845 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
846 imply SPL_SPI_FLASH_SUPPORT
847 imply SPL_SPI_SUPPORT
850 bool "Support sunxi (Allwinner) SoCs"
853 select CMD_MMC if MMC
854 select CMD_USB if DISTRO_DEFAULTS
861 select DM_USB if DISTRO_DEFAULTS
862 select OF_BOARD_SETUP
865 select SPECIFY_CONSOLE_INDEX
866 select SPL_STACK_R if SPL
867 select SPL_SYS_MALLOC_SIMPLE if SPL
868 select SPL_SYS_THUMB_BUILD if !ARM64
870 select SYS_THUMB_BUILD if !ARM64
871 select USB if DISTRO_DEFAULTS
872 select USB_KEYBOARD if DISTRO_DEFAULTS
873 select USB_STORAGE if DISTRO_DEFAULTS
874 select USE_TINY_PRINTF
877 imply CMD_UBI if NAND
878 imply DISTRO_DEFAULTS
881 imply OF_LIBFDT_OVERLAY
882 imply PRE_CONSOLE_BUFFER
883 imply SPL_GPIO_SUPPORT
884 imply SPL_LIBCOMMON_SUPPORT
885 imply SPL_LIBGENERIC_SUPPORT
886 imply SPL_MMC_SUPPORT if MMC
887 imply SPL_POWER_SUPPORT
888 imply SPL_SERIAL_SUPPORT
892 bool "Support Xilinx Versal Platform"
902 bool "Freescale Vybrid"
904 select SYS_FSL_ERRATUM_ESDHC111
909 bool "Xilinx Zynq based platform"
910 select BOARD_EARLY_INIT_F if WDT
923 select SPL_BOARD_INIT if SPL
924 select SPL_CLK if SPL
926 select SPL_OF_CONTROL if SPL
927 select SPL_SEPARATE_BSS if SPL
929 imply ARCH_EARLY_INIT_R
930 imply BOARD_LATE_INIT
936 config ARCH_ZYNQMP_R5
937 bool "Xilinx ZynqMP R5 based platform"
949 bool "Xilinx ZynqMP based platform"
957 select DM_SPI_FLASH if DM_SPI
960 select SPL_BOARD_INIT if SPL
961 select SPL_CLK if SPL
962 select SPL_SEPARATE_BSS if SPL
964 imply BOARD_LATE_INIT
972 imply DISTRO_DEFAULTS
975 config TARGET_VEXPRESS64_AEMV8A
976 bool "Support vexpress_aemv8a"
980 config TARGET_VEXPRESS64_BASE_FVP
981 bool "Support Versatile Express ARMv8a FVP BASE model"
986 config TARGET_VEXPRESS64_BASE_FVP_DRAM
987 bool "Support Versatile Express ARMv8a FVP BASE model booting from DRAM"
991 This target is derived from TARGET_VEXPRESS64_BASE_FVP and over-rides
992 the default config to allow the user to load the images directly into
993 DRAM using model parameters rather than by using semi-hosting to load
994 the files from the host filesystem.
996 config TARGET_VEXPRESS64_JUNO
997 bool "Support Versatile Express Juno Development Platform"
1001 config TARGET_LS2080A_EMU
1002 bool "Support ls2080a_emu"
1004 select ARCH_MISC_INIT
1006 select ARMV8_MULTIENTRY
1007 select FSL_DDR_SYNC_REFRESH
1009 Support for Freescale LS2080A_EMU platform
1010 The LS2080A Development System (EMULATOR) is a pre silicon
1011 development platform that supports the QorIQ LS2080A
1012 Layerscape Architecture processor.
1014 config TARGET_LS2080A_SIMU
1015 bool "Support ls2080a_simu"
1017 select ARCH_MISC_INIT
1019 select ARMV8_MULTIENTRY
1021 Support for Freescale LS2080A_SIMU platform
1022 The LS2080A Development System (QDS) is a pre silicon
1023 development platform that supports the QorIQ LS2080A
1024 Layerscape Architecture processor.
1026 config TARGET_LS1088AQDS
1027 bool "Support ls1088aqds"
1029 select ARCH_MISC_INIT
1031 select ARMV8_MULTIENTRY
1032 select BOARD_LATE_INIT
1034 select FSL_DDR_INTERACTIVE if !SD_BOOT
1036 Support for NXP LS1088AQDS platform
1037 The LS1088A Development System (QDS) is a high-performance
1038 development platform that supports the QorIQ LS1088A
1039 Layerscape Architecture processor.
1041 config TARGET_LS2080AQDS
1042 bool "Support ls2080aqds"
1044 select ARCH_MISC_INIT
1046 select ARMV8_MULTIENTRY
1047 select BOARD_LATE_INIT
1052 select FSL_DDR_INTERACTIVE if !SPL
1054 Support for Freescale LS2080AQDS platform
1055 The LS2080A Development System (QDS) is a high-performance
1056 development platform that supports the QorIQ LS2080A
1057 Layerscape Architecture processor.
1059 config TARGET_LS2080ARDB
1060 bool "Support ls2080ardb"
1062 select ARCH_MISC_INIT
1064 select ARMV8_MULTIENTRY
1065 select BOARD_LATE_INIT
1068 select FSL_DDR_INTERACTIVE if !SPL
1072 Support for Freescale LS2080ARDB platform.
1073 The LS2080A Reference design board (RDB) is a high-performance
1074 development platform that supports the QorIQ LS2080A
1075 Layerscape Architecture processor.
1077 config TARGET_LS2081ARDB
1078 bool "Support ls2081ardb"
1080 select ARCH_MISC_INIT
1082 select ARMV8_MULTIENTRY
1083 select BOARD_LATE_INIT
1086 Support for Freescale LS2081ARDB platform.
1087 The LS2081A Reference design board (RDB) is a high-performance
1088 development platform that supports the QorIQ LS2081A/LS2041A
1089 Layerscape Architecture processor.
1091 config TARGET_LX2160ARDB
1092 bool "Support lx2160ardb"
1094 select ARCH_MISC_INIT
1096 select ARMV8_MULTIENTRY
1097 select BOARD_LATE_INIT
1099 Support for NXP LX2160ARDB platform.
1100 The lx2160ardb (LX2160A Reference design board (RDB)
1101 is a high-performance development platform that supports the
1102 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1104 config TARGET_LX2160AQDS
1105 bool "Support lx2160aqds"
1107 select ARCH_MISC_INIT
1109 select ARMV8_MULTIENTRY
1110 select BOARD_LATE_INIT
1112 Support for NXP LX2160AQDS platform.
1113 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1114 is a high-performance development platform that supports the
1115 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1118 bool "Support HiKey 96boards Consumer Edition Platform"
1125 select SPECIFY_CONSOLE_INDEX
1128 Support for HiKey 96boards platform. It features a HI6220
1129 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1131 config TARGET_POPLAR
1132 bool "Support Poplar 96boards Enterprise Edition Platform"
1141 Support for Poplar 96boards EE platform. It features a HI3798cv200
1142 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1143 making it capable of running any commercial set-top solution based on
1146 config TARGET_LS1012AQDS
1147 bool "Support ls1012aqds"
1150 select BOARD_LATE_INIT
1152 Support for Freescale LS1012AQDS platform.
1153 The LS1012A Development System (QDS) is a high-performance
1154 development platform that supports the QorIQ LS1012A
1155 Layerscape Architecture processor.
1157 config TARGET_LS1012ARDB
1158 bool "Support ls1012ardb"
1161 select BOARD_LATE_INIT
1165 Support for Freescale LS1012ARDB platform.
1166 The LS1012A Reference design board (RDB) is a high-performance
1167 development platform that supports the QorIQ LS1012A
1168 Layerscape Architecture processor.
1170 config TARGET_LS1012A2G5RDB
1171 bool "Support ls1012a2g5rdb"
1174 select BOARD_LATE_INIT
1177 Support for Freescale LS1012A2G5RDB platform.
1178 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1179 development platform that supports the QorIQ LS1012A
1180 Layerscape Architecture processor.
1182 config TARGET_LS1012AFRWY
1183 bool "Support ls1012afrwy"
1186 select BOARD_LATE_INIT
1190 Support for Freescale LS1012AFRWY platform.
1191 The LS1012A FRWY board (FRWY) is a high-performance
1192 development platform that supports the QorIQ LS1012A
1193 Layerscape Architecture processor.
1195 config TARGET_LS1012AFRDM
1196 bool "Support ls1012afrdm"
1200 Support for Freescale LS1012AFRDM platform.
1201 The LS1012A Freedom board (FRDM) is a high-performance
1202 development platform that supports the QorIQ LS1012A
1203 Layerscape Architecture processor.
1205 config TARGET_LS1088ARDB
1206 bool "Support ls1088ardb"
1208 select ARCH_MISC_INIT
1210 select ARMV8_MULTIENTRY
1211 select BOARD_LATE_INIT
1213 select FSL_DDR_INTERACTIVE if !SD_BOOT
1215 Support for NXP LS1088ARDB platform.
1216 The LS1088A Reference design board (RDB) is a high-performance
1217 development platform that supports the QorIQ LS1088A
1218 Layerscape Architecture processor.
1220 config TARGET_LS1021AQDS
1221 bool "Support ls1021aqds"
1223 select ARCH_SUPPORT_PSCI
1224 select BOARD_EARLY_INIT_F
1225 select BOARD_LATE_INIT
1227 select CPU_V7_HAS_NONSEC
1228 select CPU_V7_HAS_VIRT
1229 select LS1_DEEP_SLEEP
1232 select FSL_DDR_INTERACTIVE
1235 config TARGET_LS1021ATWR
1236 bool "Support ls1021atwr"
1238 select ARCH_SUPPORT_PSCI
1239 select BOARD_EARLY_INIT_F
1240 select BOARD_LATE_INIT
1242 select CPU_V7_HAS_NONSEC
1243 select CPU_V7_HAS_VIRT
1244 select LS1_DEEP_SLEEP
1248 config TARGET_LS1021AIOT
1249 bool "Support ls1021aiot"
1251 select ARCH_SUPPORT_PSCI
1252 select BOARD_LATE_INIT
1254 select CPU_V7_HAS_NONSEC
1255 select CPU_V7_HAS_VIRT
1259 Support for Freescale LS1021AIOT platform.
1260 The LS1021A Freescale board (IOT) is a high-performance
1261 development platform that supports the QorIQ LS1021A
1262 Layerscape Architecture processor.
1264 config TARGET_LS1043AQDS
1265 bool "Support ls1043aqds"
1268 select ARMV8_MULTIENTRY
1269 select BOARD_EARLY_INIT_F
1270 select BOARD_LATE_INIT
1272 select FSL_DDR_INTERACTIVE if !SPL
1276 Support for Freescale LS1043AQDS platform.
1278 config TARGET_LS1043ARDB
1279 bool "Support ls1043ardb"
1282 select ARMV8_MULTIENTRY
1283 select BOARD_EARLY_INIT_F
1284 select BOARD_LATE_INIT
1287 Support for Freescale LS1043ARDB platform.
1289 config TARGET_LS1046AQDS
1290 bool "Support ls1046aqds"
1293 select ARMV8_MULTIENTRY
1294 select BOARD_EARLY_INIT_F
1295 select BOARD_LATE_INIT
1296 select DM_SPI_FLASH if DM_SPI
1298 select FSL_DDR_BIST if !SPL
1299 select FSL_DDR_INTERACTIVE if !SPL
1300 select FSL_DDR_INTERACTIVE if !SPL
1303 Support for Freescale LS1046AQDS platform.
1304 The LS1046A Development System (QDS) is a high-performance
1305 development platform that supports the QorIQ LS1046A
1306 Layerscape Architecture processor.
1308 config TARGET_LS1046ARDB
1309 bool "Support ls1046ardb"
1312 select ARMV8_MULTIENTRY
1313 select BOARD_EARLY_INIT_F
1314 select BOARD_LATE_INIT
1315 select DM_SPI_FLASH if DM_SPI
1316 select POWER_MC34VR500
1319 select FSL_DDR_INTERACTIVE if !SPL
1322 Support for Freescale LS1046ARDB platform.
1323 The LS1046A Reference Design Board (RDB) is a high-performance
1324 development platform that supports the QorIQ LS1046A
1325 Layerscape Architecture processor.
1328 bool "Support h2200"
1331 config TARGET_ZIPITZ2
1332 bool "Support zipitz2"
1335 config TARGET_COLIBRI_PXA270
1336 bool "Support colibri_pxa270"
1339 config ARCH_UNIPHIER
1340 bool "Socionext UniPhier SoCs"
1341 select BOARD_LATE_INIT
1349 select OF_BOARD_SETUP
1353 select SPL_BOARD_INIT if SPL
1354 select SPL_DM if SPL
1355 select SPL_LIBCOMMON_SUPPORT if SPL
1356 select SPL_LIBGENERIC_SUPPORT if SPL
1357 select SPL_OF_CONTROL if SPL
1358 select SPL_PINCTRL if SPL
1361 imply DISTRO_DEFAULTS
1364 Support for UniPhier SoC family developed by Socionext Inc.
1365 (formerly, System LSI Business Division of Panasonic Corporation)
1368 bool "Support STMicroelectronics STM32 MCU with cortex M"
1375 bool "Support STMicrolectronics SoCs"
1384 Support for STMicroelectronics STiH407/10 SoC family.
1385 This SoC is used on Linaro 96Board STiH410-B2260
1388 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1389 select ARCH_MISC_INIT
1390 select BOARD_LATE_INIT
1404 select SYS_THUMB_BUILD
1407 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1409 Support for STM32MP SoC family developed by STMicroelectronics,
1410 MPUs based on ARM cortex A core
1411 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1412 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1414 SPL is the unsecure FSBL for the basic boot chain.
1416 config ARCH_ROCKCHIP
1417 bool "Support Rockchip SoCs"
1428 select DM_USB if USB
1429 select ENABLE_ARM_SOC_BOOT0_HOOK
1432 select SPL_DM if SPL
1433 select SPL_SYS_MALLOC_SIMPLE if SPL
1435 select SYS_THUMB_BUILD if !ARM64
1438 imply DISTRO_DEFAULTS
1440 imply SARADC_ROCKCHIP
1444 imply USB_FUNCTION_FASTBOOT
1446 config TARGET_THUNDERX_88XX
1447 bool "Support ThunderX 88xx"
1451 select SYS_CACHE_SHIFT_7
1454 bool "Support Aspeed SoCs"
1461 config TI_SECURE_DEVICE
1462 bool "HS Device Type Support"
1463 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS
1465 If a high secure (HS) device type is being used, this config
1466 must be set. This option impacts various aspects of the
1467 build system (to create signed boot images that can be
1468 authenticated) and the code. See the doc/README.ti-secure
1469 file for further details.
1471 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1472 config ISW_ENTRY_ADDR
1473 hex "Address in memory or XIP address of bootloader entry point"
1474 default 0x402F4000 if AM43XX
1475 default 0x402F0400 if AM33XX
1476 default 0x40301350 if OMAP54XX
1478 After any reset, the boot ROM searches the boot media for a valid
1479 boot image. For non-XIP devices, the ROM then copies the image into
1480 internal memory. For all boot modes, after the ROM processes the
1481 boot image it eventually computes the entry point address depending
1482 on the device type (secure/non-secure), boot media (xip/non-xip) and
1486 source "arch/arm/mach-aspeed/Kconfig"
1488 source "arch/arm/mach-at91/Kconfig"
1490 source "arch/arm/mach-bcm283x/Kconfig"
1492 source "arch/arm/mach-bcmstb/Kconfig"
1494 source "arch/arm/mach-davinci/Kconfig"
1496 source "arch/arm/mach-exynos/Kconfig"
1498 source "arch/arm/mach-highbank/Kconfig"
1500 source "arch/arm/mach-integrator/Kconfig"
1502 source "arch/arm/mach-k3/Kconfig"
1504 source "arch/arm/mach-keystone/Kconfig"
1506 source "arch/arm/mach-kirkwood/Kconfig"
1508 source "arch/arm/cpu/arm926ejs/lpc32xx/Kconfig"
1510 source "arch/arm/mach-mvebu/Kconfig"
1512 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1514 source "arch/arm/mach-imx/mx2/Kconfig"
1516 source "arch/arm/mach-imx/mx3/Kconfig"
1518 source "arch/arm/mach-imx/mx5/Kconfig"
1520 source "arch/arm/mach-imx/mx6/Kconfig"
1522 source "arch/arm/mach-imx/mx7/Kconfig"
1524 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1526 source "arch/arm/mach-imx/imx8/Kconfig"
1528 source "arch/arm/mach-imx/imx8m/Kconfig"
1530 source "arch/arm/mach-imx/mxs/Kconfig"
1532 source "arch/arm/mach-omap2/Kconfig"
1534 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1536 source "arch/arm/mach-orion5x/Kconfig"
1538 source "arch/arm/mach-owl/Kconfig"
1540 source "arch/arm/mach-rmobile/Kconfig"
1542 source "arch/arm/mach-meson/Kconfig"
1544 source "arch/arm/mach-mediatek/Kconfig"
1546 source "arch/arm/mach-qemu/Kconfig"
1548 source "arch/arm/mach-rockchip/Kconfig"
1550 source "arch/arm/mach-s5pc1xx/Kconfig"
1552 source "arch/arm/mach-snapdragon/Kconfig"
1554 source "arch/arm/mach-socfpga/Kconfig"
1556 source "arch/arm/mach-sti/Kconfig"
1558 source "arch/arm/mach-stm32/Kconfig"
1560 source "arch/arm/mach-stm32mp/Kconfig"
1562 source "arch/arm/mach-sunxi/Kconfig"
1564 source "arch/arm/mach-tegra/Kconfig"
1566 source "arch/arm/mach-uniphier/Kconfig"
1568 source "arch/arm/cpu/armv7/vf610/Kconfig"
1570 source "arch/arm/mach-zynq/Kconfig"
1572 source "arch/arm/mach-zynqmp/Kconfig"
1574 source "arch/arm/mach-versal/Kconfig"
1576 source "arch/arm/mach-zynqmp-r5/Kconfig"
1578 source "arch/arm/cpu/armv7/Kconfig"
1580 source "arch/arm/cpu/armv8/Kconfig"
1582 source "arch/arm/mach-imx/Kconfig"
1584 source "board/bosch/shc/Kconfig"
1585 source "board/bosch/guardian/Kconfig"
1586 source "board/CarMediaLab/flea3/Kconfig"
1587 source "board/Marvell/aspenite/Kconfig"
1588 source "board/Marvell/gplugd/Kconfig"
1589 source "board/armadeus/apf27/Kconfig"
1590 source "board/armltd/vexpress/Kconfig"
1591 source "board/armltd/vexpress64/Kconfig"
1592 source "board/broadcom/bcm23550_w1d/Kconfig"
1593 source "board/broadcom/bcm28155_ap/Kconfig"
1594 source "board/broadcom/bcm963158/Kconfig"
1595 source "board/broadcom/bcm968580xref/Kconfig"
1596 source "board/broadcom/bcmcygnus/Kconfig"
1597 source "board/broadcom/bcmnsp/Kconfig"
1598 source "board/broadcom/bcmns2/Kconfig"
1599 source "board/cavium/thunderx/Kconfig"
1600 source "board/cirrus/edb93xx/Kconfig"
1601 source "board/eets/pdu001/Kconfig"
1602 source "board/emulation/qemu-arm/Kconfig"
1603 source "board/freescale/ls2080a/Kconfig"
1604 source "board/freescale/ls2080aqds/Kconfig"
1605 source "board/freescale/ls2080ardb/Kconfig"
1606 source "board/freescale/ls1088a/Kconfig"
1607 source "board/freescale/ls1021aqds/Kconfig"
1608 source "board/freescale/ls1043aqds/Kconfig"
1609 source "board/freescale/ls1021atwr/Kconfig"
1610 source "board/freescale/ls1021aiot/Kconfig"
1611 source "board/freescale/ls1046aqds/Kconfig"
1612 source "board/freescale/ls1043ardb/Kconfig"
1613 source "board/freescale/ls1046ardb/Kconfig"
1614 source "board/freescale/ls1012aqds/Kconfig"
1615 source "board/freescale/ls1012ardb/Kconfig"
1616 source "board/freescale/ls1012afrdm/Kconfig"
1617 source "board/freescale/lx2160a/Kconfig"
1618 source "board/freescale/mx35pdk/Kconfig"
1619 source "board/freescale/s32v234evb/Kconfig"
1620 source "board/grinn/chiliboard/Kconfig"
1621 source "board/gumstix/pepper/Kconfig"
1622 source "board/h2200/Kconfig"
1623 source "board/hisilicon/hikey/Kconfig"
1624 source "board/hisilicon/poplar/Kconfig"
1625 source "board/isee/igep003x/Kconfig"
1626 source "board/phytec/pcm051/Kconfig"
1627 source "board/silica/pengwyn/Kconfig"
1628 source "board/spear/spear300/Kconfig"
1629 source "board/spear/spear310/Kconfig"
1630 source "board/spear/spear320/Kconfig"
1631 source "board/spear/spear600/Kconfig"
1632 source "board/spear/x600/Kconfig"
1633 source "board/st/stv0991/Kconfig"
1634 source "board/tcl/sl50/Kconfig"
1635 source "board/ucRobotics/bubblegum_96/Kconfig"
1636 source "board/birdland/bav335x/Kconfig"
1637 source "board/toradex/colibri_pxa270/Kconfig"
1638 source "board/vscom/baltos/Kconfig"
1639 source "board/woodburn/Kconfig"
1640 source "board/xilinx/Kconfig"
1641 source "board/xilinx/zynq/Kconfig"
1642 source "board/xilinx/zynqmp/Kconfig"
1643 source "board/zipitz2/Kconfig"
1645 source "arch/arm/Kconfig.debug"
1650 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
1651 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
1652 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64