1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed from
19 almost any 4K aligned address. This logic relies on the relocation
20 information that is embedded in the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
25 default n if ARCH_QEMU
26 default y if POSITION_INDEPENDENT
28 U-Boot typically uses a hard-coded value for the stack pointer
29 before relocation. Enable this option to instead calculate the
30 initial SP at run-time. This is useful to avoid hard-coding addresses
31 into U-Boot, so that it can be loaded and executed at arbitrary
32 addresses and thus avoid using arbitrary addresses at runtime.
34 If this option is enabled, the early stack pointer is set to
35 &_bss_start with a offset value added. The offset is specified by
36 SYS_INIT_SP_BSS_OFFSET.
38 config SYS_INIT_SP_BSS_OFFSET
39 int "Early stack offset from the .bss base address"
40 depends on INIT_SP_RELATIVE
43 This option's value is the offset added to &_bss_start in order to
44 calculate the stack pointer. This offset should be large enough so
45 that the early malloc region, global data (gd), and early stack usage
46 do not overlap any appended DTB.
48 config LINUX_KERNEL_IMAGE_HEADER
51 Place a Linux kernel image header at the start of the U-Boot binary.
52 The format of the header is described in the Linux kernel source at
53 Documentation/arm64/booting.txt. This feature is useful since the
54 image header reports the amount of memory (BSS and similar) that
55 U-Boot needs to use, but which isn't part of the binary.
57 if LINUX_KERNEL_IMAGE_HEADER
58 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
61 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
62 TEXT_OFFSET value written to the Linux kernel image header.
71 ARM GICV3 Interrupt translation service (ITS).
72 Basic support for programming locality specific peripheral
73 interrupts (LPI) configuration tables and enable LPI tables.
74 LPI configuration table can be used by u-boot or Linux.
75 ARM GICV3 has limitation, once the LPI table is enabled, LPI
76 configuration table can not be re-programmed, unless GICV3 reset.
82 config DMA_ADDR_T_64BIT
92 # Used for compatibility with asm files copied from the kernel
93 config ARM_ASM_UNIFIED
97 # Used for compatibility with asm files copied from the kernel
101 config SYS_ICACHE_OFF
102 bool "Do not enable icache"
105 Do not enable instruction cache in U-Boot.
107 config SPL_SYS_ICACHE_OFF
108 bool "Do not enable icache in SPL"
110 default SYS_ICACHE_OFF
112 Do not enable instruction cache in SPL.
114 config SYS_DCACHE_OFF
115 bool "Do not enable dcache"
118 Do not enable data cache in U-Boot.
120 config SPL_SYS_DCACHE_OFF
121 bool "Do not enable dcache in SPL"
123 default SYS_DCACHE_OFF
125 Do not enable data cache in SPL.
127 config SYS_ARM_CACHE_CP15
128 bool "CP15 based cache enabling support"
130 Select this if your processor suports enabling caches by using
134 bool "MMU-based Paged Memory Management Support"
135 select SYS_ARM_CACHE_CP15
137 Select if you want MMU-based virtualised addressing space
138 support via paged memory management.
141 bool 'Use the ARM v7 PMSA Compliant MPU'
143 Some ARM systems without an MMU have instead a Memory Protection
144 Unit (MPU) that defines the type and permissions for regions of
146 If your CPU has an MPU then you should choose 'y' here unless you
147 know that you do not want to use the MPU.
149 # If set, the workarounds for these ARM errata are applied early during U-Boot
150 # startup. Note that in general these options force the workarounds to be
151 # applied; no CPU-type/version detection exists, unlike the similar options in
152 # the Linux kernel. Do not set these options unless they apply! Also note that
153 # the following can be machine-specific errata. These do have ability to
154 # provide rudimentary version and machine-specific checks, but expect no
156 # CONFIG_ARM_ERRATA_430973
157 # CONFIG_ARM_ERRATA_454179
158 # CONFIG_ARM_ERRATA_621766
159 # CONFIG_ARM_ERRATA_798870
160 # CONFIG_ARM_ERRATA_801819
161 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
162 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
164 config ARM_ERRATA_430973
167 config ARM_ERRATA_454179
170 config ARM_ERRATA_621766
173 config ARM_ERRATA_716044
176 config ARM_ERRATA_725233
179 config ARM_ERRATA_742230
182 config ARM_ERRATA_743622
185 config ARM_ERRATA_751472
188 config ARM_ERRATA_761320
191 config ARM_ERRATA_773022
194 config ARM_ERRATA_774769
197 config ARM_ERRATA_794072
200 config ARM_ERRATA_798870
203 config ARM_ERRATA_801819
206 config ARM_ERRATA_826974
209 config ARM_ERRATA_828024
212 config ARM_ERRATA_829520
215 config ARM_ERRATA_833069
218 config ARM_ERRATA_833471
221 config ARM_ERRATA_845369
224 config ARM_ERRATA_852421
227 config ARM_ERRATA_852423
230 config ARM_ERRATA_855873
233 config ARM_CORTEX_A8_CVE_2017_5715
236 config ARM_CORTEX_A15_CVE_2017_5715
241 select SYS_CACHE_SHIFT_5
246 select SYS_CACHE_SHIFT_5
251 select SYS_CACHE_SHIFT_5
256 select SYS_CACHE_SHIFT_5
261 select SYS_CACHE_SHIFT_5
267 select SYS_CACHE_SHIFT_5
274 select SYS_CACHE_SHIFT_6
281 select SYS_CACHE_SHIFT_5
282 select SYS_THUMB_BUILD
288 select SYS_ARM_CACHE_CP15
290 select SYS_CACHE_SHIFT_6
294 select SYS_CACHE_SHIFT_5
299 select SYS_CACHE_SHIFT_5
303 default "arm720t" if CPU_ARM720T
304 default "arm920t" if CPU_ARM920T
305 default "arm926ejs" if CPU_ARM926EJS
306 default "arm946es" if CPU_ARM946ES
307 default "arm1136" if CPU_ARM1136
308 default "arm1176" if CPU_ARM1176
309 default "armv7" if CPU_V7A
310 default "armv7" if CPU_V7R
311 default "armv7m" if CPU_V7M
312 default "pxa" if CPU_PXA
313 default "sa1100" if CPU_SA1100
314 default "armv8" if ARM64
318 default 4 if CPU_ARM720T
319 default 4 if CPU_ARM920T
320 default 5 if CPU_ARM926EJS
321 default 5 if CPU_ARM946ES
322 default 6 if CPU_ARM1136
323 default 6 if CPU_ARM1176
328 default 4 if CPU_SA1100
331 config SYS_CACHE_SHIFT_5
334 config SYS_CACHE_SHIFT_6
337 config SYS_CACHE_SHIFT_7
340 config SYS_CACHELINE_SIZE
342 default 128 if SYS_CACHE_SHIFT_7
343 default 64 if SYS_CACHE_SHIFT_6
344 default 32 if SYS_CACHE_SHIFT_5
347 prompt "Select the ARM data write cache policy"
348 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
349 TARGET_BCMNSP || CPU_PXA || RZA1
350 default SYS_ARM_CACHE_WRITEBACK
352 config SYS_ARM_CACHE_WRITEBACK
353 bool "Write-back (WB)"
355 A write updates the cache only and marks the cache line as dirty.
356 External memory is updated only when the line is evicted or explicitly
359 config SYS_ARM_CACHE_WRITETHROUGH
360 bool "Write-through (WT)"
362 A write updates both the cache and the external memory system.
363 This does not mark the cache line as dirty.
365 config SYS_ARM_CACHE_WRITEALLOC
366 bool "Write allocation (WA)"
368 A cache line is allocated on a write miss. This means that executing a
369 store instruction on the processor might cause a burst read to occur.
370 There is a linefill to obtain the data for the cache line, before the
375 bool "Enable ARCH_CPU_INIT"
377 Some architectures require a call to arch_cpu_init().
378 Say Y here to enable it
380 config SYS_ARCH_TIMER
381 bool "ARM Generic Timer support"
382 depends on CPU_V7A || ARM64
385 The ARM Generic Timer (aka arch-timer) provides an architected
386 interface to a timer source on an SoC.
387 It is mandatory for ARMv8 implementation and widely available
391 bool "Support for ARM SMC Calling Convention (SMCCC)"
392 depends on CPU_V7A || ARM64
395 Say Y here if you want to enable ARM SMC Calling Convention.
396 This should be enabled if U-Boot needs to communicate with system
397 firmware (for example, PSCI) according to SMCCC.
400 bool "support boot from semihosting"
402 In emulated environments, semihosting is a way for
403 the hosted environment to call out to the emulator to
404 retrieve files from the host machine.
406 config SYS_THUMB_BUILD
407 bool "Build U-Boot using the Thumb instruction set"
410 Use this flag to build U-Boot using the Thumb instruction set for
411 ARM architectures. Thumb instruction set provides better code
412 density. For ARM architectures that support Thumb2 this flag will
413 result in Thumb2 code generated by GCC.
415 config SPL_SYS_THUMB_BUILD
416 bool "Build SPL using the Thumb instruction set"
417 default y if SYS_THUMB_BUILD
418 depends on !ARM64 && SPL
420 Use this flag to build SPL using the Thumb instruction set for
421 ARM architectures. Thumb instruction set provides better code
422 density. For ARM architectures that support Thumb2 this flag will
423 result in Thumb2 code generated by GCC.
425 config TPL_SYS_THUMB_BUILD
426 bool "Build TPL using the Thumb instruction set"
427 default y if SYS_THUMB_BUILD
428 depends on TPL && !ARM64
430 Use this flag to build TPL using the Thumb instruction set for
431 ARM architectures. Thumb instruction set provides better code
432 density. For ARM architectures that support Thumb2 this flag will
433 result in Thumb2 code generated by GCC.
436 config SYS_L2CACHE_OFF
439 If SoC does not support L2CACHE or one does not want to enable
440 L2CACHE, choose this option.
442 config ENABLE_ARM_SOC_BOOT0_HOOK
443 bool "prepare BOOT0 header"
445 If the SoC's BOOT0 requires a header area filled with (magic)
446 values, then choose this option, and create a file included as
447 <asm/arch/boot0.h> which contains the required assembler code.
449 config ARM_CORTEX_CPU_IS_UP
453 config USE_ARCH_MEMCPY
454 bool "Use an assembly optimized implementation of memcpy"
458 Enable the generation of an optimized version of memcpy.
459 Such an implementation may be faster under some conditions
460 but may increase the binary size.
462 config SPL_USE_ARCH_MEMCPY
463 bool "Use an assembly optimized implementation of memcpy for SPL"
464 default y if USE_ARCH_MEMCPY
465 depends on !ARM64 && SPL
467 Enable the generation of an optimized version of memcpy.
468 Such an implementation may be faster under some conditions
469 but may increase the binary size.
471 config TPL_USE_ARCH_MEMCPY
472 bool "Use an assembly optimized implementation of memcpy for TPL"
473 default y if USE_ARCH_MEMCPY
474 depends on !ARM64 && TPL
476 Enable the generation of an optimized version of memcpy.
477 Such an implementation may be faster under some conditions
478 but may increase the binary size.
480 config USE_ARCH_MEMSET
481 bool "Use an assembly optimized implementation of memset"
485 Enable the generation of an optimized version of memset.
486 Such an implementation may be faster under some conditions
487 but may increase the binary size.
489 config SPL_USE_ARCH_MEMSET
490 bool "Use an assembly optimized implementation of memset for SPL"
491 default y if USE_ARCH_MEMSET
492 depends on !ARM64 && SPL
494 Enable the generation of an optimized version of memset.
495 Such an implementation may be faster under some conditions
496 but may increase the binary size.
498 config TPL_USE_ARCH_MEMSET
499 bool "Use an assembly optimized implementation of memset for TPL"
500 default y if USE_ARCH_MEMSET
501 depends on !ARM64 && TPL
503 Enable the generation of an optimized version of memset.
504 Such an implementation may be faster under some conditions
505 but may increase the binary size.
507 config ARM64_SUPPORT_AARCH32
508 bool "ARM64 system support AArch32 execution state"
510 default y if !TARGET_THUNDERX_88XX
512 This ARM64 system supports AArch32 execution state.
515 prompt "Target select"
520 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
521 select SPL_SEPARATE_BSS if SPL
523 config TARGET_EDB93XX
524 bool "Support edb93xx"
528 config TARGET_ASPENITE
529 bool "Support aspenite"
533 bool "Support gplugd"
539 select SPL_DM_SPI if SPL
542 Support for TI's DaVinci platform.
545 bool "Marvell Kirkwood"
546 select ARCH_MISC_INIT
547 select BOARD_EARLY_INIT_F
551 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
557 select SPL_DM_SPI if SPL
558 select SPL_DM_SPI_FLASH if SPL
568 config TARGET_SPEAR300
569 bool "Support spear300"
570 select BOARD_EARLY_INIT_F
575 config TARGET_SPEAR310
576 bool "Support spear310"
577 select BOARD_EARLY_INIT_F
582 config TARGET_SPEAR320
583 bool "Support spear320"
584 select BOARD_EARLY_INIT_F
589 config TARGET_SPEAR600
590 bool "Support spear600"
591 select BOARD_EARLY_INIT_F
596 config TARGET_STV0991
597 bool "Support stv0991"
610 select BOARD_LATE_INIT
620 bool "Broadcom BCM283X family"
626 select SERIAL_SEARCH_ALL
631 bool "Broadcom BCM63158 family"
637 bool "Broadcom BCM68360 family"
643 bool "Broadcom BCM6858 family"
649 bool "Broadcom BCM7XXX family"
653 select OF_PRIOR_STAGE
656 This enables support for Broadcom ARM-based set-top box
657 chipsets, including the 7445 family of chips.
659 config TARGET_BCM23550_W1D
660 bool "Support bcm23550_w1d"
665 config TARGET_BCM28155_AP
666 bool "Support bcm28155_ap"
671 config TARGET_BCMCYGNUS
672 bool "Support bcmcygnus"
675 imply BCM_SF2_ETH_GMAC
683 bool "Support bcmnsp"
687 bool "Support Broadcom Northstar2"
690 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
691 ARMv8 Cortex-A57 processors targeting a broad range of networking
695 bool "Support Broadcom NS3"
697 select BOARD_LATE_INIT
699 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
700 ARMv8 Cortex-A72 processors targeting a broad range of networking
704 bool "Samsung EXYNOS"
713 imply SYS_THUMB_BUILD
718 bool "Samsung S5PC1XX"
727 bool "Calxeda Highbank"
731 config ARCH_INTEGRATOR
732 bool "ARM Ltd. Integrator family"
739 bool "Qualcomm IPQ40xx SoCs"
757 select SYS_ARCH_TIMER
758 select SYS_THUMB_BUILD
764 bool "Texas Instruments' K3 Architecture"
769 config ARCH_OMAP2PLUS
772 select SPL_BOARD_INIT if SPL
773 select SPL_STACK_R if SPL
775 imply TI_SYSC if DM && OF_CONTROL
780 imply DISTRO_DEFAULTS
783 Support for the Meson SoC family developed by Amlogic Inc.,
784 targeted at media players and tablet computers. We currently
785 support the S905 (GXBaby) 64-bit SoC.
792 select SPL_LIBCOMMON_SUPPORT if SPL
793 select SPL_LIBGENERIC_SUPPORT if SPL
794 select SPL_OF_CONTROL if SPL
797 Support for the MediaTek SoCs family developed by MediaTek Inc.
798 Please refer to doc/README.mediatek for more information.
801 bool "NXP LPC32xx platform"
811 bool "NXP i.MX8 platform"
815 select ENABLE_ARM_SOC_BOOT0_HOOK
818 bool "NXP i.MX8M platform"
820 select SYS_FSL_HAS_SEC if IMX_HAB
821 select SYS_FSL_SEC_COMPAT_4
822 select SYS_FSL_SEC_LE
828 bool "NXP i.MXRT platform"
836 bool "NXP i.MX23 family"
847 bool "NXP i.MX28 family"
853 bool "NXP i.MX31 family"
859 select SYS_FSL_HAS_SEC if IMX_HAB
860 select SYS_FSL_SEC_COMPAT_4
861 select SYS_FSL_SEC_LE
862 select ROM_UNIFIED_SECTIONS
864 imply SYS_THUMB_BUILD
868 select ARCH_MISC_INIT
870 select SYS_FSL_HAS_SEC if IMX_HAB
871 select SYS_FSL_SEC_COMPAT_4
872 select SYS_FSL_SEC_LE
873 imply BOARD_EARLY_INIT_F
875 imply SYS_THUMB_BUILD
880 select SYS_FSL_HAS_SEC
881 select SYS_FSL_SEC_COMPAT_4
882 select SYS_FSL_SEC_LE
884 imply SYS_THUMB_BUILD
888 default "arch/arm/mach-omap2/u-boot-spl.lds"
893 select BOARD_EARLY_INIT_F
898 bool "Nexell S5P4418/S5P6818 SoC"
899 select ENABLE_ARM_SOC_BOOT0_HOOK
903 bool "Actions Semi OWL SoCs"
911 select SYS_RELOC_GD_ENV_ADDR
915 bool "QEMU Virtual Platform"
926 bool "Renesas ARM SoCs"
929 imply BOARD_EARLY_INIT_F
932 imply SYS_THUMB_BUILD
933 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
935 config ARCH_SNAPDRAGON
936 bool "Qualcomm Snapdragon SoCs"
949 bool "Altera SOCFPGA family"
950 select ARCH_EARLY_INIT_R
951 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
952 select ARM64 if TARGET_SOCFPGA_SOC64
953 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
956 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
958 select SPL_DM_RESET if DM_RESET
960 select SPL_LIBCOMMON_SUPPORT
961 select SPL_LIBGENERIC_SUPPORT
962 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
963 select SPL_OF_CONTROL
964 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
965 select SPL_SERIAL_SUPPORT
967 select SPL_WATCHDOG_SUPPORT
970 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
972 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
973 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
983 imply SPL_DM_SPI_FLASH
984 imply SPL_LIBDISK_SUPPORT
985 imply SPL_MMC_SUPPORT
986 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
987 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
988 imply SPL_SPI_FLASH_SUPPORT
989 imply SPL_SPI_SUPPORT
993 bool "Support sunxi (Allwinner) SoCs"
996 select CMD_MMC if MMC
997 select CMD_USB if DISTRO_DEFAULTS
1003 select DM_MMC if MMC
1004 select DM_SCSI if SCSI
1006 select DM_USB if DISTRO_DEFAULTS
1007 select OF_BOARD_SETUP
1010 select SPECIFY_CONSOLE_INDEX
1011 select SPL_STACK_R if SPL
1012 select SPL_SYS_MALLOC_SIMPLE if SPL
1013 select SPL_SYS_THUMB_BUILD if !ARM64
1016 select SYS_THUMB_BUILD if !ARM64
1017 select USB if DISTRO_DEFAULTS
1018 select USB_KEYBOARD if DISTRO_DEFAULTS
1019 select USB_STORAGE if DISTRO_DEFAULTS
1020 select SPL_USE_TINY_PRINTF
1022 select SYS_RELOC_GD_ENV_ADDR
1023 imply BOARD_LATE_INIT
1026 imply CMD_UBI if MTD_RAW_NAND
1027 imply DISTRO_DEFAULTS
1030 imply OF_LIBFDT_OVERLAY
1031 imply PRE_CONSOLE_BUFFER
1032 imply SPL_GPIO_SUPPORT
1033 imply SPL_LIBCOMMON_SUPPORT
1034 imply SPL_LIBGENERIC_SUPPORT
1035 imply SPL_MMC_SUPPORT if MMC
1036 imply SPL_POWER_SUPPORT
1037 imply SPL_SERIAL_SUPPORT
1041 bool "ST-Ericsson U8500 Series"
1045 select DM_MMC if MMC
1047 select DM_USB if USB
1051 imply ARM_PL180_MMCI
1053 imply NOMADIK_MTU_TIMER
1056 imply SYSRESET_SYSCON
1059 bool "Support Xilinx Versal Platform"
1063 select DM_ETH if NET
1064 select DM_MMC if MMC
1067 imply BOARD_LATE_INIT
1068 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1071 bool "Freescale Vybrid"
1073 select SYS_FSL_ERRATUM_ESDHC111
1078 bool "Xilinx Zynq based platform"
1083 select DM_ETH if NET
1084 select DM_MMC if MMC
1088 select DM_USB if USB
1091 select SPL_BOARD_INIT if SPL
1092 select SPL_CLK if SPL
1093 select SPL_DM if SPL
1094 select SPL_DM_SPI if SPL
1095 select SPL_DM_SPI_FLASH if SPL
1096 select SPL_OF_CONTROL if SPL
1097 select SPL_SEPARATE_BSS if SPL
1099 imply ARCH_EARLY_INIT_R
1100 imply BOARD_LATE_INIT
1104 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1107 config ARCH_ZYNQMP_R5
1108 bool "Xilinx ZynqMP R5 based platform"
1112 select DM_ETH if NET
1113 select DM_MMC if MMC
1120 bool "Xilinx ZynqMP based platform"
1124 select DM_ETH if NET
1126 select DM_MMC if MMC
1128 select DM_SPI if SPI
1129 select DM_SPI_FLASH if DM_SPI
1130 select DM_USB if USB
1133 select SPL_BOARD_INIT if SPL
1134 select SPL_CLK if SPL
1135 select SPL_DM if SPL
1136 select SPL_DM_SPI if SPI && SPL_DM
1137 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1138 select SPL_DM_MAILBOX if SPL
1139 select SPL_FIRMWARE if SPL
1140 select SPL_SEPARATE_BSS if SPL
1143 imply BOARD_LATE_INIT
1145 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1152 imply DISTRO_DEFAULTS
1155 config TARGET_VEXPRESS64_AEMV8A
1156 bool "Support vexpress_aemv8a"
1160 config TARGET_VEXPRESS64_BASE_FVP
1161 bool "Support Versatile Express ARMv8a FVP BASE model"
1166 config TARGET_VEXPRESS64_JUNO
1167 bool "Support Versatile Express Juno Development Platform"
1182 config TARGET_TOTAL_COMPUTE
1183 bool "Support Total Compute Platform"
1191 config TARGET_LS2080A_EMU
1192 bool "Support ls2080a_emu"
1195 select ARMV8_MULTIENTRY
1196 select FSL_DDR_SYNC_REFRESH
1198 Support for Freescale LS2080A_EMU platform.
1199 The LS2080A Development System (EMULATOR) is a pre-silicon
1200 development platform that supports the QorIQ LS2080A
1201 Layerscape Architecture processor.
1203 config TARGET_LS1088AQDS
1204 bool "Support ls1088aqds"
1207 select ARMV8_MULTIENTRY
1208 select ARCH_SUPPORT_TFABOOT
1209 select BOARD_LATE_INIT
1211 select FSL_DDR_INTERACTIVE if !SD_BOOT
1213 Support for NXP LS1088AQDS platform.
1214 The LS1088A Development System (QDS) is a high-performance
1215 development platform that supports the QorIQ LS1088A
1216 Layerscape Architecture processor.
1218 config TARGET_LS2080AQDS
1219 bool "Support ls2080aqds"
1222 select ARMV8_MULTIENTRY
1223 select ARCH_SUPPORT_TFABOOT
1224 select BOARD_LATE_INIT
1229 select FSL_DDR_INTERACTIVE if !SPL
1231 Support for Freescale LS2080AQDS platform.
1232 The LS2080A Development System (QDS) is a high-performance
1233 development platform that supports the QorIQ LS2080A
1234 Layerscape Architecture processor.
1236 config TARGET_LS2080ARDB
1237 bool "Support ls2080ardb"
1240 select ARMV8_MULTIENTRY
1241 select ARCH_SUPPORT_TFABOOT
1242 select BOARD_LATE_INIT
1245 select FSL_DDR_INTERACTIVE if !SPL
1249 Support for Freescale LS2080ARDB platform.
1250 The LS2080A Reference design board (RDB) is a high-performance
1251 development platform that supports the QorIQ LS2080A
1252 Layerscape Architecture processor.
1254 config TARGET_LS2081ARDB
1255 bool "Support ls2081ardb"
1258 select ARMV8_MULTIENTRY
1259 select BOARD_LATE_INIT
1262 Support for Freescale LS2081ARDB platform.
1263 The LS2081A Reference design board (RDB) is a high-performance
1264 development platform that supports the QorIQ LS2081A/LS2041A
1265 Layerscape Architecture processor.
1267 config TARGET_LX2160ARDB
1268 bool "Support lx2160ardb"
1271 select ARMV8_MULTIENTRY
1272 select ARCH_SUPPORT_TFABOOT
1273 select BOARD_LATE_INIT
1275 Support for NXP LX2160ARDB platform.
1276 The lx2160ardb (LX2160A Reference design board (RDB)
1277 is a high-performance development platform that supports the
1278 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1280 config TARGET_LX2160AQDS
1281 bool "Support lx2160aqds"
1284 select ARMV8_MULTIENTRY
1285 select ARCH_SUPPORT_TFABOOT
1286 select BOARD_LATE_INIT
1288 Support for NXP LX2160AQDS platform.
1289 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1290 is a high-performance development platform that supports the
1291 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1293 config TARGET_LX2162AQDS
1294 bool "Support lx2162aqds"
1296 select ARCH_MISC_INIT
1298 select ARMV8_MULTIENTRY
1299 select ARCH_SUPPORT_TFABOOT
1300 select BOARD_LATE_INIT
1302 Support for NXP LX2162AQDS platform.
1303 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1306 bool "Support HiKey 96boards Consumer Edition Platform"
1313 select SPECIFY_CONSOLE_INDEX
1316 Support for HiKey 96boards platform. It features a HI6220
1317 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1319 config TARGET_HIKEY960
1320 bool "Support HiKey960 96boards Consumer Edition Platform"
1328 Support for HiKey960 96boards platform. It features a HI3660
1329 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1331 config TARGET_POPLAR
1332 bool "Support Poplar 96boards Enterprise Edition Platform"
1341 Support for Poplar 96boards EE platform. It features a HI3798cv200
1342 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1343 making it capable of running any commercial set-top solution based on
1346 config TARGET_LS1012AQDS
1347 bool "Support ls1012aqds"
1350 select ARCH_SUPPORT_TFABOOT
1351 select BOARD_LATE_INIT
1353 Support for Freescale LS1012AQDS platform.
1354 The LS1012A Development System (QDS) is a high-performance
1355 development platform that supports the QorIQ LS1012A
1356 Layerscape Architecture processor.
1358 config TARGET_LS1012ARDB
1359 bool "Support ls1012ardb"
1362 select ARCH_SUPPORT_TFABOOT
1363 select BOARD_LATE_INIT
1367 Support for Freescale LS1012ARDB platform.
1368 The LS1012A Reference design board (RDB) is a high-performance
1369 development platform that supports the QorIQ LS1012A
1370 Layerscape Architecture processor.
1372 config TARGET_LS1012A2G5RDB
1373 bool "Support ls1012a2g5rdb"
1376 select ARCH_SUPPORT_TFABOOT
1377 select BOARD_LATE_INIT
1380 Support for Freescale LS1012A2G5RDB platform.
1381 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1382 development platform that supports the QorIQ LS1012A
1383 Layerscape Architecture processor.
1385 config TARGET_LS1012AFRWY
1386 bool "Support ls1012afrwy"
1389 select ARCH_SUPPORT_TFABOOT
1390 select BOARD_LATE_INIT
1394 Support for Freescale LS1012AFRWY platform.
1395 The LS1012A FRWY board (FRWY) is a high-performance
1396 development platform that supports the QorIQ LS1012A
1397 Layerscape Architecture processor.
1399 config TARGET_LS1012AFRDM
1400 bool "Support ls1012afrdm"
1403 select ARCH_SUPPORT_TFABOOT
1405 Support for Freescale LS1012AFRDM platform.
1406 The LS1012A Freedom board (FRDM) is a high-performance
1407 development platform that supports the QorIQ LS1012A
1408 Layerscape Architecture processor.
1410 config TARGET_LS1028AQDS
1411 bool "Support ls1028aqds"
1414 select ARMV8_MULTIENTRY
1415 select ARCH_SUPPORT_TFABOOT
1416 select BOARD_LATE_INIT
1418 Support for Freescale LS1028AQDS platform
1419 The LS1028A Development System (QDS) is a high-performance
1420 development platform that supports the QorIQ LS1028A
1421 Layerscape Architecture processor.
1423 config TARGET_LS1028ARDB
1424 bool "Support ls1028ardb"
1427 select ARMV8_MULTIENTRY
1428 select ARCH_SUPPORT_TFABOOT
1429 select BOARD_LATE_INIT
1431 Support for Freescale LS1028ARDB platform
1432 The LS1028A Development System (RDB) is a high-performance
1433 development platform that supports the QorIQ LS1028A
1434 Layerscape Architecture processor.
1436 config TARGET_LS1088ARDB
1437 bool "Support ls1088ardb"
1440 select ARMV8_MULTIENTRY
1441 select ARCH_SUPPORT_TFABOOT
1442 select BOARD_LATE_INIT
1444 select FSL_DDR_INTERACTIVE if !SD_BOOT
1446 Support for NXP LS1088ARDB platform.
1447 The LS1088A Reference design board (RDB) is a high-performance
1448 development platform that supports the QorIQ LS1088A
1449 Layerscape Architecture processor.
1451 config TARGET_LS1021AQDS
1452 bool "Support ls1021aqds"
1454 select ARCH_SUPPORT_PSCI
1455 select BOARD_EARLY_INIT_F
1456 select BOARD_LATE_INIT
1458 select CPU_V7_HAS_NONSEC
1459 select CPU_V7_HAS_VIRT
1460 select LS1_DEEP_SLEEP
1463 select FSL_DDR_INTERACTIVE
1464 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1465 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1468 config TARGET_LS1021ATWR
1469 bool "Support ls1021atwr"
1471 select ARCH_SUPPORT_PSCI
1472 select BOARD_EARLY_INIT_F
1473 select BOARD_LATE_INIT
1475 select CPU_V7_HAS_NONSEC
1476 select CPU_V7_HAS_VIRT
1477 select LS1_DEEP_SLEEP
1479 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1482 config TARGET_LS1021ATSN
1483 bool "Support ls1021atsn"
1485 select ARCH_SUPPORT_PSCI
1486 select BOARD_EARLY_INIT_F
1487 select BOARD_LATE_INIT
1489 select CPU_V7_HAS_NONSEC
1490 select CPU_V7_HAS_VIRT
1491 select LS1_DEEP_SLEEP
1495 config TARGET_LS1021AIOT
1496 bool "Support ls1021aiot"
1498 select ARCH_SUPPORT_PSCI
1499 select BOARD_LATE_INIT
1501 select CPU_V7_HAS_NONSEC
1502 select CPU_V7_HAS_VIRT
1504 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1507 Support for Freescale LS1021AIOT platform.
1508 The LS1021A Freescale board (IOT) is a high-performance
1509 development platform that supports the QorIQ LS1021A
1510 Layerscape Architecture processor.
1512 config TARGET_LS1043AQDS
1513 bool "Support ls1043aqds"
1516 select ARMV8_MULTIENTRY
1517 select ARCH_SUPPORT_TFABOOT
1518 select BOARD_EARLY_INIT_F
1519 select BOARD_LATE_INIT
1521 select FSL_DDR_INTERACTIVE if !SPL
1522 select FSL_DSPI if !SPL_NO_DSPI
1523 select DM_SPI_FLASH if FSL_DSPI
1527 Support for Freescale LS1043AQDS platform.
1529 config TARGET_LS1043ARDB
1530 bool "Support ls1043ardb"
1533 select ARMV8_MULTIENTRY
1534 select ARCH_SUPPORT_TFABOOT
1535 select BOARD_EARLY_INIT_F
1536 select BOARD_LATE_INIT
1538 select FSL_DSPI if !SPL_NO_DSPI
1539 select DM_SPI_FLASH if FSL_DSPI
1541 Support for Freescale LS1043ARDB platform.
1543 config TARGET_LS1046AQDS
1544 bool "Support ls1046aqds"
1547 select ARMV8_MULTIENTRY
1548 select ARCH_SUPPORT_TFABOOT
1549 select BOARD_EARLY_INIT_F
1550 select BOARD_LATE_INIT
1551 select DM_SPI_FLASH if DM_SPI
1553 select FSL_DDR_BIST if !SPL
1554 select FSL_DDR_INTERACTIVE if !SPL
1555 select FSL_DDR_INTERACTIVE if !SPL
1558 Support for Freescale LS1046AQDS platform.
1559 The LS1046A Development System (QDS) is a high-performance
1560 development platform that supports the QorIQ LS1046A
1561 Layerscape Architecture processor.
1563 config TARGET_LS1046ARDB
1564 bool "Support ls1046ardb"
1567 select ARMV8_MULTIENTRY
1568 select ARCH_SUPPORT_TFABOOT
1569 select BOARD_EARLY_INIT_F
1570 select BOARD_LATE_INIT
1571 select DM_SPI_FLASH if DM_SPI
1572 select POWER_MC34VR500
1575 select FSL_DDR_INTERACTIVE if !SPL
1578 Support for Freescale LS1046ARDB platform.
1579 The LS1046A Reference Design Board (RDB) is a high-performance
1580 development platform that supports the QorIQ LS1046A
1581 Layerscape Architecture processor.
1583 config TARGET_LS1046AFRWY
1584 bool "Support ls1046afrwy"
1587 select ARMV8_MULTIENTRY
1588 select ARCH_SUPPORT_TFABOOT
1589 select BOARD_EARLY_INIT_F
1590 select BOARD_LATE_INIT
1591 select DM_SPI_FLASH if DM_SPI
1594 Support for Freescale LS1046AFRWY platform.
1595 The LS1046A Freeway Board (FRWY) is a high-performance
1596 development platform that supports the QorIQ LS1046A
1597 Layerscape Architecture processor.
1603 select ARMV8_MULTIENTRY
1607 Support for Kontron SMARC-sAL28 board.
1609 config TARGET_COLIBRI_PXA270
1610 bool "Support colibri_pxa270"
1613 config ARCH_UNIPHIER
1614 bool "Socionext UniPhier SoCs"
1615 select BOARD_LATE_INIT
1625 select OF_BOARD_SETUP
1629 select SPL_BOARD_INIT if SPL
1630 select SPL_DM if SPL
1631 select SPL_LIBCOMMON_SUPPORT if SPL
1632 select SPL_LIBGENERIC_SUPPORT if SPL
1633 select SPL_OF_CONTROL if SPL
1634 select SPL_PINCTRL if SPL
1637 imply DISTRO_DEFAULTS
1640 Support for UniPhier SoC family developed by Socionext Inc.
1641 (formerly, System LSI Business Division of Panasonic Corporation)
1644 bool "Support STMicroelectronics STM32 MCU with cortex M"
1651 bool "Support STMicrolectronics SoCs"
1660 Support for STMicroelectronics STiH407/10 SoC family.
1661 This SoC is used on Linaro 96Board STiH410-B2260
1664 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1665 select ARCH_MISC_INIT
1666 select ARCH_SUPPORT_TFABOOT
1667 select BOARD_LATE_INIT
1676 select OF_SYSTEM_SETUP
1682 select SYS_THUMB_BUILD
1686 imply OF_LIBFDT_OVERLAY
1687 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1690 Support for STM32MP SoC family developed by STMicroelectronics,
1691 MPUs based on ARM cortex A core
1692 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1693 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1695 SPL is the unsecure FSBL for the basic boot chain.
1697 config ARCH_ROCKCHIP
1698 bool "Support Rockchip SoCs"
1700 select BINMAN if SPL_OPTEE
1710 select DM_USB if USB
1711 select ENABLE_ARM_SOC_BOOT0_HOOK
1714 select SPL_DM if SPL
1715 select SPL_DM_SPI if SPL
1716 select SPL_DM_SPI_FLASH if SPL
1718 select SYS_THUMB_BUILD if !ARM64
1721 imply DEBUG_UART_BOARD_INIT
1722 imply DISTRO_DEFAULTS
1724 imply SARADC_ROCKCHIP
1726 imply SPL_SYS_MALLOC_SIMPLE
1729 imply USB_FUNCTION_FASTBOOT
1731 config ARCH_OCTEONTX
1732 bool "Support OcteonTX SoCs"
1738 select BOARD_LATE_INIT
1739 select SYS_CACHE_SHIFT_7
1741 config ARCH_OCTEONTX2
1742 bool "Support OcteonTX2 SoCs"
1748 select BOARD_LATE_INIT
1749 select SYS_CACHE_SHIFT_7
1751 config TARGET_THUNDERX_88XX
1752 bool "Support ThunderX 88xx"
1756 select SYS_CACHE_SHIFT_7
1759 bool "Support Aspeed SoCs"
1764 config TARGET_DURIAN
1765 bool "Support Phytium Durian Platform"
1768 Support for durian platform.
1769 It has 2GB Sdram, uart and pcie.
1771 config TARGET_PRESIDIO_ASIC
1772 bool "Support Cortina Presidio ASIC Platform"
1775 config TARGET_XENGUEST_ARM64
1776 bool "Xen guest ARM64"
1780 select LINUX_KERNEL_IMAGE_HEADER
1785 config ARCH_SUPPORT_TFABOOT
1789 bool "Support for booting from TF-A"
1790 depends on ARCH_SUPPORT_TFABOOT
1793 Some platforms support the setup of secure registers (for instance
1794 for CPU errata handling) or provide secure services like PSCI.
1795 Those services could also be provided by other firmware parts
1796 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
1797 does not need to (and cannot) execute this code.
1798 Enabling this option will make a U-Boot binary that is relying
1799 on other firmware layers to provide secure functionality.
1801 config TI_SECURE_DEVICE
1802 bool "HS Device Type Support"
1803 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1805 If a high secure (HS) device type is being used, this config
1806 must be set. This option impacts various aspects of the
1807 build system (to create signed boot images that can be
1808 authenticated) and the code. See the doc/README.ti-secure
1809 file for further details.
1811 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1812 config ISW_ENTRY_ADDR
1813 hex "Address in memory or XIP address of bootloader entry point"
1814 default 0x402F4000 if AM43XX
1815 default 0x402F0400 if AM33XX
1816 default 0x40301350 if OMAP54XX
1818 After any reset, the boot ROM searches the boot media for a valid
1819 boot image. For non-XIP devices, the ROM then copies the image into
1820 internal memory. For all boot modes, after the ROM processes the
1821 boot image it eventually computes the entry point address depending
1822 on the device type (secure/non-secure), boot media (xip/non-xip) and
1826 source "arch/arm/mach-aspeed/Kconfig"
1828 source "arch/arm/mach-at91/Kconfig"
1830 source "arch/arm/mach-bcm283x/Kconfig"
1832 source "arch/arm/mach-bcmstb/Kconfig"
1834 source "arch/arm/mach-davinci/Kconfig"
1836 source "arch/arm/mach-exynos/Kconfig"
1838 source "arch/arm/mach-highbank/Kconfig"
1840 source "arch/arm/mach-integrator/Kconfig"
1842 source "arch/arm/mach-ipq40xx/Kconfig"
1844 source "arch/arm/mach-k3/Kconfig"
1846 source "arch/arm/mach-keystone/Kconfig"
1848 source "arch/arm/mach-kirkwood/Kconfig"
1850 source "arch/arm/mach-lpc32xx/Kconfig"
1852 source "arch/arm/mach-mvebu/Kconfig"
1854 source "arch/arm/mach-octeontx/Kconfig"
1856 source "arch/arm/mach-octeontx2/Kconfig"
1858 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1860 source "arch/arm/mach-imx/mx2/Kconfig"
1862 source "arch/arm/mach-imx/mx3/Kconfig"
1864 source "arch/arm/mach-imx/mx5/Kconfig"
1866 source "arch/arm/mach-imx/mx6/Kconfig"
1868 source "arch/arm/mach-imx/mx7/Kconfig"
1870 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1872 source "arch/arm/mach-imx/imx8/Kconfig"
1874 source "arch/arm/mach-imx/imx8m/Kconfig"
1876 source "arch/arm/mach-imx/imxrt/Kconfig"
1878 source "arch/arm/mach-imx/mxs/Kconfig"
1880 source "arch/arm/mach-omap2/Kconfig"
1882 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1884 source "arch/arm/mach-orion5x/Kconfig"
1886 source "arch/arm/mach-owl/Kconfig"
1888 source "arch/arm/mach-rmobile/Kconfig"
1890 source "arch/arm/mach-meson/Kconfig"
1892 source "arch/arm/mach-mediatek/Kconfig"
1894 source "arch/arm/mach-qemu/Kconfig"
1896 source "arch/arm/mach-rockchip/Kconfig"
1898 source "arch/arm/mach-s5pc1xx/Kconfig"
1900 source "arch/arm/mach-snapdragon/Kconfig"
1902 source "arch/arm/mach-socfpga/Kconfig"
1904 source "arch/arm/mach-sti/Kconfig"
1906 source "arch/arm/mach-stm32/Kconfig"
1908 source "arch/arm/mach-stm32mp/Kconfig"
1910 source "arch/arm/mach-sunxi/Kconfig"
1912 source "arch/arm/mach-tegra/Kconfig"
1914 source "arch/arm/mach-u8500/Kconfig"
1916 source "arch/arm/mach-uniphier/Kconfig"
1918 source "arch/arm/cpu/armv7/vf610/Kconfig"
1920 source "arch/arm/mach-zynq/Kconfig"
1922 source "arch/arm/mach-zynqmp/Kconfig"
1924 source "arch/arm/mach-versal/Kconfig"
1926 source "arch/arm/mach-zynqmp-r5/Kconfig"
1928 source "arch/arm/cpu/armv7/Kconfig"
1930 source "arch/arm/cpu/armv8/Kconfig"
1932 source "arch/arm/mach-imx/Kconfig"
1934 source "arch/arm/mach-nexell/Kconfig"
1936 source "board/armltd/total_compute/Kconfig"
1938 source "board/bosch/shc/Kconfig"
1939 source "board/bosch/guardian/Kconfig"
1940 source "board/CarMediaLab/flea3/Kconfig"
1941 source "board/Marvell/aspenite/Kconfig"
1942 source "board/Marvell/gplugd/Kconfig"
1943 source "board/Marvell/octeontx/Kconfig"
1944 source "board/Marvell/octeontx2/Kconfig"
1945 source "board/armltd/vexpress64/Kconfig"
1946 source "board/cortina/presidio-asic/Kconfig"
1947 source "board/broadcom/bcm23550_w1d/Kconfig"
1948 source "board/broadcom/bcm28155_ap/Kconfig"
1949 source "board/broadcom/bcm963158/Kconfig"
1950 source "board/broadcom/bcm968360bg/Kconfig"
1951 source "board/broadcom/bcm968580xref/Kconfig"
1952 source "board/broadcom/bcmcygnus/Kconfig"
1953 source "board/broadcom/bcmnsp/Kconfig"
1954 source "board/broadcom/bcmns3/Kconfig"
1955 source "board/cavium/thunderx/Kconfig"
1956 source "board/cirrus/edb93xx/Kconfig"
1957 source "board/eets/pdu001/Kconfig"
1958 source "board/emulation/qemu-arm/Kconfig"
1959 source "board/freescale/ls2080aqds/Kconfig"
1960 source "board/freescale/ls2080ardb/Kconfig"
1961 source "board/freescale/ls1088a/Kconfig"
1962 source "board/freescale/ls1028a/Kconfig"
1963 source "board/freescale/ls1021aqds/Kconfig"
1964 source "board/freescale/ls1043aqds/Kconfig"
1965 source "board/freescale/ls1021atwr/Kconfig"
1966 source "board/freescale/ls1021atsn/Kconfig"
1967 source "board/freescale/ls1021aiot/Kconfig"
1968 source "board/freescale/ls1046aqds/Kconfig"
1969 source "board/freescale/ls1043ardb/Kconfig"
1970 source "board/freescale/ls1046ardb/Kconfig"
1971 source "board/freescale/ls1046afrwy/Kconfig"
1972 source "board/freescale/ls1012aqds/Kconfig"
1973 source "board/freescale/ls1012ardb/Kconfig"
1974 source "board/freescale/ls1012afrdm/Kconfig"
1975 source "board/freescale/lx2160a/Kconfig"
1976 source "board/grinn/chiliboard/Kconfig"
1977 source "board/hisilicon/hikey/Kconfig"
1978 source "board/hisilicon/hikey960/Kconfig"
1979 source "board/hisilicon/poplar/Kconfig"
1980 source "board/isee/igep003x/Kconfig"
1981 source "board/kontron/sl28/Kconfig"
1982 source "board/myir/mys_6ulx/Kconfig"
1983 source "board/spear/spear300/Kconfig"
1984 source "board/spear/spear310/Kconfig"
1985 source "board/spear/spear320/Kconfig"
1986 source "board/spear/spear600/Kconfig"
1987 source "board/spear/x600/Kconfig"
1988 source "board/st/stv0991/Kconfig"
1989 source "board/tcl/sl50/Kconfig"
1990 source "board/toradex/colibri_pxa270/Kconfig"
1991 source "board/variscite/dart_6ul/Kconfig"
1992 source "board/vscom/baltos/Kconfig"
1993 source "board/phytium/durian/Kconfig"
1994 source "board/xen/xenguest_arm64/Kconfig"
1996 source "arch/arm/Kconfig.debug"
2001 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2002 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2003 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64