1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 bool "Enable support for CRC32 instruction"
17 ARMv8 implements dedicated crc32 instruction for crc32 calculation.
18 This is faster than software crc32 calculation. This instruction may
19 not be present on all ARMv8.0, but is always present on ARMv8.1 and
22 config POSITION_INDEPENDENT
23 bool "Generate position-independent pre-relocation code"
24 depends on ARM64 || CPU_V7A
26 U-Boot expects to be linked to a specific hard-coded address, and to
27 be loaded to and run from that address. This option lifts that
28 restriction, thus allowing the code to be loaded to and executed from
29 almost any 4K aligned address. This logic relies on the relocation
30 information that is embedded in the binary to support U-Boot
31 relocating itself to the top-of-RAM later during execution.
33 config INIT_SP_RELATIVE
34 bool "Specify the early stack pointer relative to the .bss section"
36 default n if ARCH_QEMU
37 default y if POSITION_INDEPENDENT
39 U-Boot typically uses a hard-coded value for the stack pointer
40 before relocation. Enable this option to instead calculate the
41 initial SP at run-time. This is useful to avoid hard-coding addresses
42 into U-Boot, so that it can be loaded and executed at arbitrary
43 addresses and thus avoid using arbitrary addresses at runtime.
45 If this option is enabled, the early stack pointer is set to
46 &_bss_start with a offset value added. The offset is specified by
47 SYS_INIT_SP_BSS_OFFSET.
49 config SYS_INIT_SP_BSS_OFFSET
50 int "Early stack offset from the .bss base address"
52 depends on INIT_SP_RELATIVE
55 This option's value is the offset added to &_bss_start in order to
56 calculate the stack pointer. This offset should be large enough so
57 that the early malloc region, global data (gd), and early stack usage
58 do not overlap any appended DTB.
60 config LINUX_KERNEL_IMAGE_HEADER
64 Place a Linux kernel image header at the start of the U-Boot binary.
65 The format of the header is described in the Linux kernel source at
66 Documentation/arm64/booting.txt. This feature is useful since the
67 image header reports the amount of memory (BSS and similar) that
68 U-Boot needs to use, but which isn't part of the binary.
70 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
71 depends on LINUX_KERNEL_IMAGE_HEADER
74 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
75 TEXT_OFFSET value written to the Linux kernel image header.
87 ARM GICV3 Interrupt translation service (ITS).
88 Basic support for programming locality specific peripheral
89 interrupts (LPI) configuration tables and enable LPI tables.
90 LPI configuration table can be used by u-boot or Linux.
91 ARM GICV3 has limitation, once the LPI table is enabled, LPI
92 configuration table can not be re-programmed, unless GICV3 reset.
98 config DMA_ADDR_T_64BIT
108 config GPIO_EXTRA_HEADER
111 # Used for compatibility with asm files copied from the kernel
112 config ARM_ASM_UNIFIED
116 # Used for compatibility with asm files copied from the kernel
120 config SYS_ICACHE_OFF
121 bool "Do not enable icache"
123 Do not enable instruction cache in U-Boot.
125 config SPL_SYS_ICACHE_OFF
126 bool "Do not enable icache in SPL"
128 default SYS_ICACHE_OFF
130 Do not enable instruction cache in SPL.
132 config SYS_DCACHE_OFF
133 bool "Do not enable dcache"
135 Do not enable data cache in U-Boot.
137 config SPL_SYS_DCACHE_OFF
138 bool "Do not enable dcache in SPL"
140 default SYS_DCACHE_OFF
142 Do not enable data cache in SPL.
144 config SYS_ARM_CACHE_CP15
145 bool "CP15 based cache enabling support"
147 Select this if your processor suports enabling caches by using
151 bool "MMU-based Paged Memory Management Support"
152 select SYS_ARM_CACHE_CP15
154 Select if you want MMU-based virtualised addressing space
155 support via paged memory management.
158 bool 'Use the ARM v7 PMSA Compliant MPU'
160 Some ARM systems without an MMU have instead a Memory Protection
161 Unit (MPU) that defines the type and permissions for regions of
163 If your CPU has an MPU then you should choose 'y' here unless you
164 know that you do not want to use the MPU.
166 # If set, the workarounds for these ARM errata are applied early during U-Boot
167 # startup. Note that in general these options force the workarounds to be
168 # applied; no CPU-type/version detection exists, unlike the similar options in
169 # the Linux kernel. Do not set these options unless they apply! Also note that
170 # the following can be machine-specific errata. These do have ability to
171 # provide rudimentary version and machine-specific checks, but expect no
173 # CONFIG_ARM_ERRATA_430973
174 # CONFIG_ARM_ERRATA_454179
175 # CONFIG_ARM_ERRATA_621766
176 # CONFIG_ARM_ERRATA_798870
177 # CONFIG_ARM_ERRATA_801819
178 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
179 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
181 config ARM_ERRATA_430973
184 config ARM_ERRATA_454179
187 config ARM_ERRATA_621766
190 config ARM_ERRATA_716044
193 config ARM_ERRATA_725233
196 config ARM_ERRATA_742230
199 config ARM_ERRATA_743622
202 config ARM_ERRATA_751472
205 config ARM_ERRATA_761320
208 config ARM_ERRATA_773022
211 config ARM_ERRATA_774769
214 config ARM_ERRATA_794072
217 config ARM_ERRATA_798870
220 config ARM_ERRATA_801819
223 config ARM_ERRATA_826974
226 config ARM_ERRATA_828024
229 config ARM_ERRATA_829520
232 config ARM_ERRATA_833069
235 config ARM_ERRATA_833471
238 config ARM_ERRATA_845369
241 config ARM_ERRATA_852421
244 config ARM_ERRATA_852423
247 config ARM_ERRATA_855873
250 config ARM_CORTEX_A8_CVE_2017_5715
253 config ARM_CORTEX_A15_CVE_2017_5715
258 select SYS_CACHE_SHIFT_5
263 select SYS_CACHE_SHIFT_5
268 select SYS_CACHE_SHIFT_5
273 select SYS_CACHE_SHIFT_5
278 select SYS_CACHE_SHIFT_5
284 select SYS_CACHE_SHIFT_5
291 select SYS_CACHE_SHIFT_6
298 select SYS_CACHE_SHIFT_5
299 select SYS_THUMB_BUILD
305 select SYS_ARM_CACHE_CP15
307 select SYS_CACHE_SHIFT_6
311 select SYS_CACHE_SHIFT_5
320 select SYS_CACHE_SHIFT_5
324 default "arm720t" if CPU_ARM720T
325 default "arm920t" if CPU_ARM920T
326 default "arm926ejs" if CPU_ARM926EJS
327 default "arm946es" if CPU_ARM946ES
328 default "arm1136" if CPU_ARM1136
329 default "arm1176" if CPU_ARM1176
330 default "armv7" if CPU_V7A
331 default "armv7" if CPU_V7R
332 default "armv7m" if CPU_V7M
333 default "pxa" if CPU_PXA
334 default "sa1100" if CPU_SA1100
335 default "armv8" if ARM64
339 default 4 if CPU_ARM720T
340 default 4 if CPU_ARM920T
341 default 5 if CPU_ARM926EJS
342 default 5 if CPU_ARM946ES
343 default 6 if CPU_ARM1136
344 default 6 if CPU_ARM1176
349 default 4 if CPU_SA1100
353 prompt "Select the ARM data write cache policy"
354 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
356 default SYS_ARM_CACHE_WRITEBACK
358 config SYS_ARM_CACHE_WRITEBACK
359 bool "Write-back (WB)"
361 A write updates the cache only and marks the cache line as dirty.
362 External memory is updated only when the line is evicted or explicitly
365 config SYS_ARM_CACHE_WRITETHROUGH
366 bool "Write-through (WT)"
368 A write updates both the cache and the external memory system.
369 This does not mark the cache line as dirty.
371 config SYS_ARM_CACHE_WRITEALLOC
372 bool "Write allocation (WA)"
374 A cache line is allocated on a write miss. This means that executing a
375 store instruction on the processor might cause a burst read to occur.
376 There is a linefill to obtain the data for the cache line, before the
381 bool "Enable ARCH_CPU_INIT"
383 Some architectures require a call to arch_cpu_init().
384 Say Y here to enable it
386 config SYS_ARCH_TIMER
387 bool "ARM Generic Timer support"
388 depends on CPU_V7A || ARM64
391 The ARM Generic Timer (aka arch-timer) provides an architected
392 interface to a timer source on an SoC.
393 It is mandatory for ARMv8 implementation and widely available
397 bool "Support for ARM SMC Calling Convention (SMCCC)"
398 depends on CPU_V7A || ARM64
401 Say Y here if you want to enable ARM SMC Calling Convention.
402 This should be enabled if U-Boot needs to communicate with system
403 firmware (for example, PSCI) according to SMCCC.
406 bool "support boot from semihosting"
408 In emulated environments, semihosting is a way for
409 the hosted environment to call out to the emulator to
410 retrieve files from the host machine.
412 config SYS_THUMB_BUILD
413 bool "Build U-Boot using the Thumb instruction set"
416 Use this flag to build U-Boot using the Thumb instruction set for
417 ARM architectures. Thumb instruction set provides better code
418 density. For ARM architectures that support Thumb2 this flag will
419 result in Thumb2 code generated by GCC.
421 config SPL_SYS_THUMB_BUILD
422 bool "Build SPL using the Thumb instruction set"
423 default y if SYS_THUMB_BUILD
424 depends on !ARM64 && SPL
426 Use this flag to build SPL using the Thumb instruction set for
427 ARM architectures. Thumb instruction set provides better code
428 density. For ARM architectures that support Thumb2 this flag will
429 result in Thumb2 code generated by GCC.
431 config TPL_SYS_THUMB_BUILD
432 bool "Build TPL using the Thumb instruction set"
433 default y if SYS_THUMB_BUILD
434 depends on TPL && !ARM64
436 Use this flag to build TPL using the Thumb instruction set for
437 ARM architectures. Thumb instruction set provides better code
438 density. For ARM architectures that support Thumb2 this flag will
439 result in Thumb2 code generated by GCC.
442 config SYS_L2CACHE_OFF
445 If SoC does not support L2CACHE or one does not want to enable
446 L2CACHE, choose this option.
448 config ENABLE_ARM_SOC_BOOT0_HOOK
449 bool "prepare BOOT0 header"
451 If the SoC's BOOT0 requires a header area filled with (magic)
452 values, then choose this option, and create a file included as
453 <asm/arch/boot0.h> which contains the required assembler code.
455 config USE_ARCH_MEMCPY
456 bool "Use an assembly optimized implementation of memcpy"
458 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
460 Enable the generation of an optimized version of memcpy.
461 Such an implementation may be faster under some conditions
462 but may increase the binary size.
464 config SPL_USE_ARCH_MEMCPY
465 bool "Use an assembly optimized implementation of memcpy for SPL"
466 default y if USE_ARCH_MEMCPY
469 Enable the generation of an optimized version of memcpy.
470 Such an implementation may be faster under some conditions
471 but may increase the binary size.
473 config TPL_USE_ARCH_MEMCPY
474 bool "Use an assembly optimized implementation of memcpy for TPL"
475 default y if USE_ARCH_MEMCPY
478 Enable the generation of an optimized version of memcpy.
479 Such an implementation may be faster under some conditions
480 but may increase the binary size.
482 config USE_ARCH_MEMMOVE
483 bool "Use an assembly optimized implementation of memmove" if !ARM64
484 default USE_ARCH_MEMCPY if ARM64
487 Enable the generation of an optimized version of memmove.
488 Such an implementation may be faster under some conditions
489 but may increase the binary size.
491 config SPL_USE_ARCH_MEMMOVE
492 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
493 default SPL_USE_ARCH_MEMCPY if ARM64
494 depends on SPL && ARM64
496 Enable the generation of an optimized version of memmove.
497 Such an implementation may be faster under some conditions
498 but may increase the binary size.
500 config TPL_USE_ARCH_MEMMOVE
501 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
502 default TPL_USE_ARCH_MEMCPY if ARM64
503 depends on TPL && ARM64
505 Enable the generation of an optimized version of memmove.
506 Such an implementation may be faster under some conditions
507 but may increase the binary size.
509 config USE_ARCH_MEMSET
510 bool "Use an assembly optimized implementation of memset"
512 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
514 Enable the generation of an optimized version of memset.
515 Such an implementation may be faster under some conditions
516 but may increase the binary size.
518 config SPL_USE_ARCH_MEMSET
519 bool "Use an assembly optimized implementation of memset for SPL"
520 default y if USE_ARCH_MEMSET
523 Enable the generation of an optimized version of memset.
524 Such an implementation may be faster under some conditions
525 but may increase the binary size.
527 config TPL_USE_ARCH_MEMSET
528 bool "Use an assembly optimized implementation of memset for TPL"
529 default y if USE_ARCH_MEMSET
532 Enable the generation of an optimized version of memset.
533 Such an implementation may be faster under some conditions
534 but may increase the binary size.
536 config ARM64_SUPPORT_AARCH32
537 bool "ARM64 system support AArch32 execution state"
539 default y if !TARGET_THUNDERX_88XX
541 This ARM64 system supports AArch32 execution state.
544 prompt "Target select"
549 select GPIO_EXTRA_HEADER
550 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
551 select SPL_SEPARATE_BSS if SPL
556 select GPIO_EXTRA_HEADER
557 select SPL_DM_SPI if SPL
560 Support for TI's DaVinci platform.
563 bool "Marvell Kirkwood"
564 select ARCH_MISC_INIT
565 select BOARD_EARLY_INIT_F
567 select GPIO_EXTRA_HEADER
570 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
576 select GPIO_EXTRA_HEADER
577 select SPL_DM_SPI if SPL
578 select SPL_DM_SPI_FLASH if SPL
587 select GPIO_EXTRA_HEADER
589 config TARGET_STV0991
590 bool "Support stv0991"
596 select GPIO_EXTRA_HEADER
603 bool "Broadcom BCM283X family"
607 select GPIO_EXTRA_HEADER
610 select SERIAL_SEARCH_ALL
615 bool "Broadcom BCM63158 family"
621 bool "Broadcom BCM6753 family"
628 bool "Broadcom BCM68360 family"
634 bool "Broadcom BCM6858 family"
640 bool "Broadcom BCM7XXX family"
643 select GPIO_EXTRA_HEADER
646 imply OF_HAS_PRIOR_STAGE
648 This enables support for Broadcom ARM-based set-top box
649 chipsets, including the 7445 family of chips.
651 config TARGET_VEXPRESS_CA9X4
652 bool "Support vexpress_ca9x4"
656 config TARGET_BCMCYGNUS
657 bool "Support bcmcygnus"
659 select GPIO_EXTRA_HEADER
661 imply BCM_SF2_ETH_GMAC
669 bool "Support Broadcom Northstar2"
671 select GPIO_EXTRA_HEADER
673 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
674 ARMv8 Cortex-A57 processors targeting a broad range of networking
678 bool "Support Broadcom NS3"
680 select BOARD_LATE_INIT
682 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
683 ARMv8 Cortex-A72 processors targeting a broad range of networking
687 bool "Samsung EXYNOS"
697 select GPIO_EXTRA_HEADER
698 imply SYS_THUMB_BUILD
703 bool "Samsung S5PC1XX"
709 select GPIO_EXTRA_HEADER
713 bool "Calxeda Highbank"
724 imply OF_HAS_PRIOR_STAGE
726 config ARCH_INTEGRATOR
727 bool "ARM Ltd. Integrator family"
730 select GPIO_EXTRA_HEADER
735 bool "Qualcomm IPQ40xx SoCs"
741 select GPIO_EXTRA_HEADER
754 select GPIO_EXTRA_HEADER
756 select SYS_ARCH_TIMER
757 select SYS_THUMB_BUILD
763 bool "Texas Instruments' K3 Architecture"
768 config ARCH_OMAP2PLUS
771 select GPIO_EXTRA_HEADER
772 select SPL_BOARD_INIT if SPL
773 select SPL_STACK_R if SPL
775 imply TI_SYSC if DM && OF_CONTROL
781 select GPIO_EXTRA_HEADER
782 imply DISTRO_DEFAULTS
785 Support for the Meson SoC family developed by Amlogic Inc.,
786 targeted at media players and tablet computers. We currently
787 support the S905 (GXBaby) 64-bit SoC.
792 select GPIO_EXTRA_HEADER
795 select SPL_LIBCOMMON_SUPPORT if SPL
796 select SPL_LIBGENERIC_SUPPORT if SPL
797 select SPL_OF_CONTROL if SPL
800 Support for the MediaTek SoCs family developed by MediaTek Inc.
801 Please refer to doc/README.mediatek for more information.
804 bool "NXP LPC32xx platform"
809 select GPIO_EXTRA_HEADER
815 bool "NXP i.MX8 platform"
818 select GPIO_EXTRA_HEADER
821 select ENABLE_ARM_SOC_BOOT0_HOOK
825 bool "NXP i.MX8M platform"
827 select GPIO_EXTRA_HEADER
829 select SYS_FSL_HAS_SEC if IMX_HAB
830 select SYS_FSL_SEC_COMPAT_4
831 select SYS_FSL_SEC_LE
839 bool "NXP i.MX8ULP platform"
845 select GPIO_EXTRA_HEADER
850 bool "NXP i.MXRT platform"
854 select GPIO_EXTRA_HEADER
860 bool "NXP i.MX23 family"
862 select GPIO_EXTRA_HEADER
868 bool "NXP i.MX28 family"
870 select GPIO_EXTRA_HEADER
876 bool "NXP i.MX31 family"
878 select GPIO_EXTRA_HEADER
883 select BOARD_POSTCLK_INIT
885 select GPIO_EXTRA_HEADER
887 select SYS_FSL_HAS_SEC if IMX_HAB
888 select SYS_FSL_SEC_COMPAT_4
889 select SYS_FSL_SEC_LE
890 select ROM_UNIFIED_SECTIONS
892 imply SYS_THUMB_BUILD
896 select ARCH_MISC_INIT
898 select GPIO_EXTRA_HEADER
900 select SYS_FSL_HAS_SEC if IMX_HAB
901 select SYS_FSL_SEC_COMPAT_4
902 select SYS_FSL_SEC_LE
903 imply BOARD_EARLY_INIT_F
905 imply SYS_THUMB_BUILD
909 select BOARD_POSTCLK_INIT
911 select GPIO_EXTRA_HEADER
913 select SYS_FSL_HAS_SEC
914 select SYS_FSL_SEC_COMPAT_4
915 select SYS_FSL_SEC_LE
917 imply SYS_THUMB_BUILD
921 default "arch/arm/mach-omap2/u-boot-spl.lds"
926 select BOARD_EARLY_INIT_F
928 select GPIO_EXTRA_HEADER
933 bool "Nexell S5P4418/S5P6818 SoC"
934 select ENABLE_ARM_SOC_BOOT0_HOOK
936 select GPIO_EXTRA_HEADER
954 select LINUX_KERNEL_IMAGE_HEADER
957 select POSITION_INDEPENDENT
963 select SYSRESET_WATCHDOG
964 select SYSRESET_WATCHDOG_AUTO
968 imply DISTRO_DEFAULTS
969 imply OF_HAS_PRIOR_STAGE
972 bool "Actions Semi OWL SoCs"
976 select GPIO_EXTRA_HEADER
981 select SYS_RELOC_GD_ENV_ADDR
985 bool "QEMU Virtual Platform"
994 imply OF_HAS_PRIOR_STAGE
997 bool "Renesas ARM SoCs"
1000 select GPIO_EXTRA_HEADER
1001 imply BOARD_EARLY_INIT_F
1004 imply SYS_THUMB_BUILD
1005 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
1007 config ARCH_SNAPDRAGON
1008 bool "Qualcomm Snapdragon SoCs"
1013 select GPIO_EXTRA_HEADER
1022 bool "Altera SOCFPGA family"
1023 select ARCH_EARLY_INIT_R
1024 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
1025 select ARM64 if TARGET_SOCFPGA_SOC64
1026 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1030 select GPIO_EXTRA_HEADER
1031 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1033 select SPL_DM_RESET if DM_RESET
1034 select SPL_DM_SERIAL
1035 select SPL_LIBCOMMON_SUPPORT
1036 select SPL_LIBGENERIC_SUPPORT
1037 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
1038 select SPL_OF_CONTROL
1039 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1045 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1047 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1048 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1058 imply SPL_DM_SPI_FLASH
1059 imply SPL_LIBDISK_SUPPORT
1061 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1062 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1063 imply SPL_SPI_FLASH_SUPPORT
1068 bool "Support sunxi (Allwinner) SoCs"
1071 select CMD_MMC if MMC
1072 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1077 select DM_I2C if I2C
1079 select DM_MMC if MMC
1080 select DM_SCSI if SCSI
1082 select GPIO_EXTRA_HEADER
1083 select OF_BOARD_SETUP
1086 select SPECIFY_CONSOLE_INDEX
1087 select SPL_SEPARATE_BSS if SPL
1088 select SPL_STACK_R if SPL
1089 select SPL_SYS_MALLOC_SIMPLE if SPL
1090 select SPL_SYS_THUMB_BUILD if !ARM64
1093 select SYS_THUMB_BUILD if !ARM64
1094 select USB if DISTRO_DEFAULTS
1095 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1096 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1097 select SPL_USE_TINY_PRINTF
1099 select SYS_RELOC_GD_ENV_ADDR
1100 imply BOARD_LATE_INIT
1103 imply CMD_UBI if MTD_RAW_NAND
1104 imply DISTRO_DEFAULTS
1107 imply OF_LIBFDT_OVERLAY
1108 imply PRE_CONSOLE_BUFFER
1110 imply SPL_LIBCOMMON_SUPPORT
1111 imply SPL_LIBGENERIC_SUPPORT
1112 imply SPL_MMC if MMC
1116 imply SYSRESET_WATCHDOG
1117 imply SYSRESET_WATCHDOG_AUTO
1122 bool "ST-Ericsson U8500 Series"
1126 select DM_MMC if MMC
1128 select DM_USB_GADGET if DM_USB
1132 imply AB8500_USB_PHY
1133 imply ARM_PL180_MMCI
1138 imply NOMADIK_MTU_TIMER
1143 imply SYS_THUMB_BUILD
1144 imply SYSRESET_SYSCON
1147 bool "Support Xilinx Versal Platform"
1151 select DM_ETH if NET
1152 select DM_MMC if MMC
1157 imply BOARD_LATE_INIT
1158 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1161 bool "Freescale Vybrid"
1163 select GPIO_EXTRA_HEADER
1165 select SYS_FSL_ERRATUM_ESDHC111
1170 bool "Xilinx Zynq based platform"
1174 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1176 select DM_ETH if NET
1177 select DM_MMC if MMC
1183 select SPL_BOARD_INIT if SPL
1184 select SPL_CLK if SPL
1185 select SPL_DM if SPL
1186 select SPL_DM_SPI if SPL
1187 select SPL_DM_SPI_FLASH if SPL
1188 select SPL_OF_CONTROL if SPL
1189 select SPL_SEPARATE_BSS if SPL
1191 imply ARCH_EARLY_INIT_R
1192 imply BOARD_LATE_INIT
1196 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1199 config ARCH_ZYNQMP_R5
1200 bool "Xilinx ZynqMP R5 based platform"
1204 select DM_ETH if NET
1205 select DM_MMC if MMC
1212 bool "Xilinx ZynqMP based platform"
1216 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1217 select DM_ETH if NET
1219 select DM_MMC if MMC
1221 select DM_SPI if SPI
1222 select DM_SPI_FLASH if DM_SPI
1226 select SPL_BOARD_INIT if SPL
1227 select SPL_CLK if SPL
1228 select SPL_DM if SPL
1229 select SPL_DM_SPI if SPI && SPL_DM
1230 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1231 select SPL_DM_MAILBOX if SPL
1232 imply SPL_FIRMWARE if SPL
1233 select SPL_SEPARATE_BSS if SPL
1237 imply BOARD_LATE_INIT
1239 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1243 imply ZYNQMP_GPIO_MODEPIN if DM_GPIO && USB
1247 select GPIO_EXTRA_HEADER
1248 imply DISTRO_DEFAULTS
1251 config TARGET_VEXPRESS64_AEMV8A
1252 bool "Support vexpress_aemv8a"
1254 select GPIO_EXTRA_HEADER
1257 config TARGET_VEXPRESS64_BASE_FVP
1258 bool "Support Versatile Express ARMv8a FVP BASE model"
1260 select GPIO_EXTRA_HEADER
1264 config TARGET_VEXPRESS64_JUNO
1265 bool "Support Versatile Express Juno Development Platform"
1267 select GPIO_EXTRA_HEADER
1278 imply OF_HAS_PRIOR_STAGE
1280 config TARGET_TOTAL_COMPUTE
1281 bool "Support Total Compute Platform"
1289 config TARGET_LS2080A_EMU
1290 bool "Support ls2080a_emu"
1293 select ARMV8_MULTIENTRY
1294 select FSL_DDR_SYNC_REFRESH
1295 select GPIO_EXTRA_HEADER
1297 Support for Freescale LS2080A_EMU platform.
1298 The LS2080A Development System (EMULATOR) is a pre-silicon
1299 development platform that supports the QorIQ LS2080A
1300 Layerscape Architecture processor.
1302 config TARGET_LS1088AQDS
1303 bool "Support ls1088aqds"
1306 select ARMV8_MULTIENTRY
1307 select ARCH_SUPPORT_TFABOOT
1308 select BOARD_LATE_INIT
1309 select GPIO_EXTRA_HEADER
1311 select FSL_DDR_INTERACTIVE if !SD_BOOT
1313 Support for NXP LS1088AQDS platform.
1314 The LS1088A Development System (QDS) is a high-performance
1315 development platform that supports the QorIQ LS1088A
1316 Layerscape Architecture processor.
1318 config TARGET_LS2080AQDS
1319 bool "Support ls2080aqds"
1322 select ARMV8_MULTIENTRY
1323 select ARCH_SUPPORT_TFABOOT
1324 select BOARD_LATE_INIT
1325 select GPIO_EXTRA_HEADER
1330 select FSL_DDR_INTERACTIVE if !SPL
1332 Support for Freescale LS2080AQDS platform.
1333 The LS2080A Development System (QDS) is a high-performance
1334 development platform that supports the QorIQ LS2080A
1335 Layerscape Architecture processor.
1337 config TARGET_LS2080ARDB
1338 bool "Support ls2080ardb"
1341 select ARMV8_MULTIENTRY
1342 select ARCH_SUPPORT_TFABOOT
1343 select BOARD_LATE_INIT
1346 select FSL_DDR_INTERACTIVE if !SPL
1347 select GPIO_EXTRA_HEADER
1351 Support for Freescale LS2080ARDB platform.
1352 The LS2080A Reference design board (RDB) is a high-performance
1353 development platform that supports the QorIQ LS2080A
1354 Layerscape Architecture processor.
1356 config TARGET_LS2081ARDB
1357 bool "Support ls2081ardb"
1360 select ARMV8_MULTIENTRY
1361 select BOARD_LATE_INIT
1362 select GPIO_EXTRA_HEADER
1365 Support for Freescale LS2081ARDB platform.
1366 The LS2081A Reference design board (RDB) is a high-performance
1367 development platform that supports the QorIQ LS2081A/LS2041A
1368 Layerscape Architecture processor.
1370 config TARGET_LX2160ARDB
1371 bool "Support lx2160ardb"
1374 select ARMV8_MULTIENTRY
1375 select ARCH_SUPPORT_TFABOOT
1376 select BOARD_LATE_INIT
1377 select GPIO_EXTRA_HEADER
1379 Support for NXP LX2160ARDB platform.
1380 The lx2160ardb (LX2160A Reference design board (RDB)
1381 is a high-performance development platform that supports the
1382 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1384 config TARGET_LX2160AQDS
1385 bool "Support lx2160aqds"
1388 select ARMV8_MULTIENTRY
1389 select ARCH_SUPPORT_TFABOOT
1390 select BOARD_LATE_INIT
1391 select GPIO_EXTRA_HEADER
1393 Support for NXP LX2160AQDS platform.
1394 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1395 is a high-performance development platform that supports the
1396 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1398 config TARGET_LX2162AQDS
1399 bool "Support lx2162aqds"
1401 select ARCH_MISC_INIT
1403 select ARMV8_MULTIENTRY
1404 select ARCH_SUPPORT_TFABOOT
1405 select BOARD_LATE_INIT
1406 select GPIO_EXTRA_HEADER
1408 Support for NXP LX2162AQDS platform.
1409 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1412 bool "Support HiKey 96boards Consumer Edition Platform"
1417 select GPIO_EXTRA_HEADER
1420 select SPECIFY_CONSOLE_INDEX
1423 Support for HiKey 96boards platform. It features a HI6220
1424 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1426 config TARGET_HIKEY960
1427 bool "Support HiKey960 96boards Consumer Edition Platform"
1431 select GPIO_EXTRA_HEADER
1436 Support for HiKey960 96boards platform. It features a HI3660
1437 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1439 config TARGET_POPLAR
1440 bool "Support Poplar 96boards Enterprise Edition Platform"
1444 select GPIO_EXTRA_HEADER
1449 Support for Poplar 96boards EE platform. It features a HI3798cv200
1450 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1451 making it capable of running any commercial set-top solution based on
1454 config TARGET_LS1012AQDS
1455 bool "Support ls1012aqds"
1458 select ARCH_SUPPORT_TFABOOT
1459 select BOARD_LATE_INIT
1460 select GPIO_EXTRA_HEADER
1462 Support for Freescale LS1012AQDS platform.
1463 The LS1012A Development System (QDS) is a high-performance
1464 development platform that supports the QorIQ LS1012A
1465 Layerscape Architecture processor.
1467 config TARGET_LS1012ARDB
1468 bool "Support ls1012ardb"
1471 select ARCH_SUPPORT_TFABOOT
1472 select BOARD_LATE_INIT
1473 select GPIO_EXTRA_HEADER
1477 Support for Freescale LS1012ARDB platform.
1478 The LS1012A Reference design board (RDB) is a high-performance
1479 development platform that supports the QorIQ LS1012A
1480 Layerscape Architecture processor.
1482 config TARGET_LS1012A2G5RDB
1483 bool "Support ls1012a2g5rdb"
1486 select ARCH_SUPPORT_TFABOOT
1487 select BOARD_LATE_INIT
1488 select GPIO_EXTRA_HEADER
1491 Support for Freescale LS1012A2G5RDB platform.
1492 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1493 development platform that supports the QorIQ LS1012A
1494 Layerscape Architecture processor.
1496 config TARGET_LS1012AFRWY
1497 bool "Support ls1012afrwy"
1500 select ARCH_SUPPORT_TFABOOT
1501 select BOARD_LATE_INIT
1502 select GPIO_EXTRA_HEADER
1506 Support for Freescale LS1012AFRWY platform.
1507 The LS1012A FRWY board (FRWY) is a high-performance
1508 development platform that supports the QorIQ LS1012A
1509 Layerscape Architecture processor.
1511 config TARGET_LS1012AFRDM
1512 bool "Support ls1012afrdm"
1515 select ARCH_SUPPORT_TFABOOT
1516 select GPIO_EXTRA_HEADER
1518 Support for Freescale LS1012AFRDM platform.
1519 The LS1012A Freedom board (FRDM) is a high-performance
1520 development platform that supports the QorIQ LS1012A
1521 Layerscape Architecture processor.
1523 config TARGET_LS1028AQDS
1524 bool "Support ls1028aqds"
1527 select ARMV8_MULTIENTRY
1528 select ARCH_SUPPORT_TFABOOT
1529 select BOARD_LATE_INIT
1530 select GPIO_EXTRA_HEADER
1532 Support for Freescale LS1028AQDS platform
1533 The LS1028A Development System (QDS) is a high-performance
1534 development platform that supports the QorIQ LS1028A
1535 Layerscape Architecture processor.
1537 config TARGET_LS1028ARDB
1538 bool "Support ls1028ardb"
1541 select ARMV8_MULTIENTRY
1542 select ARCH_SUPPORT_TFABOOT
1543 select BOARD_LATE_INIT
1544 select GPIO_EXTRA_HEADER
1546 Support for Freescale LS1028ARDB platform
1547 The LS1028A Development System (RDB) is a high-performance
1548 development platform that supports the QorIQ LS1028A
1549 Layerscape Architecture processor.
1551 config TARGET_LS1088ARDB
1552 bool "Support ls1088ardb"
1555 select ARMV8_MULTIENTRY
1556 select ARCH_SUPPORT_TFABOOT
1557 select BOARD_LATE_INIT
1559 select FSL_DDR_INTERACTIVE if !SD_BOOT
1560 select GPIO_EXTRA_HEADER
1562 Support for NXP LS1088ARDB platform.
1563 The LS1088A Reference design board (RDB) is a high-performance
1564 development platform that supports the QorIQ LS1088A
1565 Layerscape Architecture processor.
1567 config TARGET_LS1021AQDS
1568 bool "Support ls1021aqds"
1570 select ARCH_SUPPORT_PSCI
1571 select BOARD_EARLY_INIT_F
1572 select BOARD_LATE_INIT
1574 select CPU_V7_HAS_NONSEC
1575 select CPU_V7_HAS_VIRT
1576 select LS1_DEEP_SLEEP
1579 select FSL_DDR_INTERACTIVE
1580 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1581 select GPIO_EXTRA_HEADER
1582 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1585 config TARGET_LS1021ATWR
1586 bool "Support ls1021atwr"
1588 select ARCH_SUPPORT_PSCI
1589 select BOARD_EARLY_INIT_F
1590 select BOARD_LATE_INIT
1592 select CPU_V7_HAS_NONSEC
1593 select CPU_V7_HAS_VIRT
1594 select LS1_DEEP_SLEEP
1596 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1597 select GPIO_EXTRA_HEADER
1600 config TARGET_PG_WCOM_SELI8
1601 bool "Support Hitachi-Powergrids SELI8 service unit card"
1603 select ARCH_SUPPORT_PSCI
1604 select BOARD_EARLY_INIT_F
1605 select BOARD_LATE_INIT
1607 select CPU_V7_HAS_NONSEC
1608 select CPU_V7_HAS_VIRT
1610 select FSL_DDR_INTERACTIVE
1611 select GPIO_EXTRA_HEADER
1615 Support for Hitachi-Powergrids SELI8 service unit card.
1616 SELI8 is a QorIQ LS1021a based service unit card used
1617 in XMC20 and FOX615 product families.
1619 config TARGET_PG_WCOM_EXPU1
1620 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1622 select ARCH_SUPPORT_PSCI
1623 select BOARD_EARLY_INIT_F
1624 select BOARD_LATE_INIT
1626 select CPU_V7_HAS_NONSEC
1627 select CPU_V7_HAS_VIRT
1629 select FSL_DDR_INTERACTIVE
1633 Support for Hitachi-Powergrids EXPU1 service unit card.
1634 EXPU1 is a QorIQ LS1021a based service unit card used
1635 in XMC20 and FOX615 product families.
1637 config TARGET_LS1021ATSN
1638 bool "Support ls1021atsn"
1640 select ARCH_SUPPORT_PSCI
1641 select BOARD_EARLY_INIT_F
1642 select BOARD_LATE_INIT
1644 select CPU_V7_HAS_NONSEC
1645 select CPU_V7_HAS_VIRT
1646 select LS1_DEEP_SLEEP
1648 select GPIO_EXTRA_HEADER
1651 config TARGET_LS1021AIOT
1652 bool "Support ls1021aiot"
1654 select ARCH_SUPPORT_PSCI
1655 select BOARD_LATE_INIT
1657 select CPU_V7_HAS_NONSEC
1658 select CPU_V7_HAS_VIRT
1660 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1661 select GPIO_EXTRA_HEADER
1664 Support for Freescale LS1021AIOT platform.
1665 The LS1021A Freescale board (IOT) is a high-performance
1666 development platform that supports the QorIQ LS1021A
1667 Layerscape Architecture processor.
1669 config TARGET_LS1043AQDS
1670 bool "Support ls1043aqds"
1673 select ARMV8_MULTIENTRY
1674 select ARCH_SUPPORT_TFABOOT
1675 select BOARD_EARLY_INIT_F
1676 select BOARD_LATE_INIT
1678 select FSL_DDR_INTERACTIVE if !SPL
1679 select FSL_DSPI if !SPL_NO_DSPI
1680 select DM_SPI_FLASH if FSL_DSPI
1681 select GPIO_EXTRA_HEADER
1685 Support for Freescale LS1043AQDS platform.
1687 config TARGET_LS1043ARDB
1688 bool "Support ls1043ardb"
1691 select ARMV8_MULTIENTRY
1692 select ARCH_SUPPORT_TFABOOT
1693 select BOARD_EARLY_INIT_F
1694 select BOARD_LATE_INIT
1696 select FSL_DSPI if !SPL_NO_DSPI
1697 select DM_SPI_FLASH if FSL_DSPI
1698 select GPIO_EXTRA_HEADER
1700 Support for Freescale LS1043ARDB platform.
1702 config TARGET_LS1046AQDS
1703 bool "Support ls1046aqds"
1706 select ARMV8_MULTIENTRY
1707 select ARCH_SUPPORT_TFABOOT
1708 select BOARD_EARLY_INIT_F
1709 select BOARD_LATE_INIT
1710 select DM_SPI_FLASH if DM_SPI
1712 select FSL_DDR_BIST if !SPL
1713 select FSL_DDR_INTERACTIVE if !SPL
1714 select FSL_DDR_INTERACTIVE if !SPL
1715 select GPIO_EXTRA_HEADER
1718 Support for Freescale LS1046AQDS platform.
1719 The LS1046A Development System (QDS) is a high-performance
1720 development platform that supports the QorIQ LS1046A
1721 Layerscape Architecture processor.
1723 config TARGET_LS1046ARDB
1724 bool "Support ls1046ardb"
1727 select ARMV8_MULTIENTRY
1728 select ARCH_SUPPORT_TFABOOT
1729 select BOARD_EARLY_INIT_F
1730 select BOARD_LATE_INIT
1731 select DM_SPI_FLASH if DM_SPI
1732 select POWER_MC34VR500
1735 select FSL_DDR_INTERACTIVE if !SPL
1736 select GPIO_EXTRA_HEADER
1739 Support for Freescale LS1046ARDB platform.
1740 The LS1046A Reference Design Board (RDB) is a high-performance
1741 development platform that supports the QorIQ LS1046A
1742 Layerscape Architecture processor.
1744 config TARGET_LS1046AFRWY
1745 bool "Support ls1046afrwy"
1748 select ARMV8_MULTIENTRY
1749 select ARCH_SUPPORT_TFABOOT
1750 select BOARD_EARLY_INIT_F
1751 select BOARD_LATE_INIT
1752 select DM_SPI_FLASH if DM_SPI
1753 select GPIO_EXTRA_HEADER
1756 Support for Freescale LS1046AFRWY platform.
1757 The LS1046A Freeway Board (FRWY) is a high-performance
1758 development platform that supports the QorIQ LS1046A
1759 Layerscape Architecture processor.
1765 select ARMV8_MULTIENTRY
1781 select GPIO_EXTRA_HEADER
1782 select SPL_DM if SPL
1783 select SPL_DM_SPI if SPL
1784 select SPL_DM_SPI_FLASH if SPL
1785 select SPL_DM_I2C if SPL
1786 select SPL_DM_MMC if SPL
1787 select SPL_DM_SERIAL if SPL
1789 Support for Kontron SMARC-sAL28 board.
1792 bool "Support ten64"
1794 select ARCH_MISC_INIT
1796 select ARMV8_MULTIENTRY
1797 select ARCH_SUPPORT_TFABOOT
1798 select BOARD_LATE_INIT
1800 select FSL_DDR_INTERACTIVE if !SD_BOOT
1801 select GPIO_EXTRA_HEADER
1803 Support for Traverse Technologies Ten64 board, based
1806 config TARGET_COLIBRI_PXA270
1807 bool "Support colibri_pxa270"
1809 select GPIO_EXTRA_HEADER
1811 config ARCH_UNIPHIER
1812 bool "Socionext UniPhier SoCs"
1813 select BOARD_LATE_INIT
1822 select OF_BOARD_SETUP
1826 select SPL_BOARD_INIT if SPL
1827 select SPL_DM if SPL
1828 select SPL_LIBCOMMON_SUPPORT if SPL
1829 select SPL_LIBGENERIC_SUPPORT if SPL
1830 select SPL_OF_CONTROL if SPL
1831 select SPL_PINCTRL if SPL
1834 imply DISTRO_DEFAULTS
1837 Support for UniPhier SoC family developed by Socionext Inc.
1838 (formerly, System LSI Business Division of Panasonic Corporation)
1840 config ARCH_SYNQUACER
1841 bool "Socionext SynQuacer SoCs"
1847 select SYSRESET_PSCI
1850 Support for SynQuacer SoC family developed by Socionext Inc.
1851 This SoC is used on 96boards EE DeveloperBox.
1854 bool "Support STMicroelectronics STM32 MCU with cortex M"
1861 bool "Support STMicrolectronics SoCs"
1870 Support for STMicroelectronics STiH407/10 SoC family.
1871 This SoC is used on Linaro 96Board STiH410-B2260
1874 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1875 select ARCH_MISC_INIT
1876 select ARCH_SUPPORT_TFABOOT
1877 select BOARD_LATE_INIT
1886 select OF_SYSTEM_SETUP
1892 select SYS_THUMB_BUILD
1896 imply OF_LIBFDT_OVERLAY
1897 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1901 Support for STM32MP SoC family developed by STMicroelectronics,
1902 MPUs based on ARM cortex A core
1903 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1904 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1906 SPL is the unsecure FSBL for the basic boot chain.
1908 config ARCH_ROCKCHIP
1909 bool "Support Rockchip SoCs"
1911 select BINMAN if SPL_OPTEE || (SPL && !ARM64)
1921 select ENABLE_ARM_SOC_BOOT0_HOOK
1924 select SPL_DM if SPL
1925 select SPL_DM_SPI if SPL
1926 select SPL_DM_SPI_FLASH if SPL
1928 select SYS_THUMB_BUILD if !ARM64
1931 imply DEBUG_UART_BOARD_INIT
1932 imply DISTRO_DEFAULTS
1934 imply SARADC_ROCKCHIP
1936 imply SPL_SYS_MALLOC_SIMPLE
1939 imply USB_FUNCTION_FASTBOOT
1941 config ARCH_OCTEONTX
1942 bool "Support OcteonTX SoCs"
1945 select GPIO_EXTRA_HEADER
1949 select BOARD_LATE_INIT
1950 select SYS_CACHE_SHIFT_7
1951 select SYS_PCI_64BIT if PCI
1952 imply OF_HAS_PRIOR_STAGE
1954 config ARCH_OCTEONTX2
1955 bool "Support OcteonTX2 SoCs"
1958 select GPIO_EXTRA_HEADER
1962 select BOARD_LATE_INIT
1963 select SYS_CACHE_SHIFT_7
1964 select SYS_PCI_64BIT if PCI
1965 imply OF_HAS_PRIOR_STAGE
1967 config TARGET_THUNDERX_88XX
1968 bool "Support ThunderX 88xx"
1970 select GPIO_EXTRA_HEADER
1973 select SYS_CACHE_SHIFT_7
1976 bool "Support Aspeed SoCs"
1981 config TARGET_DURIAN
1982 bool "Support Phytium Durian Platform"
1984 select GPIO_EXTRA_HEADER
1986 Support for durian platform.
1987 It has 2GB Sdram, uart and pcie.
1989 config TARGET_POMELO
1990 bool "Support Phytium Pomelo Platform"
2002 select DM_ETH if NET
2005 Support for pomelo platform.
2006 It has 8GB Sdram, uart and pcie.
2008 config TARGET_PRESIDIO_ASIC
2009 bool "Support Cortina Presidio ASIC Platform"
2013 config TARGET_XENGUEST_ARM64
2014 bool "Xen guest ARM64"
2018 select LINUX_KERNEL_IMAGE_HEADER
2021 imply OF_HAS_PRIOR_STAGE
2025 config SUPPORT_PASSING_ATAGS
2026 bool "Support pre-devicetree ATAG-based booting"
2028 imply SETUP_MEMORY_TAGS
2030 Support for booting older Linux kernels, using ATAGs rather than
2031 passing a devicetree. This is option is rarely used, and the
2032 semantics are defined at
2033 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
2035 config SETUP_MEMORY_TAGS
2036 bool "Pass memory size information via ATAG"
2037 depends on SUPPORT_PASSING_ATAGS
2040 bool "Pass Linux kernel cmdline via ATAG"
2041 depends on SUPPORT_PASSING_ATAGS
2044 bool "Pass initrd starting point and size via ATAG"
2045 depends on SUPPORT_PASSING_ATAGS
2048 bool "Pass system revision via ATAG"
2049 depends on SUPPORT_PASSING_ATAGS
2052 bool "Pass system serial number via ATAG"
2053 depends on SUPPORT_PASSING_ATAGS
2055 config STATIC_MACH_TYPE
2056 bool "Statically define the Machine ID number"
2058 When booting via ATAGs, enable this option if we know the correct
2059 machine ID number to use at compile time. Some systems will be
2060 passed the number dynamically by whatever loads U-Boot.
2063 int "Machine ID number"
2064 depends on STATIC_MACH_TYPE
2066 When booting via ATAGs, the machine type must be passed as a number.
2067 For the full list see https://www.arm.linux.org.uk/developer/machines
2069 config ARCH_SUPPORT_TFABOOT
2073 bool "Support for booting from TF-A"
2074 depends on ARCH_SUPPORT_TFABOOT
2076 Some platforms support the setup of secure registers (for instance
2077 for CPU errata handling) or provide secure services like PSCI.
2078 Those services could also be provided by other firmware parts
2079 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
2080 does not need to (and cannot) execute this code.
2081 Enabling this option will make a U-Boot binary that is relying
2082 on other firmware layers to provide secure functionality.
2084 config TI_SECURE_DEVICE
2085 bool "HS Device Type Support"
2086 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2088 If a high secure (HS) device type is being used, this config
2089 must be set. This option impacts various aspects of the
2090 build system (to create signed boot images that can be
2091 authenticated) and the code. See the doc/README.ti-secure
2092 file for further details.
2094 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
2095 config ISW_ENTRY_ADDR
2096 hex "Address in memory or XIP address of bootloader entry point"
2097 default 0x402F4000 if AM43XX
2098 default 0x402F0400 if AM33XX
2099 default 0x40301350 if OMAP54XX
2101 After any reset, the boot ROM searches the boot media for a valid
2102 boot image. For non-XIP devices, the ROM then copies the image into
2103 internal memory. For all boot modes, after the ROM processes the
2104 boot image it eventually computes the entry point address depending
2105 on the device type (secure/non-secure), boot media (xip/non-xip) and
2109 config SYS_KWD_CONFIG
2110 string "kwbimage config file path"
2111 depends on ARCH_KIRKWOOD || ARCH_MVEBU
2112 default "arch/arm/mach-mvebu/kwbimage.cfg"
2114 Path within the source directory to the kwbimage.cfg file to use
2115 when packaging the U-Boot image for use.
2117 source "arch/arm/mach-apple/Kconfig"
2119 source "arch/arm/mach-aspeed/Kconfig"
2121 source "arch/arm/mach-at91/Kconfig"
2123 source "arch/arm/mach-bcm283x/Kconfig"
2125 source "arch/arm/mach-bcmstb/Kconfig"
2127 source "arch/arm/mach-davinci/Kconfig"
2129 source "arch/arm/mach-exynos/Kconfig"
2131 source "arch/arm/mach-highbank/Kconfig"
2133 source "arch/arm/mach-integrator/Kconfig"
2135 source "arch/arm/mach-ipq40xx/Kconfig"
2137 source "arch/arm/mach-k3/Kconfig"
2139 source "arch/arm/mach-keystone/Kconfig"
2141 source "arch/arm/mach-kirkwood/Kconfig"
2143 source "arch/arm/mach-lpc32xx/Kconfig"
2145 source "arch/arm/mach-mvebu/Kconfig"
2147 source "arch/arm/mach-octeontx/Kconfig"
2149 source "arch/arm/mach-octeontx2/Kconfig"
2151 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2153 source "arch/arm/mach-imx/mx3/Kconfig"
2155 source "arch/arm/mach-imx/mx5/Kconfig"
2157 source "arch/arm/mach-imx/mx6/Kconfig"
2159 source "arch/arm/mach-imx/mx7/Kconfig"
2161 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2163 source "arch/arm/mach-imx/imx8/Kconfig"
2165 source "arch/arm/mach-imx/imx8m/Kconfig"
2167 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2169 source "arch/arm/mach-imx/imxrt/Kconfig"
2171 source "arch/arm/mach-imx/mxs/Kconfig"
2173 source "arch/arm/mach-omap2/Kconfig"
2175 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2177 source "arch/arm/mach-orion5x/Kconfig"
2179 source "arch/arm/mach-owl/Kconfig"
2181 source "arch/arm/mach-rmobile/Kconfig"
2183 source "arch/arm/mach-meson/Kconfig"
2185 source "arch/arm/mach-mediatek/Kconfig"
2187 source "arch/arm/mach-qemu/Kconfig"
2189 source "arch/arm/mach-rockchip/Kconfig"
2191 source "arch/arm/mach-s5pc1xx/Kconfig"
2193 source "arch/arm/mach-snapdragon/Kconfig"
2195 source "arch/arm/mach-socfpga/Kconfig"
2197 source "arch/arm/mach-sti/Kconfig"
2199 source "arch/arm/mach-stm32/Kconfig"
2201 source "arch/arm/mach-stm32mp/Kconfig"
2203 source "arch/arm/mach-sunxi/Kconfig"
2205 source "arch/arm/mach-tegra/Kconfig"
2207 source "arch/arm/mach-u8500/Kconfig"
2209 source "arch/arm/mach-uniphier/Kconfig"
2211 source "arch/arm/cpu/armv7/vf610/Kconfig"
2213 source "arch/arm/mach-zynq/Kconfig"
2215 source "arch/arm/mach-zynqmp/Kconfig"
2217 source "arch/arm/mach-versal/Kconfig"
2219 source "arch/arm/mach-zynqmp-r5/Kconfig"
2221 source "arch/arm/cpu/armv7/Kconfig"
2223 source "arch/arm/cpu/armv8/Kconfig"
2225 source "arch/arm/mach-imx/Kconfig"
2227 source "arch/arm/mach-nexell/Kconfig"
2229 source "board/armltd/total_compute/Kconfig"
2231 source "board/bosch/shc/Kconfig"
2232 source "board/bosch/guardian/Kconfig"
2233 source "board/Marvell/octeontx/Kconfig"
2234 source "board/Marvell/octeontx2/Kconfig"
2235 source "board/armltd/vexpress/Kconfig"
2236 source "board/armltd/vexpress64/Kconfig"
2237 source "board/cortina/presidio-asic/Kconfig"
2238 source "board/broadcom/bcm963158/Kconfig"
2239 source "board/broadcom/bcm96753ref/Kconfig"
2240 source "board/broadcom/bcm968360bg/Kconfig"
2241 source "board/broadcom/bcm968580xref/Kconfig"
2242 source "board/broadcom/bcmns3/Kconfig"
2243 source "board/cavium/thunderx/Kconfig"
2244 source "board/eets/pdu001/Kconfig"
2245 source "board/emulation/qemu-arm/Kconfig"
2246 source "board/freescale/ls2080aqds/Kconfig"
2247 source "board/freescale/ls2080ardb/Kconfig"
2248 source "board/freescale/ls1088a/Kconfig"
2249 source "board/freescale/ls1028a/Kconfig"
2250 source "board/freescale/ls1021aqds/Kconfig"
2251 source "board/freescale/ls1043aqds/Kconfig"
2252 source "board/freescale/ls1021atwr/Kconfig"
2253 source "board/freescale/ls1021atsn/Kconfig"
2254 source "board/freescale/ls1021aiot/Kconfig"
2255 source "board/freescale/ls1046aqds/Kconfig"
2256 source "board/freescale/ls1043ardb/Kconfig"
2257 source "board/freescale/ls1046ardb/Kconfig"
2258 source "board/freescale/ls1046afrwy/Kconfig"
2259 source "board/freescale/ls1012aqds/Kconfig"
2260 source "board/freescale/ls1012ardb/Kconfig"
2261 source "board/freescale/ls1012afrdm/Kconfig"
2262 source "board/freescale/lx2160a/Kconfig"
2263 source "board/grinn/chiliboard/Kconfig"
2264 source "board/hisilicon/hikey/Kconfig"
2265 source "board/hisilicon/hikey960/Kconfig"
2266 source "board/hisilicon/poplar/Kconfig"
2267 source "board/isee/igep003x/Kconfig"
2268 source "board/kontron/sl28/Kconfig"
2269 source "board/myir/mys_6ulx/Kconfig"
2270 source "board/seeed/npi_imx6ull/Kconfig"
2271 source "board/socionext/developerbox/Kconfig"
2272 source "board/st/stv0991/Kconfig"
2273 source "board/tcl/sl50/Kconfig"
2274 source "board/toradex/colibri_pxa270/Kconfig"
2275 source "board/traverse/ten64/Kconfig"
2276 source "board/variscite/dart_6ul/Kconfig"
2277 source "board/vscom/baltos/Kconfig"
2278 source "board/phytium/durian/Kconfig"
2279 source "board/phytium/pomelo/Kconfig"
2280 source "board/xen/xenguest_arm64/Kconfig"
2281 source "board/keymile/Kconfig"
2283 source "arch/arm/Kconfig.debug"
2288 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2289 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2290 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64