1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
15 select INIT_SP_RELATIVE
17 U-Boot expects to be linked to a specific hard-coded address, and to
18 be loaded to and run from that address. This option lifts that
19 restriction, thus allowing the code to be loaded to and executed
20 from almost any address. This logic relies on the relocation
21 information that is embedded in the binary to support U-Boot
22 relocating itself to the top-of-RAM later during execution.
24 config INIT_SP_RELATIVE
25 bool "Specify the early stack pointer relative to the .bss section"
27 U-Boot typically uses a hard-coded value for the stack pointer
28 before relocation. Enable this option to instead calculate the
29 initial SP at run-time. This is useful to avoid hard-coding addresses
30 into U-Boot, so that it can be loaded and executed at arbitrary
31 addresses and thus avoid using arbitrary addresses at runtime.
33 If this option is enabled, the early stack pointer is set to
34 &_bss_start with a offset value added. The offset is specified by
35 SYS_INIT_SP_BSS_OFFSET.
37 config SYS_INIT_SP_BSS_OFFSET
38 int "Early stack offset from the .bss base address"
39 depends on INIT_SP_RELATIVE
42 This option's value is the offset added to &_bss_start in order to
43 calculate the stack pointer. This offset should be large enough so
44 that the early malloc region, global data (gd), and early stack usage
45 do not overlap any appended DTB.
47 config LINUX_KERNEL_IMAGE_HEADER
50 Place a Linux kernel image header at the start of the U-Boot binary.
51 The format of the header is described in the Linux kernel source at
52 Documentation/arm64/booting.txt. This feature is useful since the
53 image header reports the amount of memory (BSS and similar) that
54 U-Boot needs to use, but which isn't part of the binary.
56 if LINUX_KERNEL_IMAGE_HEADER
57 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
60 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
61 TEXT_OFFSET value written to the Linux kernel image header.
68 ARM GICV3 Interrupt translation service (ITS).
69 Basic support for programming locality specific peripheral
70 interrupts (LPI) configuration tables and enable LPI tables.
71 LPI configuration table can be used by u-boot or Linux.
72 ARM GICV3 has limitation, once the LPI table is enabled, LPI
73 configuration table can not be re-programmed, unless GICV3 reset.
77 default y if ARM64 && !POSITION_INDEPENDENT
79 config DMA_ADDR_T_64BIT
89 # Used for compatibility with asm files copied from the kernel
90 config ARM_ASM_UNIFIED
94 # Used for compatibility with asm files copied from the kernel
99 bool "Do not enable icache"
102 Do not enable instruction cache in U-Boot.
104 config SPL_SYS_ICACHE_OFF
105 bool "Do not enable icache in SPL"
107 default SYS_ICACHE_OFF
109 Do not enable instruction cache in SPL.
111 config SYS_DCACHE_OFF
112 bool "Do not enable dcache"
115 Do not enable data cache in U-Boot.
117 config SPL_SYS_DCACHE_OFF
118 bool "Do not enable dcache in SPL"
120 default SYS_DCACHE_OFF
122 Do not enable data cache in SPL.
124 config SYS_ARM_CACHE_CP15
125 bool "CP15 based cache enabling support"
127 Select this if your processor suports enabling caches by using
131 bool "MMU-based Paged Memory Management Support"
132 select SYS_ARM_CACHE_CP15
134 Select if you want MMU-based virtualised addressing space
135 support via paged memory management.
138 bool 'Use the ARM v7 PMSA Compliant MPU'
140 Some ARM systems without an MMU have instead a Memory Protection
141 Unit (MPU) that defines the type and permissions for regions of
143 If your CPU has an MPU then you should choose 'y' here unless you
144 know that you do not want to use the MPU.
146 # If set, the workarounds for these ARM errata are applied early during U-Boot
147 # startup. Note that in general these options force the workarounds to be
148 # applied; no CPU-type/version detection exists, unlike the similar options in
149 # the Linux kernel. Do not set these options unless they apply! Also note that
150 # the following can be machine-specific errata. These do have ability to
151 # provide rudimentary version and machine-specific checks, but expect no
153 # CONFIG_ARM_ERRATA_430973
154 # CONFIG_ARM_ERRATA_454179
155 # CONFIG_ARM_ERRATA_621766
156 # CONFIG_ARM_ERRATA_798870
157 # CONFIG_ARM_ERRATA_801819
158 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
159 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
161 config ARM_ERRATA_430973
164 config ARM_ERRATA_454179
167 config ARM_ERRATA_621766
170 config ARM_ERRATA_716044
173 config ARM_ERRATA_725233
176 config ARM_ERRATA_742230
179 config ARM_ERRATA_743622
182 config ARM_ERRATA_751472
185 config ARM_ERRATA_761320
188 config ARM_ERRATA_773022
191 config ARM_ERRATA_774769
194 config ARM_ERRATA_794072
197 config ARM_ERRATA_798870
200 config ARM_ERRATA_801819
203 config ARM_ERRATA_826974
206 config ARM_ERRATA_828024
209 config ARM_ERRATA_829520
212 config ARM_ERRATA_833069
215 config ARM_ERRATA_833471
218 config ARM_ERRATA_845369
221 config ARM_ERRATA_852421
224 config ARM_ERRATA_852423
227 config ARM_ERRATA_855873
230 config ARM_CORTEX_A8_CVE_2017_5715
233 config ARM_CORTEX_A15_CVE_2017_5715
238 select SYS_CACHE_SHIFT_5
243 select SYS_CACHE_SHIFT_5
248 select SYS_CACHE_SHIFT_5
253 select SYS_CACHE_SHIFT_5
258 select SYS_CACHE_SHIFT_5
264 select SYS_CACHE_SHIFT_5
271 select SYS_CACHE_SHIFT_6
278 select SYS_CACHE_SHIFT_5
279 select SYS_THUMB_BUILD
285 select SYS_ARM_CACHE_CP15
287 select SYS_CACHE_SHIFT_6
291 select SYS_CACHE_SHIFT_5
296 select SYS_CACHE_SHIFT_5
300 default "arm720t" if CPU_ARM720T
301 default "arm920t" if CPU_ARM920T
302 default "arm926ejs" if CPU_ARM926EJS
303 default "arm946es" if CPU_ARM946ES
304 default "arm1136" if CPU_ARM1136
305 default "arm1176" if CPU_ARM1176
306 default "armv7" if CPU_V7A
307 default "armv7" if CPU_V7R
308 default "armv7m" if CPU_V7M
309 default "pxa" if CPU_PXA
310 default "sa1100" if CPU_SA1100
311 default "armv8" if ARM64
315 default 4 if CPU_ARM720T
316 default 4 if CPU_ARM920T
317 default 5 if CPU_ARM926EJS
318 default 5 if CPU_ARM946ES
319 default 6 if CPU_ARM1136
320 default 6 if CPU_ARM1176
325 default 4 if CPU_SA1100
328 config SYS_CACHE_SHIFT_5
331 config SYS_CACHE_SHIFT_6
334 config SYS_CACHE_SHIFT_7
337 config SYS_CACHELINE_SIZE
339 default 128 if SYS_CACHE_SHIFT_7
340 default 64 if SYS_CACHE_SHIFT_6
341 default 32 if SYS_CACHE_SHIFT_5
344 prompt "Select the ARM data write cache policy"
345 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
346 TARGET_BCMNSP || CPU_PXA || RZA1
347 default SYS_ARM_CACHE_WRITEBACK
349 config SYS_ARM_CACHE_WRITEBACK
350 bool "Write-back (WB)"
352 A write updates the cache only and marks the cache line as dirty.
353 External memory is updated only when the line is evicted or explicitly
356 config SYS_ARM_CACHE_WRITETHROUGH
357 bool "Write-through (WT)"
359 A write updates both the cache and the external memory system.
360 This does not mark the cache line as dirty.
362 config SYS_ARM_CACHE_WRITEALLOC
363 bool "Write allocation (WA)"
365 A cache line is allocated on a write miss. This means that executing a
366 store instruction on the processor might cause a burst read to occur.
367 There is a linefill to obtain the data for the cache line, before the
372 bool "Enable ARCH_CPU_INIT"
374 Some architectures require a call to arch_cpu_init().
375 Say Y here to enable it
377 config SYS_ARCH_TIMER
378 bool "ARM Generic Timer support"
379 depends on CPU_V7A || ARM64
382 The ARM Generic Timer (aka arch-timer) provides an architected
383 interface to a timer source on an SoC.
384 It is mandatory for ARMv8 implementation and widely available
388 bool "Support for ARM SMC Calling Convention (SMCCC)"
389 depends on CPU_V7A || ARM64
392 Say Y here if you want to enable ARM SMC Calling Convention.
393 This should be enabled if U-Boot needs to communicate with system
394 firmware (for example, PSCI) according to SMCCC.
397 bool "support boot from semihosting"
399 In emulated environments, semihosting is a way for
400 the hosted environment to call out to the emulator to
401 retrieve files from the host machine.
403 config SYS_THUMB_BUILD
404 bool "Build U-Boot using the Thumb instruction set"
407 Use this flag to build U-Boot using the Thumb instruction set for
408 ARM architectures. Thumb instruction set provides better code
409 density. For ARM architectures that support Thumb2 this flag will
410 result in Thumb2 code generated by GCC.
412 config SPL_SYS_THUMB_BUILD
413 bool "Build SPL using the Thumb instruction set"
414 default y if SYS_THUMB_BUILD
415 depends on !ARM64 && SPL
417 Use this flag to build SPL using the Thumb instruction set for
418 ARM architectures. Thumb instruction set provides better code
419 density. For ARM architectures that support Thumb2 this flag will
420 result in Thumb2 code generated by GCC.
422 config TPL_SYS_THUMB_BUILD
423 bool "Build TPL using the Thumb instruction set"
424 default y if SYS_THUMB_BUILD
425 depends on TPL && !ARM64
427 Use this flag to build TPL using the Thumb instruction set for
428 ARM architectures. Thumb instruction set provides better code
429 density. For ARM architectures that support Thumb2 this flag will
430 result in Thumb2 code generated by GCC.
433 config SYS_L2CACHE_OFF
436 If SoC does not support L2CACHE or one does not want to enable
437 L2CACHE, choose this option.
439 config ENABLE_ARM_SOC_BOOT0_HOOK
440 bool "prepare BOOT0 header"
442 If the SoC's BOOT0 requires a header area filled with (magic)
443 values, then choose this option, and create a file included as
444 <asm/arch/boot0.h> which contains the required assembler code.
446 config ARM_CORTEX_CPU_IS_UP
450 config USE_ARCH_MEMCPY
451 bool "Use an assembly optimized implementation of memcpy"
455 Enable the generation of an optimized version of memcpy.
456 Such an implementation may be faster under some conditions
457 but may increase the binary size.
459 config SPL_USE_ARCH_MEMCPY
460 bool "Use an assembly optimized implementation of memcpy for SPL"
461 default y if USE_ARCH_MEMCPY
462 depends on !ARM64 && SPL
464 Enable the generation of an optimized version of memcpy.
465 Such an implementation may be faster under some conditions
466 but may increase the binary size.
468 config TPL_USE_ARCH_MEMCPY
469 bool "Use an assembly optimized implementation of memcpy for TPL"
470 default y if USE_ARCH_MEMCPY
471 depends on !ARM64 && TPL
473 Enable the generation of an optimized version of memcpy.
474 Such an implementation may be faster under some conditions
475 but may increase the binary size.
477 config USE_ARCH_MEMSET
478 bool "Use an assembly optimized implementation of memset"
482 Enable the generation of an optimized version of memset.
483 Such an implementation may be faster under some conditions
484 but may increase the binary size.
486 config SPL_USE_ARCH_MEMSET
487 bool "Use an assembly optimized implementation of memset for SPL"
488 default y if USE_ARCH_MEMSET
489 depends on !ARM64 && SPL
491 Enable the generation of an optimized version of memset.
492 Such an implementation may be faster under some conditions
493 but may increase the binary size.
495 config TPL_USE_ARCH_MEMSET
496 bool "Use an assembly optimized implementation of memset for TPL"
497 default y if USE_ARCH_MEMSET
498 depends on !ARM64 && TPL
500 Enable the generation of an optimized version of memset.
501 Such an implementation may be faster under some conditions
502 but may increase the binary size.
504 config SET_STACK_SIZE
505 bool "Enable an option to set max stack size that can be used"
506 default y if ARCH_VERSAL || ARCH_ZYNQMP || ARCH_ZYNQ
508 This will enable an option to set max stack size that can be
512 hex "Define max stack size that can be used by U-Boot"
513 depends on SET_STACK_SIZE
514 default 0x4000000 if ARCH_VERSAL || ARCH_ZYNQMP
515 default 0x1000000 if ARCH_ZYNQ
517 Define Max stack size that can be used by U-Boot so that the
518 initrd_high will be calculated as base stack pointer minus this
521 config ARM64_SUPPORT_AARCH32
522 bool "ARM64 system support AArch32 execution state"
524 default y if !TARGET_THUNDERX_88XX
526 This ARM64 system supports AArch32 execution state.
529 prompt "Target select"
534 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
535 select SPL_SEPARATE_BSS if SPL
537 config TARGET_EDB93XX
538 bool "Support edb93xx"
542 config TARGET_ASPENITE
543 bool "Support aspenite"
547 bool "Support gplugd"
555 Support for TI's DaVinci platform.
558 bool "Marvell Kirkwood"
559 select ARCH_MISC_INIT
560 select BOARD_EARLY_INIT_F
564 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
584 config TARGET_SPEAR300
585 bool "Support spear300"
586 select BOARD_EARLY_INIT_F
591 config TARGET_SPEAR310
592 bool "Support spear310"
593 select BOARD_EARLY_INIT_F
598 config TARGET_SPEAR320
599 bool "Support spear320"
600 select BOARD_EARLY_INIT_F
605 config TARGET_SPEAR600
606 bool "Support spear600"
607 select BOARD_EARLY_INIT_F
612 config TARGET_STV0991
613 bool "Support stv0991"
626 select BOARD_LATE_INIT
635 config TARGET_MX35PDK
636 bool "Support mx35pdk"
637 select BOARD_LATE_INIT
641 bool "Broadcom BCM283X family"
647 select SERIAL_SEARCH_ALL
652 bool "Broadcom BCM63158 family"
658 bool "Broadcom BCM68360 family"
664 bool "Broadcom BCM6858 family"
669 config TARGET_VEXPRESS_CA15_TC2
670 bool "Support vexpress_ca15_tc2"
672 select CPU_V7_HAS_NONSEC
673 select CPU_V7_HAS_VIRT
677 bool "Broadcom BCM7XXX family"
681 select OF_PRIOR_STAGE
684 This enables support for Broadcom ARM-based set-top box
685 chipsets, including the 7445 family of chips.
687 config TARGET_VEXPRESS_CA5X2
688 bool "Support vexpress_ca5x2"
692 config TARGET_VEXPRESS_CA9X4
693 bool "Support vexpress_ca9x4"
697 config TARGET_BCM23550_W1D
698 bool "Support bcm23550_w1d"
703 config TARGET_BCM28155_AP
704 bool "Support bcm28155_ap"
709 config TARGET_BCMCYGNUS
710 bool "Support bcmcygnus"
713 imply BCM_SF2_ETH_GMAC
721 bool "Support bcmnsp"
725 bool "Support Broadcom Northstar2"
728 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
729 ARMv8 Cortex-A57 processors targeting a broad range of networking
733 bool "Samsung EXYNOS"
742 imply SYS_THUMB_BUILD
747 bool "Samsung S5PC1XX"
756 bool "Calxeda Highbank"
760 config ARCH_INTEGRATOR
761 bool "ARM Ltd. Integrator family"
772 select SYS_ARCH_TIMER
773 select SYS_THUMB_BUILD
779 bool "Texas Instruments' K3 Architecture"
784 config ARCH_OMAP2PLUS
787 select SPL_BOARD_INIT if SPL
788 select SPL_STACK_R if SPL
794 imply DISTRO_DEFAULTS
797 Support for the Meson SoC family developed by Amlogic Inc.,
798 targeted at media players and tablet computers. We currently
799 support the S905 (GXBaby) 64-bit SoC.
806 select SPL_LIBCOMMON_SUPPORT if SPL
807 select SPL_LIBGENERIC_SUPPORT if SPL
808 select SPL_OF_CONTROL if SPL
811 Support for the MediaTek SoCs family developed by MediaTek Inc.
812 Please refer to doc/README.mediatek for more information.
815 bool "NXP LPC32xx platform"
825 bool "NXP i.MX8 platform"
829 select ENABLE_ARM_SOC_BOOT0_HOOK
832 bool "NXP i.MX8M platform"
839 bool "NXP i.MXRT platform"
847 bool "NXP i.MX23 family"
858 bool "NXP i.MX28 family"
864 bool "NXP i.MX31 family"
870 select ROM_UNIFIED_SECTIONS
872 imply SYS_THUMB_BUILD
876 select ARCH_MISC_INIT
877 select BOARD_EARLY_INIT_F
879 select SYS_FSL_HAS_SEC if IMX_HAB
880 select SYS_FSL_SEC_COMPAT_4
881 select SYS_FSL_SEC_LE
883 imply SYS_THUMB_BUILD
888 select SYS_FSL_HAS_SEC if IMX_HAB
889 select SYS_FSL_SEC_COMPAT_4
890 select SYS_FSL_SEC_LE
892 imply SYS_THUMB_BUILD
896 default "arch/arm/mach-omap2/u-boot-spl.lds"
901 select BOARD_EARLY_INIT_F
906 bool "Actions Semi OWL SoCs"
913 select SYS_RELOC_GD_ENV_ADDR
917 bool "QEMU Virtual Platform"
918 select ARCH_SUPPORT_TFABOOT
928 bool "Renesas ARM SoCs"
929 select BOARD_EARLY_INIT_F if !RZA1
934 imply SYS_THUMB_BUILD
935 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
937 config TARGET_S32V234EVB
938 bool "Support s32v234evb"
940 select SYS_FSL_ERRATUM_ESDHC111
942 config ARCH_SNAPDRAGON
943 bool "Qualcomm Snapdragon SoCs"
956 bool "Altera SOCFPGA family"
957 select ARCH_EARLY_INIT_R
958 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
959 select ARM64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
960 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
963 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
965 select SPL_DM_RESET if DM_RESET
967 select SPL_LIBCOMMON_SUPPORT
968 select SPL_LIBGENERIC_SUPPORT
969 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
970 select SPL_OF_CONTROL
971 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
972 select SPL_SERIAL_SUPPORT
974 select SPL_WATCHDOG_SUPPORT
977 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
979 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
980 select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
989 imply SPL_LIBDISK_SUPPORT
990 imply SPL_MMC_SUPPORT
991 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
992 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
993 imply SPL_SPI_FLASH_SUPPORT
994 imply SPL_SPI_SUPPORT
998 bool "Support sunxi (Allwinner) SoCs"
1001 select CMD_MMC if MMC
1002 select CMD_USB if DISTRO_DEFAULTS
1008 select DM_MMC if MMC
1009 select DM_SCSI if SCSI
1011 select DM_USB if DISTRO_DEFAULTS
1012 select OF_BOARD_SETUP
1015 select SPECIFY_CONSOLE_INDEX
1016 select SPL_STACK_R if SPL
1017 select SPL_SYS_MALLOC_SIMPLE if SPL
1018 select SPL_SYS_THUMB_BUILD if !ARM64
1021 select SYS_THUMB_BUILD if !ARM64
1022 select USB if DISTRO_DEFAULTS
1023 select USB_KEYBOARD if DISTRO_DEFAULTS
1024 select USB_STORAGE if DISTRO_DEFAULTS
1025 select SPL_USE_TINY_PRINTF
1027 select SYS_RELOC_GD_ENV_ADDR
1030 imply CMD_UBI if MTD_RAW_NAND
1031 imply DISTRO_DEFAULTS
1034 imply OF_LIBFDT_OVERLAY
1035 imply PRE_CONSOLE_BUFFER
1036 imply SPL_GPIO_SUPPORT
1037 imply SPL_LIBCOMMON_SUPPORT
1038 imply SPL_LIBGENERIC_SUPPORT
1039 imply SPL_MMC_SUPPORT if MMC
1040 imply SPL_POWER_SUPPORT
1041 imply SPL_SERIAL_SUPPORT
1045 bool "ST-Ericsson U8500 Series"
1049 select DM_MMC if MMC
1051 select DM_USB if USB
1055 imply ARM_PL180_MMCI
1057 imply NOMADIK_MTU_TIMER
1060 imply SYSRESET_SYSCON
1063 bool "Support Xilinx Versal Platform"
1067 select DM_ETH if NET
1068 select DM_MMC if MMC
1071 imply BOARD_LATE_INIT
1074 bool "Freescale Vybrid"
1076 select SYS_FSL_ERRATUM_ESDHC111
1081 bool "Xilinx Zynq based platform"
1086 select DM_ETH if NET
1087 select DM_MMC if MMC
1091 select DM_USB if USB
1094 select SPL_BOARD_INIT if SPL
1095 select SPL_CLK if SPL
1096 select SPL_DM if SPL
1097 select SPL_OF_CONTROL if SPL
1098 select SPL_SEPARATE_BSS if SPL
1100 imply ARCH_EARLY_INIT_R
1101 imply BOARD_LATE_INIT
1107 config ARCH_ZYNQMP_R5
1108 bool "Xilinx ZynqMP R5 based platform"
1112 select DM_ETH if NET
1113 select DM_MMC if MMC
1120 bool "Xilinx ZynqMP based platform"
1124 select DM_ETH if NET
1126 select DM_MMC if MMC
1128 select DM_SPI if SPI
1129 select DM_SPI_FLASH if DM_SPI
1130 select DM_USB if USB
1133 select SPL_BOARD_INIT if SPL
1134 select SPL_CLK if SPL
1135 select SPL_DM_MAILBOX if SPL
1136 select SPL_FIRMWARE if SPL
1137 select SPL_SEPARATE_BSS if SPL
1140 imply BOARD_LATE_INIT
1148 imply DISTRO_DEFAULTS
1151 config TARGET_VEXPRESS64_AEMV8A
1152 bool "Support vexpress_aemv8a"
1156 config TARGET_VEXPRESS64_BASE_FVP
1157 bool "Support Versatile Express ARMv8a FVP BASE model"
1162 config TARGET_VEXPRESS64_JUNO
1163 bool "Support Versatile Express Juno Development Platform"
1178 config TARGET_LS2080A_EMU
1179 bool "Support ls2080a_emu"
1182 select ARMV8_MULTIENTRY
1183 select FSL_DDR_SYNC_REFRESH
1185 Support for Freescale LS2080A_EMU platform.
1186 The LS2080A Development System (EMULATOR) is a pre-silicon
1187 development platform that supports the QorIQ LS2080A
1188 Layerscape Architecture processor.
1190 config TARGET_LS2080A_SIMU
1191 bool "Support ls2080a_simu"
1194 select ARMV8_MULTIENTRY
1195 select BOARD_LATE_INIT
1197 Support for Freescale LS2080A_SIMU platform.
1198 The LS2080A Development System (QDS) is a pre silicon
1199 development platform that supports the QorIQ LS2080A
1200 Layerscape Architecture processor.
1202 config TARGET_LS1088AQDS
1203 bool "Support ls1088aqds"
1206 select ARMV8_MULTIENTRY
1207 select ARCH_SUPPORT_TFABOOT
1208 select BOARD_LATE_INIT
1210 select FSL_DDR_INTERACTIVE if !SD_BOOT
1212 Support for NXP LS1088AQDS platform.
1213 The LS1088A Development System (QDS) is a high-performance
1214 development platform that supports the QorIQ LS1088A
1215 Layerscape Architecture processor.
1217 config TARGET_LS2080AQDS
1218 bool "Support ls2080aqds"
1221 select ARMV8_MULTIENTRY
1222 select ARCH_SUPPORT_TFABOOT
1223 select BOARD_LATE_INIT
1228 select FSL_DDR_INTERACTIVE if !SPL
1230 Support for Freescale LS2080AQDS platform.
1231 The LS2080A Development System (QDS) is a high-performance
1232 development platform that supports the QorIQ LS2080A
1233 Layerscape Architecture processor.
1235 config TARGET_LS2080ARDB
1236 bool "Support ls2080ardb"
1239 select ARMV8_MULTIENTRY
1240 select ARCH_SUPPORT_TFABOOT
1241 select BOARD_LATE_INIT
1244 select FSL_DDR_INTERACTIVE if !SPL
1248 Support for Freescale LS2080ARDB platform.
1249 The LS2080A Reference design board (RDB) is a high-performance
1250 development platform that supports the QorIQ LS2080A
1251 Layerscape Architecture processor.
1253 config TARGET_LS2081ARDB
1254 bool "Support ls2081ardb"
1257 select ARMV8_MULTIENTRY
1258 select BOARD_LATE_INIT
1261 Support for Freescale LS2081ARDB platform.
1262 The LS2081A Reference design board (RDB) is a high-performance
1263 development platform that supports the QorIQ LS2081A/LS2041A
1264 Layerscape Architecture processor.
1266 config TARGET_LX2160ARDB
1267 bool "Support lx2160ardb"
1270 select ARMV8_MULTIENTRY
1271 select ARCH_SUPPORT_TFABOOT
1272 select BOARD_LATE_INIT
1274 Support for NXP LX2160ARDB platform.
1275 The lx2160ardb (LX2160A Reference design board (RDB)
1276 is a high-performance development platform that supports the
1277 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1279 config TARGET_LX2160AQDS
1280 bool "Support lx2160aqds"
1283 select ARMV8_MULTIENTRY
1284 select ARCH_SUPPORT_TFABOOT
1285 select BOARD_LATE_INIT
1287 Support for NXP LX2160AQDS platform.
1288 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1289 is a high-performance development platform that supports the
1290 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1293 bool "Support HiKey 96boards Consumer Edition Platform"
1300 select SPECIFY_CONSOLE_INDEX
1303 Support for HiKey 96boards platform. It features a HI6220
1304 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1306 config TARGET_HIKEY960
1307 bool "Support HiKey960 96boards Consumer Edition Platform"
1315 Support for HiKey960 96boards platform. It features a HI3660
1316 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1318 config TARGET_POPLAR
1319 bool "Support Poplar 96boards Enterprise Edition Platform"
1328 Support for Poplar 96boards EE platform. It features a HI3798cv200
1329 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1330 making it capable of running any commercial set-top solution based on
1333 config TARGET_LS1012AQDS
1334 bool "Support ls1012aqds"
1337 select ARCH_SUPPORT_TFABOOT
1338 select BOARD_LATE_INIT
1340 Support for Freescale LS1012AQDS platform.
1341 The LS1012A Development System (QDS) is a high-performance
1342 development platform that supports the QorIQ LS1012A
1343 Layerscape Architecture processor.
1345 config TARGET_LS1012ARDB
1346 bool "Support ls1012ardb"
1349 select ARCH_SUPPORT_TFABOOT
1350 select BOARD_LATE_INIT
1354 Support for Freescale LS1012ARDB platform.
1355 The LS1012A Reference design board (RDB) is a high-performance
1356 development platform that supports the QorIQ LS1012A
1357 Layerscape Architecture processor.
1359 config TARGET_LS1012A2G5RDB
1360 bool "Support ls1012a2g5rdb"
1363 select ARCH_SUPPORT_TFABOOT
1364 select BOARD_LATE_INIT
1367 Support for Freescale LS1012A2G5RDB platform.
1368 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1369 development platform that supports the QorIQ LS1012A
1370 Layerscape Architecture processor.
1372 config TARGET_LS1012AFRWY
1373 bool "Support ls1012afrwy"
1376 select ARCH_SUPPORT_TFABOOT
1377 select BOARD_LATE_INIT
1381 Support for Freescale LS1012AFRWY platform.
1382 The LS1012A FRWY board (FRWY) is a high-performance
1383 development platform that supports the QorIQ LS1012A
1384 Layerscape Architecture processor.
1386 config TARGET_LS1012AFRDM
1387 bool "Support ls1012afrdm"
1390 select ARCH_SUPPORT_TFABOOT
1392 Support for Freescale LS1012AFRDM platform.
1393 The LS1012A Freedom board (FRDM) is a high-performance
1394 development platform that supports the QorIQ LS1012A
1395 Layerscape Architecture processor.
1397 config TARGET_LS1028AQDS
1398 bool "Support ls1028aqds"
1401 select ARMV8_MULTIENTRY
1402 select ARCH_SUPPORT_TFABOOT
1403 select BOARD_LATE_INIT
1405 Support for Freescale LS1028AQDS platform
1406 The LS1028A Development System (QDS) is a high-performance
1407 development platform that supports the QorIQ LS1028A
1408 Layerscape Architecture processor.
1410 config TARGET_LS1028ARDB
1411 bool "Support ls1028ardb"
1414 select ARMV8_MULTIENTRY
1415 select ARCH_SUPPORT_TFABOOT
1416 select BOARD_LATE_INIT
1418 Support for Freescale LS1028ARDB platform
1419 The LS1028A Development System (RDB) is a high-performance
1420 development platform that supports the QorIQ LS1028A
1421 Layerscape Architecture processor.
1423 config TARGET_LS1088ARDB
1424 bool "Support ls1088ardb"
1427 select ARMV8_MULTIENTRY
1428 select ARCH_SUPPORT_TFABOOT
1429 select BOARD_LATE_INIT
1431 select FSL_DDR_INTERACTIVE if !SD_BOOT
1433 Support for NXP LS1088ARDB platform.
1434 The LS1088A Reference design board (RDB) is a high-performance
1435 development platform that supports the QorIQ LS1088A
1436 Layerscape Architecture processor.
1438 config TARGET_LS1021AQDS
1439 bool "Support ls1021aqds"
1441 select ARCH_SUPPORT_PSCI
1442 select BOARD_EARLY_INIT_F
1443 select BOARD_LATE_INIT
1445 select CPU_V7_HAS_NONSEC
1446 select CPU_V7_HAS_VIRT
1447 select LS1_DEEP_SLEEP
1450 select FSL_DDR_INTERACTIVE
1453 config TARGET_LS1021ATWR
1454 bool "Support ls1021atwr"
1456 select ARCH_SUPPORT_PSCI
1457 select BOARD_EARLY_INIT_F
1458 select BOARD_LATE_INIT
1460 select CPU_V7_HAS_NONSEC
1461 select CPU_V7_HAS_VIRT
1462 select LS1_DEEP_SLEEP
1466 config TARGET_LS1021ATSN
1467 bool "Support ls1021atsn"
1469 select ARCH_SUPPORT_PSCI
1470 select BOARD_EARLY_INIT_F
1471 select BOARD_LATE_INIT
1473 select CPU_V7_HAS_NONSEC
1474 select CPU_V7_HAS_VIRT
1475 select LS1_DEEP_SLEEP
1479 config TARGET_LS1021AIOT
1480 bool "Support ls1021aiot"
1482 select ARCH_SUPPORT_PSCI
1483 select BOARD_LATE_INIT
1485 select CPU_V7_HAS_NONSEC
1486 select CPU_V7_HAS_VIRT
1490 Support for Freescale LS1021AIOT platform.
1491 The LS1021A Freescale board (IOT) is a high-performance
1492 development platform that supports the QorIQ LS1021A
1493 Layerscape Architecture processor.
1495 config TARGET_LS1043AQDS
1496 bool "Support ls1043aqds"
1499 select ARMV8_MULTIENTRY
1500 select ARCH_SUPPORT_TFABOOT
1501 select BOARD_EARLY_INIT_F
1502 select BOARD_LATE_INIT
1504 select FSL_DDR_INTERACTIVE if !SPL
1508 Support for Freescale LS1043AQDS platform.
1510 config TARGET_LS1043ARDB
1511 bool "Support ls1043ardb"
1514 select ARMV8_MULTIENTRY
1515 select ARCH_SUPPORT_TFABOOT
1516 select BOARD_EARLY_INIT_F
1517 select BOARD_LATE_INIT
1520 Support for Freescale LS1043ARDB platform.
1522 config TARGET_LS1046AQDS
1523 bool "Support ls1046aqds"
1526 select ARMV8_MULTIENTRY
1527 select ARCH_SUPPORT_TFABOOT
1528 select BOARD_EARLY_INIT_F
1529 select BOARD_LATE_INIT
1530 select DM_SPI_FLASH if DM_SPI
1532 select FSL_DDR_BIST if !SPL
1533 select FSL_DDR_INTERACTIVE if !SPL
1534 select FSL_DDR_INTERACTIVE if !SPL
1537 Support for Freescale LS1046AQDS platform.
1538 The LS1046A Development System (QDS) is a high-performance
1539 development platform that supports the QorIQ LS1046A
1540 Layerscape Architecture processor.
1542 config TARGET_LS1046ARDB
1543 bool "Support ls1046ardb"
1546 select ARMV8_MULTIENTRY
1547 select ARCH_SUPPORT_TFABOOT
1548 select BOARD_EARLY_INIT_F
1549 select BOARD_LATE_INIT
1550 select DM_SPI_FLASH if DM_SPI
1551 select POWER_MC34VR500
1554 select FSL_DDR_INTERACTIVE if !SPL
1557 Support for Freescale LS1046ARDB platform.
1558 The LS1046A Reference Design Board (RDB) is a high-performance
1559 development platform that supports the QorIQ LS1046A
1560 Layerscape Architecture processor.
1562 config TARGET_LS1046AFRWY
1563 bool "Support ls1046afrwy"
1566 select ARMV8_MULTIENTRY
1567 select ARCH_SUPPORT_TFABOOT
1568 select BOARD_EARLY_INIT_F
1569 select BOARD_LATE_INIT
1570 select DM_SPI_FLASH if DM_SPI
1573 Support for Freescale LS1046AFRWY platform.
1574 The LS1046A Freeway Board (FRWY) is a high-performance
1575 development platform that supports the QorIQ LS1046A
1576 Layerscape Architecture processor.
1578 config TARGET_COLIBRI_PXA270
1579 bool "Support colibri_pxa270"
1582 config ARCH_UNIPHIER
1583 bool "Socionext UniPhier SoCs"
1584 select BOARD_LATE_INIT
1594 select OF_BOARD_SETUP
1598 select SPL_BOARD_INIT if SPL
1599 select SPL_DM if SPL
1600 select SPL_LIBCOMMON_SUPPORT if SPL
1601 select SPL_LIBGENERIC_SUPPORT if SPL
1602 select SPL_OF_CONTROL if SPL
1603 select SPL_PINCTRL if SPL
1606 imply DISTRO_DEFAULTS
1609 Support for UniPhier SoC family developed by Socionext Inc.
1610 (formerly, System LSI Business Division of Panasonic Corporation)
1613 bool "Support STMicroelectronics STM32 MCU with cortex M"
1620 bool "Support STMicrolectronics SoCs"
1629 Support for STMicroelectronics STiH407/10 SoC family.
1630 This SoC is used on Linaro 96Board STiH410-B2260
1633 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1634 select ARCH_MISC_INIT
1635 select ARCH_SUPPORT_TFABOOT
1636 select BOARD_LATE_INIT
1645 select OF_SYSTEM_SETUP
1651 select SYS_THUMB_BUILD
1655 imply OF_LIBFDT_OVERLAY
1656 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1659 Support for STM32MP SoC family developed by STMicroelectronics,
1660 MPUs based on ARM cortex A core
1661 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1662 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1664 SPL is the unsecure FSBL for the basic boot chain.
1666 config ARCH_ROCKCHIP
1667 bool "Support Rockchip SoCs"
1669 select BINMAN if !ARM64
1679 select DM_USB if USB
1680 select ENABLE_ARM_SOC_BOOT0_HOOK
1683 select SPL_DM if SPL
1685 select SYS_THUMB_BUILD if !ARM64
1688 imply DEBUG_UART_BOARD_INIT
1689 imply DISTRO_DEFAULTS
1691 imply SARADC_ROCKCHIP
1693 imply SPL_SYS_MALLOC_SIMPLE
1696 imply USB_FUNCTION_FASTBOOT
1698 config TARGET_THUNDERX_88XX
1699 bool "Support ThunderX 88xx"
1703 select SYS_CACHE_SHIFT_7
1706 bool "Support Aspeed SoCs"
1711 config TARGET_DURIAN
1712 bool "Support Phytium Durian Platform"
1715 Support for durian platform.
1716 It has 2GB Sdram, uart and pcie.
1718 config TARGET_PRESIDIO_ASIC
1719 bool "Support Cortina Presidio ASIC Platform"
1724 config ARCH_SUPPORT_TFABOOT
1728 bool "Support for booting from TF-A"
1729 depends on ARCH_SUPPORT_TFABOOT
1732 Enabling this will make a U-Boot binary that is capable of being
1733 booted via TF-A (Trusted Firmware for Cortex-A).
1735 config TI_SECURE_DEVICE
1736 bool "HS Device Type Support"
1737 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1739 If a high secure (HS) device type is being used, this config
1740 must be set. This option impacts various aspects of the
1741 build system (to create signed boot images that can be
1742 authenticated) and the code. See the doc/README.ti-secure
1743 file for further details.
1745 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1746 config ISW_ENTRY_ADDR
1747 hex "Address in memory or XIP address of bootloader entry point"
1748 default 0x402F4000 if AM43XX
1749 default 0x402F0400 if AM33XX
1750 default 0x40301350 if OMAP54XX
1752 After any reset, the boot ROM searches the boot media for a valid
1753 boot image. For non-XIP devices, the ROM then copies the image into
1754 internal memory. For all boot modes, after the ROM processes the
1755 boot image it eventually computes the entry point address depending
1756 on the device type (secure/non-secure), boot media (xip/non-xip) and
1760 source "arch/arm/mach-aspeed/Kconfig"
1762 source "arch/arm/mach-at91/Kconfig"
1764 source "arch/arm/mach-bcm283x/Kconfig"
1766 source "arch/arm/mach-bcmstb/Kconfig"
1768 source "arch/arm/mach-davinci/Kconfig"
1770 source "arch/arm/mach-exynos/Kconfig"
1772 source "arch/arm/mach-highbank/Kconfig"
1774 source "arch/arm/mach-integrator/Kconfig"
1776 source "arch/arm/mach-k3/Kconfig"
1778 source "arch/arm/mach-keystone/Kconfig"
1780 source "arch/arm/mach-kirkwood/Kconfig"
1782 source "arch/arm/mach-lpc32xx/Kconfig"
1784 source "arch/arm/mach-mvebu/Kconfig"
1786 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1788 source "arch/arm/mach-imx/mx2/Kconfig"
1790 source "arch/arm/mach-imx/mx3/Kconfig"
1792 source "arch/arm/mach-imx/mx5/Kconfig"
1794 source "arch/arm/mach-imx/mx6/Kconfig"
1796 source "arch/arm/mach-imx/mx7/Kconfig"
1798 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1800 source "arch/arm/mach-imx/imx8/Kconfig"
1802 source "arch/arm/mach-imx/imx8m/Kconfig"
1804 source "arch/arm/mach-imx/imxrt/Kconfig"
1806 source "arch/arm/mach-imx/mxs/Kconfig"
1808 source "arch/arm/mach-omap2/Kconfig"
1810 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1812 source "arch/arm/mach-orion5x/Kconfig"
1814 source "arch/arm/mach-owl/Kconfig"
1816 source "arch/arm/mach-rmobile/Kconfig"
1818 source "arch/arm/mach-meson/Kconfig"
1820 source "arch/arm/mach-mediatek/Kconfig"
1822 source "arch/arm/mach-qemu/Kconfig"
1824 source "arch/arm/mach-rockchip/Kconfig"
1826 source "arch/arm/mach-s5pc1xx/Kconfig"
1828 source "arch/arm/mach-snapdragon/Kconfig"
1830 source "arch/arm/mach-socfpga/Kconfig"
1832 source "arch/arm/mach-sti/Kconfig"
1834 source "arch/arm/mach-stm32/Kconfig"
1836 source "arch/arm/mach-stm32mp/Kconfig"
1838 source "arch/arm/mach-sunxi/Kconfig"
1840 source "arch/arm/mach-tegra/Kconfig"
1842 source "arch/arm/mach-u8500/Kconfig"
1844 source "arch/arm/mach-uniphier/Kconfig"
1846 source "arch/arm/cpu/armv7/vf610/Kconfig"
1848 source "arch/arm/mach-zynq/Kconfig"
1850 source "arch/arm/mach-zynqmp/Kconfig"
1852 source "arch/arm/mach-versal/Kconfig"
1854 source "arch/arm/mach-zynqmp-r5/Kconfig"
1856 source "arch/arm/cpu/armv7/Kconfig"
1858 source "arch/arm/cpu/armv8/Kconfig"
1860 source "arch/arm/mach-imx/Kconfig"
1862 source "board/bosch/shc/Kconfig"
1863 source "board/bosch/guardian/Kconfig"
1864 source "board/CarMediaLab/flea3/Kconfig"
1865 source "board/Marvell/aspenite/Kconfig"
1866 source "board/Marvell/gplugd/Kconfig"
1867 source "board/armadeus/apf27/Kconfig"
1868 source "board/armltd/vexpress/Kconfig"
1869 source "board/armltd/vexpress64/Kconfig"
1870 source "board/cortina/presidio-asic/Kconfig"
1871 source "board/broadcom/bcm23550_w1d/Kconfig"
1872 source "board/broadcom/bcm28155_ap/Kconfig"
1873 source "board/broadcom/bcm963158/Kconfig"
1874 source "board/broadcom/bcm968360bg/Kconfig"
1875 source "board/broadcom/bcm968580xref/Kconfig"
1876 source "board/broadcom/bcmcygnus/Kconfig"
1877 source "board/broadcom/bcmnsp/Kconfig"
1878 source "board/broadcom/bcmns2/Kconfig"
1879 source "board/cavium/thunderx/Kconfig"
1880 source "board/cirrus/edb93xx/Kconfig"
1881 source "board/eets/pdu001/Kconfig"
1882 source "board/emulation/qemu-arm/Kconfig"
1883 source "board/freescale/ls2080a/Kconfig"
1884 source "board/freescale/ls2080aqds/Kconfig"
1885 source "board/freescale/ls2080ardb/Kconfig"
1886 source "board/freescale/ls1088a/Kconfig"
1887 source "board/freescale/ls1028a/Kconfig"
1888 source "board/freescale/ls1021aqds/Kconfig"
1889 source "board/freescale/ls1043aqds/Kconfig"
1890 source "board/freescale/ls1021atwr/Kconfig"
1891 source "board/freescale/ls1021atsn/Kconfig"
1892 source "board/freescale/ls1021aiot/Kconfig"
1893 source "board/freescale/ls1046aqds/Kconfig"
1894 source "board/freescale/ls1043ardb/Kconfig"
1895 source "board/freescale/ls1046ardb/Kconfig"
1896 source "board/freescale/ls1046afrwy/Kconfig"
1897 source "board/freescale/ls1012aqds/Kconfig"
1898 source "board/freescale/ls1012ardb/Kconfig"
1899 source "board/freescale/ls1012afrdm/Kconfig"
1900 source "board/freescale/lx2160a/Kconfig"
1901 source "board/freescale/mx35pdk/Kconfig"
1902 source "board/freescale/s32v234evb/Kconfig"
1903 source "board/grinn/chiliboard/Kconfig"
1904 source "board/gumstix/pepper/Kconfig"
1905 source "board/hisilicon/hikey/Kconfig"
1906 source "board/hisilicon/hikey960/Kconfig"
1907 source "board/hisilicon/poplar/Kconfig"
1908 source "board/isee/igep003x/Kconfig"
1909 source "board/phytec/pcm051/Kconfig"
1910 source "board/silica/pengwyn/Kconfig"
1911 source "board/spear/spear300/Kconfig"
1912 source "board/spear/spear310/Kconfig"
1913 source "board/spear/spear320/Kconfig"
1914 source "board/spear/spear600/Kconfig"
1915 source "board/spear/x600/Kconfig"
1916 source "board/st/stv0991/Kconfig"
1917 source "board/tcl/sl50/Kconfig"
1918 source "board/birdland/bav335x/Kconfig"
1919 source "board/toradex/colibri_pxa270/Kconfig"
1920 source "board/variscite/dart_6ul/Kconfig"
1921 source "board/vscom/baltos/Kconfig"
1922 source "board/xilinx/Kconfig"
1923 source "board/xilinx/zynq/Kconfig"
1924 source "board/xilinx/zynqmp/Kconfig"
1925 source "board/phytium/durian/Kconfig"
1927 source "arch/arm/Kconfig.debug"
1932 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
1933 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
1934 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64