1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
11 imply SPL_SEPARATE_BSS
14 bool "Enable support for CRC32 instruction"
18 ARMv8 implements dedicated crc32 instruction for crc32 calculation.
19 This is faster than software crc32 calculation. This instruction may
20 not be present on all ARMv8.0, but is always present on ARMv8.1 and
23 config COUNTER_FREQUENCY
24 int "Timer clock frequency"
25 depends on ARM64 || CPU_V7A
26 default 8000000 if IMX8 || MX7 || MX6UL || MX6ULL
27 default 24000000 if ARCH_SUNXI || ARCH_EXYNOS || ROCKCHIP_RK3128 || \
28 ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036
29 default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A
30 default 100000000 if ARCH_ZYNQMP
33 For platforms with ARMv8-A and ARMv7-A which features a system
34 counter, those platforms needs software to program the counter
35 frequency. Setup time clock frequency for certain platform.
36 0 means no need to configure the system counter frequency.
37 For platforms needs the frequency set in U-Boot with a
38 pre-defined value, should have the macro defined as a non-zero value.
40 config POSITION_INDEPENDENT
41 bool "Generate position-independent pre-relocation code"
42 depends on ARM64 || CPU_V7A
44 U-Boot expects to be linked to a specific hard-coded address, and to
45 be loaded to and run from that address. This option lifts that
46 restriction, thus allowing the code to be loaded to and executed from
47 almost any 4K aligned address. This logic relies on the relocation
48 information that is embedded in the binary to support U-Boot
49 relocating itself to the top-of-RAM later during execution.
51 config INIT_SP_RELATIVE
52 bool "Specify the early stack pointer relative to the .bss section"
54 default n if ARCH_QEMU
55 default y if POSITION_INDEPENDENT
57 U-Boot typically uses a hard-coded value for the stack pointer
58 before relocation. Enable this option to instead calculate the
59 initial SP at run-time. This is useful to avoid hard-coding addresses
60 into U-Boot, so that it can be loaded and executed at arbitrary
61 addresses and thus avoid using arbitrary addresses at runtime.
63 If this option is enabled, the early stack pointer is set to
64 &_bss_start with a offset value added. The offset is specified by
65 SYS_INIT_SP_BSS_OFFSET.
67 config SYS_INIT_SP_BSS_OFFSET
68 int "Early stack offset from the .bss base address"
70 depends on INIT_SP_RELATIVE
73 This option's value is the offset added to &_bss_start in order to
74 calculate the stack pointer. This offset should be large enough so
75 that the early malloc region, global data (gd), and early stack usage
76 do not overlap any appended DTB.
78 config SPL_SYS_NO_VECTOR_TABLE
82 config LINUX_KERNEL_IMAGE_HEADER
86 Place a Linux kernel image header at the start of the U-Boot binary.
87 The format of the header is described in the Linux kernel source at
88 Documentation/arm64/booting.txt. This feature is useful since the
89 image header reports the amount of memory (BSS and similar) that
90 U-Boot needs to use, but which isn't part of the binary.
92 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
93 depends on LINUX_KERNEL_IMAGE_HEADER
96 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
97 TEXT_OFFSET value written to the Linux kernel image header.
109 ARM GICV3 Interrupt translation service (ITS).
110 Basic support for programming locality specific peripheral
111 interrupts (LPI) configuration tables and enable LPI tables.
112 LPI configuration table can be used by u-boot or Linux.
113 ARM GICV3 has limitation, once the LPI table is enabled, LPI
114 configuration table can not be re-programmed, unless GICV3 reset.
120 config DMA_ADDR_T_64BIT
130 config GPIO_EXTRA_HEADER
133 # Used for compatibility with asm files copied from the kernel
134 config ARM_ASM_UNIFIED
138 # Used for compatibility with asm files copied from the kernel
142 config SYS_ICACHE_OFF
143 bool "Do not enable icache"
145 Do not enable instruction cache in U-Boot.
147 config SPL_SYS_ICACHE_OFF
148 bool "Do not enable icache in SPL"
150 default SYS_ICACHE_OFF
152 Do not enable instruction cache in SPL.
154 config SYS_DCACHE_OFF
155 bool "Do not enable dcache"
157 Do not enable data cache in U-Boot.
159 config SPL_SYS_DCACHE_OFF
160 bool "Do not enable dcache in SPL"
162 default SYS_DCACHE_OFF
164 Do not enable data cache in SPL.
166 config SYS_ARM_CACHE_CP15
167 bool "CP15 based cache enabling support"
169 Select this if your processor suports enabling caches by using
173 bool "MMU-based Paged Memory Management Support"
174 select SYS_ARM_CACHE_CP15
176 Select if you want MMU-based virtualised addressing space
177 support via paged memory management.
180 bool 'Use the ARM v7 PMSA Compliant MPU'
182 Some ARM systems without an MMU have instead a Memory Protection
183 Unit (MPU) that defines the type and permissions for regions of
185 If your CPU has an MPU then you should choose 'y' here unless you
186 know that you do not want to use the MPU.
188 # If set, the workarounds for these ARM errata are applied early during U-Boot
189 # startup. Note that in general these options force the workarounds to be
190 # applied; no CPU-type/version detection exists, unlike the similar options in
191 # the Linux kernel. Do not set these options unless they apply! Also note that
192 # the following can be machine-specific errata. These do have ability to
193 # provide rudimentary version and machine-specific checks, but expect no
195 # CONFIG_ARM_ERRATA_430973
196 # CONFIG_ARM_ERRATA_454179
197 # CONFIG_ARM_ERRATA_621766
198 # CONFIG_ARM_ERRATA_798870
199 # CONFIG_ARM_ERRATA_801819
200 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
201 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
203 config ARM_ERRATA_430973
206 config ARM_ERRATA_454179
209 config ARM_ERRATA_621766
212 config ARM_ERRATA_716044
215 config ARM_ERRATA_725233
218 config ARM_ERRATA_742230
221 config ARM_ERRATA_743622
224 config ARM_ERRATA_751472
227 config ARM_ERRATA_761320
230 config ARM_ERRATA_773022
233 config ARM_ERRATA_774769
236 config ARM_ERRATA_794072
239 config ARM_ERRATA_798870
242 config ARM_ERRATA_801819
245 config ARM_ERRATA_826974
248 config ARM_ERRATA_828024
251 config ARM_ERRATA_829520
254 config ARM_ERRATA_833069
257 config ARM_ERRATA_833471
260 config ARM_ERRATA_845369
263 config ARM_ERRATA_852421
266 config ARM_ERRATA_852423
269 config ARM_ERRATA_855873
272 config ARM_CORTEX_A8_CVE_2017_5715
275 config ARM_CORTEX_A15_CVE_2017_5715
280 select SYS_CACHE_SHIFT_5
285 select SYS_CACHE_SHIFT_5
290 select SYS_CACHE_SHIFT_5
292 imply SPL_SEPARATE_BSS
296 select SYS_CACHE_SHIFT_5
301 select SYS_CACHE_SHIFT_5
303 imply SPL_SEPARATE_BSS
308 select SYS_CACHE_SHIFT_5
315 select SYS_CACHE_SHIFT_6
322 select SYS_CACHE_SHIFT_5
323 select SYS_THUMB_BUILD
329 select SYS_ARM_CACHE_CP15
331 select SYS_CACHE_SHIFT_6
334 default "arm720t" if CPU_ARM720T
335 default "arm920t" if CPU_ARM920T
336 default "arm926ejs" if CPU_ARM926EJS
337 default "arm946es" if CPU_ARM946ES
338 default "arm1136" if CPU_ARM1136
339 default "arm1176" if CPU_ARM1176
340 default "armv7" if CPU_V7A
341 default "armv7" if CPU_V7R
342 default "armv7m" if CPU_V7M
343 default "armv8" if ARM64
347 default 4 if CPU_ARM720T
348 default 4 if CPU_ARM920T
349 default 5 if CPU_ARM926EJS
350 default 5 if CPU_ARM946ES
351 default 6 if CPU_ARM1136
352 default 6 if CPU_ARM1176
359 prompt "Select the ARM data write cache policy"
360 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || RZA1
361 default SYS_ARM_CACHE_WRITEBACK
363 config SYS_ARM_CACHE_WRITEBACK
364 bool "Write-back (WB)"
366 A write updates the cache only and marks the cache line as dirty.
367 External memory is updated only when the line is evicted or explicitly
370 config SYS_ARM_CACHE_WRITETHROUGH
371 bool "Write-through (WT)"
373 A write updates both the cache and the external memory system.
374 This does not mark the cache line as dirty.
376 config SYS_ARM_CACHE_WRITEALLOC
377 bool "Write allocation (WA)"
379 A cache line is allocated on a write miss. This means that executing a
380 store instruction on the processor might cause a burst read to occur.
381 There is a linefill to obtain the data for the cache line, before the
385 config ARCH_VERY_EARLY_INIT
388 config SPL_ARCH_VERY_EARLY_INIT
392 bool "Enable ARCH_CPU_INIT"
394 Some architectures require a call to arch_cpu_init().
395 Say Y here to enable it
397 config SYS_ARCH_TIMER
398 bool "ARM Generic Timer support"
399 depends on CPU_V7A || ARM64
402 The ARM Generic Timer (aka arch-timer) provides an architected
403 interface to a timer source on an SoC.
404 It is mandatory for ARMv8 implementation and widely available
408 bool "Support for ARM SMC Calling Convention (SMCCC)"
409 depends on CPU_V7A || ARM64
412 Say Y here if you want to enable ARM SMC Calling Convention.
413 This should be enabled if U-Boot needs to communicate with system
414 firmware (for example, PSCI) according to SMCCC.
417 bool "Support ARM semihosting"
419 Semihosting is a method for a target to communicate with a host
420 debugger. It uses special instructions which the debugger will trap
421 on and interpret. This allows U-Boot to read/write files, print to
422 the console, and execute arbitrary commands on the host system.
424 Enabling this option will add support for reading and writing files
425 on the host system. If you don't have a debugger attached then trying
426 to do this will likely cause U-Boot to hang. Say 'n' if you are unsure.
428 config SEMIHOSTING_FALLBACK
429 bool "Recover gracefully when semihosting fails"
430 depends on SEMIHOSTING && ARM64
433 Normally, if U-Boot makes a semihosting call and no debugger is
434 attached, then it will panic due to a synchronous abort
435 exception. This config adds an exception handler which will allow
436 U-Boot to recover. Say 'y' if unsure.
438 config SPL_SEMIHOSTING
439 bool "Support ARM semihosting in SPL"
442 Semihosting is a method for a target to communicate with a host
443 debugger. It uses special instructions which the debugger will trap
444 on and interpret. This allows U-Boot to read/write files, print to
445 the console, and execute arbitrary commands on the host system.
447 Enabling this option will add support for reading and writing files
448 on the host system. If you don't have a debugger attached then trying
449 to do this will likely cause U-Boot to hang. Say 'n' if you are unsure.
451 config SPL_SEMIHOSTING_FALLBACK
452 bool "Recover gracefully when semihosting fails in SPL"
453 depends on SPL_SEMIHOSTING && ARM64
454 select ARMV8_SPL_EXCEPTION_VECTORS
457 Normally, if U-Boot makes a semihosting call and no debugger is
458 attached, then it will panic due to a synchronous abort
459 exception. This config adds an exception handler which will allow
460 U-Boot to recover. Say 'y' if unsure.
462 config SYS_THUMB_BUILD
463 bool "Build U-Boot using the Thumb instruction set"
466 Use this flag to build U-Boot using the Thumb instruction set for
467 ARM architectures. Thumb instruction set provides better code
468 density. For ARM architectures that support Thumb2 this flag will
469 result in Thumb2 code generated by GCC.
471 config SPL_SYS_THUMB_BUILD
472 bool "Build SPL using the Thumb instruction set"
473 default y if SYS_THUMB_BUILD
474 depends on !ARM64 && SPL
476 Use this flag to build SPL using the Thumb instruction set for
477 ARM architectures. Thumb instruction set provides better code
478 density. For ARM architectures that support Thumb2 this flag will
479 result in Thumb2 code generated by GCC.
481 config TPL_SYS_THUMB_BUILD
482 bool "Build TPL using the Thumb instruction set"
483 default y if SYS_THUMB_BUILD
484 depends on TPL && !ARM64
486 Use this flag to build TPL using the Thumb instruction set for
487 ARM architectures. Thumb instruction set provides better code
488 density. For ARM architectures that support Thumb2 this flag will
489 result in Thumb2 code generated by GCC.
492 bool "ARM PL310 L2 cache controller"
494 Enable support for ARM PL310 L2 cache controller in U-Boot
496 config SPL_SYS_L2_PL310
497 bool "ARM PL310 L2 cache controller in SPL"
499 Enable support for ARM PL310 L2 cache controller in SPL
501 config SYS_L2CACHE_OFF
504 If SoC does not support L2CACHE or one does not want to enable
505 L2CACHE, choose this option.
507 config ENABLE_ARM_SOC_BOOT0_HOOK
508 bool "prepare BOOT0 header"
510 If the SoC's BOOT0 requires a header area filled with (magic)
511 values, then choose this option, and create a file included as
512 <asm/arch/boot0.h> which contains the required assembler code.
514 config USE_ARCH_MEMCPY
515 bool "Use an assembly optimized implementation of memcpy"
517 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
519 Enable the generation of an optimized version of memcpy.
520 Such an implementation may be faster under some conditions
521 but may increase the binary size.
523 config SPL_USE_ARCH_MEMCPY
524 bool "Use an assembly optimized implementation of memcpy for SPL"
525 default y if USE_ARCH_MEMCPY
528 Enable the generation of an optimized version of memcpy.
529 Such an implementation may be faster under some conditions
530 but may increase the binary size.
532 config TPL_USE_ARCH_MEMCPY
533 bool "Use an assembly optimized implementation of memcpy for TPL"
534 default y if USE_ARCH_MEMCPY
537 Enable the generation of an optimized version of memcpy.
538 Such an implementation may be faster under some conditions
539 but may increase the binary size.
541 config USE_ARCH_MEMMOVE
542 bool "Use an assembly optimized implementation of memmove" if !ARM64
543 default USE_ARCH_MEMCPY if ARM64
546 Enable the generation of an optimized version of memmove.
547 Such an implementation may be faster under some conditions
548 but may increase the binary size.
550 config SPL_USE_ARCH_MEMMOVE
551 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
552 default SPL_USE_ARCH_MEMCPY if ARM64
553 depends on SPL && ARM64
555 Enable the generation of an optimized version of memmove.
556 Such an implementation may be faster under some conditions
557 but may increase the binary size.
559 config TPL_USE_ARCH_MEMMOVE
560 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
561 default TPL_USE_ARCH_MEMCPY if ARM64
562 depends on TPL && ARM64
564 Enable the generation of an optimized version of memmove.
565 Such an implementation may be faster under some conditions
566 but may increase the binary size.
568 config USE_ARCH_MEMSET
569 bool "Use an assembly optimized implementation of memset"
571 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
573 Enable the generation of an optimized version of memset.
574 Such an implementation may be faster under some conditions
575 but may increase the binary size.
577 config SPL_USE_ARCH_MEMSET
578 bool "Use an assembly optimized implementation of memset for SPL"
579 default y if USE_ARCH_MEMSET
582 Enable the generation of an optimized version of memset.
583 Such an implementation may be faster under some conditions
584 but may increase the binary size.
586 config TPL_USE_ARCH_MEMSET
587 bool "Use an assembly optimized implementation of memset for TPL"
588 default y if USE_ARCH_MEMSET
591 Enable the generation of an optimized version of memset.
592 Such an implementation may be faster under some conditions
593 but may increase the binary size.
595 config ARM64_SUPPORT_AARCH32
596 bool "ARM64 system support AArch32 execution state"
598 default y if !TARGET_THUNDERX_88XX
600 This ARM64 system supports AArch32 execution state.
603 def_bool y if ARCH_EXYNOS || ARCH_S5PC1XX
606 prompt "Target select"
611 select GPIO_EXTRA_HEADER
612 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
613 select SPL_SEPARATE_BSS if SPL
618 select GPIO_EXTRA_HEADER
619 select SPL_DM_SPI if SPL
622 Support for TI's DaVinci platform.
625 bool "Marvell Kirkwood"
626 select ARCH_MISC_INIT
627 select BOARD_EARLY_INIT_F
629 select GPIO_EXTRA_HEADER
633 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
639 select GPIO_EXTRA_HEADER
640 select SPL_DM_SPI if SPL
641 select SPL_DM_SPI_FLASH if SPL
642 select SPL_TIMER if SPL
652 select GPIO_EXTRA_HEADER
653 select SPL_SEPARATE_BSS if SPL
656 config TARGET_STV0991
657 bool "Support stv0991"
663 select GPIO_EXTRA_HEADER
670 bool "Broadcom BCM283X family"
674 select GPIO_EXTRA_HEADER
677 select SERIAL_SEARCH_ALL
682 bool "Broadcom BCM6753 family"
689 bool "Broadcom BCM7XXX family"
692 select GPIO_EXTRA_HEADER
695 imply OF_HAS_PRIOR_STAGE
697 This enables support for Broadcom ARM-based set-top box
698 chipsets, including the 7445 family of chips.
701 bool "Broadcom broadband chip family"
706 config TARGET_VEXPRESS_CA9X4
707 bool "Support vexpress_ca9x4"
711 config TARGET_BCMCYGNUS
712 bool "Support bcmcygnus"
714 select GPIO_EXTRA_HEADER
716 imply BCM_SF2_ETH_GMAC
724 bool "Support Broadcom Northstar2"
726 select GPIO_EXTRA_HEADER
728 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
729 ARMv8 Cortex-A57 processors targeting a broad range of networking
733 bool "Support Broadcom NS3"
735 select BOARD_LATE_INIT
737 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
738 ARMv8 Cortex-A72 processors targeting a broad range of networking
742 bool "Samsung EXYNOS"
752 select GPIO_EXTRA_HEADER
753 imply SYS_THUMB_BUILD
758 bool "Samsung S5PC1XX"
764 select GPIO_EXTRA_HEADER
768 bool "Calxeda Highbank"
779 imply OF_HAS_PRIOR_STAGE
781 config ARCH_INTEGRATOR
782 bool "ARM Ltd. Integrator family"
785 select GPIO_EXTRA_HEADER
790 bool "Qualcomm IPQ40xx SoCs"
796 select GPIO_EXTRA_HEADER
810 select SYS_ARCH_TIMER
811 select SYS_THUMB_BUILD
817 bool "Texas Instruments' K3 Architecture"
822 config ARCH_OMAP2PLUS
825 select GPIO_EXTRA_HEADER
826 select SPL_BOARD_INIT if SPL
827 select SPL_STACK_R if SPL
829 imply TI_SYSC if DM && OF_CONTROL
832 imply SPL_SEPARATE_BSS
836 select GPIO_EXTRA_HEADER
837 imply DISTRO_DEFAULTS
840 Support for the Meson SoC family developed by Amlogic Inc.,
841 targeted at media players and tablet computers. We currently
842 support the S905 (GXBaby) 64-bit SoC.
847 select GPIO_EXTRA_HEADER
850 select SPL_LIBCOMMON_SUPPORT if SPL
851 select SPL_LIBGENERIC_SUPPORT if SPL
852 select SPL_OF_CONTROL if SPL
855 Support for the MediaTek SoCs family developed by MediaTek Inc.
856 Please refer to doc/README.mediatek for more information.
859 bool "NXP LPC32xx platform"
864 select GPIO_EXTRA_HEADER
870 bool "NXP i.MX8 platform"
872 select SYS_FSL_HAS_SEC
873 select SYS_FSL_SEC_COMPAT_4
874 select SYS_FSL_SEC_LE
876 select GPIO_EXTRA_HEADER
879 select ENABLE_ARM_SOC_BOOT0_HOOK
883 bool "NXP i.MX8M platform"
885 select GPIO_EXTRA_HEADER
887 select SYS_FSL_HAS_SEC
888 select SYS_FSL_SEC_COMPAT_4
889 select SYS_FSL_SEC_LE
897 bool "NXP i.MX8ULP platform"
903 select GPIO_EXTRA_HEADER
910 bool "NXP i.MX9 platform"
915 select GPIO_EXTRA_HEADER
922 bool "NXP i.MXRT platform"
926 select GPIO_EXTRA_HEADER
932 bool "NXP i.MX23 family"
934 select GPIO_EXTRA_HEADER
940 bool "NXP i.MX28 family"
942 select GPIO_EXTRA_HEADER
948 bool "NXP i.MX31 family"
950 select GPIO_EXTRA_HEADER
955 select BOARD_POSTCLK_INIT
957 select GPIO_EXTRA_HEADER
959 select SYS_FSL_HAS_SEC
960 select SYS_FSL_SEC_COMPAT_4
961 select SYS_FSL_SEC_LE
962 select ROM_UNIFIED_SECTIONS
964 imply SYS_THUMB_BUILD
968 select ARCH_MISC_INIT
970 select GPIO_EXTRA_HEADER
972 select SYS_FSL_HAS_SEC
973 select SYS_FSL_SEC_COMPAT_4
974 select SYS_FSL_SEC_LE
975 imply BOARD_EARLY_INIT_F
977 imply SYS_THUMB_BUILD
981 select BOARD_POSTCLK_INIT
983 select GPIO_EXTRA_HEADER
985 select SYS_FSL_HAS_SEC
986 select SYS_FSL_SEC_COMPAT_4
987 select SYS_FSL_SEC_LE
988 select SYS_L2_PL310 if !SYS_L2CACHE_OFF
990 imply SYS_THUMB_BUILD
991 imply SPL_SEPARATE_BSS
995 select BOARD_EARLY_INIT_F
997 select GPIO_EXTRA_HEADER
1002 bool "Nexell S5P4418/S5P6818 SoC"
1003 select ENABLE_ARM_SOC_BOOT0_HOOK
1005 select GPIO_EXTRA_HEADER
1008 bool "Support Nuvoton SoCs"
1028 select LINUX_KERNEL_IMAGE_HEADER
1029 select OF_BOARD_SETUP
1032 select POSITION_INDEPENDENT
1038 select SYSRESET_WATCHDOG
1039 select SYSRESET_WATCHDOG_AUTO
1043 imply DISTRO_DEFAULTS
1044 imply OF_HAS_PRIOR_STAGE
1047 bool "Actions Semi OWL SoCs"
1051 select GPIO_EXTRA_HEADER
1056 select SYS_RELOC_GD_ENV_ADDR
1060 bool "QEMU Virtual Platform"
1069 imply OF_HAS_PRIOR_STAGE
1072 bool "Renesas ARM SoCs"
1075 select GPIO_EXTRA_HEADER
1076 imply BOARD_EARLY_INIT_F
1079 imply SYS_THUMB_BUILD
1080 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
1082 config ARCH_SNAPDRAGON
1083 bool "Qualcomm Snapdragon SoCs"
1088 select GPIO_EXTRA_HEADER
1097 bool "Altera SOCFPGA family"
1098 select ARCH_EARLY_INIT_R
1099 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
1100 select ARM64 if TARGET_SOCFPGA_SOC64
1101 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1105 select GPIO_EXTRA_HEADER
1106 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1108 select SPL_DM_RESET if DM_RESET
1109 select SPL_DM_SERIAL
1110 select SPL_LIBCOMMON_SUPPORT
1111 select SPL_LIBGENERIC_SUPPORT
1112 select SPL_OF_CONTROL
1113 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1119 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1121 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1122 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1132 imply SPL_DM_SPI_FLASH
1133 imply SPL_LIBDISK_SUPPORT
1135 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1136 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1137 imply SPL_SPI_FLASH_SUPPORT
1142 bool "Support sunxi (Allwinner) SoCs"
1145 select CMD_MMC if MMC
1146 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1151 select DM_I2C if I2C
1152 select DM_SPI if SPI
1153 select DM_SPI_FLASH if SPI
1155 select DM_MMC if MMC
1156 select DM_SCSI if SCSI
1158 select GPIO_EXTRA_HEADER
1159 select OF_BOARD_SETUP
1163 select SPECIFY_CONSOLE_INDEX
1164 select SPL_SEPARATE_BSS if SPL
1165 select SPL_STACK_R if SPL
1166 select SPL_SYS_MALLOC_SIMPLE if SPL
1167 select SPL_SYS_THUMB_BUILD if !ARM64
1170 select SYS_THUMB_BUILD if !ARM64
1171 select USB if DISTRO_DEFAULTS
1172 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1173 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1174 select SPL_USE_TINY_PRINTF
1176 select SYS_RELOC_GD_ENV_ADDR
1177 imply BOARD_LATE_INIT
1180 imply CMD_UBI if MTD_RAW_NAND
1181 imply DISTRO_DEFAULTS
1184 imply OF_LIBFDT_OVERLAY
1185 imply PRE_CONSOLE_BUFFER
1187 imply SPL_LIBCOMMON_SUPPORT
1188 imply SPL_LIBGENERIC_SUPPORT
1189 imply SPL_MMC if MMC
1193 imply SYSRESET_WATCHDOG
1194 imply SYSRESET_WATCHDOG_AUTO
1199 bool "ST-Ericsson U8500 Series"
1203 select DM_MMC if MMC
1205 select DM_USB_GADGET if DM_USB
1209 imply AB8500_USB_PHY
1210 imply ARM_PL180_MMCI
1215 imply NOMADIK_MTU_TIMER
1220 imply SYS_THUMB_BUILD
1221 imply SYSRESET_SYSCON
1224 bool "Support Xilinx Versal Platform"
1228 select DM_ETH if NET
1229 select DM_MMC if MMC
1234 imply BOARD_LATE_INIT
1235 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1237 config ARCH_VERSAL_NET
1238 bool "Support Xilinx Keystone Platform"
1242 select DM_ETH if NET
1243 select DM_MMC if MMC
1246 imply BOARD_LATE_INIT
1247 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1250 bool "Freescale Vybrid"
1252 select GPIO_EXTRA_HEADER
1254 select SYS_FSL_ERRATUM_ESDHC111
1259 bool "Xilinx Zynq based platform"
1260 select ARM_TWD_TIMER
1264 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1266 select DM_ETH if NET
1267 select DM_MMC if MMC
1273 select SPL_BOARD_INIT if SPL
1274 select SPL_CLK if SPL
1275 select SPL_DM if SPL
1276 select SPL_DM_SPI if SPL
1277 select SPL_DM_SPI_FLASH if SPL
1278 select SPL_OF_CONTROL if SPL
1279 select SPL_SEPARATE_BSS if SPL
1280 select SPL_TIMER if SPL
1283 imply ARCH_EARLY_INIT_R
1284 imply BOARD_LATE_INIT
1288 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1291 config ARCH_ZYNQMP_R5
1292 bool "Xilinx ZynqMP R5 based platform"
1296 select DM_ETH if NET
1297 select DM_MMC if MMC
1304 bool "Xilinx ZynqMP based platform"
1308 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1309 select DM_ETH if NET
1311 select DM_MMC if MMC
1313 select DM_SPI if SPI
1314 select DM_SPI_FLASH if DM_SPI
1318 select SPL_BOARD_INIT if SPL
1319 select SPL_CLK if SPL
1320 select SPL_DM if SPL
1321 select SPL_DM_SPI if SPI && SPL_DM
1322 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1323 select SPL_DM_MAILBOX if SPL
1324 imply SPL_FIRMWARE if SPL
1325 select SPL_SEPARATE_BSS if SPL
1329 imply BOARD_LATE_INIT
1331 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1335 imply ZYNQMP_GPIO_MODEPIN if DM_GPIO && USB
1339 select GPIO_EXTRA_HEADER
1340 imply DISTRO_DEFAULTS
1343 config ARCH_VEXPRESS64
1344 bool "Support ARMv8 Arm Ltd. VExpress based boards and models"
1352 select MTD_NOR_FLASH if MTD
1353 select FLASH_CFI_DRIVER if MTD
1354 select ENV_IS_IN_FLASH if MTD
1355 imply DISTRO_DEFAULTS
1357 config TARGET_CORSTONE1000
1358 bool "Support Corstone1000 Platform"
1363 config TARGET_TOTAL_COMPUTE
1364 bool "Support Total Compute Platform"
1372 config TARGET_LS2080A_EMU
1373 bool "Support ls2080a_emu"
1376 select ARMV8_MULTIENTRY
1377 select FSL_DDR_SYNC_REFRESH
1378 select GPIO_EXTRA_HEADER
1380 Support for Freescale LS2080A_EMU platform.
1381 The LS2080A Development System (EMULATOR) is a pre-silicon
1382 development platform that supports the QorIQ LS2080A
1383 Layerscape Architecture processor.
1385 config TARGET_LS1088AQDS
1386 bool "Support ls1088aqds"
1389 select ARMV8_MULTIENTRY
1390 select ARCH_SUPPORT_TFABOOT
1391 select BOARD_LATE_INIT
1392 select GPIO_EXTRA_HEADER
1394 select FSL_DDR_INTERACTIVE if !SD_BOOT
1396 Support for NXP LS1088AQDS platform.
1397 The LS1088A Development System (QDS) is a high-performance
1398 development platform that supports the QorIQ LS1088A
1399 Layerscape Architecture processor.
1401 config TARGET_LS2080AQDS
1402 bool "Support ls2080aqds"
1405 select ARMV8_MULTIENTRY
1406 select ARCH_SUPPORT_TFABOOT
1407 select BOARD_LATE_INIT
1408 select GPIO_EXTRA_HEADER
1413 select FSL_DDR_INTERACTIVE if !SPL
1415 Support for Freescale LS2080AQDS platform.
1416 The LS2080A Development System (QDS) is a high-performance
1417 development platform that supports the QorIQ LS2080A
1418 Layerscape Architecture processor.
1420 config TARGET_LS2080ARDB
1421 bool "Support ls2080ardb"
1424 select ARMV8_MULTIENTRY
1425 select ARCH_SUPPORT_TFABOOT
1426 select BOARD_LATE_INIT
1429 select FSL_DDR_INTERACTIVE if !SPL
1430 select GPIO_EXTRA_HEADER
1434 Support for Freescale LS2080ARDB platform.
1435 The LS2080A Reference design board (RDB) is a high-performance
1436 development platform that supports the QorIQ LS2080A
1437 Layerscape Architecture processor.
1439 config TARGET_LS2081ARDB
1440 bool "Support ls2081ardb"
1443 select ARMV8_MULTIENTRY
1444 select BOARD_LATE_INIT
1445 select GPIO_EXTRA_HEADER
1448 Support for Freescale LS2081ARDB platform.
1449 The LS2081A Reference design board (RDB) is a high-performance
1450 development platform that supports the QorIQ LS2081A/LS2041A
1451 Layerscape Architecture processor.
1453 config TARGET_LX2160ARDB
1454 bool "Support lx2160ardb"
1457 select ARMV8_MULTIENTRY
1458 select ARCH_SUPPORT_TFABOOT
1459 select BOARD_LATE_INIT
1460 select GPIO_EXTRA_HEADER
1462 Support for NXP LX2160ARDB platform.
1463 The lx2160ardb (LX2160A Reference design board (RDB)
1464 is a high-performance development platform that supports the
1465 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1467 config TARGET_LX2160AQDS
1468 bool "Support lx2160aqds"
1471 select ARMV8_MULTIENTRY
1472 select ARCH_SUPPORT_TFABOOT
1473 select BOARD_LATE_INIT
1474 select GPIO_EXTRA_HEADER
1476 Support for NXP LX2160AQDS platform.
1477 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1478 is a high-performance development platform that supports the
1479 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1481 config TARGET_LX2162AQDS
1482 bool "Support lx2162aqds"
1484 select ARCH_MISC_INIT
1486 select ARMV8_MULTIENTRY
1487 select ARCH_SUPPORT_TFABOOT
1488 select BOARD_LATE_INIT
1489 select GPIO_EXTRA_HEADER
1491 Support for NXP LX2162AQDS platform.
1492 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1495 bool "Support HiKey 96boards Consumer Edition Platform"
1500 select GPIO_EXTRA_HEADER
1503 select SPECIFY_CONSOLE_INDEX
1506 Support for HiKey 96boards platform. It features a HI6220
1507 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1509 config TARGET_HIKEY960
1510 bool "Support HiKey960 96boards Consumer Edition Platform"
1514 select GPIO_EXTRA_HEADER
1519 Support for HiKey960 96boards platform. It features a HI3660
1520 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1522 config TARGET_POPLAR
1523 bool "Support Poplar 96boards Enterprise Edition Platform"
1527 select GPIO_EXTRA_HEADER
1532 Support for Poplar 96boards EE platform. It features a HI3798cv200
1533 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1534 making it capable of running any commercial set-top solution based on
1537 config TARGET_LS1012AQDS
1538 bool "Support ls1012aqds"
1541 select ARCH_SUPPORT_TFABOOT
1542 select BOARD_LATE_INIT
1543 select GPIO_EXTRA_HEADER
1545 Support for Freescale LS1012AQDS platform.
1546 The LS1012A Development System (QDS) is a high-performance
1547 development platform that supports the QorIQ LS1012A
1548 Layerscape Architecture processor.
1550 config TARGET_LS1012ARDB
1551 bool "Support ls1012ardb"
1554 select ARCH_SUPPORT_TFABOOT
1555 select BOARD_LATE_INIT
1556 select GPIO_EXTRA_HEADER
1560 Support for Freescale LS1012ARDB platform.
1561 The LS1012A Reference design board (RDB) is a high-performance
1562 development platform that supports the QorIQ LS1012A
1563 Layerscape Architecture processor.
1565 config TARGET_LS1012A2G5RDB
1566 bool "Support ls1012a2g5rdb"
1569 select ARCH_SUPPORT_TFABOOT
1570 select BOARD_LATE_INIT
1571 select GPIO_EXTRA_HEADER
1574 Support for Freescale LS1012A2G5RDB platform.
1575 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1576 development platform that supports the QorIQ LS1012A
1577 Layerscape Architecture processor.
1579 config TARGET_LS1012AFRWY
1580 bool "Support ls1012afrwy"
1583 select ARCH_SUPPORT_TFABOOT
1584 select BOARD_LATE_INIT
1585 select GPIO_EXTRA_HEADER
1589 Support for Freescale LS1012AFRWY platform.
1590 The LS1012A FRWY board (FRWY) is a high-performance
1591 development platform that supports the QorIQ LS1012A
1592 Layerscape Architecture processor.
1594 config TARGET_LS1012AFRDM
1595 bool "Support ls1012afrdm"
1598 select ARCH_SUPPORT_TFABOOT
1599 select GPIO_EXTRA_HEADER
1601 Support for Freescale LS1012AFRDM platform.
1602 The LS1012A Freedom board (FRDM) is a high-performance
1603 development platform that supports the QorIQ LS1012A
1604 Layerscape Architecture processor.
1606 config TARGET_LS1028AQDS
1607 bool "Support ls1028aqds"
1610 select ARMV8_MULTIENTRY
1611 select ARCH_SUPPORT_TFABOOT
1612 select BOARD_LATE_INIT
1613 select GPIO_EXTRA_HEADER
1615 Support for Freescale LS1028AQDS platform
1616 The LS1028A Development System (QDS) is a high-performance
1617 development platform that supports the QorIQ LS1028A
1618 Layerscape Architecture processor.
1620 config TARGET_LS1028ARDB
1621 bool "Support ls1028ardb"
1624 select ARMV8_MULTIENTRY
1625 select ARCH_SUPPORT_TFABOOT
1626 select BOARD_LATE_INIT
1627 select GPIO_EXTRA_HEADER
1629 Support for Freescale LS1028ARDB platform
1630 The LS1028A Development System (RDB) is a high-performance
1631 development platform that supports the QorIQ LS1028A
1632 Layerscape Architecture processor.
1634 config TARGET_LS1088ARDB
1635 bool "Support ls1088ardb"
1638 select ARMV8_MULTIENTRY
1639 select ARCH_SUPPORT_TFABOOT
1640 select BOARD_LATE_INIT
1642 select FSL_DDR_INTERACTIVE if !SD_BOOT
1643 select GPIO_EXTRA_HEADER
1645 Support for NXP LS1088ARDB platform.
1646 The LS1088A Reference design board (RDB) is a high-performance
1647 development platform that supports the QorIQ LS1088A
1648 Layerscape Architecture processor.
1650 config TARGET_LS1021AQDS
1651 bool "Support ls1021aqds"
1653 select ARCH_SUPPORT_PSCI
1654 select BOARD_EARLY_INIT_F
1655 select BOARD_LATE_INIT
1657 select CPU_V7_HAS_NONSEC
1658 select CPU_V7_HAS_VIRT
1659 select LS1_DEEP_SLEEP
1662 select FSL_DDR_INTERACTIVE
1663 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1664 select GPIO_EXTRA_HEADER
1665 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1668 config TARGET_LS1021ATWR
1669 bool "Support ls1021atwr"
1671 select ARCH_SUPPORT_PSCI
1672 select BOARD_EARLY_INIT_F
1673 select BOARD_LATE_INIT
1675 select CPU_V7_HAS_NONSEC
1676 select CPU_V7_HAS_VIRT
1677 select LS1_DEEP_SLEEP
1679 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1680 select GPIO_EXTRA_HEADER
1683 config TARGET_PG_WCOM_SELI8
1684 bool "Support Hitachi-Powergrids SELI8 service unit card"
1686 select ARCH_SUPPORT_PSCI
1687 select BOARD_EARLY_INIT_F
1688 select BOARD_LATE_INIT
1690 select CPU_V7_HAS_NONSEC
1691 select CPU_V7_HAS_VIRT
1693 select FSL_DDR_INTERACTIVE
1694 select GPIO_EXTRA_HEADER
1698 Support for Hitachi-Powergrids SELI8 service unit card.
1699 SELI8 is a QorIQ LS1021a based service unit card used
1700 in XMC20 and FOX615 product families.
1702 config TARGET_PG_WCOM_EXPU1
1703 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1705 select ARCH_SUPPORT_PSCI
1706 select BOARD_EARLY_INIT_F
1707 select BOARD_LATE_INIT
1709 select CPU_V7_HAS_NONSEC
1710 select CPU_V7_HAS_VIRT
1712 select FSL_DDR_INTERACTIVE
1716 Support for Hitachi-Powergrids EXPU1 service unit card.
1717 EXPU1 is a QorIQ LS1021a based service unit card used
1718 in XMC20 and FOX615 product families.
1720 config TARGET_LS1021ATSN
1721 bool "Support ls1021atsn"
1723 select ARCH_SUPPORT_PSCI
1724 select BOARD_EARLY_INIT_F
1725 select BOARD_LATE_INIT
1727 select CPU_V7_HAS_NONSEC
1728 select CPU_V7_HAS_VIRT
1729 select LS1_DEEP_SLEEP
1731 select GPIO_EXTRA_HEADER
1734 config TARGET_LS1021AIOT
1735 bool "Support ls1021aiot"
1737 select ARCH_SUPPORT_PSCI
1738 select BOARD_LATE_INIT
1740 select CPU_V7_HAS_NONSEC
1741 select CPU_V7_HAS_VIRT
1743 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1744 select GPIO_EXTRA_HEADER
1747 Support for Freescale LS1021AIOT platform.
1748 The LS1021A Freescale board (IOT) is a high-performance
1749 development platform that supports the QorIQ LS1021A
1750 Layerscape Architecture processor.
1752 config TARGET_LS1043AQDS
1753 bool "Support ls1043aqds"
1756 select ARMV8_MULTIENTRY
1757 select ARCH_SUPPORT_TFABOOT
1758 select BOARD_EARLY_INIT_F
1759 select BOARD_LATE_INIT
1761 select FSL_DDR_INTERACTIVE if !SPL
1762 select FSL_DSPI if !SPL_NO_DSPI
1763 select DM_SPI_FLASH if FSL_DSPI
1764 select GPIO_EXTRA_HEADER
1768 Support for Freescale LS1043AQDS platform.
1770 config TARGET_LS1043ARDB
1771 bool "Support ls1043ardb"
1774 select ARMV8_MULTIENTRY
1775 select ARCH_SUPPORT_TFABOOT
1776 select BOARD_EARLY_INIT_F
1777 select BOARD_LATE_INIT
1779 select FSL_DSPI if !SPL_NO_DSPI
1780 select DM_SPI_FLASH if FSL_DSPI
1781 select GPIO_EXTRA_HEADER
1783 Support for Freescale LS1043ARDB platform.
1785 config TARGET_LS1046AQDS
1786 bool "Support ls1046aqds"
1789 select ARMV8_MULTIENTRY
1790 select ARCH_SUPPORT_TFABOOT
1791 select BOARD_EARLY_INIT_F
1792 select BOARD_LATE_INIT
1793 select DM_SPI_FLASH if DM_SPI
1795 select FSL_DDR_BIST if !SPL
1796 select FSL_DDR_INTERACTIVE if !SPL
1797 select FSL_DDR_INTERACTIVE if !SPL
1798 select GPIO_EXTRA_HEADER
1801 Support for Freescale LS1046AQDS platform.
1802 The LS1046A Development System (QDS) is a high-performance
1803 development platform that supports the QorIQ LS1046A
1804 Layerscape Architecture processor.
1806 config TARGET_LS1046ARDB
1807 bool "Support ls1046ardb"
1810 select ARMV8_MULTIENTRY
1811 select ARCH_SUPPORT_TFABOOT
1812 select BOARD_EARLY_INIT_F
1813 select BOARD_LATE_INIT
1814 select DM_SPI_FLASH if DM_SPI
1815 select POWER_MC34VR500
1818 select FSL_DDR_INTERACTIVE if !SPL
1819 select GPIO_EXTRA_HEADER
1822 Support for Freescale LS1046ARDB platform.
1823 The LS1046A Reference Design Board (RDB) is a high-performance
1824 development platform that supports the QorIQ LS1046A
1825 Layerscape Architecture processor.
1827 config TARGET_LS1046AFRWY
1828 bool "Support ls1046afrwy"
1831 select ARMV8_MULTIENTRY
1832 select ARCH_SUPPORT_TFABOOT
1833 select BOARD_EARLY_INIT_F
1834 select BOARD_LATE_INIT
1835 select DM_SPI_FLASH if DM_SPI
1836 select GPIO_EXTRA_HEADER
1839 Support for Freescale LS1046AFRWY platform.
1840 The LS1046A Freeway Board (FRWY) is a high-performance
1841 development platform that supports the QorIQ LS1046A
1842 Layerscape Architecture processor.
1848 select ARMV8_MULTIENTRY
1864 select GPIO_EXTRA_HEADER
1865 select SPL_DM if SPL
1866 select SPL_DM_SPI if SPL
1867 select SPL_DM_SPI_FLASH if SPL
1868 select SPL_DM_I2C if SPL
1869 select SPL_DM_MMC if SPL
1870 select SPL_DM_SERIAL if SPL
1872 Support for Kontron SMARC-sAL28 board.
1875 bool "Support ten64"
1877 select ARCH_MISC_INIT
1879 select ARMV8_MULTIENTRY
1880 select ARCH_SUPPORT_TFABOOT
1881 select BOARD_LATE_INIT
1883 select FSL_DDR_INTERACTIVE if !SD_BOOT
1884 select GPIO_EXTRA_HEADER
1886 Support for Traverse Technologies Ten64 board, based
1889 config ARCH_UNIPHIER
1890 bool "Socionext UniPhier SoCs"
1891 select BOARD_LATE_INIT
1900 select OF_BOARD_SETUP
1904 select SPL_BOARD_INIT if SPL
1905 select SPL_DM if SPL
1906 select SPL_LIBCOMMON_SUPPORT if SPL
1907 select SPL_LIBGENERIC_SUPPORT if SPL
1908 select SPL_OF_CONTROL if SPL
1909 select SPL_PINCTRL if SPL
1912 imply DISTRO_DEFAULTS
1915 Support for UniPhier SoC family developed by Socionext Inc.
1916 (formerly, System LSI Business Division of Panasonic Corporation)
1918 config ARCH_SYNQUACER
1919 bool "Socionext SynQuacer SoCs"
1925 select SYSRESET_PSCI
1928 Support for SynQuacer SoC family developed by Socionext Inc.
1929 This SoC is used on 96boards EE DeveloperBox.
1932 bool "Support STMicroelectronics STM32 MCU with cortex M"
1939 bool "Support STMicroelectronics SoCs"
1948 Support for STMicroelectronics STiH407/10 SoC family.
1949 This SoC is used on Linaro 96Board STiH410-B2260
1952 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1953 select ARCH_MISC_INIT
1954 select ARCH_SUPPORT_TFABOOT
1955 select BOARD_LATE_INIT
1964 select OF_SYSTEM_SETUP
1969 select SYS_THUMB_BUILD
1973 imply OF_LIBFDT_OVERLAY
1974 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1978 Support for STM32MP SoC family developed by STMicroelectronics,
1979 MPUs based on ARM cortex A core
1980 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1981 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1983 SPL is the unsecure FSBL for the basic boot chain.
1985 config ARCH_ROCKCHIP
1986 bool "Support Rockchip SoCs"
1988 select BINMAN if SPL_OPTEE || SPL
1998 select ENABLE_ARM_SOC_BOOT0_HOOK
2001 select SPL_DM if SPL
2002 select SPL_DM_SPI if SPL
2003 select SPL_DM_SPI_FLASH if SPL
2005 select SYS_THUMB_BUILD if !ARM64
2008 imply DEBUG_UART_BOARD_INIT
2009 imply DISTRO_DEFAULTS
2011 imply SARADC_ROCKCHIP
2013 imply SPL_SYS_MALLOC_SIMPLE
2016 imply USB_FUNCTION_FASTBOOT
2018 config ARCH_OCTEONTX
2019 bool "Support OcteonTX SoCs"
2022 select GPIO_EXTRA_HEADER
2026 select BOARD_LATE_INIT
2027 select SYS_CACHE_SHIFT_7
2028 select SYS_PCI_64BIT if PCI
2029 imply OF_HAS_PRIOR_STAGE
2031 config ARCH_OCTEONTX2
2032 bool "Support OcteonTX2 SoCs"
2035 select GPIO_EXTRA_HEADER
2039 select BOARD_LATE_INIT
2040 select SYS_CACHE_SHIFT_7
2041 select SYS_PCI_64BIT if PCI
2042 imply OF_HAS_PRIOR_STAGE
2044 config TARGET_THUNDERX_88XX
2045 bool "Support ThunderX 88xx"
2047 select GPIO_EXTRA_HEADER
2050 select SYS_CACHE_SHIFT_7
2053 bool "Support Aspeed SoCs"
2058 config TARGET_DURIAN
2059 bool "Support Phytium Durian Platform"
2061 select GPIO_EXTRA_HEADER
2063 Support for durian platform.
2064 It has 2GB Sdram, uart and pcie.
2066 config TARGET_POMELO
2067 bool "Support Phytium Pomelo Platform"
2079 select DM_ETH if NET
2082 Support for pomelo platform.
2083 It has 8GB Sdram, uart and pcie.
2085 config TARGET_PRESIDIO_ASIC
2086 bool "Support Cortina Presidio ASIC Platform"
2090 config TARGET_XENGUEST_ARM64
2091 bool "Xen guest ARM64"
2095 select LINUX_KERNEL_IMAGE_HEADER
2098 imply OF_HAS_PRIOR_STAGE
2101 bool "Support HPE GXP SoCs"
2108 config SUPPORT_PASSING_ATAGS
2109 bool "Support pre-devicetree ATAG-based booting"
2111 imply SETUP_MEMORY_TAGS
2113 Support for booting older Linux kernels, using ATAGs rather than
2114 passing a devicetree. This is option is rarely used, and the
2115 semantics are defined at
2116 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
2118 config SETUP_MEMORY_TAGS
2119 bool "Pass memory size information via ATAG"
2120 depends on SUPPORT_PASSING_ATAGS
2123 bool "Pass Linux kernel cmdline via ATAG"
2124 depends on SUPPORT_PASSING_ATAGS
2127 bool "Pass initrd starting point and size via ATAG"
2128 depends on SUPPORT_PASSING_ATAGS
2131 bool "Pass system revision via ATAG"
2132 depends on SUPPORT_PASSING_ATAGS
2135 bool "Pass system serial number via ATAG"
2136 depends on SUPPORT_PASSING_ATAGS
2138 config STATIC_MACH_TYPE
2139 bool "Statically define the Machine ID number"
2140 default y if TARGET_DS109 || TARGET_NOKIA_RX51 || TARGET_DS414 || DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
2142 When booting via ATAGs, enable this option if we know the correct
2143 machine ID number to use at compile time. Some systems will be
2144 passed the number dynamically by whatever loads U-Boot.
2147 int "Machine ID number"
2148 depends on STATIC_MACH_TYPE
2149 default 527 if TARGET_DS109
2150 default 1955 if TARGET_NOKIA_RX51
2151 default 3036 if TARGET_DS414
2152 default 4283 if DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
2154 When booting via ATAGs, the machine type must be passed as a number.
2155 For the full list see https://www.arm.linux.org.uk/developer/machines
2157 config ARCH_SUPPORT_TFABOOT
2161 bool "Support for booting from TF-A"
2162 depends on ARCH_SUPPORT_TFABOOT
2164 Some platforms support the setup of secure registers (for instance
2165 for CPU errata handling) or provide secure services like PSCI.
2166 Those services could also be provided by other firmware parts
2167 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
2168 does not need to (and cannot) execute this code.
2169 Enabling this option will make a U-Boot binary that is relying
2170 on other firmware layers to provide secure functionality.
2172 config TI_SECURE_DEVICE
2173 bool "HS Device Type Support"
2174 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2176 If a high secure (HS) device type is being used, this config
2177 must be set. This option impacts various aspects of the
2178 build system (to create signed boot images that can be
2179 authenticated) and the code. See the doc/README.ti-secure
2180 file for further details.
2182 config SYS_KWD_CONFIG
2183 string "kwbimage config file path"
2184 depends on ARCH_KIRKWOOD || ARCH_MVEBU
2185 default "arch/arm/mach-mvebu/kwbimage.cfg"
2187 Path within the source directory to the kwbimage.cfg file to use
2188 when packaging the U-Boot image for use.
2190 source "arch/arm/mach-apple/Kconfig"
2192 source "arch/arm/mach-aspeed/Kconfig"
2194 source "arch/arm/mach-at91/Kconfig"
2196 source "arch/arm/mach-bcm283x/Kconfig"
2198 source "arch/arm/mach-bcmbca/Kconfig"
2200 source "arch/arm/mach-bcmstb/Kconfig"
2202 source "arch/arm/mach-davinci/Kconfig"
2204 source "arch/arm/mach-exynos/Kconfig"
2206 source "arch/arm/mach-hpe/gxp/Kconfig"
2208 source "arch/arm/mach-highbank/Kconfig"
2210 source "arch/arm/mach-integrator/Kconfig"
2212 source "arch/arm/mach-ipq40xx/Kconfig"
2214 source "arch/arm/mach-k3/Kconfig"
2216 source "arch/arm/mach-keystone/Kconfig"
2218 source "arch/arm/mach-kirkwood/Kconfig"
2220 source "arch/arm/mach-lpc32xx/Kconfig"
2222 source "arch/arm/mach-mvebu/Kconfig"
2224 source "arch/arm/mach-octeontx/Kconfig"
2226 source "arch/arm/mach-octeontx2/Kconfig"
2228 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2230 source "arch/arm/mach-imx/mx3/Kconfig"
2232 source "arch/arm/mach-imx/mx5/Kconfig"
2234 source "arch/arm/mach-imx/mx6/Kconfig"
2236 source "arch/arm/mach-imx/mx7/Kconfig"
2238 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2240 source "arch/arm/mach-imx/imx8/Kconfig"
2242 source "arch/arm/mach-imx/imx8m/Kconfig"
2244 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2246 source "arch/arm/mach-imx/imx9/Kconfig"
2248 source "arch/arm/mach-imx/imxrt/Kconfig"
2250 source "arch/arm/mach-imx/mxs/Kconfig"
2252 source "arch/arm/mach-omap2/Kconfig"
2254 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2256 source "arch/arm/mach-orion5x/Kconfig"
2258 source "arch/arm/mach-owl/Kconfig"
2260 source "arch/arm/mach-rmobile/Kconfig"
2262 source "arch/arm/mach-meson/Kconfig"
2264 source "arch/arm/mach-mediatek/Kconfig"
2266 source "arch/arm/mach-qemu/Kconfig"
2268 source "arch/arm/mach-rockchip/Kconfig"
2270 source "arch/arm/mach-s5pc1xx/Kconfig"
2272 source "arch/arm/mach-snapdragon/Kconfig"
2274 source "arch/arm/mach-socfpga/Kconfig"
2276 source "arch/arm/mach-sti/Kconfig"
2278 source "arch/arm/mach-stm32/Kconfig"
2280 source "arch/arm/mach-stm32mp/Kconfig"
2282 source "arch/arm/mach-sunxi/Kconfig"
2284 source "arch/arm/mach-tegra/Kconfig"
2286 source "arch/arm/mach-u8500/Kconfig"
2288 source "arch/arm/mach-uniphier/Kconfig"
2290 source "arch/arm/cpu/armv7/vf610/Kconfig"
2292 source "arch/arm/mach-zynq/Kconfig"
2294 source "arch/arm/mach-zynqmp/Kconfig"
2296 source "arch/arm/mach-versal/Kconfig"
2298 source "arch/arm/mach-versal-net/Kconfig"
2300 source "arch/arm/mach-zynqmp-r5/Kconfig"
2302 source "arch/arm/cpu/armv7/Kconfig"
2304 source "arch/arm/cpu/armv8/Kconfig"
2306 source "arch/arm/mach-imx/Kconfig"
2308 source "arch/arm/mach-nexell/Kconfig"
2310 source "arch/arm/mach-npcm/Kconfig"
2312 source "board/armltd/total_compute/Kconfig"
2313 source "board/armltd/corstone1000/Kconfig"
2314 source "board/bosch/shc/Kconfig"
2315 source "board/bosch/guardian/Kconfig"
2316 source "board/Marvell/octeontx/Kconfig"
2317 source "board/Marvell/octeontx2/Kconfig"
2318 source "board/armltd/vexpress/Kconfig"
2319 source "board/armltd/vexpress64/Kconfig"
2320 source "board/cortina/presidio-asic/Kconfig"
2321 source "board/broadcom/bcm96753ref/Kconfig"
2322 source "board/broadcom/bcmns3/Kconfig"
2323 source "board/cavium/thunderx/Kconfig"
2324 source "board/eets/pdu001/Kconfig"
2325 source "board/emulation/qemu-arm/Kconfig"
2326 source "board/freescale/ls2080aqds/Kconfig"
2327 source "board/freescale/ls2080ardb/Kconfig"
2328 source "board/freescale/ls1088a/Kconfig"
2329 source "board/freescale/ls1028a/Kconfig"
2330 source "board/freescale/ls1021aqds/Kconfig"
2331 source "board/freescale/ls1043aqds/Kconfig"
2332 source "board/freescale/ls1021atwr/Kconfig"
2333 source "board/freescale/ls1021atsn/Kconfig"
2334 source "board/freescale/ls1021aiot/Kconfig"
2335 source "board/freescale/ls1046aqds/Kconfig"
2336 source "board/freescale/ls1043ardb/Kconfig"
2337 source "board/freescale/ls1046ardb/Kconfig"
2338 source "board/freescale/ls1046afrwy/Kconfig"
2339 source "board/freescale/ls1012aqds/Kconfig"
2340 source "board/freescale/ls1012ardb/Kconfig"
2341 source "board/freescale/ls1012afrdm/Kconfig"
2342 source "board/freescale/lx2160a/Kconfig"
2343 source "board/grinn/chiliboard/Kconfig"
2344 source "board/hisilicon/hikey/Kconfig"
2345 source "board/hisilicon/hikey960/Kconfig"
2346 source "board/hisilicon/poplar/Kconfig"
2347 source "board/isee/igep003x/Kconfig"
2348 source "board/kontron/sl28/Kconfig"
2349 source "board/myir/mys_6ulx/Kconfig"
2350 source "board/siemens/common/Kconfig"
2351 source "board/seeed/npi_imx6ull/Kconfig"
2352 source "board/socionext/developerbox/Kconfig"
2353 source "board/st/stv0991/Kconfig"
2354 source "board/tcl/sl50/Kconfig"
2355 source "board/traverse/ten64/Kconfig"
2356 source "board/variscite/dart_6ul/Kconfig"
2357 source "board/vscom/baltos/Kconfig"
2358 source "board/phytium/durian/Kconfig"
2359 source "board/phytium/pomelo/Kconfig"
2360 source "board/xen/xenguest_arm64/Kconfig"
2362 source "arch/arm/Kconfig.debug"