1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
11 imply SPL_SEPARATE_BSS
14 bool "Enable support for CRC32 instruction"
18 ARMv8 implements dedicated crc32 instruction for crc32 calculation.
19 This is faster than software crc32 calculation. This instruction may
20 not be present on all ARMv8.0, but is always present on ARMv8.1 and
23 config COUNTER_FREQUENCY
24 int "Timer clock frequency"
25 depends on ARM64 || CPU_V7A
26 default 8000000 if IMX8 || MX7 || MX6UL || MX6ULL
27 default 24000000 if ARCH_SUNXI || ARCH_EXYNOS || ROCKCHIP_RK3128 || \
28 ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036
29 default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A
30 default 100000000 if ARCH_ZYNQMP
33 For platforms with ARMv8-A and ARMv7-A which features a system
34 counter, those platforms needs software to program the counter
35 frequency. Setup time clock frequency for certain platform.
36 0 means no need to configure the system counter frequency.
37 For platforms needs the frequency set in U-Boot with a
38 pre-defined value, should have the macro defined as a non-zero value.
40 config POSITION_INDEPENDENT
41 bool "Generate position-independent pre-relocation code"
42 depends on ARM64 || CPU_V7A
44 U-Boot expects to be linked to a specific hard-coded address, and to
45 be loaded to and run from that address. This option lifts that
46 restriction, thus allowing the code to be loaded to and executed from
47 almost any 4K aligned address. This logic relies on the relocation
48 information that is embedded in the binary to support U-Boot
49 relocating itself to the top-of-RAM later during execution.
51 config INIT_SP_RELATIVE
52 bool "Specify the early stack pointer relative to the .bss section"
54 default n if ARCH_QEMU
55 default y if POSITION_INDEPENDENT
57 U-Boot typically uses a hard-coded value for the stack pointer
58 before relocation. Enable this option to instead calculate the
59 initial SP at run-time. This is useful to avoid hard-coding addresses
60 into U-Boot, so that it can be loaded and executed at arbitrary
61 addresses and thus avoid using arbitrary addresses at runtime.
63 If this option is enabled, the early stack pointer is set to
64 &_bss_start with a offset value added. The offset is specified by
65 SYS_INIT_SP_BSS_OFFSET.
67 config SYS_INIT_SP_BSS_OFFSET
68 int "Early stack offset from the .bss base address"
70 depends on INIT_SP_RELATIVE
73 This option's value is the offset added to &_bss_start in order to
74 calculate the stack pointer. This offset should be large enough so
75 that the early malloc region, global data (gd), and early stack usage
76 do not overlap any appended DTB.
78 config SPL_SYS_NO_VECTOR_TABLE
82 config LINUX_KERNEL_IMAGE_HEADER
86 Place a Linux kernel image header at the start of the U-Boot binary.
87 The format of the header is described in the Linux kernel source at
88 Documentation/arm64/booting.txt. This feature is useful since the
89 image header reports the amount of memory (BSS and similar) that
90 U-Boot needs to use, but which isn't part of the binary.
92 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
93 depends on LINUX_KERNEL_IMAGE_HEADER
96 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
97 TEXT_OFFSET value written to the Linux kernel image header.
109 ARM GICV3 Interrupt translation service (ITS).
110 Basic support for programming locality specific peripheral
111 interrupts (LPI) configuration tables and enable LPI tables.
112 LPI configuration table can be used by u-boot or Linux.
113 ARM GICV3 has limitation, once the LPI table is enabled, LPI
114 configuration table can not be re-programmed, unless GICV3 reset.
120 config DMA_ADDR_T_64BIT
130 config GPIO_EXTRA_HEADER
133 # Used for compatibility with asm files copied from the kernel
134 config ARM_ASM_UNIFIED
138 # Used for compatibility with asm files copied from the kernel
142 config SYS_ICACHE_OFF
143 bool "Do not enable icache"
145 Do not enable instruction cache in U-Boot.
147 config SPL_SYS_ICACHE_OFF
148 bool "Do not enable icache in SPL"
150 default SYS_ICACHE_OFF
152 Do not enable instruction cache in SPL.
154 config SYS_DCACHE_OFF
155 bool "Do not enable dcache"
157 Do not enable data cache in U-Boot.
159 config SPL_SYS_DCACHE_OFF
160 bool "Do not enable dcache in SPL"
162 default SYS_DCACHE_OFF
164 Do not enable data cache in SPL.
166 config SYS_ARM_CACHE_CP15
167 bool "CP15 based cache enabling support"
169 Select this if your processor suports enabling caches by using
173 bool "MMU-based Paged Memory Management Support"
174 select SYS_ARM_CACHE_CP15
176 Select if you want MMU-based virtualised addressing space
177 support via paged memory management.
180 bool 'Use the ARM v7 PMSA Compliant MPU'
182 Some ARM systems without an MMU have instead a Memory Protection
183 Unit (MPU) that defines the type and permissions for regions of
185 If your CPU has an MPU then you should choose 'y' here unless you
186 know that you do not want to use the MPU.
188 # If set, the workarounds for these ARM errata are applied early during U-Boot
189 # startup. Note that in general these options force the workarounds to be
190 # applied; no CPU-type/version detection exists, unlike the similar options in
191 # the Linux kernel. Do not set these options unless they apply! Also note that
192 # the following can be machine-specific errata. These do have ability to
193 # provide rudimentary version and machine-specific checks, but expect no
195 # CONFIG_ARM_ERRATA_430973
196 # CONFIG_ARM_ERRATA_454179
197 # CONFIG_ARM_ERRATA_621766
198 # CONFIG_ARM_ERRATA_798870
199 # CONFIG_ARM_ERRATA_801819
200 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
201 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
203 config ARM_ERRATA_430973
206 config ARM_ERRATA_454179
209 config ARM_ERRATA_621766
212 config ARM_ERRATA_716044
215 config ARM_ERRATA_725233
218 config ARM_ERRATA_742230
221 config ARM_ERRATA_743622
224 config ARM_ERRATA_751472
227 config ARM_ERRATA_761320
230 config ARM_ERRATA_773022
233 config ARM_ERRATA_774769
236 config ARM_ERRATA_794072
239 config ARM_ERRATA_798870
242 config ARM_ERRATA_801819
245 config ARM_ERRATA_826974
248 config ARM_ERRATA_828024
251 config ARM_ERRATA_829520
254 config ARM_ERRATA_833069
257 config ARM_ERRATA_833471
260 config ARM_ERRATA_845369
263 config ARM_ERRATA_852421
266 config ARM_ERRATA_852423
269 config ARM_ERRATA_855873
272 config ARM_CORTEX_A8_CVE_2017_5715
275 config ARM_CORTEX_A15_CVE_2017_5715
280 select SYS_CACHE_SHIFT_5
285 select SYS_CACHE_SHIFT_5
290 select SYS_CACHE_SHIFT_5
292 imply SPL_SEPARATE_BSS
296 select SYS_CACHE_SHIFT_5
301 select SYS_CACHE_SHIFT_5
303 imply SPL_SEPARATE_BSS
308 select SYS_CACHE_SHIFT_5
315 select SYS_CACHE_SHIFT_6
322 select SYS_CACHE_SHIFT_5
323 select SYS_THUMB_BUILD
329 select SYS_ARM_CACHE_CP15
331 select SYS_CACHE_SHIFT_6
335 select SYS_CACHE_SHIFT_5
344 select SYS_CACHE_SHIFT_5
348 default "arm720t" if CPU_ARM720T
349 default "arm920t" if CPU_ARM920T
350 default "arm926ejs" if CPU_ARM926EJS
351 default "arm946es" if CPU_ARM946ES
352 default "arm1136" if CPU_ARM1136
353 default "arm1176" if CPU_ARM1176
354 default "armv7" if CPU_V7A
355 default "armv7" if CPU_V7R
356 default "armv7m" if CPU_V7M
357 default "pxa" if CPU_PXA
358 default "sa1100" if CPU_SA1100
359 default "armv8" if ARM64
363 default 4 if CPU_ARM720T
364 default 4 if CPU_ARM920T
365 default 5 if CPU_ARM926EJS
366 default 5 if CPU_ARM946ES
367 default 6 if CPU_ARM1136
368 default 6 if CPU_ARM1176
373 default 4 if CPU_SA1100
377 prompt "Select the ARM data write cache policy"
378 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
380 default SYS_ARM_CACHE_WRITEBACK
382 config SYS_ARM_CACHE_WRITEBACK
383 bool "Write-back (WB)"
385 A write updates the cache only and marks the cache line as dirty.
386 External memory is updated only when the line is evicted or explicitly
389 config SYS_ARM_CACHE_WRITETHROUGH
390 bool "Write-through (WT)"
392 A write updates both the cache and the external memory system.
393 This does not mark the cache line as dirty.
395 config SYS_ARM_CACHE_WRITEALLOC
396 bool "Write allocation (WA)"
398 A cache line is allocated on a write miss. This means that executing a
399 store instruction on the processor might cause a burst read to occur.
400 There is a linefill to obtain the data for the cache line, before the
405 bool "Enable ARCH_CPU_INIT"
407 Some architectures require a call to arch_cpu_init().
408 Say Y here to enable it
410 config SYS_ARCH_TIMER
411 bool "ARM Generic Timer support"
412 depends on CPU_V7A || ARM64
415 The ARM Generic Timer (aka arch-timer) provides an architected
416 interface to a timer source on an SoC.
417 It is mandatory for ARMv8 implementation and widely available
421 bool "Support for ARM SMC Calling Convention (SMCCC)"
422 depends on CPU_V7A || ARM64
425 Say Y here if you want to enable ARM SMC Calling Convention.
426 This should be enabled if U-Boot needs to communicate with system
427 firmware (for example, PSCI) according to SMCCC.
430 bool "Support ARM semihosting"
432 Semihosting is a method for a target to communicate with a host
433 debugger. It uses special instructions which the debugger will trap
434 on and interpret. This allows U-Boot to read/write files, print to
435 the console, and execute arbitrary commands on the host system.
437 Enabling this option will add support for reading and writing files
438 on the host system. If you don't have a debugger attached then trying
439 to do this will likely cause U-Boot to hang. Say 'n' if you are unsure.
441 config SEMIHOSTING_FALLBACK
442 bool "Recover gracefully when semihosting fails"
443 depends on SEMIHOSTING && ARM64
446 Normally, if U-Boot makes a semihosting call and no debugger is
447 attached, then it will panic due to a synchronous abort
448 exception. This config adds an exception handler which will allow
449 U-Boot to recover. Say 'y' if unsure.
451 config SPL_SEMIHOSTING
452 bool "Support ARM semihosting in SPL"
455 Semihosting is a method for a target to communicate with a host
456 debugger. It uses special instructions which the debugger will trap
457 on and interpret. This allows U-Boot to read/write files, print to
458 the console, and execute arbitrary commands on the host system.
460 Enabling this option will add support for reading and writing files
461 on the host system. If you don't have a debugger attached then trying
462 to do this will likely cause U-Boot to hang. Say 'n' if you are unsure.
464 config SPL_SEMIHOSTING_FALLBACK
465 bool "Recover gracefully when semihosting fails in SPL"
466 depends on SPL_SEMIHOSTING && ARM64
467 select ARMV8_SPL_EXCEPTION_VECTORS
470 Normally, if U-Boot makes a semihosting call and no debugger is
471 attached, then it will panic due to a synchronous abort
472 exception. This config adds an exception handler which will allow
473 U-Boot to recover. Say 'y' if unsure.
475 config SYS_THUMB_BUILD
476 bool "Build U-Boot using the Thumb instruction set"
479 Use this flag to build U-Boot using the Thumb instruction set for
480 ARM architectures. Thumb instruction set provides better code
481 density. For ARM architectures that support Thumb2 this flag will
482 result in Thumb2 code generated by GCC.
484 config SPL_SYS_THUMB_BUILD
485 bool "Build SPL using the Thumb instruction set"
486 default y if SYS_THUMB_BUILD
487 depends on !ARM64 && SPL
489 Use this flag to build SPL using the Thumb instruction set for
490 ARM architectures. Thumb instruction set provides better code
491 density. For ARM architectures that support Thumb2 this flag will
492 result in Thumb2 code generated by GCC.
494 config TPL_SYS_THUMB_BUILD
495 bool "Build TPL using the Thumb instruction set"
496 default y if SYS_THUMB_BUILD
497 depends on TPL && !ARM64
499 Use this flag to build TPL using the Thumb instruction set for
500 ARM architectures. Thumb instruction set provides better code
501 density. For ARM architectures that support Thumb2 this flag will
502 result in Thumb2 code generated by GCC.
505 config SYS_L2CACHE_OFF
508 If SoC does not support L2CACHE or one does not want to enable
509 L2CACHE, choose this option.
511 config ENABLE_ARM_SOC_BOOT0_HOOK
512 bool "prepare BOOT0 header"
514 If the SoC's BOOT0 requires a header area filled with (magic)
515 values, then choose this option, and create a file included as
516 <asm/arch/boot0.h> which contains the required assembler code.
518 config USE_ARCH_MEMCPY
519 bool "Use an assembly optimized implementation of memcpy"
521 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
523 Enable the generation of an optimized version of memcpy.
524 Such an implementation may be faster under some conditions
525 but may increase the binary size.
527 config SPL_USE_ARCH_MEMCPY
528 bool "Use an assembly optimized implementation of memcpy for SPL"
529 default y if USE_ARCH_MEMCPY
532 Enable the generation of an optimized version of memcpy.
533 Such an implementation may be faster under some conditions
534 but may increase the binary size.
536 config TPL_USE_ARCH_MEMCPY
537 bool "Use an assembly optimized implementation of memcpy for TPL"
538 default y if USE_ARCH_MEMCPY
541 Enable the generation of an optimized version of memcpy.
542 Such an implementation may be faster under some conditions
543 but may increase the binary size.
545 config USE_ARCH_MEMMOVE
546 bool "Use an assembly optimized implementation of memmove" if !ARM64
547 default USE_ARCH_MEMCPY if ARM64
550 Enable the generation of an optimized version of memmove.
551 Such an implementation may be faster under some conditions
552 but may increase the binary size.
554 config SPL_USE_ARCH_MEMMOVE
555 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
556 default SPL_USE_ARCH_MEMCPY if ARM64
557 depends on SPL && ARM64
559 Enable the generation of an optimized version of memmove.
560 Such an implementation may be faster under some conditions
561 but may increase the binary size.
563 config TPL_USE_ARCH_MEMMOVE
564 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
565 default TPL_USE_ARCH_MEMCPY if ARM64
566 depends on TPL && ARM64
568 Enable the generation of an optimized version of memmove.
569 Such an implementation may be faster under some conditions
570 but may increase the binary size.
572 config USE_ARCH_MEMSET
573 bool "Use an assembly optimized implementation of memset"
575 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
577 Enable the generation of an optimized version of memset.
578 Such an implementation may be faster under some conditions
579 but may increase the binary size.
581 config SPL_USE_ARCH_MEMSET
582 bool "Use an assembly optimized implementation of memset for SPL"
583 default y if USE_ARCH_MEMSET
586 Enable the generation of an optimized version of memset.
587 Such an implementation may be faster under some conditions
588 but may increase the binary size.
590 config TPL_USE_ARCH_MEMSET
591 bool "Use an assembly optimized implementation of memset for TPL"
592 default y if USE_ARCH_MEMSET
595 Enable the generation of an optimized version of memset.
596 Such an implementation may be faster under some conditions
597 but may increase the binary size.
599 config ARM64_SUPPORT_AARCH32
600 bool "ARM64 system support AArch32 execution state"
602 default y if !TARGET_THUNDERX_88XX
604 This ARM64 system supports AArch32 execution state.
607 prompt "Target select"
612 select GPIO_EXTRA_HEADER
613 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
614 select SPL_SEPARATE_BSS if SPL
619 select GPIO_EXTRA_HEADER
620 select SPL_DM_SPI if SPL
623 Support for TI's DaVinci platform.
626 bool "Marvell Kirkwood"
627 select ARCH_MISC_INIT
628 select BOARD_EARLY_INIT_F
630 select GPIO_EXTRA_HEADER
633 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
639 select GPIO_EXTRA_HEADER
640 select SPL_DM_SPI if SPL
641 select SPL_DM_SPI_FLASH if SPL
650 select GPIO_EXTRA_HEADER
651 select SPL_SEPARATE_BSS if SPL
653 config TARGET_STV0991
654 bool "Support stv0991"
660 select GPIO_EXTRA_HEADER
667 bool "Broadcom BCM283X family"
671 select GPIO_EXTRA_HEADER
674 select SERIAL_SEARCH_ALL
679 bool "Broadcom BCM63158 family"
685 bool "Broadcom BCM6753 family"
692 bool "Broadcom BCM68360 family"
698 bool "Broadcom BCM6858 family"
704 bool "Broadcom BCM7XXX family"
707 select GPIO_EXTRA_HEADER
710 imply OF_HAS_PRIOR_STAGE
712 This enables support for Broadcom ARM-based set-top box
713 chipsets, including the 7445 family of chips.
715 config TARGET_VEXPRESS_CA9X4
716 bool "Support vexpress_ca9x4"
720 config TARGET_BCMCYGNUS
721 bool "Support bcmcygnus"
723 select GPIO_EXTRA_HEADER
725 imply BCM_SF2_ETH_GMAC
733 bool "Support Broadcom Northstar2"
735 select GPIO_EXTRA_HEADER
737 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
738 ARMv8 Cortex-A57 processors targeting a broad range of networking
742 bool "Support Broadcom NS3"
744 select BOARD_LATE_INIT
746 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
747 ARMv8 Cortex-A72 processors targeting a broad range of networking
751 bool "Samsung EXYNOS"
761 select GPIO_EXTRA_HEADER
762 imply SYS_THUMB_BUILD
767 bool "Samsung S5PC1XX"
773 select GPIO_EXTRA_HEADER
777 bool "Calxeda Highbank"
788 imply OF_HAS_PRIOR_STAGE
790 config ARCH_INTEGRATOR
791 bool "ARM Ltd. Integrator family"
794 select GPIO_EXTRA_HEADER
799 bool "Qualcomm IPQ40xx SoCs"
805 select GPIO_EXTRA_HEADER
818 select GPIO_EXTRA_HEADER
820 select SYS_ARCH_TIMER
821 select SYS_THUMB_BUILD
827 bool "Texas Instruments' K3 Architecture"
832 config ARCH_OMAP2PLUS
835 select GPIO_EXTRA_HEADER
836 select SPL_BOARD_INIT if SPL
837 select SPL_STACK_R if SPL
839 imply TI_SYSC if DM && OF_CONTROL
842 imply SPL_SEPARATE_BSS
846 select GPIO_EXTRA_HEADER
847 imply DISTRO_DEFAULTS
850 Support for the Meson SoC family developed by Amlogic Inc.,
851 targeted at media players and tablet computers. We currently
852 support the S905 (GXBaby) 64-bit SoC.
857 select GPIO_EXTRA_HEADER
860 select SPL_LIBCOMMON_SUPPORT if SPL
861 select SPL_LIBGENERIC_SUPPORT if SPL
862 select SPL_OF_CONTROL if SPL
865 Support for the MediaTek SoCs family developed by MediaTek Inc.
866 Please refer to doc/README.mediatek for more information.
869 bool "NXP LPC32xx platform"
874 select GPIO_EXTRA_HEADER
880 bool "NXP i.MX8 platform"
882 select SYS_FSL_HAS_SEC
883 select SYS_FSL_SEC_COMPAT_4
884 select SYS_FSL_SEC_LE
886 select GPIO_EXTRA_HEADER
889 select ENABLE_ARM_SOC_BOOT0_HOOK
893 bool "NXP i.MX8M platform"
895 select GPIO_EXTRA_HEADER
897 select SYS_FSL_HAS_SEC
898 select SYS_FSL_SEC_COMPAT_4
899 select SYS_FSL_SEC_LE
907 bool "NXP i.MX8ULP platform"
913 select GPIO_EXTRA_HEADER
918 bool "NXP i.MXRT platform"
922 select GPIO_EXTRA_HEADER
928 bool "NXP i.MX23 family"
930 select GPIO_EXTRA_HEADER
936 bool "NXP i.MX28 family"
938 select GPIO_EXTRA_HEADER
944 bool "NXP i.MX31 family"
946 select GPIO_EXTRA_HEADER
951 select BOARD_POSTCLK_INIT
953 select GPIO_EXTRA_HEADER
955 select SYS_FSL_HAS_SEC
956 select SYS_FSL_SEC_COMPAT_4
957 select SYS_FSL_SEC_LE
958 select ROM_UNIFIED_SECTIONS
960 imply SYS_THUMB_BUILD
964 select ARCH_MISC_INIT
966 select GPIO_EXTRA_HEADER
968 select SYS_FSL_HAS_SEC
969 select SYS_FSL_SEC_COMPAT_4
970 select SYS_FSL_SEC_LE
971 imply BOARD_EARLY_INIT_F
973 imply SYS_THUMB_BUILD
977 select BOARD_POSTCLK_INIT
979 select GPIO_EXTRA_HEADER
981 select SYS_FSL_HAS_SEC
982 select SYS_FSL_SEC_COMPAT_4
983 select SYS_FSL_SEC_LE
985 imply SYS_THUMB_BUILD
986 imply SPL_SEPARATE_BSS
990 default "arch/arm/mach-omap2/u-boot-spl.lds"
995 select BOARD_EARLY_INIT_F
997 select GPIO_EXTRA_HEADER
1002 bool "Nexell S5P4418/S5P6818 SoC"
1003 select ENABLE_ARM_SOC_BOOT0_HOOK
1005 select GPIO_EXTRA_HEADER
1023 select LINUX_KERNEL_IMAGE_HEADER
1026 select POSITION_INDEPENDENT
1032 select SYSRESET_WATCHDOG
1033 select SYSRESET_WATCHDOG_AUTO
1037 imply DISTRO_DEFAULTS
1038 imply OF_HAS_PRIOR_STAGE
1041 bool "Actions Semi OWL SoCs"
1045 select GPIO_EXTRA_HEADER
1050 select SYS_RELOC_GD_ENV_ADDR
1054 bool "QEMU Virtual Platform"
1063 imply OF_HAS_PRIOR_STAGE
1066 bool "Renesas ARM SoCs"
1069 select GPIO_EXTRA_HEADER
1070 imply BOARD_EARLY_INIT_F
1073 imply SYS_THUMB_BUILD
1074 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
1076 config ARCH_SNAPDRAGON
1077 bool "Qualcomm Snapdragon SoCs"
1082 select GPIO_EXTRA_HEADER
1091 bool "Altera SOCFPGA family"
1092 select ARCH_EARLY_INIT_R
1093 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
1094 select ARM64 if TARGET_SOCFPGA_SOC64
1095 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1099 select GPIO_EXTRA_HEADER
1100 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1102 select SPL_DM_RESET if DM_RESET
1103 select SPL_DM_SERIAL
1104 select SPL_LIBCOMMON_SUPPORT
1105 select SPL_LIBGENERIC_SUPPORT
1106 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
1107 select SPL_OF_CONTROL
1108 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1114 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1116 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1117 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1127 imply SPL_DM_SPI_FLASH
1128 imply SPL_LIBDISK_SUPPORT
1130 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1131 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1132 imply SPL_SPI_FLASH_SUPPORT
1137 bool "Support sunxi (Allwinner) SoCs"
1140 select CMD_MMC if MMC
1141 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1146 select DM_I2C if I2C
1147 select DM_SPI if SPI
1148 select DM_SPI_FLASH if SPI
1150 select DM_MMC if MMC
1151 select DM_SCSI if SCSI
1153 select GPIO_EXTRA_HEADER
1154 select OF_BOARD_SETUP
1158 select SPECIFY_CONSOLE_INDEX
1159 select SPL_SEPARATE_BSS if SPL
1160 select SPL_STACK_R if SPL
1161 select SPL_SYS_MALLOC_SIMPLE if SPL
1162 select SPL_SYS_THUMB_BUILD if !ARM64
1165 select SYS_THUMB_BUILD if !ARM64
1166 select USB if DISTRO_DEFAULTS
1167 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1168 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1169 select SPL_USE_TINY_PRINTF
1171 select SYS_RELOC_GD_ENV_ADDR
1172 imply BOARD_LATE_INIT
1175 imply CMD_UBI if MTD_RAW_NAND
1176 imply DISTRO_DEFAULTS
1179 imply OF_LIBFDT_OVERLAY
1180 imply PRE_CONSOLE_BUFFER
1182 imply SPL_LIBCOMMON_SUPPORT
1183 imply SPL_LIBGENERIC_SUPPORT
1184 imply SPL_MMC if MMC
1188 imply SYSRESET_WATCHDOG
1189 imply SYSRESET_WATCHDOG_AUTO
1194 bool "ST-Ericsson U8500 Series"
1198 select DM_MMC if MMC
1200 select DM_USB_GADGET if DM_USB
1204 imply AB8500_USB_PHY
1205 imply ARM_PL180_MMCI
1210 imply NOMADIK_MTU_TIMER
1215 imply SYS_THUMB_BUILD
1216 imply SYSRESET_SYSCON
1219 bool "Support Xilinx Versal Platform"
1223 select DM_ETH if NET
1224 select DM_MMC if MMC
1229 imply BOARD_LATE_INIT
1230 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1233 bool "Freescale Vybrid"
1235 select GPIO_EXTRA_HEADER
1237 select SYS_FSL_ERRATUM_ESDHC111
1242 bool "Xilinx Zynq based platform"
1246 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1248 select DM_ETH if NET
1249 select DM_MMC if MMC
1255 select SPL_BOARD_INIT if SPL
1256 select SPL_CLK if SPL
1257 select SPL_DM if SPL
1258 select SPL_DM_SPI if SPL
1259 select SPL_DM_SPI_FLASH if SPL
1260 select SPL_OF_CONTROL if SPL
1261 select SPL_SEPARATE_BSS if SPL
1263 imply ARCH_EARLY_INIT_R
1264 imply BOARD_LATE_INIT
1268 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1271 config ARCH_ZYNQMP_R5
1272 bool "Xilinx ZynqMP R5 based platform"
1276 select DM_ETH if NET
1277 select DM_MMC if MMC
1284 bool "Xilinx ZynqMP based platform"
1288 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1289 select DM_ETH if NET
1291 select DM_MMC if MMC
1293 select DM_SPI if SPI
1294 select DM_SPI_FLASH if DM_SPI
1298 select SPL_BOARD_INIT if SPL
1299 select SPL_CLK if SPL
1300 select SPL_DM if SPL
1301 select SPL_DM_SPI if SPI && SPL_DM
1302 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1303 select SPL_DM_MAILBOX if SPL
1304 imply SPL_FIRMWARE if SPL
1305 select SPL_SEPARATE_BSS if SPL
1309 imply BOARD_LATE_INIT
1311 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1315 imply ZYNQMP_GPIO_MODEPIN if DM_GPIO && USB
1319 select GPIO_EXTRA_HEADER
1320 imply DISTRO_DEFAULTS
1323 config ARCH_VEXPRESS64
1324 bool "Support ARMv8 Arm Ltd. VExpress based boards and models"
1332 select MTD_NOR_FLASH if MTD
1333 select FLASH_CFI_DRIVER if MTD
1334 select ENV_IS_IN_FLASH if MTD
1335 imply DISTRO_DEFAULTS
1337 config TARGET_TOTAL_COMPUTE
1338 bool "Support Total Compute Platform"
1346 config TARGET_LS2080A_EMU
1347 bool "Support ls2080a_emu"
1350 select ARMV8_MULTIENTRY
1351 select FSL_DDR_SYNC_REFRESH
1352 select GPIO_EXTRA_HEADER
1354 Support for Freescale LS2080A_EMU platform.
1355 The LS2080A Development System (EMULATOR) is a pre-silicon
1356 development platform that supports the QorIQ LS2080A
1357 Layerscape Architecture processor.
1359 config TARGET_LS1088AQDS
1360 bool "Support ls1088aqds"
1363 select ARMV8_MULTIENTRY
1364 select ARCH_SUPPORT_TFABOOT
1365 select BOARD_LATE_INIT
1366 select GPIO_EXTRA_HEADER
1368 select FSL_DDR_INTERACTIVE if !SD_BOOT
1370 Support for NXP LS1088AQDS platform.
1371 The LS1088A Development System (QDS) is a high-performance
1372 development platform that supports the QorIQ LS1088A
1373 Layerscape Architecture processor.
1375 config TARGET_LS2080AQDS
1376 bool "Support ls2080aqds"
1379 select ARMV8_MULTIENTRY
1380 select ARCH_SUPPORT_TFABOOT
1381 select BOARD_LATE_INIT
1382 select GPIO_EXTRA_HEADER
1387 select FSL_DDR_INTERACTIVE if !SPL
1389 Support for Freescale LS2080AQDS platform.
1390 The LS2080A Development System (QDS) is a high-performance
1391 development platform that supports the QorIQ LS2080A
1392 Layerscape Architecture processor.
1394 config TARGET_LS2080ARDB
1395 bool "Support ls2080ardb"
1398 select ARMV8_MULTIENTRY
1399 select ARCH_SUPPORT_TFABOOT
1400 select BOARD_LATE_INIT
1403 select FSL_DDR_INTERACTIVE if !SPL
1404 select GPIO_EXTRA_HEADER
1408 Support for Freescale LS2080ARDB platform.
1409 The LS2080A Reference design board (RDB) is a high-performance
1410 development platform that supports the QorIQ LS2080A
1411 Layerscape Architecture processor.
1413 config TARGET_LS2081ARDB
1414 bool "Support ls2081ardb"
1417 select ARMV8_MULTIENTRY
1418 select BOARD_LATE_INIT
1419 select GPIO_EXTRA_HEADER
1422 Support for Freescale LS2081ARDB platform.
1423 The LS2081A Reference design board (RDB) is a high-performance
1424 development platform that supports the QorIQ LS2081A/LS2041A
1425 Layerscape Architecture processor.
1427 config TARGET_LX2160ARDB
1428 bool "Support lx2160ardb"
1431 select ARMV8_MULTIENTRY
1432 select ARCH_SUPPORT_TFABOOT
1433 select BOARD_LATE_INIT
1434 select GPIO_EXTRA_HEADER
1436 Support for NXP LX2160ARDB platform.
1437 The lx2160ardb (LX2160A Reference design board (RDB)
1438 is a high-performance development platform that supports the
1439 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1441 config TARGET_LX2160AQDS
1442 bool "Support lx2160aqds"
1445 select ARMV8_MULTIENTRY
1446 select ARCH_SUPPORT_TFABOOT
1447 select BOARD_LATE_INIT
1448 select GPIO_EXTRA_HEADER
1450 Support for NXP LX2160AQDS platform.
1451 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1452 is a high-performance development platform that supports the
1453 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1455 config TARGET_LX2162AQDS
1456 bool "Support lx2162aqds"
1458 select ARCH_MISC_INIT
1460 select ARMV8_MULTIENTRY
1461 select ARCH_SUPPORT_TFABOOT
1462 select BOARD_LATE_INIT
1463 select GPIO_EXTRA_HEADER
1465 Support for NXP LX2162AQDS platform.
1466 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1469 bool "Support HiKey 96boards Consumer Edition Platform"
1474 select GPIO_EXTRA_HEADER
1477 select SPECIFY_CONSOLE_INDEX
1480 Support for HiKey 96boards platform. It features a HI6220
1481 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1483 config TARGET_HIKEY960
1484 bool "Support HiKey960 96boards Consumer Edition Platform"
1488 select GPIO_EXTRA_HEADER
1493 Support for HiKey960 96boards platform. It features a HI3660
1494 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1496 config TARGET_POPLAR
1497 bool "Support Poplar 96boards Enterprise Edition Platform"
1501 select GPIO_EXTRA_HEADER
1506 Support for Poplar 96boards EE platform. It features a HI3798cv200
1507 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1508 making it capable of running any commercial set-top solution based on
1511 config TARGET_LS1012AQDS
1512 bool "Support ls1012aqds"
1515 select ARCH_SUPPORT_TFABOOT
1516 select BOARD_LATE_INIT
1517 select GPIO_EXTRA_HEADER
1519 Support for Freescale LS1012AQDS platform.
1520 The LS1012A Development System (QDS) is a high-performance
1521 development platform that supports the QorIQ LS1012A
1522 Layerscape Architecture processor.
1524 config TARGET_LS1012ARDB
1525 bool "Support ls1012ardb"
1528 select ARCH_SUPPORT_TFABOOT
1529 select BOARD_LATE_INIT
1530 select GPIO_EXTRA_HEADER
1534 Support for Freescale LS1012ARDB platform.
1535 The LS1012A Reference design board (RDB) is a high-performance
1536 development platform that supports the QorIQ LS1012A
1537 Layerscape Architecture processor.
1539 config TARGET_LS1012A2G5RDB
1540 bool "Support ls1012a2g5rdb"
1543 select ARCH_SUPPORT_TFABOOT
1544 select BOARD_LATE_INIT
1545 select GPIO_EXTRA_HEADER
1548 Support for Freescale LS1012A2G5RDB platform.
1549 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1550 development platform that supports the QorIQ LS1012A
1551 Layerscape Architecture processor.
1553 config TARGET_LS1012AFRWY
1554 bool "Support ls1012afrwy"
1557 select ARCH_SUPPORT_TFABOOT
1558 select BOARD_LATE_INIT
1559 select GPIO_EXTRA_HEADER
1563 Support for Freescale LS1012AFRWY platform.
1564 The LS1012A FRWY board (FRWY) is a high-performance
1565 development platform that supports the QorIQ LS1012A
1566 Layerscape Architecture processor.
1568 config TARGET_LS1012AFRDM
1569 bool "Support ls1012afrdm"
1572 select ARCH_SUPPORT_TFABOOT
1573 select GPIO_EXTRA_HEADER
1575 Support for Freescale LS1012AFRDM platform.
1576 The LS1012A Freedom board (FRDM) is a high-performance
1577 development platform that supports the QorIQ LS1012A
1578 Layerscape Architecture processor.
1580 config TARGET_LS1028AQDS
1581 bool "Support ls1028aqds"
1584 select ARMV8_MULTIENTRY
1585 select ARCH_SUPPORT_TFABOOT
1586 select BOARD_LATE_INIT
1587 select GPIO_EXTRA_HEADER
1589 Support for Freescale LS1028AQDS platform
1590 The LS1028A Development System (QDS) is a high-performance
1591 development platform that supports the QorIQ LS1028A
1592 Layerscape Architecture processor.
1594 config TARGET_LS1028ARDB
1595 bool "Support ls1028ardb"
1598 select ARMV8_MULTIENTRY
1599 select ARCH_SUPPORT_TFABOOT
1600 select BOARD_LATE_INIT
1601 select GPIO_EXTRA_HEADER
1603 Support for Freescale LS1028ARDB platform
1604 The LS1028A Development System (RDB) is a high-performance
1605 development platform that supports the QorIQ LS1028A
1606 Layerscape Architecture processor.
1608 config TARGET_LS1088ARDB
1609 bool "Support ls1088ardb"
1612 select ARMV8_MULTIENTRY
1613 select ARCH_SUPPORT_TFABOOT
1614 select BOARD_LATE_INIT
1616 select FSL_DDR_INTERACTIVE if !SD_BOOT
1617 select GPIO_EXTRA_HEADER
1619 Support for NXP LS1088ARDB platform.
1620 The LS1088A Reference design board (RDB) is a high-performance
1621 development platform that supports the QorIQ LS1088A
1622 Layerscape Architecture processor.
1624 config TARGET_LS1021AQDS
1625 bool "Support ls1021aqds"
1627 select ARCH_SUPPORT_PSCI
1628 select BOARD_EARLY_INIT_F
1629 select BOARD_LATE_INIT
1631 select CPU_V7_HAS_NONSEC
1632 select CPU_V7_HAS_VIRT
1633 select LS1_DEEP_SLEEP
1636 select FSL_DDR_INTERACTIVE
1637 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1638 select GPIO_EXTRA_HEADER
1639 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1642 config TARGET_LS1021ATWR
1643 bool "Support ls1021atwr"
1645 select ARCH_SUPPORT_PSCI
1646 select BOARD_EARLY_INIT_F
1647 select BOARD_LATE_INIT
1649 select CPU_V7_HAS_NONSEC
1650 select CPU_V7_HAS_VIRT
1651 select LS1_DEEP_SLEEP
1653 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1654 select GPIO_EXTRA_HEADER
1657 config TARGET_PG_WCOM_SELI8
1658 bool "Support Hitachi-Powergrids SELI8 service unit card"
1660 select ARCH_SUPPORT_PSCI
1661 select BOARD_EARLY_INIT_F
1662 select BOARD_LATE_INIT
1664 select CPU_V7_HAS_NONSEC
1665 select CPU_V7_HAS_VIRT
1667 select FSL_DDR_INTERACTIVE
1668 select GPIO_EXTRA_HEADER
1672 Support for Hitachi-Powergrids SELI8 service unit card.
1673 SELI8 is a QorIQ LS1021a based service unit card used
1674 in XMC20 and FOX615 product families.
1676 config TARGET_PG_WCOM_EXPU1
1677 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1679 select ARCH_SUPPORT_PSCI
1680 select BOARD_EARLY_INIT_F
1681 select BOARD_LATE_INIT
1683 select CPU_V7_HAS_NONSEC
1684 select CPU_V7_HAS_VIRT
1686 select FSL_DDR_INTERACTIVE
1690 Support for Hitachi-Powergrids EXPU1 service unit card.
1691 EXPU1 is a QorIQ LS1021a based service unit card used
1692 in XMC20 and FOX615 product families.
1694 config TARGET_LS1021ATSN
1695 bool "Support ls1021atsn"
1697 select ARCH_SUPPORT_PSCI
1698 select BOARD_EARLY_INIT_F
1699 select BOARD_LATE_INIT
1701 select CPU_V7_HAS_NONSEC
1702 select CPU_V7_HAS_VIRT
1703 select LS1_DEEP_SLEEP
1705 select GPIO_EXTRA_HEADER
1708 config TARGET_LS1021AIOT
1709 bool "Support ls1021aiot"
1711 select ARCH_SUPPORT_PSCI
1712 select BOARD_LATE_INIT
1714 select CPU_V7_HAS_NONSEC
1715 select CPU_V7_HAS_VIRT
1717 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1718 select GPIO_EXTRA_HEADER
1721 Support for Freescale LS1021AIOT platform.
1722 The LS1021A Freescale board (IOT) is a high-performance
1723 development platform that supports the QorIQ LS1021A
1724 Layerscape Architecture processor.
1726 config TARGET_LS1043AQDS
1727 bool "Support ls1043aqds"
1730 select ARMV8_MULTIENTRY
1731 select ARCH_SUPPORT_TFABOOT
1732 select BOARD_EARLY_INIT_F
1733 select BOARD_LATE_INIT
1735 select FSL_DDR_INTERACTIVE if !SPL
1736 select FSL_DSPI if !SPL_NO_DSPI
1737 select DM_SPI_FLASH if FSL_DSPI
1738 select GPIO_EXTRA_HEADER
1742 Support for Freescale LS1043AQDS platform.
1744 config TARGET_LS1043ARDB
1745 bool "Support ls1043ardb"
1748 select ARMV8_MULTIENTRY
1749 select ARCH_SUPPORT_TFABOOT
1750 select BOARD_EARLY_INIT_F
1751 select BOARD_LATE_INIT
1753 select FSL_DSPI if !SPL_NO_DSPI
1754 select DM_SPI_FLASH if FSL_DSPI
1755 select GPIO_EXTRA_HEADER
1757 Support for Freescale LS1043ARDB platform.
1759 config TARGET_LS1046AQDS
1760 bool "Support ls1046aqds"
1763 select ARMV8_MULTIENTRY
1764 select ARCH_SUPPORT_TFABOOT
1765 select BOARD_EARLY_INIT_F
1766 select BOARD_LATE_INIT
1767 select DM_SPI_FLASH if DM_SPI
1769 select FSL_DDR_BIST if !SPL
1770 select FSL_DDR_INTERACTIVE if !SPL
1771 select FSL_DDR_INTERACTIVE if !SPL
1772 select GPIO_EXTRA_HEADER
1775 Support for Freescale LS1046AQDS platform.
1776 The LS1046A Development System (QDS) is a high-performance
1777 development platform that supports the QorIQ LS1046A
1778 Layerscape Architecture processor.
1780 config TARGET_LS1046ARDB
1781 bool "Support ls1046ardb"
1784 select ARMV8_MULTIENTRY
1785 select ARCH_SUPPORT_TFABOOT
1786 select BOARD_EARLY_INIT_F
1787 select BOARD_LATE_INIT
1788 select DM_SPI_FLASH if DM_SPI
1789 select POWER_MC34VR500
1792 select FSL_DDR_INTERACTIVE if !SPL
1793 select GPIO_EXTRA_HEADER
1796 Support for Freescale LS1046ARDB platform.
1797 The LS1046A Reference Design Board (RDB) is a high-performance
1798 development platform that supports the QorIQ LS1046A
1799 Layerscape Architecture processor.
1801 config TARGET_LS1046AFRWY
1802 bool "Support ls1046afrwy"
1805 select ARMV8_MULTIENTRY
1806 select ARCH_SUPPORT_TFABOOT
1807 select BOARD_EARLY_INIT_F
1808 select BOARD_LATE_INIT
1809 select DM_SPI_FLASH if DM_SPI
1810 select GPIO_EXTRA_HEADER
1813 Support for Freescale LS1046AFRWY platform.
1814 The LS1046A Freeway Board (FRWY) is a high-performance
1815 development platform that supports the QorIQ LS1046A
1816 Layerscape Architecture processor.
1822 select ARMV8_MULTIENTRY
1838 select GPIO_EXTRA_HEADER
1839 select SPL_DM if SPL
1840 select SPL_DM_SPI if SPL
1841 select SPL_DM_SPI_FLASH if SPL
1842 select SPL_DM_I2C if SPL
1843 select SPL_DM_MMC if SPL
1844 select SPL_DM_SERIAL if SPL
1846 Support for Kontron SMARC-sAL28 board.
1849 bool "Support ten64"
1851 select ARCH_MISC_INIT
1853 select ARMV8_MULTIENTRY
1854 select ARCH_SUPPORT_TFABOOT
1855 select BOARD_LATE_INIT
1857 select FSL_DDR_INTERACTIVE if !SD_BOOT
1858 select GPIO_EXTRA_HEADER
1860 Support for Traverse Technologies Ten64 board, based
1863 config ARCH_UNIPHIER
1864 bool "Socionext UniPhier SoCs"
1865 select BOARD_LATE_INIT
1874 select OF_BOARD_SETUP
1878 select SPL_BOARD_INIT if SPL
1879 select SPL_DM if SPL
1880 select SPL_LIBCOMMON_SUPPORT if SPL
1881 select SPL_LIBGENERIC_SUPPORT if SPL
1882 select SPL_OF_CONTROL if SPL
1883 select SPL_PINCTRL if SPL
1886 imply DISTRO_DEFAULTS
1889 Support for UniPhier SoC family developed by Socionext Inc.
1890 (formerly, System LSI Business Division of Panasonic Corporation)
1892 config ARCH_SYNQUACER
1893 bool "Socionext SynQuacer SoCs"
1899 select SYSRESET_PSCI
1902 Support for SynQuacer SoC family developed by Socionext Inc.
1903 This SoC is used on 96boards EE DeveloperBox.
1906 bool "Support STMicroelectronics STM32 MCU with cortex M"
1913 bool "Support STMicrolectronics SoCs"
1922 Support for STMicroelectronics STiH407/10 SoC family.
1923 This SoC is used on Linaro 96Board STiH410-B2260
1926 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1927 select ARCH_MISC_INIT
1928 select ARCH_SUPPORT_TFABOOT
1929 select BOARD_LATE_INIT
1938 select OF_SYSTEM_SETUP
1944 select SYS_THUMB_BUILD
1948 imply OF_LIBFDT_OVERLAY
1949 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1953 Support for STM32MP SoC family developed by STMicroelectronics,
1954 MPUs based on ARM cortex A core
1955 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1956 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1958 SPL is the unsecure FSBL for the basic boot chain.
1960 config ARCH_ROCKCHIP
1961 bool "Support Rockchip SoCs"
1963 select BINMAN if SPL_OPTEE || (SPL && !ARM64)
1973 select ENABLE_ARM_SOC_BOOT0_HOOK
1976 select SPL_DM if SPL
1977 select SPL_DM_SPI if SPL
1978 select SPL_DM_SPI_FLASH if SPL
1980 select SYS_THUMB_BUILD if !ARM64
1983 imply DEBUG_UART_BOARD_INIT
1984 imply DISTRO_DEFAULTS
1986 imply SARADC_ROCKCHIP
1988 imply SPL_SYS_MALLOC_SIMPLE
1991 imply USB_FUNCTION_FASTBOOT
1993 config ARCH_OCTEONTX
1994 bool "Support OcteonTX SoCs"
1997 select GPIO_EXTRA_HEADER
2001 select BOARD_LATE_INIT
2002 select SYS_CACHE_SHIFT_7
2003 select SYS_PCI_64BIT if PCI
2004 imply OF_HAS_PRIOR_STAGE
2006 config ARCH_OCTEONTX2
2007 bool "Support OcteonTX2 SoCs"
2010 select GPIO_EXTRA_HEADER
2014 select BOARD_LATE_INIT
2015 select SYS_CACHE_SHIFT_7
2016 select SYS_PCI_64BIT if PCI
2017 imply OF_HAS_PRIOR_STAGE
2019 config TARGET_THUNDERX_88XX
2020 bool "Support ThunderX 88xx"
2022 select GPIO_EXTRA_HEADER
2025 select SYS_CACHE_SHIFT_7
2028 bool "Support Aspeed SoCs"
2033 config TARGET_DURIAN
2034 bool "Support Phytium Durian Platform"
2036 select GPIO_EXTRA_HEADER
2038 Support for durian platform.
2039 It has 2GB Sdram, uart and pcie.
2041 config TARGET_POMELO
2042 bool "Support Phytium Pomelo Platform"
2054 select DM_ETH if NET
2057 Support for pomelo platform.
2058 It has 8GB Sdram, uart and pcie.
2060 config TARGET_PRESIDIO_ASIC
2061 bool "Support Cortina Presidio ASIC Platform"
2065 config TARGET_XENGUEST_ARM64
2066 bool "Xen guest ARM64"
2070 select LINUX_KERNEL_IMAGE_HEADER
2073 imply OF_HAS_PRIOR_STAGE
2077 config SUPPORT_PASSING_ATAGS
2078 bool "Support pre-devicetree ATAG-based booting"
2080 imply SETUP_MEMORY_TAGS
2082 Support for booting older Linux kernels, using ATAGs rather than
2083 passing a devicetree. This is option is rarely used, and the
2084 semantics are defined at
2085 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
2087 config SETUP_MEMORY_TAGS
2088 bool "Pass memory size information via ATAG"
2089 depends on SUPPORT_PASSING_ATAGS
2092 bool "Pass Linux kernel cmdline via ATAG"
2093 depends on SUPPORT_PASSING_ATAGS
2096 bool "Pass initrd starting point and size via ATAG"
2097 depends on SUPPORT_PASSING_ATAGS
2100 bool "Pass system revision via ATAG"
2101 depends on SUPPORT_PASSING_ATAGS
2104 bool "Pass system serial number via ATAG"
2105 depends on SUPPORT_PASSING_ATAGS
2107 config STATIC_MACH_TYPE
2108 bool "Statically define the Machine ID number"
2110 When booting via ATAGs, enable this option if we know the correct
2111 machine ID number to use at compile time. Some systems will be
2112 passed the number dynamically by whatever loads U-Boot.
2115 int "Machine ID number"
2116 depends on STATIC_MACH_TYPE
2118 When booting via ATAGs, the machine type must be passed as a number.
2119 For the full list see https://www.arm.linux.org.uk/developer/machines
2121 config ARCH_SUPPORT_TFABOOT
2125 bool "Support for booting from TF-A"
2126 depends on ARCH_SUPPORT_TFABOOT
2128 Some platforms support the setup of secure registers (for instance
2129 for CPU errata handling) or provide secure services like PSCI.
2130 Those services could also be provided by other firmware parts
2131 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
2132 does not need to (and cannot) execute this code.
2133 Enabling this option will make a U-Boot binary that is relying
2134 on other firmware layers to provide secure functionality.
2136 config TI_SECURE_DEVICE
2137 bool "HS Device Type Support"
2138 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2140 If a high secure (HS) device type is being used, this config
2141 must be set. This option impacts various aspects of the
2142 build system (to create signed boot images that can be
2143 authenticated) and the code. See the doc/README.ti-secure
2144 file for further details.
2146 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
2147 config ISW_ENTRY_ADDR
2148 hex "Address in memory or XIP address of bootloader entry point"
2149 default 0x402F4000 if AM43XX
2150 default 0x402F0400 if AM33XX
2151 default 0x40301350 if OMAP54XX
2153 After any reset, the boot ROM searches the boot media for a valid
2154 boot image. For non-XIP devices, the ROM then copies the image into
2155 internal memory. For all boot modes, after the ROM processes the
2156 boot image it eventually computes the entry point address depending
2157 on the device type (secure/non-secure), boot media (xip/non-xip) and
2161 config SYS_KWD_CONFIG
2162 string "kwbimage config file path"
2163 depends on ARCH_KIRKWOOD || ARCH_MVEBU
2164 default "arch/arm/mach-mvebu/kwbimage.cfg"
2166 Path within the source directory to the kwbimage.cfg file to use
2167 when packaging the U-Boot image for use.
2169 source "arch/arm/mach-apple/Kconfig"
2171 source "arch/arm/mach-aspeed/Kconfig"
2173 source "arch/arm/mach-at91/Kconfig"
2175 source "arch/arm/mach-bcm283x/Kconfig"
2177 source "arch/arm/mach-bcmstb/Kconfig"
2179 source "arch/arm/mach-davinci/Kconfig"
2181 source "arch/arm/mach-exynos/Kconfig"
2183 source "arch/arm/mach-highbank/Kconfig"
2185 source "arch/arm/mach-integrator/Kconfig"
2187 source "arch/arm/mach-ipq40xx/Kconfig"
2189 source "arch/arm/mach-k3/Kconfig"
2191 source "arch/arm/mach-keystone/Kconfig"
2193 source "arch/arm/mach-kirkwood/Kconfig"
2195 source "arch/arm/mach-lpc32xx/Kconfig"
2197 source "arch/arm/mach-mvebu/Kconfig"
2199 source "arch/arm/mach-octeontx/Kconfig"
2201 source "arch/arm/mach-octeontx2/Kconfig"
2203 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2205 source "arch/arm/mach-imx/mx3/Kconfig"
2207 source "arch/arm/mach-imx/mx5/Kconfig"
2209 source "arch/arm/mach-imx/mx6/Kconfig"
2211 source "arch/arm/mach-imx/mx7/Kconfig"
2213 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2215 source "arch/arm/mach-imx/imx8/Kconfig"
2217 source "arch/arm/mach-imx/imx8m/Kconfig"
2219 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2221 source "arch/arm/mach-imx/imxrt/Kconfig"
2223 source "arch/arm/mach-imx/mxs/Kconfig"
2225 source "arch/arm/mach-omap2/Kconfig"
2227 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2229 source "arch/arm/mach-orion5x/Kconfig"
2231 source "arch/arm/mach-owl/Kconfig"
2233 source "arch/arm/mach-rmobile/Kconfig"
2235 source "arch/arm/mach-meson/Kconfig"
2237 source "arch/arm/mach-mediatek/Kconfig"
2239 source "arch/arm/mach-qemu/Kconfig"
2241 source "arch/arm/mach-rockchip/Kconfig"
2243 source "arch/arm/mach-s5pc1xx/Kconfig"
2245 source "arch/arm/mach-snapdragon/Kconfig"
2247 source "arch/arm/mach-socfpga/Kconfig"
2249 source "arch/arm/mach-sti/Kconfig"
2251 source "arch/arm/mach-stm32/Kconfig"
2253 source "arch/arm/mach-stm32mp/Kconfig"
2255 source "arch/arm/mach-sunxi/Kconfig"
2257 source "arch/arm/mach-tegra/Kconfig"
2259 source "arch/arm/mach-u8500/Kconfig"
2261 source "arch/arm/mach-uniphier/Kconfig"
2263 source "arch/arm/cpu/armv7/vf610/Kconfig"
2265 source "arch/arm/mach-zynq/Kconfig"
2267 source "arch/arm/mach-zynqmp/Kconfig"
2269 source "arch/arm/mach-versal/Kconfig"
2271 source "arch/arm/mach-zynqmp-r5/Kconfig"
2273 source "arch/arm/cpu/armv7/Kconfig"
2275 source "arch/arm/cpu/armv8/Kconfig"
2277 source "arch/arm/mach-imx/Kconfig"
2279 source "arch/arm/mach-nexell/Kconfig"
2281 source "board/armltd/total_compute/Kconfig"
2283 source "board/bosch/shc/Kconfig"
2284 source "board/bosch/guardian/Kconfig"
2285 source "board/Marvell/octeontx/Kconfig"
2286 source "board/Marvell/octeontx2/Kconfig"
2287 source "board/armltd/vexpress/Kconfig"
2288 source "board/armltd/vexpress64/Kconfig"
2289 source "board/cortina/presidio-asic/Kconfig"
2290 source "board/broadcom/bcm963158/Kconfig"
2291 source "board/broadcom/bcm96753ref/Kconfig"
2292 source "board/broadcom/bcm968360bg/Kconfig"
2293 source "board/broadcom/bcm968580xref/Kconfig"
2294 source "board/broadcom/bcmns3/Kconfig"
2295 source "board/cavium/thunderx/Kconfig"
2296 source "board/eets/pdu001/Kconfig"
2297 source "board/emulation/qemu-arm/Kconfig"
2298 source "board/freescale/ls2080aqds/Kconfig"
2299 source "board/freescale/ls2080ardb/Kconfig"
2300 source "board/freescale/ls1088a/Kconfig"
2301 source "board/freescale/ls1028a/Kconfig"
2302 source "board/freescale/ls1021aqds/Kconfig"
2303 source "board/freescale/ls1043aqds/Kconfig"
2304 source "board/freescale/ls1021atwr/Kconfig"
2305 source "board/freescale/ls1021atsn/Kconfig"
2306 source "board/freescale/ls1021aiot/Kconfig"
2307 source "board/freescale/ls1046aqds/Kconfig"
2308 source "board/freescale/ls1043ardb/Kconfig"
2309 source "board/freescale/ls1046ardb/Kconfig"
2310 source "board/freescale/ls1046afrwy/Kconfig"
2311 source "board/freescale/ls1012aqds/Kconfig"
2312 source "board/freescale/ls1012ardb/Kconfig"
2313 source "board/freescale/ls1012afrdm/Kconfig"
2314 source "board/freescale/lx2160a/Kconfig"
2315 source "board/grinn/chiliboard/Kconfig"
2316 source "board/hisilicon/hikey/Kconfig"
2317 source "board/hisilicon/hikey960/Kconfig"
2318 source "board/hisilicon/poplar/Kconfig"
2319 source "board/isee/igep003x/Kconfig"
2320 source "board/kontron/sl28/Kconfig"
2321 source "board/myir/mys_6ulx/Kconfig"
2322 source "board/seeed/npi_imx6ull/Kconfig"
2323 source "board/socionext/developerbox/Kconfig"
2324 source "board/st/stv0991/Kconfig"
2325 source "board/tcl/sl50/Kconfig"
2326 source "board/traverse/ten64/Kconfig"
2327 source "board/variscite/dart_6ul/Kconfig"
2328 source "board/vscom/baltos/Kconfig"
2329 source "board/phytium/durian/Kconfig"
2330 source "board/phytium/pomelo/Kconfig"
2331 source "board/xen/xenguest_arm64/Kconfig"
2333 source "arch/arm/Kconfig.debug"
2338 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2339 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2340 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64