1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed from
19 almost any 4K aligned address. This logic relies on the relocation
20 information that is embedded in the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
25 default n if ARCH_QEMU
26 default y if POSITION_INDEPENDENT
28 U-Boot typically uses a hard-coded value for the stack pointer
29 before relocation. Enable this option to instead calculate the
30 initial SP at run-time. This is useful to avoid hard-coding addresses
31 into U-Boot, so that it can be loaded and executed at arbitrary
32 addresses and thus avoid using arbitrary addresses at runtime.
34 If this option is enabled, the early stack pointer is set to
35 &_bss_start with a offset value added. The offset is specified by
36 SYS_INIT_SP_BSS_OFFSET.
38 config SYS_INIT_SP_BSS_OFFSET
39 int "Early stack offset from the .bss base address"
40 depends on INIT_SP_RELATIVE
43 This option's value is the offset added to &_bss_start in order to
44 calculate the stack pointer. This offset should be large enough so
45 that the early malloc region, global data (gd), and early stack usage
46 do not overlap any appended DTB.
48 config LINUX_KERNEL_IMAGE_HEADER
51 Place a Linux kernel image header at the start of the U-Boot binary.
52 The format of the header is described in the Linux kernel source at
53 Documentation/arm64/booting.txt. This feature is useful since the
54 image header reports the amount of memory (BSS and similar) that
55 U-Boot needs to use, but which isn't part of the binary.
57 if LINUX_KERNEL_IMAGE_HEADER
58 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
61 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
62 TEXT_OFFSET value written to the Linux kernel image header.
78 ARM GICV3 Interrupt translation service (ITS).
79 Basic support for programming locality specific peripheral
80 interrupts (LPI) configuration tables and enable LPI tables.
81 LPI configuration table can be used by u-boot or Linux.
82 ARM GICV3 has limitation, once the LPI table is enabled, LPI
83 configuration table can not be re-programmed, unless GICV3 reset.
89 config DMA_ADDR_T_64BIT
99 config GPIO_EXTRA_HEADER
102 # Used for compatibility with asm files copied from the kernel
103 config ARM_ASM_UNIFIED
107 # Used for compatibility with asm files copied from the kernel
111 config SYS_ICACHE_OFF
112 bool "Do not enable icache"
115 Do not enable instruction cache in U-Boot.
117 config SPL_SYS_ICACHE_OFF
118 bool "Do not enable icache in SPL"
120 default SYS_ICACHE_OFF
122 Do not enable instruction cache in SPL.
124 config SYS_DCACHE_OFF
125 bool "Do not enable dcache"
128 Do not enable data cache in U-Boot.
130 config SPL_SYS_DCACHE_OFF
131 bool "Do not enable dcache in SPL"
133 default SYS_DCACHE_OFF
135 Do not enable data cache in SPL.
137 config SYS_ARM_CACHE_CP15
138 bool "CP15 based cache enabling support"
140 Select this if your processor suports enabling caches by using
144 bool "MMU-based Paged Memory Management Support"
145 select SYS_ARM_CACHE_CP15
147 Select if you want MMU-based virtualised addressing space
148 support via paged memory management.
151 bool 'Use the ARM v7 PMSA Compliant MPU'
153 Some ARM systems without an MMU have instead a Memory Protection
154 Unit (MPU) that defines the type and permissions for regions of
156 If your CPU has an MPU then you should choose 'y' here unless you
157 know that you do not want to use the MPU.
159 # If set, the workarounds for these ARM errata are applied early during U-Boot
160 # startup. Note that in general these options force the workarounds to be
161 # applied; no CPU-type/version detection exists, unlike the similar options in
162 # the Linux kernel. Do not set these options unless they apply! Also note that
163 # the following can be machine-specific errata. These do have ability to
164 # provide rudimentary version and machine-specific checks, but expect no
166 # CONFIG_ARM_ERRATA_430973
167 # CONFIG_ARM_ERRATA_454179
168 # CONFIG_ARM_ERRATA_621766
169 # CONFIG_ARM_ERRATA_798870
170 # CONFIG_ARM_ERRATA_801819
171 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
172 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
174 config ARM_ERRATA_430973
177 config ARM_ERRATA_454179
180 config ARM_ERRATA_621766
183 config ARM_ERRATA_716044
186 config ARM_ERRATA_725233
189 config ARM_ERRATA_742230
192 config ARM_ERRATA_743622
195 config ARM_ERRATA_751472
198 config ARM_ERRATA_761320
201 config ARM_ERRATA_773022
204 config ARM_ERRATA_774769
207 config ARM_ERRATA_794072
210 config ARM_ERRATA_798870
213 config ARM_ERRATA_801819
216 config ARM_ERRATA_826974
219 config ARM_ERRATA_828024
222 config ARM_ERRATA_829520
225 config ARM_ERRATA_833069
228 config ARM_ERRATA_833471
231 config ARM_ERRATA_845369
234 config ARM_ERRATA_852421
237 config ARM_ERRATA_852423
240 config ARM_ERRATA_855873
243 config ARM_CORTEX_A8_CVE_2017_5715
246 config ARM_CORTEX_A15_CVE_2017_5715
251 select SYS_CACHE_SHIFT_5
256 select SYS_CACHE_SHIFT_5
261 select SYS_CACHE_SHIFT_5
266 select SYS_CACHE_SHIFT_5
271 select SYS_CACHE_SHIFT_5
277 select SYS_CACHE_SHIFT_5
284 select SYS_CACHE_SHIFT_6
291 select SYS_CACHE_SHIFT_5
292 select SYS_THUMB_BUILD
298 select SYS_ARM_CACHE_CP15
300 select SYS_CACHE_SHIFT_6
304 select SYS_CACHE_SHIFT_5
309 select SYS_CACHE_SHIFT_5
313 default "arm720t" if CPU_ARM720T
314 default "arm920t" if CPU_ARM920T
315 default "arm926ejs" if CPU_ARM926EJS
316 default "arm946es" if CPU_ARM946ES
317 default "arm1136" if CPU_ARM1136
318 default "arm1176" if CPU_ARM1176
319 default "armv7" if CPU_V7A
320 default "armv7" if CPU_V7R
321 default "armv7m" if CPU_V7M
322 default "pxa" if CPU_PXA
323 default "sa1100" if CPU_SA1100
324 default "armv8" if ARM64
328 default 4 if CPU_ARM720T
329 default 4 if CPU_ARM920T
330 default 5 if CPU_ARM926EJS
331 default 5 if CPU_ARM946ES
332 default 6 if CPU_ARM1136
333 default 6 if CPU_ARM1176
338 default 4 if CPU_SA1100
341 config SYS_CACHE_SHIFT_5
344 config SYS_CACHE_SHIFT_6
347 config SYS_CACHE_SHIFT_7
350 config SYS_CACHELINE_SIZE
352 default 128 if SYS_CACHE_SHIFT_7
353 default 64 if SYS_CACHE_SHIFT_6
354 default 32 if SYS_CACHE_SHIFT_5
357 prompt "Select the ARM data write cache policy"
358 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
360 default SYS_ARM_CACHE_WRITEBACK
362 config SYS_ARM_CACHE_WRITEBACK
363 bool "Write-back (WB)"
365 A write updates the cache only and marks the cache line as dirty.
366 External memory is updated only when the line is evicted or explicitly
369 config SYS_ARM_CACHE_WRITETHROUGH
370 bool "Write-through (WT)"
372 A write updates both the cache and the external memory system.
373 This does not mark the cache line as dirty.
375 config SYS_ARM_CACHE_WRITEALLOC
376 bool "Write allocation (WA)"
378 A cache line is allocated on a write miss. This means that executing a
379 store instruction on the processor might cause a burst read to occur.
380 There is a linefill to obtain the data for the cache line, before the
385 bool "Enable ARCH_CPU_INIT"
387 Some architectures require a call to arch_cpu_init().
388 Say Y here to enable it
390 config SYS_ARCH_TIMER
391 bool "ARM Generic Timer support"
392 depends on CPU_V7A || ARM64
395 The ARM Generic Timer (aka arch-timer) provides an architected
396 interface to a timer source on an SoC.
397 It is mandatory for ARMv8 implementation and widely available
401 bool "Support for ARM SMC Calling Convention (SMCCC)"
402 depends on CPU_V7A || ARM64
405 Say Y here if you want to enable ARM SMC Calling Convention.
406 This should be enabled if U-Boot needs to communicate with system
407 firmware (for example, PSCI) according to SMCCC.
410 bool "support boot from semihosting"
412 In emulated environments, semihosting is a way for
413 the hosted environment to call out to the emulator to
414 retrieve files from the host machine.
416 config SYS_THUMB_BUILD
417 bool "Build U-Boot using the Thumb instruction set"
420 Use this flag to build U-Boot using the Thumb instruction set for
421 ARM architectures. Thumb instruction set provides better code
422 density. For ARM architectures that support Thumb2 this flag will
423 result in Thumb2 code generated by GCC.
425 config SPL_SYS_THUMB_BUILD
426 bool "Build SPL using the Thumb instruction set"
427 default y if SYS_THUMB_BUILD
428 depends on !ARM64 && SPL
430 Use this flag to build SPL using the Thumb instruction set for
431 ARM architectures. Thumb instruction set provides better code
432 density. For ARM architectures that support Thumb2 this flag will
433 result in Thumb2 code generated by GCC.
435 config TPL_SYS_THUMB_BUILD
436 bool "Build TPL using the Thumb instruction set"
437 default y if SYS_THUMB_BUILD
438 depends on TPL && !ARM64
440 Use this flag to build TPL using the Thumb instruction set for
441 ARM architectures. Thumb instruction set provides better code
442 density. For ARM architectures that support Thumb2 this flag will
443 result in Thumb2 code generated by GCC.
446 config SYS_L2CACHE_OFF
449 If SoC does not support L2CACHE or one does not want to enable
450 L2CACHE, choose this option.
452 config ENABLE_ARM_SOC_BOOT0_HOOK
453 bool "prepare BOOT0 header"
455 If the SoC's BOOT0 requires a header area filled with (magic)
456 values, then choose this option, and create a file included as
457 <asm/arch/boot0.h> which contains the required assembler code.
459 config ARM_CORTEX_CPU_IS_UP
463 config USE_ARCH_MEMCPY
464 bool "Use an assembly optimized implementation of memcpy"
468 Enable the generation of an optimized version of memcpy.
469 Such an implementation may be faster under some conditions
470 but may increase the binary size.
472 config SPL_USE_ARCH_MEMCPY
473 bool "Use an assembly optimized implementation of memcpy for SPL"
474 default y if USE_ARCH_MEMCPY
475 depends on !ARM64 && SPL
477 Enable the generation of an optimized version of memcpy.
478 Such an implementation may be faster under some conditions
479 but may increase the binary size.
481 config TPL_USE_ARCH_MEMCPY
482 bool "Use an assembly optimized implementation of memcpy for TPL"
483 default y if USE_ARCH_MEMCPY
484 depends on !ARM64 && TPL
486 Enable the generation of an optimized version of memcpy.
487 Such an implementation may be faster under some conditions
488 but may increase the binary size.
490 config USE_ARCH_MEMSET
491 bool "Use an assembly optimized implementation of memset"
495 Enable the generation of an optimized version of memset.
496 Such an implementation may be faster under some conditions
497 but may increase the binary size.
499 config SPL_USE_ARCH_MEMSET
500 bool "Use an assembly optimized implementation of memset for SPL"
501 default y if USE_ARCH_MEMSET
502 depends on !ARM64 && SPL
504 Enable the generation of an optimized version of memset.
505 Such an implementation may be faster under some conditions
506 but may increase the binary size.
508 config TPL_USE_ARCH_MEMSET
509 bool "Use an assembly optimized implementation of memset for TPL"
510 default y if USE_ARCH_MEMSET
511 depends on !ARM64 && TPL
513 Enable the generation of an optimized version of memset.
514 Such an implementation may be faster under some conditions
515 but may increase the binary size.
517 config ARM64_SUPPORT_AARCH32
518 bool "ARM64 system support AArch32 execution state"
520 default y if !TARGET_THUNDERX_88XX
522 This ARM64 system supports AArch32 execution state.
525 prompt "Target select"
530 select GPIO_EXTRA_HEADER
531 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
532 select SPL_SEPARATE_BSS if SPL
534 config TARGET_ASPENITE
535 bool "Support aspenite"
537 select GPIO_EXTRA_HEADER
542 select GPIO_EXTRA_HEADER
543 select SPL_DM_SPI if SPL
546 Support for TI's DaVinci platform.
549 bool "Marvell Kirkwood"
550 select ARCH_MISC_INIT
551 select BOARD_EARLY_INIT_F
553 select GPIO_EXTRA_HEADER
556 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
562 select GPIO_EXTRA_HEADER
563 select SPL_DM_SPI if SPL
564 select SPL_DM_SPI_FLASH if SPL
573 select GPIO_EXTRA_HEADER
575 config TARGET_STV0991
576 bool "Support stv0991"
582 select GPIO_EXTRA_HEADER
591 select GPIO_EXTRA_HEADER
594 bool "Broadcom BCM283X family"
598 select GPIO_EXTRA_HEADER
601 select SERIAL_SEARCH_ALL
606 bool "Broadcom BCM63158 family"
612 bool "Broadcom BCM68360 family"
618 bool "Broadcom BCM6858 family"
624 bool "Broadcom BCM7XXX family"
627 select GPIO_EXTRA_HEADER
629 select OF_PRIOR_STAGE
632 This enables support for Broadcom ARM-based set-top box
633 chipsets, including the 7445 family of chips.
635 config TARGET_BCMCYGNUS
636 bool "Support bcmcygnus"
638 select GPIO_EXTRA_HEADER
640 imply BCM_SF2_ETH_GMAC
648 bool "Support Broadcom Northstar2"
650 select GPIO_EXTRA_HEADER
652 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
653 ARMv8 Cortex-A57 processors targeting a broad range of networking
657 bool "Support Broadcom NS3"
659 select BOARD_LATE_INIT
661 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
662 ARMv8 Cortex-A72 processors targeting a broad range of networking
666 bool "Samsung EXYNOS"
676 select GPIO_EXTRA_HEADER
677 imply SYS_THUMB_BUILD
682 bool "Samsung S5PC1XX"
688 select GPIO_EXTRA_HEADER
692 bool "Calxeda Highbank"
705 config ARCH_INTEGRATOR
706 bool "ARM Ltd. Integrator family"
709 select GPIO_EXTRA_HEADER
714 bool "Qualcomm IPQ40xx SoCs"
720 select GPIO_EXTRA_HEADER
732 select GPIO_EXTRA_HEADER
734 select SYS_ARCH_TIMER
735 select SYS_THUMB_BUILD
741 bool "Texas Instruments' K3 Architecture"
746 config ARCH_OMAP2PLUS
749 select GPIO_EXTRA_HEADER
750 select SPL_BOARD_INIT if SPL
751 select SPL_STACK_R if SPL
753 imply TI_SYSC if DM && OF_CONTROL
758 select GPIO_EXTRA_HEADER
759 imply DISTRO_DEFAULTS
762 Support for the Meson SoC family developed by Amlogic Inc.,
763 targeted at media players and tablet computers. We currently
764 support the S905 (GXBaby) 64-bit SoC.
769 select GPIO_EXTRA_HEADER
772 select SPL_LIBCOMMON_SUPPORT if SPL
773 select SPL_LIBGENERIC_SUPPORT if SPL
774 select SPL_OF_CONTROL if SPL
777 Support for the MediaTek SoCs family developed by MediaTek Inc.
778 Please refer to doc/README.mediatek for more information.
781 bool "NXP LPC32xx platform"
786 select GPIO_EXTRA_HEADER
792 bool "NXP i.MX8 platform"
795 select GPIO_EXTRA_HEADER
797 select ENABLE_ARM_SOC_BOOT0_HOOK
800 bool "NXP i.MX8M platform"
802 select GPIO_EXTRA_HEADER
803 select SYS_FSL_HAS_SEC if IMX_HAB
804 select SYS_FSL_SEC_COMPAT_4
805 select SYS_FSL_SEC_LE
812 bool "NXP i.MX8ULP platform"
817 select GPIO_EXTRA_HEADER
821 bool "NXP i.MXRT platform"
825 select GPIO_EXTRA_HEADER
830 bool "NXP i.MX23 family"
832 select GPIO_EXTRA_HEADER
839 select GPIO_EXTRA_HEADER
843 bool "NXP i.MX28 family"
845 select GPIO_EXTRA_HEADER
850 bool "NXP i.MX31 family"
852 select GPIO_EXTRA_HEADER
857 select GPIO_EXTRA_HEADER
858 select SYS_FSL_HAS_SEC if IMX_HAB
859 select SYS_FSL_SEC_COMPAT_4
860 select SYS_FSL_SEC_LE
861 select ROM_UNIFIED_SECTIONS
863 imply SYS_THUMB_BUILD
867 select ARCH_MISC_INIT
869 select GPIO_EXTRA_HEADER
870 select SYS_FSL_HAS_SEC if IMX_HAB
871 select SYS_FSL_SEC_COMPAT_4
872 select SYS_FSL_SEC_LE
873 imply BOARD_EARLY_INIT_F
875 imply SYS_THUMB_BUILD
880 select GPIO_EXTRA_HEADER
881 select SYS_FSL_HAS_SEC
882 select SYS_FSL_SEC_COMPAT_4
883 select SYS_FSL_SEC_LE
885 imply SYS_THUMB_BUILD
889 default "arch/arm/mach-omap2/u-boot-spl.lds"
894 select BOARD_EARLY_INIT_F
896 select GPIO_EXTRA_HEADER
900 bool "Nexell S5P4418/S5P6818 SoC"
901 select ENABLE_ARM_SOC_BOOT0_HOOK
903 select GPIO_EXTRA_HEADER
906 bool "Actions Semi OWL SoCs"
910 select GPIO_EXTRA_HEADER
915 select SYS_RELOC_GD_ENV_ADDR
919 bool "QEMU Virtual Platform"
930 bool "Renesas ARM SoCs"
933 select GPIO_EXTRA_HEADER
934 imply BOARD_EARLY_INIT_F
937 imply SYS_THUMB_BUILD
938 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
940 config ARCH_SNAPDRAGON
941 bool "Qualcomm Snapdragon SoCs"
946 select GPIO_EXTRA_HEADER
955 bool "Altera SOCFPGA family"
956 select ARCH_EARLY_INIT_R
957 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
958 select ARM64 if TARGET_SOCFPGA_SOC64
959 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
963 select GPIO_EXTRA_HEADER
964 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
966 select SPL_DM_RESET if DM_RESET
968 select SPL_LIBCOMMON_SUPPORT
969 select SPL_LIBGENERIC_SUPPORT
970 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
971 select SPL_OF_CONTROL
972 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
973 select SPL_SERIAL_SUPPORT
978 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
980 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
981 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
991 imply SPL_DM_SPI_FLASH
992 imply SPL_LIBDISK_SUPPORT
993 imply SPL_MMC_SUPPORT
994 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
995 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
996 imply SPL_SPI_FLASH_SUPPORT
997 imply SPL_SPI_SUPPORT
1001 bool "Support sunxi (Allwinner) SoCs"
1004 select CMD_MMC if MMC
1005 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1011 select DM_MMC if MMC
1012 select DM_SCSI if SCSI
1014 select GPIO_EXTRA_HEADER
1015 select OF_BOARD_SETUP
1018 select SPECIFY_CONSOLE_INDEX
1019 select SPL_STACK_R if SPL
1020 select SPL_SYS_MALLOC_SIMPLE if SPL
1021 select SPL_SYS_THUMB_BUILD if !ARM64
1024 select SYS_THUMB_BUILD if !ARM64
1025 select USB if DISTRO_DEFAULTS
1026 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1027 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1028 select SPL_USE_TINY_PRINTF
1030 select SYS_RELOC_GD_ENV_ADDR
1031 imply BOARD_LATE_INIT
1034 imply CMD_UBI if MTD_RAW_NAND
1035 imply DISTRO_DEFAULTS
1038 imply OF_LIBFDT_OVERLAY
1039 imply PRE_CONSOLE_BUFFER
1041 imply SPL_LIBCOMMON_SUPPORT
1042 imply SPL_LIBGENERIC_SUPPORT
1043 imply SPL_MMC_SUPPORT if MMC
1045 imply SPL_SERIAL_SUPPORT
1049 bool "ST-Ericsson U8500 Series"
1053 select DM_MMC if MMC
1058 imply ARM_PL180_MMCI
1060 imply NOMADIK_MTU_TIMER
1063 imply SYSRESET_SYSCON
1066 bool "Support Xilinx Versal Platform"
1070 select DM_ETH if NET
1071 select DM_MMC if MMC
1074 select GPIO_EXTRA_HEADER
1077 imply BOARD_LATE_INIT
1078 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1081 bool "Freescale Vybrid"
1083 select GPIO_EXTRA_HEADER
1084 select SYS_FSL_ERRATUM_ESDHC111
1089 bool "Xilinx Zynq based platform"
1094 select DM_ETH if NET
1095 select DM_MMC if MMC
1099 select GPIO_EXTRA_HEADER
1102 select SPL_BOARD_INIT if SPL
1103 select SPL_CLK if SPL
1104 select SPL_DM if SPL
1105 select SPL_DM_SPI if SPL
1106 select SPL_DM_SPI_FLASH if SPL
1107 select SPL_OF_CONTROL if SPL
1108 select SPL_SEPARATE_BSS if SPL
1110 imply ARCH_EARLY_INIT_R
1111 imply BOARD_LATE_INIT
1115 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1118 config ARCH_ZYNQMP_R5
1119 bool "Xilinx ZynqMP R5 based platform"
1123 select DM_ETH if NET
1124 select DM_MMC if MMC
1126 select GPIO_EXTRA_HEADER
1132 bool "Xilinx ZynqMP based platform"
1136 select DM_ETH if NET
1138 select DM_MMC if MMC
1140 select DM_SPI if SPI
1141 select DM_SPI_FLASH if DM_SPI
1144 select GPIO_EXTRA_HEADER
1146 select SPL_BOARD_INIT if SPL
1147 select SPL_CLK if SPL
1148 select SPL_DM if SPL
1149 select SPL_DM_SPI if SPI && SPL_DM
1150 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1151 select SPL_DM_MAILBOX if SPL
1152 select SPL_FIRMWARE if SPL
1153 select SPL_SEPARATE_BSS if SPL
1157 imply BOARD_LATE_INIT
1159 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1166 select GPIO_EXTRA_HEADER
1167 imply DISTRO_DEFAULTS
1170 config TARGET_VEXPRESS64_AEMV8A
1171 bool "Support vexpress_aemv8a"
1173 select GPIO_EXTRA_HEADER
1176 config TARGET_VEXPRESS64_BASE_FVP
1177 bool "Support Versatile Express ARMv8a FVP BASE model"
1179 select GPIO_EXTRA_HEADER
1183 config TARGET_VEXPRESS64_JUNO
1184 bool "Support Versatile Express Juno Development Platform"
1186 select GPIO_EXTRA_HEADER
1199 config TARGET_TOTAL_COMPUTE
1200 bool "Support Total Compute Platform"
1208 config TARGET_LS2080A_EMU
1209 bool "Support ls2080a_emu"
1212 select ARMV8_MULTIENTRY
1213 select FSL_DDR_SYNC_REFRESH
1214 select GPIO_EXTRA_HEADER
1216 Support for Freescale LS2080A_EMU platform.
1217 The LS2080A Development System (EMULATOR) is a pre-silicon
1218 development platform that supports the QorIQ LS2080A
1219 Layerscape Architecture processor.
1221 config TARGET_LS1088AQDS
1222 bool "Support ls1088aqds"
1225 select ARMV8_MULTIENTRY
1226 select ARCH_SUPPORT_TFABOOT
1227 select BOARD_LATE_INIT
1228 select GPIO_EXTRA_HEADER
1230 select FSL_DDR_INTERACTIVE if !SD_BOOT
1232 Support for NXP LS1088AQDS platform.
1233 The LS1088A Development System (QDS) is a high-performance
1234 development platform that supports the QorIQ LS1088A
1235 Layerscape Architecture processor.
1237 config TARGET_LS2080AQDS
1238 bool "Support ls2080aqds"
1241 select ARMV8_MULTIENTRY
1242 select ARCH_SUPPORT_TFABOOT
1243 select BOARD_LATE_INIT
1244 select GPIO_EXTRA_HEADER
1249 select FSL_DDR_INTERACTIVE if !SPL
1251 Support for Freescale LS2080AQDS platform.
1252 The LS2080A Development System (QDS) is a high-performance
1253 development platform that supports the QorIQ LS2080A
1254 Layerscape Architecture processor.
1256 config TARGET_LS2080ARDB
1257 bool "Support ls2080ardb"
1260 select ARMV8_MULTIENTRY
1261 select ARCH_SUPPORT_TFABOOT
1262 select BOARD_LATE_INIT
1265 select FSL_DDR_INTERACTIVE if !SPL
1266 select GPIO_EXTRA_HEADER
1270 Support for Freescale LS2080ARDB platform.
1271 The LS2080A Reference design board (RDB) is a high-performance
1272 development platform that supports the QorIQ LS2080A
1273 Layerscape Architecture processor.
1275 config TARGET_LS2081ARDB
1276 bool "Support ls2081ardb"
1279 select ARMV8_MULTIENTRY
1280 select BOARD_LATE_INIT
1281 select GPIO_EXTRA_HEADER
1284 Support for Freescale LS2081ARDB platform.
1285 The LS2081A Reference design board (RDB) is a high-performance
1286 development platform that supports the QorIQ LS2081A/LS2041A
1287 Layerscape Architecture processor.
1289 config TARGET_LX2160ARDB
1290 bool "Support lx2160ardb"
1293 select ARMV8_MULTIENTRY
1294 select ARCH_SUPPORT_TFABOOT
1295 select BOARD_LATE_INIT
1296 select GPIO_EXTRA_HEADER
1298 Support for NXP LX2160ARDB platform.
1299 The lx2160ardb (LX2160A Reference design board (RDB)
1300 is a high-performance development platform that supports the
1301 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1303 config TARGET_LX2160AQDS
1304 bool "Support lx2160aqds"
1307 select ARMV8_MULTIENTRY
1308 select ARCH_SUPPORT_TFABOOT
1309 select BOARD_LATE_INIT
1310 select GPIO_EXTRA_HEADER
1312 Support for NXP LX2160AQDS platform.
1313 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1314 is a high-performance development platform that supports the
1315 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1317 config TARGET_LX2162AQDS
1318 bool "Support lx2162aqds"
1320 select ARCH_MISC_INIT
1322 select ARMV8_MULTIENTRY
1323 select ARCH_SUPPORT_TFABOOT
1324 select BOARD_LATE_INIT
1325 select GPIO_EXTRA_HEADER
1327 Support for NXP LX2162AQDS platform.
1328 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1331 bool "Support HiKey 96boards Consumer Edition Platform"
1336 select GPIO_EXTRA_HEADER
1339 select SPECIFY_CONSOLE_INDEX
1342 Support for HiKey 96boards platform. It features a HI6220
1343 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1345 config TARGET_HIKEY960
1346 bool "Support HiKey960 96boards Consumer Edition Platform"
1350 select GPIO_EXTRA_HEADER
1355 Support for HiKey960 96boards platform. It features a HI3660
1356 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1358 config TARGET_POPLAR
1359 bool "Support Poplar 96boards Enterprise Edition Platform"
1363 select GPIO_EXTRA_HEADER
1368 Support for Poplar 96boards EE platform. It features a HI3798cv200
1369 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1370 making it capable of running any commercial set-top solution based on
1373 config TARGET_LS1012AQDS
1374 bool "Support ls1012aqds"
1377 select ARCH_SUPPORT_TFABOOT
1378 select BOARD_LATE_INIT
1379 select GPIO_EXTRA_HEADER
1381 Support for Freescale LS1012AQDS platform.
1382 The LS1012A Development System (QDS) is a high-performance
1383 development platform that supports the QorIQ LS1012A
1384 Layerscape Architecture processor.
1386 config TARGET_LS1012ARDB
1387 bool "Support ls1012ardb"
1390 select ARCH_SUPPORT_TFABOOT
1391 select BOARD_LATE_INIT
1392 select GPIO_EXTRA_HEADER
1396 Support for Freescale LS1012ARDB platform.
1397 The LS1012A Reference design board (RDB) is a high-performance
1398 development platform that supports the QorIQ LS1012A
1399 Layerscape Architecture processor.
1401 config TARGET_LS1012A2G5RDB
1402 bool "Support ls1012a2g5rdb"
1405 select ARCH_SUPPORT_TFABOOT
1406 select BOARD_LATE_INIT
1407 select GPIO_EXTRA_HEADER
1410 Support for Freescale LS1012A2G5RDB platform.
1411 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1412 development platform that supports the QorIQ LS1012A
1413 Layerscape Architecture processor.
1415 config TARGET_LS1012AFRWY
1416 bool "Support ls1012afrwy"
1419 select ARCH_SUPPORT_TFABOOT
1420 select BOARD_LATE_INIT
1421 select GPIO_EXTRA_HEADER
1425 Support for Freescale LS1012AFRWY platform.
1426 The LS1012A FRWY board (FRWY) is a high-performance
1427 development platform that supports the QorIQ LS1012A
1428 Layerscape Architecture processor.
1430 config TARGET_LS1012AFRDM
1431 bool "Support ls1012afrdm"
1434 select ARCH_SUPPORT_TFABOOT
1435 select GPIO_EXTRA_HEADER
1437 Support for Freescale LS1012AFRDM platform.
1438 The LS1012A Freedom board (FRDM) is a high-performance
1439 development platform that supports the QorIQ LS1012A
1440 Layerscape Architecture processor.
1442 config TARGET_LS1028AQDS
1443 bool "Support ls1028aqds"
1446 select ARMV8_MULTIENTRY
1447 select ARCH_SUPPORT_TFABOOT
1448 select BOARD_LATE_INIT
1449 select GPIO_EXTRA_HEADER
1451 Support for Freescale LS1028AQDS platform
1452 The LS1028A Development System (QDS) is a high-performance
1453 development platform that supports the QorIQ LS1028A
1454 Layerscape Architecture processor.
1456 config TARGET_LS1028ARDB
1457 bool "Support ls1028ardb"
1460 select ARMV8_MULTIENTRY
1461 select ARCH_SUPPORT_TFABOOT
1462 select BOARD_LATE_INIT
1463 select GPIO_EXTRA_HEADER
1465 Support for Freescale LS1028ARDB platform
1466 The LS1028A Development System (RDB) is a high-performance
1467 development platform that supports the QorIQ LS1028A
1468 Layerscape Architecture processor.
1470 config TARGET_LS1088ARDB
1471 bool "Support ls1088ardb"
1474 select ARMV8_MULTIENTRY
1475 select ARCH_SUPPORT_TFABOOT
1476 select BOARD_LATE_INIT
1478 select FSL_DDR_INTERACTIVE if !SD_BOOT
1479 select GPIO_EXTRA_HEADER
1481 Support for NXP LS1088ARDB platform.
1482 The LS1088A Reference design board (RDB) is a high-performance
1483 development platform that supports the QorIQ LS1088A
1484 Layerscape Architecture processor.
1486 config TARGET_LS1021AQDS
1487 bool "Support ls1021aqds"
1489 select ARCH_SUPPORT_PSCI
1490 select BOARD_EARLY_INIT_F
1491 select BOARD_LATE_INIT
1493 select CPU_V7_HAS_NONSEC
1494 select CPU_V7_HAS_VIRT
1495 select LS1_DEEP_SLEEP
1498 select FSL_DDR_INTERACTIVE
1499 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1500 select GPIO_EXTRA_HEADER
1501 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1504 config TARGET_LS1021ATWR
1505 bool "Support ls1021atwr"
1507 select ARCH_SUPPORT_PSCI
1508 select BOARD_EARLY_INIT_F
1509 select BOARD_LATE_INIT
1511 select CPU_V7_HAS_NONSEC
1512 select CPU_V7_HAS_VIRT
1513 select LS1_DEEP_SLEEP
1515 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1516 select GPIO_EXTRA_HEADER
1519 config TARGET_PG_WCOM_SELI8
1520 bool "Support Hitachi-Powergrids SELI8 service unit card"
1522 select ARCH_SUPPORT_PSCI
1523 select BOARD_EARLY_INIT_F
1524 select BOARD_LATE_INIT
1526 select CPU_V7_HAS_NONSEC
1527 select CPU_V7_HAS_VIRT
1529 select FSL_DDR_INTERACTIVE
1530 select GPIO_EXTRA_HEADER
1534 Support for Hitachi-Powergrids SELI8 service unit card.
1535 SELI8 is a QorIQ LS1021a based service unit card used
1536 in XMC20 and FOX615 product families.
1538 config TARGET_PG_WCOM_EXPU1
1539 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1541 select ARCH_SUPPORT_PSCI
1542 select BOARD_EARLY_INIT_F
1543 select BOARD_LATE_INIT
1545 select CPU_V7_HAS_NONSEC
1546 select CPU_V7_HAS_VIRT
1548 select FSL_DDR_INTERACTIVE
1552 Support for Hitachi-Powergrids EXPU1 service unit card.
1553 EXPU1 is a QorIQ LS1021a based service unit card used
1554 in XMC20 and FOX615 product families.
1556 config TARGET_LS1021ATSN
1557 bool "Support ls1021atsn"
1559 select ARCH_SUPPORT_PSCI
1560 select BOARD_EARLY_INIT_F
1561 select BOARD_LATE_INIT
1563 select CPU_V7_HAS_NONSEC
1564 select CPU_V7_HAS_VIRT
1565 select LS1_DEEP_SLEEP
1567 select GPIO_EXTRA_HEADER
1570 config TARGET_LS1021AIOT
1571 bool "Support ls1021aiot"
1573 select ARCH_SUPPORT_PSCI
1574 select BOARD_LATE_INIT
1576 select CPU_V7_HAS_NONSEC
1577 select CPU_V7_HAS_VIRT
1579 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1580 select GPIO_EXTRA_HEADER
1583 Support for Freescale LS1021AIOT platform.
1584 The LS1021A Freescale board (IOT) is a high-performance
1585 development platform that supports the QorIQ LS1021A
1586 Layerscape Architecture processor.
1588 config TARGET_LS1043AQDS
1589 bool "Support ls1043aqds"
1592 select ARMV8_MULTIENTRY
1593 select ARCH_SUPPORT_TFABOOT
1594 select BOARD_EARLY_INIT_F
1595 select BOARD_LATE_INIT
1597 select FSL_DDR_INTERACTIVE if !SPL
1598 select FSL_DSPI if !SPL_NO_DSPI
1599 select DM_SPI_FLASH if FSL_DSPI
1600 select GPIO_EXTRA_HEADER
1604 Support for Freescale LS1043AQDS platform.
1606 config TARGET_LS1043ARDB
1607 bool "Support ls1043ardb"
1610 select ARMV8_MULTIENTRY
1611 select ARCH_SUPPORT_TFABOOT
1612 select BOARD_EARLY_INIT_F
1613 select BOARD_LATE_INIT
1615 select FSL_DSPI if !SPL_NO_DSPI
1616 select DM_SPI_FLASH if FSL_DSPI
1617 select GPIO_EXTRA_HEADER
1619 Support for Freescale LS1043ARDB platform.
1621 config TARGET_LS1046AQDS
1622 bool "Support ls1046aqds"
1625 select ARMV8_MULTIENTRY
1626 select ARCH_SUPPORT_TFABOOT
1627 select BOARD_EARLY_INIT_F
1628 select BOARD_LATE_INIT
1629 select DM_SPI_FLASH if DM_SPI
1631 select FSL_DDR_BIST if !SPL
1632 select FSL_DDR_INTERACTIVE if !SPL
1633 select FSL_DDR_INTERACTIVE if !SPL
1634 select GPIO_EXTRA_HEADER
1637 Support for Freescale LS1046AQDS platform.
1638 The LS1046A Development System (QDS) is a high-performance
1639 development platform that supports the QorIQ LS1046A
1640 Layerscape Architecture processor.
1642 config TARGET_LS1046ARDB
1643 bool "Support ls1046ardb"
1646 select ARMV8_MULTIENTRY
1647 select ARCH_SUPPORT_TFABOOT
1648 select BOARD_EARLY_INIT_F
1649 select BOARD_LATE_INIT
1650 select DM_SPI_FLASH if DM_SPI
1651 select POWER_MC34VR500
1654 select FSL_DDR_INTERACTIVE if !SPL
1655 select GPIO_EXTRA_HEADER
1658 Support for Freescale LS1046ARDB platform.
1659 The LS1046A Reference Design Board (RDB) is a high-performance
1660 development platform that supports the QorIQ LS1046A
1661 Layerscape Architecture processor.
1663 config TARGET_LS1046AFRWY
1664 bool "Support ls1046afrwy"
1667 select ARMV8_MULTIENTRY
1668 select ARCH_SUPPORT_TFABOOT
1669 select BOARD_EARLY_INIT_F
1670 select BOARD_LATE_INIT
1671 select DM_SPI_FLASH if DM_SPI
1672 select GPIO_EXTRA_HEADER
1675 Support for Freescale LS1046AFRWY platform.
1676 The LS1046A Freeway Board (FRWY) is a high-performance
1677 development platform that supports the QorIQ LS1046A
1678 Layerscape Architecture processor.
1684 select ARMV8_MULTIENTRY
1700 select GPIO_EXTRA_HEADER
1701 select SPL_DM if SPL
1702 select SPL_DM_SPI if SPL
1703 select SPL_DM_SPI_FLASH if SPL
1704 select SPL_DM_I2C if SPL
1705 select SPL_DM_MMC if SPL
1706 select SPL_DM_SERIAL if SPL
1708 Support for Kontron SMARC-sAL28 board.
1710 config TARGET_COLIBRI_PXA270
1711 bool "Support colibri_pxa270"
1713 select GPIO_EXTRA_HEADER
1715 config ARCH_UNIPHIER
1716 bool "Socionext UniPhier SoCs"
1717 select BOARD_LATE_INIT
1726 select OF_BOARD_SETUP
1730 select SPL_BOARD_INIT if SPL
1731 select SPL_DM if SPL
1732 select SPL_LIBCOMMON_SUPPORT if SPL
1733 select SPL_LIBGENERIC_SUPPORT if SPL
1734 select SPL_OF_CONTROL if SPL
1735 select SPL_PINCTRL if SPL
1738 imply DISTRO_DEFAULTS
1741 Support for UniPhier SoC family developed by Socionext Inc.
1742 (formerly, System LSI Business Division of Panasonic Corporation)
1744 config ARCH_SYNQUACER
1745 bool "Socionext SynQuacer SoCs"
1751 select SYSRESET_PSCI
1754 Support for SynQuacer SoC family developed by Socionext Inc.
1755 This SoC is used on 96boards EE DeveloperBox.
1758 bool "Support STMicroelectronics STM32 MCU with cortex M"
1762 select GPIO_EXTRA_HEADER
1766 bool "Support STMicrolectronics SoCs"
1775 Support for STMicroelectronics STiH407/10 SoC family.
1776 This SoC is used on Linaro 96Board STiH410-B2260
1779 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1780 select ARCH_MISC_INIT
1781 select ARCH_SUPPORT_TFABOOT
1782 select BOARD_LATE_INIT
1788 select GPIO_EXTRA_HEADER
1792 select OF_SYSTEM_SETUP
1798 select SYS_THUMB_BUILD
1802 imply OF_LIBFDT_OVERLAY
1803 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1806 Support for STM32MP SoC family developed by STMicroelectronics,
1807 MPUs based on ARM cortex A core
1808 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1809 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1811 SPL is the unsecure FSBL for the basic boot chain.
1813 config ARCH_ROCKCHIP
1814 bool "Support Rockchip SoCs"
1816 select BINMAN if SPL_OPTEE || (SPL && !ARM64)
1826 select ENABLE_ARM_SOC_BOOT0_HOOK
1829 select SPL_DM if SPL
1830 select SPL_DM_SPI if SPL
1831 select SPL_DM_SPI_FLASH if SPL
1833 select SYS_THUMB_BUILD if !ARM64
1836 imply DEBUG_UART_BOARD_INIT
1837 imply DISTRO_DEFAULTS
1839 imply SARADC_ROCKCHIP
1841 imply SPL_SYS_MALLOC_SIMPLE
1844 imply USB_FUNCTION_FASTBOOT
1846 config ARCH_OCTEONTX
1847 bool "Support OcteonTX SoCs"
1850 select GPIO_EXTRA_HEADER
1854 select BOARD_LATE_INIT
1855 select SYS_CACHE_SHIFT_7
1857 config ARCH_OCTEONTX2
1858 bool "Support OcteonTX2 SoCs"
1861 select GPIO_EXTRA_HEADER
1865 select BOARD_LATE_INIT
1866 select SYS_CACHE_SHIFT_7
1868 config TARGET_THUNDERX_88XX
1869 bool "Support ThunderX 88xx"
1871 select GPIO_EXTRA_HEADER
1874 select SYS_CACHE_SHIFT_7
1877 bool "Support Aspeed SoCs"
1882 config TARGET_DURIAN
1883 bool "Support Phytium Durian Platform"
1885 select GPIO_EXTRA_HEADER
1887 Support for durian platform.
1888 It has 2GB Sdram, uart and pcie.
1890 config TARGET_PRESIDIO_ASIC
1891 bool "Support Cortina Presidio ASIC Platform"
1895 config TARGET_XENGUEST_ARM64
1896 bool "Xen guest ARM64"
1900 select LINUX_KERNEL_IMAGE_HEADER
1905 config ARCH_SUPPORT_TFABOOT
1909 bool "Support for booting from TF-A"
1910 depends on ARCH_SUPPORT_TFABOOT
1913 Some platforms support the setup of secure registers (for instance
1914 for CPU errata handling) or provide secure services like PSCI.
1915 Those services could also be provided by other firmware parts
1916 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
1917 does not need to (and cannot) execute this code.
1918 Enabling this option will make a U-Boot binary that is relying
1919 on other firmware layers to provide secure functionality.
1921 config TI_SECURE_DEVICE
1922 bool "HS Device Type Support"
1923 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1925 If a high secure (HS) device type is being used, this config
1926 must be set. This option impacts various aspects of the
1927 build system (to create signed boot images that can be
1928 authenticated) and the code. See the doc/README.ti-secure
1929 file for further details.
1931 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1932 config ISW_ENTRY_ADDR
1933 hex "Address in memory or XIP address of bootloader entry point"
1934 default 0x402F4000 if AM43XX
1935 default 0x402F0400 if AM33XX
1936 default 0x40301350 if OMAP54XX
1938 After any reset, the boot ROM searches the boot media for a valid
1939 boot image. For non-XIP devices, the ROM then copies the image into
1940 internal memory. For all boot modes, after the ROM processes the
1941 boot image it eventually computes the entry point address depending
1942 on the device type (secure/non-secure), boot media (xip/non-xip) and
1946 source "arch/arm/mach-aspeed/Kconfig"
1948 source "arch/arm/mach-at91/Kconfig"
1950 source "arch/arm/mach-bcm283x/Kconfig"
1952 source "arch/arm/mach-bcmstb/Kconfig"
1954 source "arch/arm/mach-davinci/Kconfig"
1956 source "arch/arm/mach-exynos/Kconfig"
1958 source "arch/arm/mach-highbank/Kconfig"
1960 source "arch/arm/mach-integrator/Kconfig"
1962 source "arch/arm/mach-ipq40xx/Kconfig"
1964 source "arch/arm/mach-k3/Kconfig"
1966 source "arch/arm/mach-keystone/Kconfig"
1968 source "arch/arm/mach-kirkwood/Kconfig"
1970 source "arch/arm/mach-lpc32xx/Kconfig"
1972 source "arch/arm/mach-mvebu/Kconfig"
1974 source "arch/arm/mach-octeontx/Kconfig"
1976 source "arch/arm/mach-octeontx2/Kconfig"
1978 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1980 source "arch/arm/mach-imx/mx2/Kconfig"
1982 source "arch/arm/mach-imx/mx3/Kconfig"
1984 source "arch/arm/mach-imx/mx5/Kconfig"
1986 source "arch/arm/mach-imx/mx6/Kconfig"
1988 source "arch/arm/mach-imx/mx7/Kconfig"
1990 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1992 source "arch/arm/mach-imx/imx8/Kconfig"
1994 source "arch/arm/mach-imx/imx8m/Kconfig"
1996 source "arch/arm/mach-imx/imx8ulp/Kconfig"
1998 source "arch/arm/mach-imx/imxrt/Kconfig"
2000 source "arch/arm/mach-imx/mxs/Kconfig"
2002 source "arch/arm/mach-omap2/Kconfig"
2004 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2006 source "arch/arm/mach-orion5x/Kconfig"
2008 source "arch/arm/mach-owl/Kconfig"
2010 source "arch/arm/mach-rmobile/Kconfig"
2012 source "arch/arm/mach-meson/Kconfig"
2014 source "arch/arm/mach-mediatek/Kconfig"
2016 source "arch/arm/mach-qemu/Kconfig"
2018 source "arch/arm/mach-rockchip/Kconfig"
2020 source "arch/arm/mach-s5pc1xx/Kconfig"
2022 source "arch/arm/mach-snapdragon/Kconfig"
2024 source "arch/arm/mach-socfpga/Kconfig"
2026 source "arch/arm/mach-sti/Kconfig"
2028 source "arch/arm/mach-stm32/Kconfig"
2030 source "arch/arm/mach-stm32mp/Kconfig"
2032 source "arch/arm/mach-sunxi/Kconfig"
2034 source "arch/arm/mach-tegra/Kconfig"
2036 source "arch/arm/mach-u8500/Kconfig"
2038 source "arch/arm/mach-uniphier/Kconfig"
2040 source "arch/arm/cpu/armv7/vf610/Kconfig"
2042 source "arch/arm/mach-zynq/Kconfig"
2044 source "arch/arm/mach-zynqmp/Kconfig"
2046 source "arch/arm/mach-versal/Kconfig"
2048 source "arch/arm/mach-zynqmp-r5/Kconfig"
2050 source "arch/arm/cpu/armv7/Kconfig"
2052 source "arch/arm/cpu/armv8/Kconfig"
2054 source "arch/arm/mach-imx/Kconfig"
2056 source "arch/arm/mach-nexell/Kconfig"
2058 source "board/armltd/total_compute/Kconfig"
2060 source "board/bosch/shc/Kconfig"
2061 source "board/bosch/guardian/Kconfig"
2062 source "board/CarMediaLab/flea3/Kconfig"
2063 source "board/Marvell/aspenite/Kconfig"
2064 source "board/Marvell/octeontx/Kconfig"
2065 source "board/Marvell/octeontx2/Kconfig"
2066 source "board/armltd/vexpress64/Kconfig"
2067 source "board/cortina/presidio-asic/Kconfig"
2068 source "board/broadcom/bcm963158/Kconfig"
2069 source "board/broadcom/bcm968360bg/Kconfig"
2070 source "board/broadcom/bcm968580xref/Kconfig"
2071 source "board/broadcom/bcmns3/Kconfig"
2072 source "board/cavium/thunderx/Kconfig"
2073 source "board/eets/pdu001/Kconfig"
2074 source "board/emulation/qemu-arm/Kconfig"
2075 source "board/freescale/ls2080aqds/Kconfig"
2076 source "board/freescale/ls2080ardb/Kconfig"
2077 source "board/freescale/ls1088a/Kconfig"
2078 source "board/freescale/ls1028a/Kconfig"
2079 source "board/freescale/ls1021aqds/Kconfig"
2080 source "board/freescale/ls1043aqds/Kconfig"
2081 source "board/freescale/ls1021atwr/Kconfig"
2082 source "board/freescale/ls1021atsn/Kconfig"
2083 source "board/freescale/ls1021aiot/Kconfig"
2084 source "board/freescale/ls1046aqds/Kconfig"
2085 source "board/freescale/ls1043ardb/Kconfig"
2086 source "board/freescale/ls1046ardb/Kconfig"
2087 source "board/freescale/ls1046afrwy/Kconfig"
2088 source "board/freescale/ls1012aqds/Kconfig"
2089 source "board/freescale/ls1012ardb/Kconfig"
2090 source "board/freescale/ls1012afrdm/Kconfig"
2091 source "board/freescale/lx2160a/Kconfig"
2092 source "board/grinn/chiliboard/Kconfig"
2093 source "board/hisilicon/hikey/Kconfig"
2094 source "board/hisilicon/hikey960/Kconfig"
2095 source "board/hisilicon/poplar/Kconfig"
2096 source "board/isee/igep003x/Kconfig"
2097 source "board/kontron/sl28/Kconfig"
2098 source "board/myir/mys_6ulx/Kconfig"
2099 source "board/seeed/npi_imx6ull/Kconfig"
2100 source "board/socionext/developerbox/Kconfig"
2101 source "board/st/stv0991/Kconfig"
2102 source "board/tcl/sl50/Kconfig"
2103 source "board/toradex/colibri_pxa270/Kconfig"
2104 source "board/variscite/dart_6ul/Kconfig"
2105 source "board/vscom/baltos/Kconfig"
2106 source "board/phytium/durian/Kconfig"
2107 source "board/xen/xenguest_arm64/Kconfig"
2108 source "board/keymile/Kconfig"
2110 source "arch/arm/Kconfig.debug"
2115 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2116 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2117 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64