1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed from
19 almost any 4K aligned address. This logic relies on the relocation
20 information that is embedded in the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
25 default n if ARCH_QEMU
26 default y if POSITION_INDEPENDENT
28 U-Boot typically uses a hard-coded value for the stack pointer
29 before relocation. Enable this option to instead calculate the
30 initial SP at run-time. This is useful to avoid hard-coding addresses
31 into U-Boot, so that it can be loaded and executed at arbitrary
32 addresses and thus avoid using arbitrary addresses at runtime.
34 If this option is enabled, the early stack pointer is set to
35 &_bss_start with a offset value added. The offset is specified by
36 SYS_INIT_SP_BSS_OFFSET.
38 config SYS_INIT_SP_BSS_OFFSET
39 int "Early stack offset from the .bss base address"
40 depends on INIT_SP_RELATIVE
43 This option's value is the offset added to &_bss_start in order to
44 calculate the stack pointer. This offset should be large enough so
45 that the early malloc region, global data (gd), and early stack usage
46 do not overlap any appended DTB.
48 config LINUX_KERNEL_IMAGE_HEADER
51 Place a Linux kernel image header at the start of the U-Boot binary.
52 The format of the header is described in the Linux kernel source at
53 Documentation/arm64/booting.txt. This feature is useful since the
54 image header reports the amount of memory (BSS and similar) that
55 U-Boot needs to use, but which isn't part of the binary.
57 if LINUX_KERNEL_IMAGE_HEADER
58 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
61 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
62 TEXT_OFFSET value written to the Linux kernel image header.
71 ARM GICV3 Interrupt translation service (ITS).
72 Basic support for programming locality specific peripheral
73 interrupts (LPI) configuration tables and enable LPI tables.
74 LPI configuration table can be used by u-boot or Linux.
75 ARM GICV3 has limitation, once the LPI table is enabled, LPI
76 configuration table can not be re-programmed, unless GICV3 reset.
82 config DMA_ADDR_T_64BIT
92 # Used for compatibility with asm files copied from the kernel
93 config ARM_ASM_UNIFIED
97 # Used for compatibility with asm files copied from the kernel
101 config SYS_ICACHE_OFF
102 bool "Do not enable icache"
105 Do not enable instruction cache in U-Boot.
107 config SPL_SYS_ICACHE_OFF
108 bool "Do not enable icache in SPL"
110 default SYS_ICACHE_OFF
112 Do not enable instruction cache in SPL.
114 config SYS_DCACHE_OFF
115 bool "Do not enable dcache"
118 Do not enable data cache in U-Boot.
120 config SPL_SYS_DCACHE_OFF
121 bool "Do not enable dcache in SPL"
123 default SYS_DCACHE_OFF
125 Do not enable data cache in SPL.
127 config SYS_ARM_CACHE_CP15
128 bool "CP15 based cache enabling support"
130 Select this if your processor suports enabling caches by using
134 bool "MMU-based Paged Memory Management Support"
135 select SYS_ARM_CACHE_CP15
137 Select if you want MMU-based virtualised addressing space
138 support via paged memory management.
141 bool 'Use the ARM v7 PMSA Compliant MPU'
143 Some ARM systems without an MMU have instead a Memory Protection
144 Unit (MPU) that defines the type and permissions for regions of
146 If your CPU has an MPU then you should choose 'y' here unless you
147 know that you do not want to use the MPU.
149 # If set, the workarounds for these ARM errata are applied early during U-Boot
150 # startup. Note that in general these options force the workarounds to be
151 # applied; no CPU-type/version detection exists, unlike the similar options in
152 # the Linux kernel. Do not set these options unless they apply! Also note that
153 # the following can be machine-specific errata. These do have ability to
154 # provide rudimentary version and machine-specific checks, but expect no
156 # CONFIG_ARM_ERRATA_430973
157 # CONFIG_ARM_ERRATA_454179
158 # CONFIG_ARM_ERRATA_621766
159 # CONFIG_ARM_ERRATA_798870
160 # CONFIG_ARM_ERRATA_801819
161 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
162 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
164 config ARM_ERRATA_430973
167 config ARM_ERRATA_454179
170 config ARM_ERRATA_621766
173 config ARM_ERRATA_716044
176 config ARM_ERRATA_725233
179 config ARM_ERRATA_742230
182 config ARM_ERRATA_743622
185 config ARM_ERRATA_751472
188 config ARM_ERRATA_761320
191 config ARM_ERRATA_773022
194 config ARM_ERRATA_774769
197 config ARM_ERRATA_794072
200 config ARM_ERRATA_798870
203 config ARM_ERRATA_801819
206 config ARM_ERRATA_826974
209 config ARM_ERRATA_828024
212 config ARM_ERRATA_829520
215 config ARM_ERRATA_833069
218 config ARM_ERRATA_833471
221 config ARM_ERRATA_845369
224 config ARM_ERRATA_852421
227 config ARM_ERRATA_852423
230 config ARM_ERRATA_855873
233 config ARM_CORTEX_A8_CVE_2017_5715
236 config ARM_CORTEX_A15_CVE_2017_5715
241 select SYS_CACHE_SHIFT_5
246 select SYS_CACHE_SHIFT_5
251 select SYS_CACHE_SHIFT_5
256 select SYS_CACHE_SHIFT_5
261 select SYS_CACHE_SHIFT_5
267 select SYS_CACHE_SHIFT_5
274 select SYS_CACHE_SHIFT_6
281 select SYS_CACHE_SHIFT_5
282 select SYS_THUMB_BUILD
288 select SYS_ARM_CACHE_CP15
290 select SYS_CACHE_SHIFT_6
294 select SYS_CACHE_SHIFT_5
299 select SYS_CACHE_SHIFT_5
303 default "arm720t" if CPU_ARM720T
304 default "arm920t" if CPU_ARM920T
305 default "arm926ejs" if CPU_ARM926EJS
306 default "arm946es" if CPU_ARM946ES
307 default "arm1136" if CPU_ARM1136
308 default "arm1176" if CPU_ARM1176
309 default "armv7" if CPU_V7A
310 default "armv7" if CPU_V7R
311 default "armv7m" if CPU_V7M
312 default "pxa" if CPU_PXA
313 default "sa1100" if CPU_SA1100
314 default "armv8" if ARM64
318 default 4 if CPU_ARM720T
319 default 4 if CPU_ARM920T
320 default 5 if CPU_ARM926EJS
321 default 5 if CPU_ARM946ES
322 default 6 if CPU_ARM1136
323 default 6 if CPU_ARM1176
328 default 4 if CPU_SA1100
331 config SYS_CACHE_SHIFT_5
334 config SYS_CACHE_SHIFT_6
337 config SYS_CACHE_SHIFT_7
340 config SYS_CACHELINE_SIZE
342 default 128 if SYS_CACHE_SHIFT_7
343 default 64 if SYS_CACHE_SHIFT_6
344 default 32 if SYS_CACHE_SHIFT_5
347 prompt "Select the ARM data write cache policy"
348 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
349 TARGET_BCMNSP || CPU_PXA || RZA1
350 default SYS_ARM_CACHE_WRITEBACK
352 config SYS_ARM_CACHE_WRITEBACK
353 bool "Write-back (WB)"
355 A write updates the cache only and marks the cache line as dirty.
356 External memory is updated only when the line is evicted or explicitly
359 config SYS_ARM_CACHE_WRITETHROUGH
360 bool "Write-through (WT)"
362 A write updates both the cache and the external memory system.
363 This does not mark the cache line as dirty.
365 config SYS_ARM_CACHE_WRITEALLOC
366 bool "Write allocation (WA)"
368 A cache line is allocated on a write miss. This means that executing a
369 store instruction on the processor might cause a burst read to occur.
370 There is a linefill to obtain the data for the cache line, before the
375 bool "Enable ARCH_CPU_INIT"
377 Some architectures require a call to arch_cpu_init().
378 Say Y here to enable it
380 config SYS_ARCH_TIMER
381 bool "ARM Generic Timer support"
382 depends on CPU_V7A || ARM64
385 The ARM Generic Timer (aka arch-timer) provides an architected
386 interface to a timer source on an SoC.
387 It is mandatory for ARMv8 implementation and widely available
391 bool "Support for ARM SMC Calling Convention (SMCCC)"
392 depends on CPU_V7A || ARM64
395 Say Y here if you want to enable ARM SMC Calling Convention.
396 This should be enabled if U-Boot needs to communicate with system
397 firmware (for example, PSCI) according to SMCCC.
400 bool "support boot from semihosting"
402 In emulated environments, semihosting is a way for
403 the hosted environment to call out to the emulator to
404 retrieve files from the host machine.
406 config SYS_THUMB_BUILD
407 bool "Build U-Boot using the Thumb instruction set"
410 Use this flag to build U-Boot using the Thumb instruction set for
411 ARM architectures. Thumb instruction set provides better code
412 density. For ARM architectures that support Thumb2 this flag will
413 result in Thumb2 code generated by GCC.
415 config SPL_SYS_THUMB_BUILD
416 bool "Build SPL using the Thumb instruction set"
417 default y if SYS_THUMB_BUILD
418 depends on !ARM64 && SPL
420 Use this flag to build SPL using the Thumb instruction set for
421 ARM architectures. Thumb instruction set provides better code
422 density. For ARM architectures that support Thumb2 this flag will
423 result in Thumb2 code generated by GCC.
425 config TPL_SYS_THUMB_BUILD
426 bool "Build TPL using the Thumb instruction set"
427 default y if SYS_THUMB_BUILD
428 depends on TPL && !ARM64
430 Use this flag to build TPL using the Thumb instruction set for
431 ARM architectures. Thumb instruction set provides better code
432 density. For ARM architectures that support Thumb2 this flag will
433 result in Thumb2 code generated by GCC.
436 config SYS_L2CACHE_OFF
439 If SoC does not support L2CACHE or one does not want to enable
440 L2CACHE, choose this option.
442 config ENABLE_ARM_SOC_BOOT0_HOOK
443 bool "prepare BOOT0 header"
445 If the SoC's BOOT0 requires a header area filled with (magic)
446 values, then choose this option, and create a file included as
447 <asm/arch/boot0.h> which contains the required assembler code.
449 config ARM_CORTEX_CPU_IS_UP
453 config USE_ARCH_MEMCPY
454 bool "Use an assembly optimized implementation of memcpy"
458 Enable the generation of an optimized version of memcpy.
459 Such an implementation may be faster under some conditions
460 but may increase the binary size.
462 config SPL_USE_ARCH_MEMCPY
463 bool "Use an assembly optimized implementation of memcpy for SPL"
464 default y if USE_ARCH_MEMCPY
465 depends on !ARM64 && SPL
467 Enable the generation of an optimized version of memcpy.
468 Such an implementation may be faster under some conditions
469 but may increase the binary size.
471 config TPL_USE_ARCH_MEMCPY
472 bool "Use an assembly optimized implementation of memcpy for TPL"
473 default y if USE_ARCH_MEMCPY
474 depends on !ARM64 && TPL
476 Enable the generation of an optimized version of memcpy.
477 Such an implementation may be faster under some conditions
478 but may increase the binary size.
480 config USE_ARCH_MEMSET
481 bool "Use an assembly optimized implementation of memset"
485 Enable the generation of an optimized version of memset.
486 Such an implementation may be faster under some conditions
487 but may increase the binary size.
489 config SPL_USE_ARCH_MEMSET
490 bool "Use an assembly optimized implementation of memset for SPL"
491 default y if USE_ARCH_MEMSET
492 depends on !ARM64 && SPL
494 Enable the generation of an optimized version of memset.
495 Such an implementation may be faster under some conditions
496 but may increase the binary size.
498 config TPL_USE_ARCH_MEMSET
499 bool "Use an assembly optimized implementation of memset for TPL"
500 default y if USE_ARCH_MEMSET
501 depends on !ARM64 && TPL
503 Enable the generation of an optimized version of memset.
504 Such an implementation may be faster under some conditions
505 but may increase the binary size.
507 config ARM64_SUPPORT_AARCH32
508 bool "ARM64 system support AArch32 execution state"
510 default y if !TARGET_THUNDERX_88XX
512 This ARM64 system supports AArch32 execution state.
515 prompt "Target select"
520 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
521 select SPL_SEPARATE_BSS if SPL
523 config TARGET_EDB93XX
524 bool "Support edb93xx"
528 config TARGET_ASPENITE
529 bool "Support aspenite"
533 bool "Support gplugd"
539 select SPL_DM_SPI if SPL
542 Support for TI's DaVinci platform.
545 bool "Marvell Kirkwood"
546 select ARCH_MISC_INIT
547 select BOARD_EARLY_INIT_F
551 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
557 select SPL_DM_SPI if SPL
558 select SPL_DM_SPI_FLASH if SPL
568 config TARGET_SPEAR300
569 bool "Support spear300"
570 select BOARD_EARLY_INIT_F
575 config TARGET_SPEAR310
576 bool "Support spear310"
577 select BOARD_EARLY_INIT_F
582 config TARGET_SPEAR320
583 bool "Support spear320"
584 select BOARD_EARLY_INIT_F
589 config TARGET_SPEAR600
590 bool "Support spear600"
591 select BOARD_EARLY_INIT_F
596 config TARGET_STV0991
597 bool "Support stv0991"
610 select BOARD_LATE_INIT
620 bool "Broadcom BCM283X family"
626 select SERIAL_SEARCH_ALL
631 bool "Broadcom BCM63158 family"
637 bool "Broadcom BCM68360 family"
643 bool "Broadcom BCM6858 family"
648 config TARGET_VEXPRESS_CA15_TC2
649 bool "Support vexpress_ca15_tc2"
651 select CPU_V7_HAS_NONSEC
652 select CPU_V7_HAS_VIRT
656 bool "Broadcom BCM7XXX family"
660 select OF_PRIOR_STAGE
663 This enables support for Broadcom ARM-based set-top box
664 chipsets, including the 7445 family of chips.
666 config TARGET_VEXPRESS_CA5X2
667 bool "Support vexpress_ca5x2"
671 config TARGET_VEXPRESS_CA9X4
672 bool "Support vexpress_ca9x4"
676 config TARGET_BCM23550_W1D
677 bool "Support bcm23550_w1d"
682 config TARGET_BCM28155_AP
683 bool "Support bcm28155_ap"
688 config TARGET_BCMCYGNUS
689 bool "Support bcmcygnus"
692 imply BCM_SF2_ETH_GMAC
700 bool "Support bcmnsp"
704 bool "Support Broadcom Northstar2"
707 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
708 ARMv8 Cortex-A57 processors targeting a broad range of networking
712 bool "Support Broadcom NS3"
714 select BOARD_LATE_INIT
716 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
717 ARMv8 Cortex-A72 processors targeting a broad range of networking
721 bool "Samsung EXYNOS"
730 imply SYS_THUMB_BUILD
735 bool "Samsung S5PC1XX"
744 bool "Calxeda Highbank"
748 config ARCH_INTEGRATOR
749 bool "ARM Ltd. Integrator family"
756 bool "Qualcomm IPQ40xx SoCs"
774 select SYS_ARCH_TIMER
775 select SYS_THUMB_BUILD
781 bool "Texas Instruments' K3 Architecture"
786 config ARCH_OMAP2PLUS
789 select SPL_BOARD_INIT if SPL
790 select SPL_STACK_R if SPL
792 imply TI_SYSC if DM && OF_CONTROL
797 imply DISTRO_DEFAULTS
800 Support for the Meson SoC family developed by Amlogic Inc.,
801 targeted at media players and tablet computers. We currently
802 support the S905 (GXBaby) 64-bit SoC.
809 select SPL_LIBCOMMON_SUPPORT if SPL
810 select SPL_LIBGENERIC_SUPPORT if SPL
811 select SPL_OF_CONTROL if SPL
814 Support for the MediaTek SoCs family developed by MediaTek Inc.
815 Please refer to doc/README.mediatek for more information.
818 bool "NXP LPC32xx platform"
828 bool "NXP i.MX8 platform"
832 select ENABLE_ARM_SOC_BOOT0_HOOK
835 bool "NXP i.MX8M platform"
837 select SYS_FSL_HAS_SEC if IMX_HAB
838 select SYS_FSL_SEC_COMPAT_4
839 select SYS_FSL_SEC_LE
845 bool "NXP i.MXRT platform"
853 bool "NXP i.MX23 family"
864 bool "NXP i.MX28 family"
870 bool "NXP i.MX31 family"
876 select SYS_FSL_HAS_SEC if IMX_HAB
877 select SYS_FSL_SEC_COMPAT_4
878 select SYS_FSL_SEC_LE
879 select ROM_UNIFIED_SECTIONS
881 imply SYS_THUMB_BUILD
885 select ARCH_MISC_INIT
887 select SYS_FSL_HAS_SEC if IMX_HAB
888 select SYS_FSL_SEC_COMPAT_4
889 select SYS_FSL_SEC_LE
890 imply BOARD_EARLY_INIT_F
892 imply SYS_THUMB_BUILD
897 select SYS_FSL_HAS_SEC
898 select SYS_FSL_SEC_COMPAT_4
899 select SYS_FSL_SEC_LE
901 imply SYS_THUMB_BUILD
905 default "arch/arm/mach-omap2/u-boot-spl.lds"
910 select BOARD_EARLY_INIT_F
915 bool "Nexell S5P4418/S5P6818 SoC"
916 select ENABLE_ARM_SOC_BOOT0_HOOK
920 bool "Actions Semi OWL SoCs"
928 select SYS_RELOC_GD_ENV_ADDR
932 bool "QEMU Virtual Platform"
943 bool "Renesas ARM SoCs"
946 imply BOARD_EARLY_INIT_F
949 imply SYS_THUMB_BUILD
950 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
952 config TARGET_S32V234EVB
953 bool "Support s32v234evb"
955 select SYS_FSL_ERRATUM_ESDHC111
957 config ARCH_SNAPDRAGON
958 bool "Qualcomm Snapdragon SoCs"
971 bool "Altera SOCFPGA family"
972 select ARCH_EARLY_INIT_R
973 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
974 select ARM64 if TARGET_SOCFPGA_SOC64
975 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
978 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
980 select SPL_DM_RESET if DM_RESET
982 select SPL_LIBCOMMON_SUPPORT
983 select SPL_LIBGENERIC_SUPPORT
984 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
985 select SPL_OF_CONTROL
986 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
987 select SPL_SERIAL_SUPPORT
989 select SPL_WATCHDOG_SUPPORT
992 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
994 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
995 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1005 imply SPL_DM_SPI_FLASH
1006 imply SPL_LIBDISK_SUPPORT
1007 imply SPL_MMC_SUPPORT
1008 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1009 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1010 imply SPL_SPI_FLASH_SUPPORT
1011 imply SPL_SPI_SUPPORT
1015 bool "Support sunxi (Allwinner) SoCs"
1018 select CMD_MMC if MMC
1019 select CMD_USB if DISTRO_DEFAULTS
1025 select DM_MMC if MMC
1026 select DM_SCSI if SCSI
1028 select DM_USB if DISTRO_DEFAULTS
1029 select OF_BOARD_SETUP
1032 select SPECIFY_CONSOLE_INDEX
1033 select SPL_STACK_R if SPL
1034 select SPL_SYS_MALLOC_SIMPLE if SPL
1035 select SPL_SYS_THUMB_BUILD if !ARM64
1038 select SYS_THUMB_BUILD if !ARM64
1039 select USB if DISTRO_DEFAULTS
1040 select USB_KEYBOARD if DISTRO_DEFAULTS
1041 select USB_STORAGE if DISTRO_DEFAULTS
1042 select SPL_USE_TINY_PRINTF
1044 select SYS_RELOC_GD_ENV_ADDR
1045 imply BOARD_LATE_INIT
1048 imply CMD_UBI if MTD_RAW_NAND
1049 imply DISTRO_DEFAULTS
1052 imply OF_LIBFDT_OVERLAY
1053 imply PRE_CONSOLE_BUFFER
1054 imply SPL_GPIO_SUPPORT
1055 imply SPL_LIBCOMMON_SUPPORT
1056 imply SPL_LIBGENERIC_SUPPORT
1057 imply SPL_MMC_SUPPORT if MMC
1058 imply SPL_POWER_SUPPORT
1059 imply SPL_SERIAL_SUPPORT
1063 bool "ST-Ericsson U8500 Series"
1067 select DM_MMC if MMC
1069 select DM_USB if USB
1073 imply ARM_PL180_MMCI
1075 imply NOMADIK_MTU_TIMER
1078 imply SYSRESET_SYSCON
1081 bool "Support Xilinx Versal Platform"
1085 select DM_ETH if NET
1086 select DM_MMC if MMC
1089 imply BOARD_LATE_INIT
1090 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1093 bool "Freescale Vybrid"
1095 select SYS_FSL_ERRATUM_ESDHC111
1100 bool "Xilinx Zynq based platform"
1105 select DM_ETH if NET
1106 select DM_MMC if MMC
1110 select DM_USB if USB
1113 select SPL_BOARD_INIT if SPL
1114 select SPL_CLK if SPL
1115 select SPL_DM if SPL
1116 select SPL_DM_SPI if SPL
1117 select SPL_DM_SPI_FLASH if SPL
1118 select SPL_OF_CONTROL if SPL
1119 select SPL_SEPARATE_BSS if SPL
1121 imply ARCH_EARLY_INIT_R
1122 imply BOARD_LATE_INIT
1126 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1129 config ARCH_ZYNQMP_R5
1130 bool "Xilinx ZynqMP R5 based platform"
1134 select DM_ETH if NET
1135 select DM_MMC if MMC
1142 bool "Xilinx ZynqMP based platform"
1146 select DM_ETH if NET
1148 select DM_MMC if MMC
1150 select DM_SPI if SPI
1151 select DM_SPI_FLASH if DM_SPI
1152 select DM_USB if USB
1155 select SPL_BOARD_INIT if SPL
1156 select SPL_CLK if SPL
1157 select SPL_DM if SPL
1158 select SPL_DM_SPI if SPI && SPL_DM
1159 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1160 select SPL_DM_MAILBOX if SPL
1161 select SPL_FIRMWARE if SPL
1162 select SPL_SEPARATE_BSS if SPL
1165 imply BOARD_LATE_INIT
1167 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1174 imply DISTRO_DEFAULTS
1177 config TARGET_VEXPRESS64_AEMV8A
1178 bool "Support vexpress_aemv8a"
1182 config TARGET_VEXPRESS64_BASE_FVP
1183 bool "Support Versatile Express ARMv8a FVP BASE model"
1188 config TARGET_VEXPRESS64_JUNO
1189 bool "Support Versatile Express Juno Development Platform"
1204 config TARGET_TOTAL_COMPUTE
1205 bool "Support Total Compute Platform"
1213 config TARGET_LS2080A_EMU
1214 bool "Support ls2080a_emu"
1217 select ARMV8_MULTIENTRY
1218 select FSL_DDR_SYNC_REFRESH
1220 Support for Freescale LS2080A_EMU platform.
1221 The LS2080A Development System (EMULATOR) is a pre-silicon
1222 development platform that supports the QorIQ LS2080A
1223 Layerscape Architecture processor.
1225 config TARGET_LS1088AQDS
1226 bool "Support ls1088aqds"
1229 select ARMV8_MULTIENTRY
1230 select ARCH_SUPPORT_TFABOOT
1231 select BOARD_LATE_INIT
1233 select FSL_DDR_INTERACTIVE if !SD_BOOT
1235 Support for NXP LS1088AQDS platform.
1236 The LS1088A Development System (QDS) is a high-performance
1237 development platform that supports the QorIQ LS1088A
1238 Layerscape Architecture processor.
1240 config TARGET_LS2080AQDS
1241 bool "Support ls2080aqds"
1244 select ARMV8_MULTIENTRY
1245 select ARCH_SUPPORT_TFABOOT
1246 select BOARD_LATE_INIT
1251 select FSL_DDR_INTERACTIVE if !SPL
1253 Support for Freescale LS2080AQDS platform.
1254 The LS2080A Development System (QDS) is a high-performance
1255 development platform that supports the QorIQ LS2080A
1256 Layerscape Architecture processor.
1258 config TARGET_LS2080ARDB
1259 bool "Support ls2080ardb"
1262 select ARMV8_MULTIENTRY
1263 select ARCH_SUPPORT_TFABOOT
1264 select BOARD_LATE_INIT
1267 select FSL_DDR_INTERACTIVE if !SPL
1271 Support for Freescale LS2080ARDB platform.
1272 The LS2080A Reference design board (RDB) is a high-performance
1273 development platform that supports the QorIQ LS2080A
1274 Layerscape Architecture processor.
1276 config TARGET_LS2081ARDB
1277 bool "Support ls2081ardb"
1280 select ARMV8_MULTIENTRY
1281 select BOARD_LATE_INIT
1284 Support for Freescale LS2081ARDB platform.
1285 The LS2081A Reference design board (RDB) is a high-performance
1286 development platform that supports the QorIQ LS2081A/LS2041A
1287 Layerscape Architecture processor.
1289 config TARGET_LX2160ARDB
1290 bool "Support lx2160ardb"
1293 select ARMV8_MULTIENTRY
1294 select ARCH_SUPPORT_TFABOOT
1295 select BOARD_LATE_INIT
1297 Support for NXP LX2160ARDB platform.
1298 The lx2160ardb (LX2160A Reference design board (RDB)
1299 is a high-performance development platform that supports the
1300 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1302 config TARGET_LX2160AQDS
1303 bool "Support lx2160aqds"
1306 select ARMV8_MULTIENTRY
1307 select ARCH_SUPPORT_TFABOOT
1308 select BOARD_LATE_INIT
1310 Support for NXP LX2160AQDS platform.
1311 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1312 is a high-performance development platform that supports the
1313 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1315 config TARGET_LX2162AQDS
1316 bool "Support lx2162aqds"
1318 select ARCH_MISC_INIT
1320 select ARMV8_MULTIENTRY
1321 select ARCH_SUPPORT_TFABOOT
1322 select BOARD_LATE_INIT
1324 Support for NXP LX2162AQDS platform.
1325 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1328 bool "Support HiKey 96boards Consumer Edition Platform"
1335 select SPECIFY_CONSOLE_INDEX
1338 Support for HiKey 96boards platform. It features a HI6220
1339 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1341 config TARGET_HIKEY960
1342 bool "Support HiKey960 96boards Consumer Edition Platform"
1350 Support for HiKey960 96boards platform. It features a HI3660
1351 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1353 config TARGET_POPLAR
1354 bool "Support Poplar 96boards Enterprise Edition Platform"
1363 Support for Poplar 96boards EE platform. It features a HI3798cv200
1364 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1365 making it capable of running any commercial set-top solution based on
1368 config TARGET_LS1012AQDS
1369 bool "Support ls1012aqds"
1372 select ARCH_SUPPORT_TFABOOT
1373 select BOARD_LATE_INIT
1375 Support for Freescale LS1012AQDS platform.
1376 The LS1012A Development System (QDS) is a high-performance
1377 development platform that supports the QorIQ LS1012A
1378 Layerscape Architecture processor.
1380 config TARGET_LS1012ARDB
1381 bool "Support ls1012ardb"
1384 select ARCH_SUPPORT_TFABOOT
1385 select BOARD_LATE_INIT
1389 Support for Freescale LS1012ARDB platform.
1390 The LS1012A Reference design board (RDB) is a high-performance
1391 development platform that supports the QorIQ LS1012A
1392 Layerscape Architecture processor.
1394 config TARGET_LS1012A2G5RDB
1395 bool "Support ls1012a2g5rdb"
1398 select ARCH_SUPPORT_TFABOOT
1399 select BOARD_LATE_INIT
1402 Support for Freescale LS1012A2G5RDB platform.
1403 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1404 development platform that supports the QorIQ LS1012A
1405 Layerscape Architecture processor.
1407 config TARGET_LS1012AFRWY
1408 bool "Support ls1012afrwy"
1411 select ARCH_SUPPORT_TFABOOT
1412 select BOARD_LATE_INIT
1416 Support for Freescale LS1012AFRWY platform.
1417 The LS1012A FRWY board (FRWY) is a high-performance
1418 development platform that supports the QorIQ LS1012A
1419 Layerscape Architecture processor.
1421 config TARGET_LS1012AFRDM
1422 bool "Support ls1012afrdm"
1425 select ARCH_SUPPORT_TFABOOT
1427 Support for Freescale LS1012AFRDM platform.
1428 The LS1012A Freedom board (FRDM) is a high-performance
1429 development platform that supports the QorIQ LS1012A
1430 Layerscape Architecture processor.
1432 config TARGET_LS1028AQDS
1433 bool "Support ls1028aqds"
1436 select ARMV8_MULTIENTRY
1437 select ARCH_SUPPORT_TFABOOT
1438 select BOARD_LATE_INIT
1440 Support for Freescale LS1028AQDS platform
1441 The LS1028A Development System (QDS) is a high-performance
1442 development platform that supports the QorIQ LS1028A
1443 Layerscape Architecture processor.
1445 config TARGET_LS1028ARDB
1446 bool "Support ls1028ardb"
1449 select ARMV8_MULTIENTRY
1450 select ARCH_SUPPORT_TFABOOT
1451 select BOARD_LATE_INIT
1453 Support for Freescale LS1028ARDB platform
1454 The LS1028A Development System (RDB) is a high-performance
1455 development platform that supports the QorIQ LS1028A
1456 Layerscape Architecture processor.
1458 config TARGET_LS1088ARDB
1459 bool "Support ls1088ardb"
1462 select ARMV8_MULTIENTRY
1463 select ARCH_SUPPORT_TFABOOT
1464 select BOARD_LATE_INIT
1466 select FSL_DDR_INTERACTIVE if !SD_BOOT
1468 Support for NXP LS1088ARDB platform.
1469 The LS1088A Reference design board (RDB) is a high-performance
1470 development platform that supports the QorIQ LS1088A
1471 Layerscape Architecture processor.
1473 config TARGET_LS1021AQDS
1474 bool "Support ls1021aqds"
1476 select ARCH_SUPPORT_PSCI
1477 select BOARD_EARLY_INIT_F
1478 select BOARD_LATE_INIT
1480 select CPU_V7_HAS_NONSEC
1481 select CPU_V7_HAS_VIRT
1482 select LS1_DEEP_SLEEP
1485 select FSL_DDR_INTERACTIVE
1486 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1487 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1490 config TARGET_LS1021ATWR
1491 bool "Support ls1021atwr"
1493 select ARCH_SUPPORT_PSCI
1494 select BOARD_EARLY_INIT_F
1495 select BOARD_LATE_INIT
1497 select CPU_V7_HAS_NONSEC
1498 select CPU_V7_HAS_VIRT
1499 select LS1_DEEP_SLEEP
1501 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1504 config TARGET_LS1021ATSN
1505 bool "Support ls1021atsn"
1507 select ARCH_SUPPORT_PSCI
1508 select BOARD_EARLY_INIT_F
1509 select BOARD_LATE_INIT
1511 select CPU_V7_HAS_NONSEC
1512 select CPU_V7_HAS_VIRT
1513 select LS1_DEEP_SLEEP
1517 config TARGET_LS1021AIOT
1518 bool "Support ls1021aiot"
1520 select ARCH_SUPPORT_PSCI
1521 select BOARD_LATE_INIT
1523 select CPU_V7_HAS_NONSEC
1524 select CPU_V7_HAS_VIRT
1526 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1529 Support for Freescale LS1021AIOT platform.
1530 The LS1021A Freescale board (IOT) is a high-performance
1531 development platform that supports the QorIQ LS1021A
1532 Layerscape Architecture processor.
1534 config TARGET_LS1043AQDS
1535 bool "Support ls1043aqds"
1538 select ARMV8_MULTIENTRY
1539 select ARCH_SUPPORT_TFABOOT
1540 select BOARD_EARLY_INIT_F
1541 select BOARD_LATE_INIT
1543 select FSL_DDR_INTERACTIVE if !SPL
1544 select FSL_DSPI if !SPL_NO_DSPI
1545 select DM_SPI_FLASH if FSL_DSPI
1549 Support for Freescale LS1043AQDS platform.
1551 config TARGET_LS1043ARDB
1552 bool "Support ls1043ardb"
1555 select ARMV8_MULTIENTRY
1556 select ARCH_SUPPORT_TFABOOT
1557 select BOARD_EARLY_INIT_F
1558 select BOARD_LATE_INIT
1560 select FSL_DSPI if !SPL_NO_DSPI
1561 select DM_SPI_FLASH if FSL_DSPI
1563 Support for Freescale LS1043ARDB platform.
1565 config TARGET_LS1046AQDS
1566 bool "Support ls1046aqds"
1569 select ARMV8_MULTIENTRY
1570 select ARCH_SUPPORT_TFABOOT
1571 select BOARD_EARLY_INIT_F
1572 select BOARD_LATE_INIT
1573 select DM_SPI_FLASH if DM_SPI
1575 select FSL_DDR_BIST if !SPL
1576 select FSL_DDR_INTERACTIVE if !SPL
1577 select FSL_DDR_INTERACTIVE if !SPL
1580 Support for Freescale LS1046AQDS platform.
1581 The LS1046A Development System (QDS) is a high-performance
1582 development platform that supports the QorIQ LS1046A
1583 Layerscape Architecture processor.
1585 config TARGET_LS1046ARDB
1586 bool "Support ls1046ardb"
1589 select ARMV8_MULTIENTRY
1590 select ARCH_SUPPORT_TFABOOT
1591 select BOARD_EARLY_INIT_F
1592 select BOARD_LATE_INIT
1593 select DM_SPI_FLASH if DM_SPI
1594 select POWER_MC34VR500
1597 select FSL_DDR_INTERACTIVE if !SPL
1600 Support for Freescale LS1046ARDB platform.
1601 The LS1046A Reference Design Board (RDB) is a high-performance
1602 development platform that supports the QorIQ LS1046A
1603 Layerscape Architecture processor.
1605 config TARGET_LS1046AFRWY
1606 bool "Support ls1046afrwy"
1609 select ARMV8_MULTIENTRY
1610 select ARCH_SUPPORT_TFABOOT
1611 select BOARD_EARLY_INIT_F
1612 select BOARD_LATE_INIT
1613 select DM_SPI_FLASH if DM_SPI
1616 Support for Freescale LS1046AFRWY platform.
1617 The LS1046A Freeway Board (FRWY) is a high-performance
1618 development platform that supports the QorIQ LS1046A
1619 Layerscape Architecture processor.
1625 select ARMV8_MULTIENTRY
1629 Support for Kontron SMARC-sAL28 board.
1631 config TARGET_COLIBRI_PXA270
1632 bool "Support colibri_pxa270"
1635 config ARCH_UNIPHIER
1636 bool "Socionext UniPhier SoCs"
1637 select BOARD_LATE_INIT
1647 select OF_BOARD_SETUP
1651 select SPL_BOARD_INIT if SPL
1652 select SPL_DM if SPL
1653 select SPL_LIBCOMMON_SUPPORT if SPL
1654 select SPL_LIBGENERIC_SUPPORT if SPL
1655 select SPL_OF_CONTROL if SPL
1656 select SPL_PINCTRL if SPL
1659 imply DISTRO_DEFAULTS
1662 Support for UniPhier SoC family developed by Socionext Inc.
1663 (formerly, System LSI Business Division of Panasonic Corporation)
1666 bool "Support STMicroelectronics STM32 MCU with cortex M"
1673 bool "Support STMicrolectronics SoCs"
1682 Support for STMicroelectronics STiH407/10 SoC family.
1683 This SoC is used on Linaro 96Board STiH410-B2260
1686 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1687 select ARCH_MISC_INIT
1688 select ARCH_SUPPORT_TFABOOT
1689 select BOARD_LATE_INIT
1698 select OF_SYSTEM_SETUP
1704 select SYS_THUMB_BUILD
1708 imply OF_LIBFDT_OVERLAY
1709 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1712 Support for STM32MP SoC family developed by STMicroelectronics,
1713 MPUs based on ARM cortex A core
1714 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1715 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1717 SPL is the unsecure FSBL for the basic boot chain.
1719 config ARCH_ROCKCHIP
1720 bool "Support Rockchip SoCs"
1722 select BINMAN if SPL_OPTEE
1732 select DM_USB if USB
1733 select ENABLE_ARM_SOC_BOOT0_HOOK
1736 select SPL_DM if SPL
1737 select SPL_DM_SPI if SPL
1738 select SPL_DM_SPI_FLASH if SPL
1740 select SYS_THUMB_BUILD if !ARM64
1743 imply DEBUG_UART_BOARD_INIT
1744 imply DISTRO_DEFAULTS
1746 imply SARADC_ROCKCHIP
1748 imply SPL_SYS_MALLOC_SIMPLE
1751 imply USB_FUNCTION_FASTBOOT
1753 config ARCH_OCTEONTX
1754 bool "Support OcteonTX SoCs"
1760 select BOARD_LATE_INIT
1761 select SYS_CACHE_SHIFT_7
1763 config ARCH_OCTEONTX2
1764 bool "Support OcteonTX2 SoCs"
1770 select BOARD_LATE_INIT
1771 select SYS_CACHE_SHIFT_7
1773 config TARGET_THUNDERX_88XX
1774 bool "Support ThunderX 88xx"
1778 select SYS_CACHE_SHIFT_7
1781 bool "Support Aspeed SoCs"
1786 config TARGET_DURIAN
1787 bool "Support Phytium Durian Platform"
1790 Support for durian platform.
1791 It has 2GB Sdram, uart and pcie.
1793 config TARGET_PRESIDIO_ASIC
1794 bool "Support Cortina Presidio ASIC Platform"
1797 config TARGET_XENGUEST_ARM64
1798 bool "Xen guest ARM64"
1802 select LINUX_KERNEL_IMAGE_HEADER
1807 config ARCH_SUPPORT_TFABOOT
1811 bool "Support for booting from TF-A"
1812 depends on ARCH_SUPPORT_TFABOOT
1815 Some platforms support the setup of secure registers (for instance
1816 for CPU errata handling) or provide secure services like PSCI.
1817 Those services could also be provided by other firmware parts
1818 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
1819 does not need to (and cannot) execute this code.
1820 Enabling this option will make a U-Boot binary that is relying
1821 on other firmware layers to provide secure functionality.
1823 config TI_SECURE_DEVICE
1824 bool "HS Device Type Support"
1825 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1827 If a high secure (HS) device type is being used, this config
1828 must be set. This option impacts various aspects of the
1829 build system (to create signed boot images that can be
1830 authenticated) and the code. See the doc/README.ti-secure
1831 file for further details.
1833 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1834 config ISW_ENTRY_ADDR
1835 hex "Address in memory or XIP address of bootloader entry point"
1836 default 0x402F4000 if AM43XX
1837 default 0x402F0400 if AM33XX
1838 default 0x40301350 if OMAP54XX
1840 After any reset, the boot ROM searches the boot media for a valid
1841 boot image. For non-XIP devices, the ROM then copies the image into
1842 internal memory. For all boot modes, after the ROM processes the
1843 boot image it eventually computes the entry point address depending
1844 on the device type (secure/non-secure), boot media (xip/non-xip) and
1848 source "arch/arm/mach-aspeed/Kconfig"
1850 source "arch/arm/mach-at91/Kconfig"
1852 source "arch/arm/mach-bcm283x/Kconfig"
1854 source "arch/arm/mach-bcmstb/Kconfig"
1856 source "arch/arm/mach-davinci/Kconfig"
1858 source "arch/arm/mach-exynos/Kconfig"
1860 source "arch/arm/mach-highbank/Kconfig"
1862 source "arch/arm/mach-integrator/Kconfig"
1864 source "arch/arm/mach-ipq40xx/Kconfig"
1866 source "arch/arm/mach-k3/Kconfig"
1868 source "arch/arm/mach-keystone/Kconfig"
1870 source "arch/arm/mach-kirkwood/Kconfig"
1872 source "arch/arm/mach-lpc32xx/Kconfig"
1874 source "arch/arm/mach-mvebu/Kconfig"
1876 source "arch/arm/mach-octeontx/Kconfig"
1878 source "arch/arm/mach-octeontx2/Kconfig"
1880 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1882 source "arch/arm/mach-imx/mx2/Kconfig"
1884 source "arch/arm/mach-imx/mx3/Kconfig"
1886 source "arch/arm/mach-imx/mx5/Kconfig"
1888 source "arch/arm/mach-imx/mx6/Kconfig"
1890 source "arch/arm/mach-imx/mx7/Kconfig"
1892 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1894 source "arch/arm/mach-imx/imx8/Kconfig"
1896 source "arch/arm/mach-imx/imx8m/Kconfig"
1898 source "arch/arm/mach-imx/imxrt/Kconfig"
1900 source "arch/arm/mach-imx/mxs/Kconfig"
1902 source "arch/arm/mach-omap2/Kconfig"
1904 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1906 source "arch/arm/mach-orion5x/Kconfig"
1908 source "arch/arm/mach-owl/Kconfig"
1910 source "arch/arm/mach-rmobile/Kconfig"
1912 source "arch/arm/mach-meson/Kconfig"
1914 source "arch/arm/mach-mediatek/Kconfig"
1916 source "arch/arm/mach-qemu/Kconfig"
1918 source "arch/arm/mach-rockchip/Kconfig"
1920 source "arch/arm/mach-s5pc1xx/Kconfig"
1922 source "arch/arm/mach-snapdragon/Kconfig"
1924 source "arch/arm/mach-socfpga/Kconfig"
1926 source "arch/arm/mach-sti/Kconfig"
1928 source "arch/arm/mach-stm32/Kconfig"
1930 source "arch/arm/mach-stm32mp/Kconfig"
1932 source "arch/arm/mach-sunxi/Kconfig"
1934 source "arch/arm/mach-tegra/Kconfig"
1936 source "arch/arm/mach-u8500/Kconfig"
1938 source "arch/arm/mach-uniphier/Kconfig"
1940 source "arch/arm/cpu/armv7/vf610/Kconfig"
1942 source "arch/arm/mach-zynq/Kconfig"
1944 source "arch/arm/mach-zynqmp/Kconfig"
1946 source "arch/arm/mach-versal/Kconfig"
1948 source "arch/arm/mach-zynqmp-r5/Kconfig"
1950 source "arch/arm/cpu/armv7/Kconfig"
1952 source "arch/arm/cpu/armv8/Kconfig"
1954 source "arch/arm/mach-imx/Kconfig"
1956 source "arch/arm/mach-nexell/Kconfig"
1958 source "board/armltd/total_compute/Kconfig"
1960 source "board/bosch/shc/Kconfig"
1961 source "board/bosch/guardian/Kconfig"
1962 source "board/CarMediaLab/flea3/Kconfig"
1963 source "board/Marvell/aspenite/Kconfig"
1964 source "board/Marvell/gplugd/Kconfig"
1965 source "board/Marvell/octeontx/Kconfig"
1966 source "board/Marvell/octeontx2/Kconfig"
1967 source "board/armltd/vexpress/Kconfig"
1968 source "board/armltd/vexpress64/Kconfig"
1969 source "board/cortina/presidio-asic/Kconfig"
1970 source "board/broadcom/bcm23550_w1d/Kconfig"
1971 source "board/broadcom/bcm28155_ap/Kconfig"
1972 source "board/broadcom/bcm963158/Kconfig"
1973 source "board/broadcom/bcm968360bg/Kconfig"
1974 source "board/broadcom/bcm968580xref/Kconfig"
1975 source "board/broadcom/bcmcygnus/Kconfig"
1976 source "board/broadcom/bcmnsp/Kconfig"
1977 source "board/broadcom/bcmns2/Kconfig"
1978 source "board/broadcom/bcmns3/Kconfig"
1979 source "board/cavium/thunderx/Kconfig"
1980 source "board/cirrus/edb93xx/Kconfig"
1981 source "board/eets/pdu001/Kconfig"
1982 source "board/emulation/qemu-arm/Kconfig"
1983 source "board/freescale/ls2080aqds/Kconfig"
1984 source "board/freescale/ls2080ardb/Kconfig"
1985 source "board/freescale/ls1088a/Kconfig"
1986 source "board/freescale/ls1028a/Kconfig"
1987 source "board/freescale/ls1021aqds/Kconfig"
1988 source "board/freescale/ls1043aqds/Kconfig"
1989 source "board/freescale/ls1021atwr/Kconfig"
1990 source "board/freescale/ls1021atsn/Kconfig"
1991 source "board/freescale/ls1021aiot/Kconfig"
1992 source "board/freescale/ls1046aqds/Kconfig"
1993 source "board/freescale/ls1043ardb/Kconfig"
1994 source "board/freescale/ls1046ardb/Kconfig"
1995 source "board/freescale/ls1046afrwy/Kconfig"
1996 source "board/freescale/ls1012aqds/Kconfig"
1997 source "board/freescale/ls1012ardb/Kconfig"
1998 source "board/freescale/ls1012afrdm/Kconfig"
1999 source "board/freescale/lx2160a/Kconfig"
2000 source "board/freescale/s32v234evb/Kconfig"
2001 source "board/grinn/chiliboard/Kconfig"
2002 source "board/hisilicon/hikey/Kconfig"
2003 source "board/hisilicon/hikey960/Kconfig"
2004 source "board/hisilicon/poplar/Kconfig"
2005 source "board/isee/igep003x/Kconfig"
2006 source "board/kontron/sl28/Kconfig"
2007 source "board/myir/mys_6ulx/Kconfig"
2008 source "board/spear/spear300/Kconfig"
2009 source "board/spear/spear310/Kconfig"
2010 source "board/spear/spear320/Kconfig"
2011 source "board/spear/spear600/Kconfig"
2012 source "board/spear/x600/Kconfig"
2013 source "board/st/stv0991/Kconfig"
2014 source "board/tcl/sl50/Kconfig"
2015 source "board/toradex/colibri_pxa270/Kconfig"
2016 source "board/variscite/dart_6ul/Kconfig"
2017 source "board/vscom/baltos/Kconfig"
2018 source "board/phytium/durian/Kconfig"
2019 source "board/xen/xenguest_arm64/Kconfig"
2021 source "arch/arm/Kconfig.debug"
2026 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2027 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2028 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64