1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
11 imply SPL_SEPARATE_BSS
14 bool "Enable support for CRC32 instruction"
18 ARMv8 implements dedicated crc32 instruction for crc32 calculation.
19 This is faster than software crc32 calculation. This instruction may
20 not be present on all ARMv8.0, but is always present on ARMv8.1 and
23 config COUNTER_FREQUENCY
24 int "Timer clock frequency"
25 depends on ARM64 || CPU_V7A
26 default 8000000 if IMX8 || MX7 || MX6UL || MX6ULL
27 default 24000000 if ARCH_SUNXI || ARCH_EXYNOS || ROCKCHIP_RK3128 || \
28 ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036
29 default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A
30 default 100000000 if ARCH_ZYNQMP
33 For platforms with ARMv8-A and ARMv7-A which features a system
34 counter, those platforms needs software to program the counter
35 frequency. Setup time clock frequency for certain platform.
36 0 means no need to configure the system counter frequency.
37 For platforms needs the frequency set in U-Boot with a
38 pre-defined value, should have the macro defined as a non-zero value.
40 config POSITION_INDEPENDENT
41 bool "Generate position-independent pre-relocation code"
42 depends on ARM64 || CPU_V7A
44 U-Boot expects to be linked to a specific hard-coded address, and to
45 be loaded to and run from that address. This option lifts that
46 restriction, thus allowing the code to be loaded to and executed from
47 almost any 4K aligned address. This logic relies on the relocation
48 information that is embedded in the binary to support U-Boot
49 relocating itself to the top-of-RAM later during execution.
51 config INIT_SP_RELATIVE
52 bool "Specify the early stack pointer relative to the .bss section"
54 default n if ARCH_QEMU
55 default y if POSITION_INDEPENDENT
57 U-Boot typically uses a hard-coded value for the stack pointer
58 before relocation. Enable this option to instead calculate the
59 initial SP at run-time. This is useful to avoid hard-coding addresses
60 into U-Boot, so that it can be loaded and executed at arbitrary
61 addresses and thus avoid using arbitrary addresses at runtime.
63 If this option is enabled, the early stack pointer is set to
64 &_bss_start with a offset value added. The offset is specified by
65 SYS_INIT_SP_BSS_OFFSET.
67 config SYS_INIT_SP_BSS_OFFSET
68 int "Early stack offset from the .bss base address"
70 depends on INIT_SP_RELATIVE
73 This option's value is the offset added to &_bss_start in order to
74 calculate the stack pointer. This offset should be large enough so
75 that the early malloc region, global data (gd), and early stack usage
76 do not overlap any appended DTB.
78 config SPL_SYS_NO_VECTOR_TABLE
82 config LINUX_KERNEL_IMAGE_HEADER
86 Place a Linux kernel image header at the start of the U-Boot binary.
87 The format of the header is described in the Linux kernel source at
88 Documentation/arm64/booting.txt. This feature is useful since the
89 image header reports the amount of memory (BSS and similar) that
90 U-Boot needs to use, but which isn't part of the binary.
92 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
93 depends on LINUX_KERNEL_IMAGE_HEADER
96 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
97 TEXT_OFFSET value written to the Linux kernel image header.
109 ARM GICV3 Interrupt translation service (ITS).
110 Basic support for programming locality specific peripheral
111 interrupts (LPI) configuration tables and enable LPI tables.
112 LPI configuration table can be used by u-boot or Linux.
113 ARM GICV3 has limitation, once the LPI table is enabled, LPI
114 configuration table can not be re-programmed, unless GICV3 reset.
120 config DMA_ADDR_T_64BIT
130 config GPIO_EXTRA_HEADER
133 # Used for compatibility with asm files copied from the kernel
134 config ARM_ASM_UNIFIED
138 # Used for compatibility with asm files copied from the kernel
142 config SYS_ICACHE_OFF
143 bool "Do not enable icache"
145 Do not enable instruction cache in U-Boot.
147 config SPL_SYS_ICACHE_OFF
148 bool "Do not enable icache in SPL"
150 default SYS_ICACHE_OFF
152 Do not enable instruction cache in SPL.
154 config SYS_DCACHE_OFF
155 bool "Do not enable dcache"
157 Do not enable data cache in U-Boot.
159 config SPL_SYS_DCACHE_OFF
160 bool "Do not enable dcache in SPL"
162 default SYS_DCACHE_OFF
164 Do not enable data cache in SPL.
166 config SYS_ARM_CACHE_CP15
167 bool "CP15 based cache enabling support"
169 Select this if your processor suports enabling caches by using
173 bool "MMU-based Paged Memory Management Support"
174 select SYS_ARM_CACHE_CP15
176 Select if you want MMU-based virtualised addressing space
177 support via paged memory management.
180 bool 'Use the ARM v7 PMSA Compliant MPU'
182 Some ARM systems without an MMU have instead a Memory Protection
183 Unit (MPU) that defines the type and permissions for regions of
185 If your CPU has an MPU then you should choose 'y' here unless you
186 know that you do not want to use the MPU.
188 # If set, the workarounds for these ARM errata are applied early during U-Boot
189 # startup. Note that in general these options force the workarounds to be
190 # applied; no CPU-type/version detection exists, unlike the similar options in
191 # the Linux kernel. Do not set these options unless they apply! Also note that
192 # the following can be machine-specific errata. These do have ability to
193 # provide rudimentary version and machine-specific checks, but expect no
195 # CONFIG_ARM_ERRATA_430973
196 # CONFIG_ARM_ERRATA_454179
197 # CONFIG_ARM_ERRATA_621766
198 # CONFIG_ARM_ERRATA_798870
199 # CONFIG_ARM_ERRATA_801819
200 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
201 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
203 config ARM_ERRATA_430973
206 config ARM_ERRATA_454179
209 config ARM_ERRATA_621766
212 config ARM_ERRATA_716044
215 config ARM_ERRATA_725233
218 config ARM_ERRATA_742230
221 config ARM_ERRATA_743622
224 config ARM_ERRATA_751472
227 config ARM_ERRATA_761320
230 config ARM_ERRATA_773022
233 config ARM_ERRATA_774769
236 config ARM_ERRATA_794072
239 config ARM_ERRATA_798870
242 config ARM_ERRATA_801819
245 config ARM_ERRATA_826974
248 config ARM_ERRATA_828024
251 config ARM_ERRATA_829520
254 config ARM_ERRATA_833069
257 config ARM_ERRATA_833471
260 config ARM_ERRATA_845369
263 config ARM_ERRATA_852421
266 config ARM_ERRATA_852423
269 config ARM_ERRATA_855873
272 config ARM_CORTEX_A8_CVE_2017_5715
275 config ARM_CORTEX_A15_CVE_2017_5715
280 select SYS_CACHE_SHIFT_5
285 select SYS_CACHE_SHIFT_5
290 select SYS_CACHE_SHIFT_5
292 imply SPL_SEPARATE_BSS
296 select SYS_CACHE_SHIFT_5
301 select SYS_CACHE_SHIFT_5
303 imply SPL_SEPARATE_BSS
308 select SYS_CACHE_SHIFT_5
315 select SYS_CACHE_SHIFT_6
322 select SYS_CACHE_SHIFT_5
323 select SYS_THUMB_BUILD
329 select SYS_ARM_CACHE_CP15
331 select SYS_CACHE_SHIFT_6
334 default "arm720t" if CPU_ARM720T
335 default "arm920t" if CPU_ARM920T
336 default "arm926ejs" if CPU_ARM926EJS
337 default "arm946es" if CPU_ARM946ES
338 default "arm1136" if CPU_ARM1136
339 default "arm1176" if CPU_ARM1176
340 default "armv7" if CPU_V7A
341 default "armv7" if CPU_V7R
342 default "armv7m" if CPU_V7M
343 default "armv8" if ARM64
347 default 4 if CPU_ARM720T
348 default 4 if CPU_ARM920T
349 default 5 if CPU_ARM926EJS
350 default 5 if CPU_ARM946ES
351 default 6 if CPU_ARM1136
352 default 6 if CPU_ARM1176
359 prompt "Select the ARM data write cache policy"
360 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || RZA1
361 default SYS_ARM_CACHE_WRITEBACK
363 config SYS_ARM_CACHE_WRITEBACK
364 bool "Write-back (WB)"
366 A write updates the cache only and marks the cache line as dirty.
367 External memory is updated only when the line is evicted or explicitly
370 config SYS_ARM_CACHE_WRITETHROUGH
371 bool "Write-through (WT)"
373 A write updates both the cache and the external memory system.
374 This does not mark the cache line as dirty.
376 config SYS_ARM_CACHE_WRITEALLOC
377 bool "Write allocation (WA)"
379 A cache line is allocated on a write miss. This means that executing a
380 store instruction on the processor might cause a burst read to occur.
381 There is a linefill to obtain the data for the cache line, before the
385 config ARCH_VERY_EARLY_INIT
388 config SPL_ARCH_VERY_EARLY_INIT
392 bool "Enable ARCH_CPU_INIT"
394 Some architectures require a call to arch_cpu_init().
395 Say Y here to enable it
397 config SYS_ARCH_TIMER
398 bool "ARM Generic Timer support"
399 depends on CPU_V7A || ARM64
402 The ARM Generic Timer (aka arch-timer) provides an architected
403 interface to a timer source on an SoC.
404 It is mandatory for ARMv8 implementation and widely available
408 bool "Support for ARM SMC Calling Convention (SMCCC)"
409 depends on CPU_V7A || ARM64
412 Say Y here if you want to enable ARM SMC Calling Convention.
413 This should be enabled if U-Boot needs to communicate with system
414 firmware (for example, PSCI) according to SMCCC.
417 bool "Support ARM semihosting"
419 Semihosting is a method for a target to communicate with a host
420 debugger. It uses special instructions which the debugger will trap
421 on and interpret. This allows U-Boot to read/write files, print to
422 the console, and execute arbitrary commands on the host system.
424 Enabling this option will add support for reading and writing files
425 on the host system. If you don't have a debugger attached then trying
426 to do this will likely cause U-Boot to hang. Say 'n' if you are unsure.
428 config SEMIHOSTING_FALLBACK
429 bool "Recover gracefully when semihosting fails"
430 depends on SEMIHOSTING && ARM64
433 Normally, if U-Boot makes a semihosting call and no debugger is
434 attached, then it will panic due to a synchronous abort
435 exception. This config adds an exception handler which will allow
436 U-Boot to recover. Say 'y' if unsure.
438 config SPL_SEMIHOSTING
439 bool "Support ARM semihosting in SPL"
442 Semihosting is a method for a target to communicate with a host
443 debugger. It uses special instructions which the debugger will trap
444 on and interpret. This allows U-Boot to read/write files, print to
445 the console, and execute arbitrary commands on the host system.
447 Enabling this option will add support for reading and writing files
448 on the host system. If you don't have a debugger attached then trying
449 to do this will likely cause U-Boot to hang. Say 'n' if you are unsure.
451 config SPL_SEMIHOSTING_FALLBACK
452 bool "Recover gracefully when semihosting fails in SPL"
453 depends on SPL_SEMIHOSTING && ARM64
454 select ARMV8_SPL_EXCEPTION_VECTORS
457 Normally, if U-Boot makes a semihosting call and no debugger is
458 attached, then it will panic due to a synchronous abort
459 exception. This config adds an exception handler which will allow
460 U-Boot to recover. Say 'y' if unsure.
462 config SYS_THUMB_BUILD
463 bool "Build U-Boot using the Thumb instruction set"
466 Use this flag to build U-Boot using the Thumb instruction set for
467 ARM architectures. Thumb instruction set provides better code
468 density. For ARM architectures that support Thumb2 this flag will
469 result in Thumb2 code generated by GCC.
471 config SPL_SYS_THUMB_BUILD
472 bool "Build SPL using the Thumb instruction set"
473 default y if SYS_THUMB_BUILD
474 depends on !ARM64 && SPL
476 Use this flag to build SPL using the Thumb instruction set for
477 ARM architectures. Thumb instruction set provides better code
478 density. For ARM architectures that support Thumb2 this flag will
479 result in Thumb2 code generated by GCC.
481 config TPL_SYS_THUMB_BUILD
482 bool "Build TPL using the Thumb instruction set"
483 default y if SYS_THUMB_BUILD
484 depends on TPL && !ARM64
486 Use this flag to build TPL using the Thumb instruction set for
487 ARM architectures. Thumb instruction set provides better code
488 density. For ARM architectures that support Thumb2 this flag will
489 result in Thumb2 code generated by GCC.
492 config SYS_L2CACHE_OFF
495 If SoC does not support L2CACHE or one does not want to enable
496 L2CACHE, choose this option.
498 config ENABLE_ARM_SOC_BOOT0_HOOK
499 bool "prepare BOOT0 header"
501 If the SoC's BOOT0 requires a header area filled with (magic)
502 values, then choose this option, and create a file included as
503 <asm/arch/boot0.h> which contains the required assembler code.
505 config USE_ARCH_MEMCPY
506 bool "Use an assembly optimized implementation of memcpy"
508 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
510 Enable the generation of an optimized version of memcpy.
511 Such an implementation may be faster under some conditions
512 but may increase the binary size.
514 config SPL_USE_ARCH_MEMCPY
515 bool "Use an assembly optimized implementation of memcpy for SPL"
516 default y if USE_ARCH_MEMCPY
519 Enable the generation of an optimized version of memcpy.
520 Such an implementation may be faster under some conditions
521 but may increase the binary size.
523 config TPL_USE_ARCH_MEMCPY
524 bool "Use an assembly optimized implementation of memcpy for TPL"
525 default y if USE_ARCH_MEMCPY
528 Enable the generation of an optimized version of memcpy.
529 Such an implementation may be faster under some conditions
530 but may increase the binary size.
532 config USE_ARCH_MEMMOVE
533 bool "Use an assembly optimized implementation of memmove" if !ARM64
534 default USE_ARCH_MEMCPY if ARM64
537 Enable the generation of an optimized version of memmove.
538 Such an implementation may be faster under some conditions
539 but may increase the binary size.
541 config SPL_USE_ARCH_MEMMOVE
542 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
543 default SPL_USE_ARCH_MEMCPY if ARM64
544 depends on SPL && ARM64
546 Enable the generation of an optimized version of memmove.
547 Such an implementation may be faster under some conditions
548 but may increase the binary size.
550 config TPL_USE_ARCH_MEMMOVE
551 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
552 default TPL_USE_ARCH_MEMCPY if ARM64
553 depends on TPL && ARM64
555 Enable the generation of an optimized version of memmove.
556 Such an implementation may be faster under some conditions
557 but may increase the binary size.
559 config USE_ARCH_MEMSET
560 bool "Use an assembly optimized implementation of memset"
562 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
564 Enable the generation of an optimized version of memset.
565 Such an implementation may be faster under some conditions
566 but may increase the binary size.
568 config SPL_USE_ARCH_MEMSET
569 bool "Use an assembly optimized implementation of memset for SPL"
570 default y if USE_ARCH_MEMSET
573 Enable the generation of an optimized version of memset.
574 Such an implementation may be faster under some conditions
575 but may increase the binary size.
577 config TPL_USE_ARCH_MEMSET
578 bool "Use an assembly optimized implementation of memset for TPL"
579 default y if USE_ARCH_MEMSET
582 Enable the generation of an optimized version of memset.
583 Such an implementation may be faster under some conditions
584 but may increase the binary size.
586 config ARM64_SUPPORT_AARCH32
587 bool "ARM64 system support AArch32 execution state"
589 default y if !TARGET_THUNDERX_88XX
591 This ARM64 system supports AArch32 execution state.
594 def_bool y if ARCH_EXYNOS || ARCH_S5PC1XX
597 prompt "Target select"
602 select GPIO_EXTRA_HEADER
603 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
604 select SPL_SEPARATE_BSS if SPL
609 select GPIO_EXTRA_HEADER
610 select SPL_DM_SPI if SPL
613 Support for TI's DaVinci platform.
616 bool "Marvell Kirkwood"
617 select ARCH_MISC_INIT
618 select BOARD_EARLY_INIT_F
620 select GPIO_EXTRA_HEADER
623 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
629 select GPIO_EXTRA_HEADER
630 select SPL_DM_SPI if SPL
631 select SPL_DM_SPI_FLASH if SPL
640 select GPIO_EXTRA_HEADER
641 select SPL_SEPARATE_BSS if SPL
643 config TARGET_STV0991
644 bool "Support stv0991"
650 select GPIO_EXTRA_HEADER
657 bool "Broadcom BCM283X family"
661 select GPIO_EXTRA_HEADER
664 select SERIAL_SEARCH_ALL
669 bool "Broadcom BCM63158 family"
675 bool "Broadcom BCM6753 family"
682 bool "Broadcom BCM68360 family"
688 bool "Broadcom BCM6858 family"
694 bool "Broadcom BCM7XXX family"
697 select GPIO_EXTRA_HEADER
700 imply OF_HAS_PRIOR_STAGE
702 This enables support for Broadcom ARM-based set-top box
703 chipsets, including the 7445 family of chips.
706 bool "Broadcom broadband chip family"
710 config TARGET_VEXPRESS_CA9X4
711 bool "Support vexpress_ca9x4"
715 config TARGET_BCMCYGNUS
716 bool "Support bcmcygnus"
718 select GPIO_EXTRA_HEADER
720 imply BCM_SF2_ETH_GMAC
728 bool "Support Broadcom Northstar2"
730 select GPIO_EXTRA_HEADER
732 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
733 ARMv8 Cortex-A57 processors targeting a broad range of networking
737 bool "Support Broadcom NS3"
739 select BOARD_LATE_INIT
741 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
742 ARMv8 Cortex-A72 processors targeting a broad range of networking
746 bool "Samsung EXYNOS"
756 select GPIO_EXTRA_HEADER
757 imply SYS_THUMB_BUILD
762 bool "Samsung S5PC1XX"
768 select GPIO_EXTRA_HEADER
772 bool "Calxeda Highbank"
783 imply OF_HAS_PRIOR_STAGE
785 config ARCH_INTEGRATOR
786 bool "ARM Ltd. Integrator family"
789 select GPIO_EXTRA_HEADER
794 bool "Qualcomm IPQ40xx SoCs"
800 select GPIO_EXTRA_HEADER
813 select GPIO_EXTRA_HEADER
815 select SYS_ARCH_TIMER
816 select SYS_THUMB_BUILD
822 bool "Texas Instruments' K3 Architecture"
827 config ARCH_OMAP2PLUS
830 select GPIO_EXTRA_HEADER
831 select SPL_BOARD_INIT if SPL
832 select SPL_STACK_R if SPL
834 imply TI_SYSC if DM && OF_CONTROL
837 imply SPL_SEPARATE_BSS
841 select GPIO_EXTRA_HEADER
842 imply DISTRO_DEFAULTS
845 Support for the Meson SoC family developed by Amlogic Inc.,
846 targeted at media players and tablet computers. We currently
847 support the S905 (GXBaby) 64-bit SoC.
852 select GPIO_EXTRA_HEADER
855 select SPL_LIBCOMMON_SUPPORT if SPL
856 select SPL_LIBGENERIC_SUPPORT if SPL
857 select SPL_OF_CONTROL if SPL
860 Support for the MediaTek SoCs family developed by MediaTek Inc.
861 Please refer to doc/README.mediatek for more information.
864 bool "NXP LPC32xx platform"
869 select GPIO_EXTRA_HEADER
875 bool "NXP i.MX8 platform"
877 select SYS_FSL_HAS_SEC
878 select SYS_FSL_SEC_COMPAT_4
879 select SYS_FSL_SEC_LE
881 select GPIO_EXTRA_HEADER
884 select ENABLE_ARM_SOC_BOOT0_HOOK
888 bool "NXP i.MX8M platform"
890 select GPIO_EXTRA_HEADER
892 select SYS_FSL_HAS_SEC
893 select SYS_FSL_SEC_COMPAT_4
894 select SYS_FSL_SEC_LE
902 bool "NXP i.MX8ULP platform"
908 select GPIO_EXTRA_HEADER
913 bool "NXP i.MXRT platform"
917 select GPIO_EXTRA_HEADER
923 bool "NXP i.MX23 family"
925 select GPIO_EXTRA_HEADER
931 bool "NXP i.MX28 family"
933 select GPIO_EXTRA_HEADER
939 bool "NXP i.MX31 family"
941 select GPIO_EXTRA_HEADER
946 select BOARD_POSTCLK_INIT
948 select GPIO_EXTRA_HEADER
950 select SYS_FSL_HAS_SEC
951 select SYS_FSL_SEC_COMPAT_4
952 select SYS_FSL_SEC_LE
953 select ROM_UNIFIED_SECTIONS
955 imply SYS_THUMB_BUILD
959 select ARCH_MISC_INIT
961 select GPIO_EXTRA_HEADER
963 select SYS_FSL_HAS_SEC
964 select SYS_FSL_SEC_COMPAT_4
965 select SYS_FSL_SEC_LE
966 imply BOARD_EARLY_INIT_F
968 imply SYS_THUMB_BUILD
972 select BOARD_POSTCLK_INIT
974 select GPIO_EXTRA_HEADER
976 select SYS_FSL_HAS_SEC
977 select SYS_FSL_SEC_COMPAT_4
978 select SYS_FSL_SEC_LE
980 imply SYS_THUMB_BUILD
981 imply SPL_SEPARATE_BSS
985 select BOARD_EARLY_INIT_F
987 select GPIO_EXTRA_HEADER
992 bool "Nexell S5P4418/S5P6818 SoC"
993 select ENABLE_ARM_SOC_BOOT0_HOOK
995 select GPIO_EXTRA_HEADER
998 bool "Support Nuvoton SoCs"
1019 select LINUX_KERNEL_IMAGE_HEADER
1020 select OF_BOARD_SETUP
1023 select POSITION_INDEPENDENT
1029 select SYSRESET_WATCHDOG
1030 select SYSRESET_WATCHDOG_AUTO
1034 imply DISTRO_DEFAULTS
1035 imply OF_HAS_PRIOR_STAGE
1038 bool "Actions Semi OWL SoCs"
1042 select GPIO_EXTRA_HEADER
1047 select SYS_RELOC_GD_ENV_ADDR
1051 bool "QEMU Virtual Platform"
1060 imply OF_HAS_PRIOR_STAGE
1063 bool "Renesas ARM SoCs"
1066 select GPIO_EXTRA_HEADER
1067 imply BOARD_EARLY_INIT_F
1070 imply SYS_THUMB_BUILD
1071 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
1073 config ARCH_SNAPDRAGON
1074 bool "Qualcomm Snapdragon SoCs"
1079 select GPIO_EXTRA_HEADER
1088 bool "Altera SOCFPGA family"
1089 select ARCH_EARLY_INIT_R
1090 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
1091 select ARM64 if TARGET_SOCFPGA_SOC64
1092 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1096 select GPIO_EXTRA_HEADER
1097 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1099 select SPL_DM_RESET if DM_RESET
1100 select SPL_DM_SERIAL
1101 select SPL_LIBCOMMON_SUPPORT
1102 select SPL_LIBGENERIC_SUPPORT
1103 select SPL_OF_CONTROL
1104 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1110 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1112 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1113 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1123 imply SPL_DM_SPI_FLASH
1124 imply SPL_LIBDISK_SUPPORT
1126 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1127 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1128 imply SPL_SPI_FLASH_SUPPORT
1133 bool "Support sunxi (Allwinner) SoCs"
1136 select CMD_MMC if MMC
1137 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1142 select DM_I2C if I2C
1143 select DM_SPI if SPI
1144 select DM_SPI_FLASH if SPI
1146 select DM_MMC if MMC
1147 select DM_SCSI if SCSI
1149 select GPIO_EXTRA_HEADER
1150 select OF_BOARD_SETUP
1154 select SPECIFY_CONSOLE_INDEX
1155 select SPL_SEPARATE_BSS if SPL
1156 select SPL_STACK_R if SPL
1157 select SPL_SYS_MALLOC_SIMPLE if SPL
1158 select SPL_SYS_THUMB_BUILD if !ARM64
1161 select SYS_THUMB_BUILD if !ARM64
1162 select USB if DISTRO_DEFAULTS
1163 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1164 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1165 select SPL_USE_TINY_PRINTF
1167 select SYS_RELOC_GD_ENV_ADDR
1168 imply BOARD_LATE_INIT
1171 imply CMD_UBI if MTD_RAW_NAND
1172 imply DISTRO_DEFAULTS
1175 imply OF_LIBFDT_OVERLAY
1176 imply PRE_CONSOLE_BUFFER
1178 imply SPL_LIBCOMMON_SUPPORT
1179 imply SPL_LIBGENERIC_SUPPORT
1180 imply SPL_MMC if MMC
1184 imply SYSRESET_WATCHDOG
1185 imply SYSRESET_WATCHDOG_AUTO
1190 bool "ST-Ericsson U8500 Series"
1194 select DM_MMC if MMC
1196 select DM_USB_GADGET if DM_USB
1200 imply AB8500_USB_PHY
1201 imply ARM_PL180_MMCI
1206 imply NOMADIK_MTU_TIMER
1211 imply SYS_THUMB_BUILD
1212 imply SYSRESET_SYSCON
1215 bool "Support Xilinx Versal Platform"
1219 select DM_ETH if NET
1220 select DM_MMC if MMC
1225 imply BOARD_LATE_INIT
1226 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1229 bool "Freescale Vybrid"
1231 select GPIO_EXTRA_HEADER
1233 select SYS_FSL_ERRATUM_ESDHC111
1238 bool "Xilinx Zynq based platform"
1242 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1244 select DM_ETH if NET
1245 select DM_MMC if MMC
1251 select SPL_BOARD_INIT if SPL
1252 select SPL_CLK if SPL
1253 select SPL_DM if SPL
1254 select SPL_DM_SPI if SPL
1255 select SPL_DM_SPI_FLASH if SPL
1256 select SPL_OF_CONTROL if SPL
1257 select SPL_SEPARATE_BSS if SPL
1259 imply ARCH_EARLY_INIT_R
1260 imply BOARD_LATE_INIT
1264 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1267 config ARCH_ZYNQMP_R5
1268 bool "Xilinx ZynqMP R5 based platform"
1272 select DM_ETH if NET
1273 select DM_MMC if MMC
1280 bool "Xilinx ZynqMP based platform"
1284 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1285 select DM_ETH if NET
1287 select DM_MMC if MMC
1289 select DM_SPI if SPI
1290 select DM_SPI_FLASH if DM_SPI
1294 select SPL_BOARD_INIT if SPL
1295 select SPL_CLK if SPL
1296 select SPL_DM if SPL
1297 select SPL_DM_SPI if SPI && SPL_DM
1298 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1299 select SPL_DM_MAILBOX if SPL
1300 imply SPL_FIRMWARE if SPL
1301 select SPL_SEPARATE_BSS if SPL
1305 imply BOARD_LATE_INIT
1307 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1311 imply ZYNQMP_GPIO_MODEPIN if DM_GPIO && USB
1315 select GPIO_EXTRA_HEADER
1316 imply DISTRO_DEFAULTS
1319 config ARCH_VEXPRESS64
1320 bool "Support ARMv8 Arm Ltd. VExpress based boards and models"
1328 select MTD_NOR_FLASH if MTD
1329 select FLASH_CFI_DRIVER if MTD
1330 select ENV_IS_IN_FLASH if MTD
1331 imply DISTRO_DEFAULTS
1333 config TARGET_CORSTONE1000
1334 bool "Support Corstone1000 Platform"
1339 config TARGET_TOTAL_COMPUTE
1340 bool "Support Total Compute Platform"
1348 config TARGET_LS2080A_EMU
1349 bool "Support ls2080a_emu"
1352 select ARMV8_MULTIENTRY
1353 select FSL_DDR_SYNC_REFRESH
1354 select GPIO_EXTRA_HEADER
1356 Support for Freescale LS2080A_EMU platform.
1357 The LS2080A Development System (EMULATOR) is a pre-silicon
1358 development platform that supports the QorIQ LS2080A
1359 Layerscape Architecture processor.
1361 config TARGET_LS1088AQDS
1362 bool "Support ls1088aqds"
1365 select ARMV8_MULTIENTRY
1366 select ARCH_SUPPORT_TFABOOT
1367 select BOARD_LATE_INIT
1368 select GPIO_EXTRA_HEADER
1370 select FSL_DDR_INTERACTIVE if !SD_BOOT
1372 Support for NXP LS1088AQDS platform.
1373 The LS1088A Development System (QDS) is a high-performance
1374 development platform that supports the QorIQ LS1088A
1375 Layerscape Architecture processor.
1377 config TARGET_LS2080AQDS
1378 bool "Support ls2080aqds"
1381 select ARMV8_MULTIENTRY
1382 select ARCH_SUPPORT_TFABOOT
1383 select BOARD_LATE_INIT
1384 select GPIO_EXTRA_HEADER
1389 select FSL_DDR_INTERACTIVE if !SPL
1391 Support for Freescale LS2080AQDS platform.
1392 The LS2080A Development System (QDS) is a high-performance
1393 development platform that supports the QorIQ LS2080A
1394 Layerscape Architecture processor.
1396 config TARGET_LS2080ARDB
1397 bool "Support ls2080ardb"
1400 select ARMV8_MULTIENTRY
1401 select ARCH_SUPPORT_TFABOOT
1402 select BOARD_LATE_INIT
1405 select FSL_DDR_INTERACTIVE if !SPL
1406 select GPIO_EXTRA_HEADER
1410 Support for Freescale LS2080ARDB platform.
1411 The LS2080A Reference design board (RDB) is a high-performance
1412 development platform that supports the QorIQ LS2080A
1413 Layerscape Architecture processor.
1415 config TARGET_LS2081ARDB
1416 bool "Support ls2081ardb"
1419 select ARMV8_MULTIENTRY
1420 select BOARD_LATE_INIT
1421 select GPIO_EXTRA_HEADER
1424 Support for Freescale LS2081ARDB platform.
1425 The LS2081A Reference design board (RDB) is a high-performance
1426 development platform that supports the QorIQ LS2081A/LS2041A
1427 Layerscape Architecture processor.
1429 config TARGET_LX2160ARDB
1430 bool "Support lx2160ardb"
1433 select ARMV8_MULTIENTRY
1434 select ARCH_SUPPORT_TFABOOT
1435 select BOARD_LATE_INIT
1436 select GPIO_EXTRA_HEADER
1438 Support for NXP LX2160ARDB platform.
1439 The lx2160ardb (LX2160A Reference design board (RDB)
1440 is a high-performance development platform that supports the
1441 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1443 config TARGET_LX2160AQDS
1444 bool "Support lx2160aqds"
1447 select ARMV8_MULTIENTRY
1448 select ARCH_SUPPORT_TFABOOT
1449 select BOARD_LATE_INIT
1450 select GPIO_EXTRA_HEADER
1452 Support for NXP LX2160AQDS platform.
1453 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1454 is a high-performance development platform that supports the
1455 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1457 config TARGET_LX2162AQDS
1458 bool "Support lx2162aqds"
1460 select ARCH_MISC_INIT
1462 select ARMV8_MULTIENTRY
1463 select ARCH_SUPPORT_TFABOOT
1464 select BOARD_LATE_INIT
1465 select GPIO_EXTRA_HEADER
1467 Support for NXP LX2162AQDS platform.
1468 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1471 bool "Support HiKey 96boards Consumer Edition Platform"
1476 select GPIO_EXTRA_HEADER
1479 select SPECIFY_CONSOLE_INDEX
1482 Support for HiKey 96boards platform. It features a HI6220
1483 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1485 config TARGET_HIKEY960
1486 bool "Support HiKey960 96boards Consumer Edition Platform"
1490 select GPIO_EXTRA_HEADER
1495 Support for HiKey960 96boards platform. It features a HI3660
1496 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1498 config TARGET_POPLAR
1499 bool "Support Poplar 96boards Enterprise Edition Platform"
1503 select GPIO_EXTRA_HEADER
1508 Support for Poplar 96boards EE platform. It features a HI3798cv200
1509 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1510 making it capable of running any commercial set-top solution based on
1513 config TARGET_LS1012AQDS
1514 bool "Support ls1012aqds"
1517 select ARCH_SUPPORT_TFABOOT
1518 select BOARD_LATE_INIT
1519 select GPIO_EXTRA_HEADER
1521 Support for Freescale LS1012AQDS platform.
1522 The LS1012A Development System (QDS) is a high-performance
1523 development platform that supports the QorIQ LS1012A
1524 Layerscape Architecture processor.
1526 config TARGET_LS1012ARDB
1527 bool "Support ls1012ardb"
1530 select ARCH_SUPPORT_TFABOOT
1531 select BOARD_LATE_INIT
1532 select GPIO_EXTRA_HEADER
1536 Support for Freescale LS1012ARDB platform.
1537 The LS1012A Reference design board (RDB) is a high-performance
1538 development platform that supports the QorIQ LS1012A
1539 Layerscape Architecture processor.
1541 config TARGET_LS1012A2G5RDB
1542 bool "Support ls1012a2g5rdb"
1545 select ARCH_SUPPORT_TFABOOT
1546 select BOARD_LATE_INIT
1547 select GPIO_EXTRA_HEADER
1550 Support for Freescale LS1012A2G5RDB platform.
1551 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1552 development platform that supports the QorIQ LS1012A
1553 Layerscape Architecture processor.
1555 config TARGET_LS1012AFRWY
1556 bool "Support ls1012afrwy"
1559 select ARCH_SUPPORT_TFABOOT
1560 select BOARD_LATE_INIT
1561 select GPIO_EXTRA_HEADER
1565 Support for Freescale LS1012AFRWY platform.
1566 The LS1012A FRWY board (FRWY) is a high-performance
1567 development platform that supports the QorIQ LS1012A
1568 Layerscape Architecture processor.
1570 config TARGET_LS1012AFRDM
1571 bool "Support ls1012afrdm"
1574 select ARCH_SUPPORT_TFABOOT
1575 select GPIO_EXTRA_HEADER
1577 Support for Freescale LS1012AFRDM platform.
1578 The LS1012A Freedom board (FRDM) is a high-performance
1579 development platform that supports the QorIQ LS1012A
1580 Layerscape Architecture processor.
1582 config TARGET_LS1028AQDS
1583 bool "Support ls1028aqds"
1586 select ARMV8_MULTIENTRY
1587 select ARCH_SUPPORT_TFABOOT
1588 select BOARD_LATE_INIT
1589 select GPIO_EXTRA_HEADER
1591 Support for Freescale LS1028AQDS platform
1592 The LS1028A Development System (QDS) is a high-performance
1593 development platform that supports the QorIQ LS1028A
1594 Layerscape Architecture processor.
1596 config TARGET_LS1028ARDB
1597 bool "Support ls1028ardb"
1600 select ARMV8_MULTIENTRY
1601 select ARCH_SUPPORT_TFABOOT
1602 select BOARD_LATE_INIT
1603 select GPIO_EXTRA_HEADER
1605 Support for Freescale LS1028ARDB platform
1606 The LS1028A Development System (RDB) is a high-performance
1607 development platform that supports the QorIQ LS1028A
1608 Layerscape Architecture processor.
1610 config TARGET_LS1088ARDB
1611 bool "Support ls1088ardb"
1614 select ARMV8_MULTIENTRY
1615 select ARCH_SUPPORT_TFABOOT
1616 select BOARD_LATE_INIT
1618 select FSL_DDR_INTERACTIVE if !SD_BOOT
1619 select GPIO_EXTRA_HEADER
1621 Support for NXP LS1088ARDB platform.
1622 The LS1088A Reference design board (RDB) is a high-performance
1623 development platform that supports the QorIQ LS1088A
1624 Layerscape Architecture processor.
1626 config TARGET_LS1021AQDS
1627 bool "Support ls1021aqds"
1629 select ARCH_SUPPORT_PSCI
1630 select BOARD_EARLY_INIT_F
1631 select BOARD_LATE_INIT
1633 select CPU_V7_HAS_NONSEC
1634 select CPU_V7_HAS_VIRT
1635 select LS1_DEEP_SLEEP
1638 select FSL_DDR_INTERACTIVE
1639 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1640 select GPIO_EXTRA_HEADER
1641 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1644 config TARGET_LS1021ATWR
1645 bool "Support ls1021atwr"
1647 select ARCH_SUPPORT_PSCI
1648 select BOARD_EARLY_INIT_F
1649 select BOARD_LATE_INIT
1651 select CPU_V7_HAS_NONSEC
1652 select CPU_V7_HAS_VIRT
1653 select LS1_DEEP_SLEEP
1655 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1656 select GPIO_EXTRA_HEADER
1659 config TARGET_PG_WCOM_SELI8
1660 bool "Support Hitachi-Powergrids SELI8 service unit card"
1662 select ARCH_SUPPORT_PSCI
1663 select BOARD_EARLY_INIT_F
1664 select BOARD_LATE_INIT
1666 select CPU_V7_HAS_NONSEC
1667 select CPU_V7_HAS_VIRT
1669 select FSL_DDR_INTERACTIVE
1670 select GPIO_EXTRA_HEADER
1674 Support for Hitachi-Powergrids SELI8 service unit card.
1675 SELI8 is a QorIQ LS1021a based service unit card used
1676 in XMC20 and FOX615 product families.
1678 config TARGET_PG_WCOM_EXPU1
1679 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1681 select ARCH_SUPPORT_PSCI
1682 select BOARD_EARLY_INIT_F
1683 select BOARD_LATE_INIT
1685 select CPU_V7_HAS_NONSEC
1686 select CPU_V7_HAS_VIRT
1688 select FSL_DDR_INTERACTIVE
1692 Support for Hitachi-Powergrids EXPU1 service unit card.
1693 EXPU1 is a QorIQ LS1021a based service unit card used
1694 in XMC20 and FOX615 product families.
1696 config TARGET_LS1021ATSN
1697 bool "Support ls1021atsn"
1699 select ARCH_SUPPORT_PSCI
1700 select BOARD_EARLY_INIT_F
1701 select BOARD_LATE_INIT
1703 select CPU_V7_HAS_NONSEC
1704 select CPU_V7_HAS_VIRT
1705 select LS1_DEEP_SLEEP
1707 select GPIO_EXTRA_HEADER
1710 config TARGET_LS1021AIOT
1711 bool "Support ls1021aiot"
1713 select ARCH_SUPPORT_PSCI
1714 select BOARD_LATE_INIT
1716 select CPU_V7_HAS_NONSEC
1717 select CPU_V7_HAS_VIRT
1719 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1720 select GPIO_EXTRA_HEADER
1723 Support for Freescale LS1021AIOT platform.
1724 The LS1021A Freescale board (IOT) is a high-performance
1725 development platform that supports the QorIQ LS1021A
1726 Layerscape Architecture processor.
1728 config TARGET_LS1043AQDS
1729 bool "Support ls1043aqds"
1732 select ARMV8_MULTIENTRY
1733 select ARCH_SUPPORT_TFABOOT
1734 select BOARD_EARLY_INIT_F
1735 select BOARD_LATE_INIT
1737 select FSL_DDR_INTERACTIVE if !SPL
1738 select FSL_DSPI if !SPL_NO_DSPI
1739 select DM_SPI_FLASH if FSL_DSPI
1740 select GPIO_EXTRA_HEADER
1744 Support for Freescale LS1043AQDS platform.
1746 config TARGET_LS1043ARDB
1747 bool "Support ls1043ardb"
1750 select ARMV8_MULTIENTRY
1751 select ARCH_SUPPORT_TFABOOT
1752 select BOARD_EARLY_INIT_F
1753 select BOARD_LATE_INIT
1755 select FSL_DSPI if !SPL_NO_DSPI
1756 select DM_SPI_FLASH if FSL_DSPI
1757 select GPIO_EXTRA_HEADER
1759 Support for Freescale LS1043ARDB platform.
1761 config TARGET_LS1046AQDS
1762 bool "Support ls1046aqds"
1765 select ARMV8_MULTIENTRY
1766 select ARCH_SUPPORT_TFABOOT
1767 select BOARD_EARLY_INIT_F
1768 select BOARD_LATE_INIT
1769 select DM_SPI_FLASH if DM_SPI
1771 select FSL_DDR_BIST if !SPL
1772 select FSL_DDR_INTERACTIVE if !SPL
1773 select FSL_DDR_INTERACTIVE if !SPL
1774 select GPIO_EXTRA_HEADER
1777 Support for Freescale LS1046AQDS platform.
1778 The LS1046A Development System (QDS) is a high-performance
1779 development platform that supports the QorIQ LS1046A
1780 Layerscape Architecture processor.
1782 config TARGET_LS1046ARDB
1783 bool "Support ls1046ardb"
1786 select ARMV8_MULTIENTRY
1787 select ARCH_SUPPORT_TFABOOT
1788 select BOARD_EARLY_INIT_F
1789 select BOARD_LATE_INIT
1790 select DM_SPI_FLASH if DM_SPI
1791 select POWER_MC34VR500
1794 select FSL_DDR_INTERACTIVE if !SPL
1795 select GPIO_EXTRA_HEADER
1798 Support for Freescale LS1046ARDB platform.
1799 The LS1046A Reference Design Board (RDB) is a high-performance
1800 development platform that supports the QorIQ LS1046A
1801 Layerscape Architecture processor.
1803 config TARGET_LS1046AFRWY
1804 bool "Support ls1046afrwy"
1807 select ARMV8_MULTIENTRY
1808 select ARCH_SUPPORT_TFABOOT
1809 select BOARD_EARLY_INIT_F
1810 select BOARD_LATE_INIT
1811 select DM_SPI_FLASH if DM_SPI
1812 select GPIO_EXTRA_HEADER
1815 Support for Freescale LS1046AFRWY platform.
1816 The LS1046A Freeway Board (FRWY) is a high-performance
1817 development platform that supports the QorIQ LS1046A
1818 Layerscape Architecture processor.
1824 select ARMV8_MULTIENTRY
1840 select GPIO_EXTRA_HEADER
1841 select SPL_DM if SPL
1842 select SPL_DM_SPI if SPL
1843 select SPL_DM_SPI_FLASH if SPL
1844 select SPL_DM_I2C if SPL
1845 select SPL_DM_MMC if SPL
1846 select SPL_DM_SERIAL if SPL
1848 Support for Kontron SMARC-sAL28 board.
1851 bool "Support ten64"
1853 select ARCH_MISC_INIT
1855 select ARMV8_MULTIENTRY
1856 select ARCH_SUPPORT_TFABOOT
1857 select BOARD_LATE_INIT
1859 select FSL_DDR_INTERACTIVE if !SD_BOOT
1860 select GPIO_EXTRA_HEADER
1862 Support for Traverse Technologies Ten64 board, based
1865 config ARCH_UNIPHIER
1866 bool "Socionext UniPhier SoCs"
1867 select BOARD_LATE_INIT
1876 select OF_BOARD_SETUP
1880 select SPL_BOARD_INIT if SPL
1881 select SPL_DM if SPL
1882 select SPL_LIBCOMMON_SUPPORT if SPL
1883 select SPL_LIBGENERIC_SUPPORT if SPL
1884 select SPL_OF_CONTROL if SPL
1885 select SPL_PINCTRL if SPL
1888 imply DISTRO_DEFAULTS
1891 Support for UniPhier SoC family developed by Socionext Inc.
1892 (formerly, System LSI Business Division of Panasonic Corporation)
1894 config ARCH_SYNQUACER
1895 bool "Socionext SynQuacer SoCs"
1901 select SYSRESET_PSCI
1904 Support for SynQuacer SoC family developed by Socionext Inc.
1905 This SoC is used on 96boards EE DeveloperBox.
1908 bool "Support STMicroelectronics STM32 MCU with cortex M"
1915 bool "Support STMicroelectronics SoCs"
1924 Support for STMicroelectronics STiH407/10 SoC family.
1925 This SoC is used on Linaro 96Board STiH410-B2260
1928 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1929 select ARCH_MISC_INIT
1930 select ARCH_SUPPORT_TFABOOT
1931 select BOARD_LATE_INIT
1940 select OF_SYSTEM_SETUP
1945 select SYS_THUMB_BUILD
1949 imply OF_LIBFDT_OVERLAY
1950 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1954 Support for STM32MP SoC family developed by STMicroelectronics,
1955 MPUs based on ARM cortex A core
1956 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1957 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1959 SPL is the unsecure FSBL for the basic boot chain.
1961 config ARCH_ROCKCHIP
1962 bool "Support Rockchip SoCs"
1964 select BINMAN if SPL_OPTEE || (SPL && !ARM64)
1974 select ENABLE_ARM_SOC_BOOT0_HOOK
1977 select SPL_DM if SPL
1978 select SPL_DM_SPI if SPL
1979 select SPL_DM_SPI_FLASH if SPL
1981 select SYS_THUMB_BUILD if !ARM64
1984 imply DEBUG_UART_BOARD_INIT
1985 imply DISTRO_DEFAULTS
1987 imply SARADC_ROCKCHIP
1989 imply SPL_SYS_MALLOC_SIMPLE
1992 imply USB_FUNCTION_FASTBOOT
1994 config ARCH_OCTEONTX
1995 bool "Support OcteonTX SoCs"
1998 select GPIO_EXTRA_HEADER
2002 select BOARD_LATE_INIT
2003 select SYS_CACHE_SHIFT_7
2004 select SYS_PCI_64BIT if PCI
2005 imply OF_HAS_PRIOR_STAGE
2007 config ARCH_OCTEONTX2
2008 bool "Support OcteonTX2 SoCs"
2011 select GPIO_EXTRA_HEADER
2015 select BOARD_LATE_INIT
2016 select SYS_CACHE_SHIFT_7
2017 select SYS_PCI_64BIT if PCI
2018 imply OF_HAS_PRIOR_STAGE
2020 config TARGET_THUNDERX_88XX
2021 bool "Support ThunderX 88xx"
2023 select GPIO_EXTRA_HEADER
2026 select SYS_CACHE_SHIFT_7
2029 bool "Support Aspeed SoCs"
2034 config TARGET_DURIAN
2035 bool "Support Phytium Durian Platform"
2037 select GPIO_EXTRA_HEADER
2039 Support for durian platform.
2040 It has 2GB Sdram, uart and pcie.
2042 config TARGET_POMELO
2043 bool "Support Phytium Pomelo Platform"
2055 select DM_ETH if NET
2058 Support for pomelo platform.
2059 It has 8GB Sdram, uart and pcie.
2061 config TARGET_PRESIDIO_ASIC
2062 bool "Support Cortina Presidio ASIC Platform"
2066 config TARGET_XENGUEST_ARM64
2067 bool "Xen guest ARM64"
2071 select LINUX_KERNEL_IMAGE_HEADER
2074 imply OF_HAS_PRIOR_STAGE
2077 bool "Support HPE GXP SoCs"
2084 config SUPPORT_PASSING_ATAGS
2085 bool "Support pre-devicetree ATAG-based booting"
2087 imply SETUP_MEMORY_TAGS
2089 Support for booting older Linux kernels, using ATAGs rather than
2090 passing a devicetree. This is option is rarely used, and the
2091 semantics are defined at
2092 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
2094 config SETUP_MEMORY_TAGS
2095 bool "Pass memory size information via ATAG"
2096 depends on SUPPORT_PASSING_ATAGS
2099 bool "Pass Linux kernel cmdline via ATAG"
2100 depends on SUPPORT_PASSING_ATAGS
2103 bool "Pass initrd starting point and size via ATAG"
2104 depends on SUPPORT_PASSING_ATAGS
2107 bool "Pass system revision via ATAG"
2108 depends on SUPPORT_PASSING_ATAGS
2111 bool "Pass system serial number via ATAG"
2112 depends on SUPPORT_PASSING_ATAGS
2114 config STATIC_MACH_TYPE
2115 bool "Statically define the Machine ID number"
2117 When booting via ATAGs, enable this option if we know the correct
2118 machine ID number to use at compile time. Some systems will be
2119 passed the number dynamically by whatever loads U-Boot.
2122 int "Machine ID number"
2123 depends on STATIC_MACH_TYPE
2125 When booting via ATAGs, the machine type must be passed as a number.
2126 For the full list see https://www.arm.linux.org.uk/developer/machines
2128 config ARCH_SUPPORT_TFABOOT
2132 bool "Support for booting from TF-A"
2133 depends on ARCH_SUPPORT_TFABOOT
2135 Some platforms support the setup of secure registers (for instance
2136 for CPU errata handling) or provide secure services like PSCI.
2137 Those services could also be provided by other firmware parts
2138 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
2139 does not need to (and cannot) execute this code.
2140 Enabling this option will make a U-Boot binary that is relying
2141 on other firmware layers to provide secure functionality.
2143 config TI_SECURE_DEVICE
2144 bool "HS Device Type Support"
2145 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2147 If a high secure (HS) device type is being used, this config
2148 must be set. This option impacts various aspects of the
2149 build system (to create signed boot images that can be
2150 authenticated) and the code. See the doc/README.ti-secure
2151 file for further details.
2153 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
2154 config ISW_ENTRY_ADDR
2155 hex "Address in memory or XIP address of bootloader entry point"
2156 default 0x402F4000 if AM43XX
2157 default 0x402F0400 if AM33XX
2158 default 0x40301350 if OMAP54XX
2160 After any reset, the boot ROM searches the boot media for a valid
2161 boot image. For non-XIP devices, the ROM then copies the image into
2162 internal memory. For all boot modes, after the ROM processes the
2163 boot image it eventually computes the entry point address depending
2164 on the device type (secure/non-secure), boot media (xip/non-xip) and
2168 config SYS_KWD_CONFIG
2169 string "kwbimage config file path"
2170 depends on ARCH_KIRKWOOD || ARCH_MVEBU
2171 default "arch/arm/mach-mvebu/kwbimage.cfg"
2173 Path within the source directory to the kwbimage.cfg file to use
2174 when packaging the U-Boot image for use.
2176 source "arch/arm/mach-apple/Kconfig"
2178 source "arch/arm/mach-aspeed/Kconfig"
2180 source "arch/arm/mach-at91/Kconfig"
2182 source "arch/arm/mach-bcm283x/Kconfig"
2184 source "arch/arm/mach-bcmbca/Kconfig"
2186 source "arch/arm/mach-bcmstb/Kconfig"
2188 source "arch/arm/mach-davinci/Kconfig"
2190 source "arch/arm/mach-exynos/Kconfig"
2192 source "arch/arm/mach-hpe/gxp/Kconfig"
2194 source "arch/arm/mach-highbank/Kconfig"
2196 source "arch/arm/mach-integrator/Kconfig"
2198 source "arch/arm/mach-ipq40xx/Kconfig"
2200 source "arch/arm/mach-k3/Kconfig"
2202 source "arch/arm/mach-keystone/Kconfig"
2204 source "arch/arm/mach-kirkwood/Kconfig"
2206 source "arch/arm/mach-lpc32xx/Kconfig"
2208 source "arch/arm/mach-mvebu/Kconfig"
2210 source "arch/arm/mach-octeontx/Kconfig"
2212 source "arch/arm/mach-octeontx2/Kconfig"
2214 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2216 source "arch/arm/mach-imx/mx3/Kconfig"
2218 source "arch/arm/mach-imx/mx5/Kconfig"
2220 source "arch/arm/mach-imx/mx6/Kconfig"
2222 source "arch/arm/mach-imx/mx7/Kconfig"
2224 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2226 source "arch/arm/mach-imx/imx8/Kconfig"
2228 source "arch/arm/mach-imx/imx8m/Kconfig"
2230 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2232 source "arch/arm/mach-imx/imxrt/Kconfig"
2234 source "arch/arm/mach-imx/mxs/Kconfig"
2236 source "arch/arm/mach-omap2/Kconfig"
2238 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2240 source "arch/arm/mach-orion5x/Kconfig"
2242 source "arch/arm/mach-owl/Kconfig"
2244 source "arch/arm/mach-rmobile/Kconfig"
2246 source "arch/arm/mach-meson/Kconfig"
2248 source "arch/arm/mach-mediatek/Kconfig"
2250 source "arch/arm/mach-qemu/Kconfig"
2252 source "arch/arm/mach-rockchip/Kconfig"
2254 source "arch/arm/mach-s5pc1xx/Kconfig"
2256 source "arch/arm/mach-snapdragon/Kconfig"
2258 source "arch/arm/mach-socfpga/Kconfig"
2260 source "arch/arm/mach-sti/Kconfig"
2262 source "arch/arm/mach-stm32/Kconfig"
2264 source "arch/arm/mach-stm32mp/Kconfig"
2266 source "arch/arm/mach-sunxi/Kconfig"
2268 source "arch/arm/mach-tegra/Kconfig"
2270 source "arch/arm/mach-u8500/Kconfig"
2272 source "arch/arm/mach-uniphier/Kconfig"
2274 source "arch/arm/cpu/armv7/vf610/Kconfig"
2276 source "arch/arm/mach-zynq/Kconfig"
2278 source "arch/arm/mach-zynqmp/Kconfig"
2280 source "arch/arm/mach-versal/Kconfig"
2282 source "arch/arm/mach-zynqmp-r5/Kconfig"
2284 source "arch/arm/cpu/armv7/Kconfig"
2286 source "arch/arm/cpu/armv8/Kconfig"
2288 source "arch/arm/mach-imx/Kconfig"
2290 source "arch/arm/mach-nexell/Kconfig"
2292 source "arch/arm/mach-npcm/Kconfig"
2294 source "board/armltd/total_compute/Kconfig"
2295 source "board/armltd/corstone1000/Kconfig"
2296 source "board/bosch/shc/Kconfig"
2297 source "board/bosch/guardian/Kconfig"
2298 source "board/Marvell/octeontx/Kconfig"
2299 source "board/Marvell/octeontx2/Kconfig"
2300 source "board/armltd/vexpress/Kconfig"
2301 source "board/armltd/vexpress64/Kconfig"
2302 source "board/cortina/presidio-asic/Kconfig"
2303 source "board/broadcom/bcm963158/Kconfig"
2304 source "board/broadcom/bcm96753ref/Kconfig"
2305 source "board/broadcom/bcm968360bg/Kconfig"
2306 source "board/broadcom/bcm968580xref/Kconfig"
2307 source "board/broadcom/bcmns3/Kconfig"
2308 source "board/cavium/thunderx/Kconfig"
2309 source "board/eets/pdu001/Kconfig"
2310 source "board/emulation/qemu-arm/Kconfig"
2311 source "board/freescale/ls2080aqds/Kconfig"
2312 source "board/freescale/ls2080ardb/Kconfig"
2313 source "board/freescale/ls1088a/Kconfig"
2314 source "board/freescale/ls1028a/Kconfig"
2315 source "board/freescale/ls1021aqds/Kconfig"
2316 source "board/freescale/ls1043aqds/Kconfig"
2317 source "board/freescale/ls1021atwr/Kconfig"
2318 source "board/freescale/ls1021atsn/Kconfig"
2319 source "board/freescale/ls1021aiot/Kconfig"
2320 source "board/freescale/ls1046aqds/Kconfig"
2321 source "board/freescale/ls1043ardb/Kconfig"
2322 source "board/freescale/ls1046ardb/Kconfig"
2323 source "board/freescale/ls1046afrwy/Kconfig"
2324 source "board/freescale/ls1012aqds/Kconfig"
2325 source "board/freescale/ls1012ardb/Kconfig"
2326 source "board/freescale/ls1012afrdm/Kconfig"
2327 source "board/freescale/lx2160a/Kconfig"
2328 source "board/grinn/chiliboard/Kconfig"
2329 source "board/hisilicon/hikey/Kconfig"
2330 source "board/hisilicon/hikey960/Kconfig"
2331 source "board/hisilicon/poplar/Kconfig"
2332 source "board/isee/igep003x/Kconfig"
2333 source "board/kontron/sl28/Kconfig"
2334 source "board/myir/mys_6ulx/Kconfig"
2335 source "board/siemens/common/Kconfig"
2336 source "board/seeed/npi_imx6ull/Kconfig"
2337 source "board/socionext/developerbox/Kconfig"
2338 source "board/st/stv0991/Kconfig"
2339 source "board/tcl/sl50/Kconfig"
2340 source "board/traverse/ten64/Kconfig"
2341 source "board/variscite/dart_6ul/Kconfig"
2342 source "board/vscom/baltos/Kconfig"
2343 source "board/phytium/durian/Kconfig"
2344 source "board/phytium/pomelo/Kconfig"
2345 source "board/xen/xenguest_arm64/Kconfig"
2347 source "arch/arm/Kconfig.debug"