1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed
19 from almost any address. This logic relies on the relocation
20 information that is embedded into the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
26 U-Boot typically uses a hard-coded value for the stack pointer
27 before relocation. Enable this option to instead calculate the
28 initial SP at run-time. This is useful to avoid hard-coding addresses
29 into U-Boot, so that can be loaded and executed at arbitrary
30 addresses and thus avoid using arbitrary addresses at runtime.
32 If this option is enabled, the early stack pointer is set to
33 &_bss_start with a offset value added. The offset is specified by
34 SYS_INIT_SP_BSS_OFFSET.
36 config SYS_INIT_SP_BSS_OFFSET
37 int "Early stack offset from the .bss base address"
38 depends on INIT_SP_RELATIVE
41 This option's value is the offset added to &_bss_start in order to
42 calculate the stack pointer. This offset should be large enough so
43 that the early malloc region, global data (gd), and early stack usage
44 do not overlap any appended DTB.
46 config LINUX_KERNEL_IMAGE_HEADER
49 Place a Linux kernel image header at the start of the U-Boot binary.
50 The format of the header is described in the Linux kernel source at
51 Documentation/arm64/booting.txt. This feature is useful since the
52 image header reports the amount of memory (BSS and similar) that
53 U-Boot needs to use, but which isn't part of the binary.
55 if LINUX_KERNEL_IMAGE_HEADER
56 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
59 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
60 TEXT_OFFSET value written in to the Linux kernel image header.
66 default y if ARM64 && !POSITION_INDEPENDENT
68 config DMA_ADDR_T_64BIT
78 # Used for compatibility with asm files copied from the kernel
79 config ARM_ASM_UNIFIED
83 # Used for compatibility with asm files copied from the kernel
88 bool "Do not enable icache"
91 Do not enable instruction cache in U-Boot.
93 config SPL_SYS_ICACHE_OFF
94 bool "Do not enable icache in SPL"
96 default SYS_ICACHE_OFF
98 Do not enable instruction cache in SPL.
100 config SYS_DCACHE_OFF
101 bool "Do not enable dcache"
104 Do not enable data cache in U-Boot.
106 config SPL_SYS_DCACHE_OFF
107 bool "Do not enable dcache in SPL"
109 default SYS_DCACHE_OFF
111 Do not enable data cache in SPL.
113 config SYS_ARM_CACHE_CP15
114 bool "CP15 based cache enabling support"
116 Select this if your processor suports enabling caches by using
120 bool "MMU-based Paged Memory Management Support"
121 select SYS_ARM_CACHE_CP15
123 Select if you want MMU-based virtualised addressing space
124 support by paged memory management.
127 bool 'Use the ARM v7 PMSA Compliant MPU'
129 Some ARM systems without an MMU have instead a Memory Protection
130 Unit (MPU) that defines the type and permissions for regions of
132 If your CPU has an MPU then you should choose 'y' here unless you
133 know that you do not want to use the MPU.
135 # If set, the workarounds for these ARM errata are applied early during U-Boot
136 # startup. Note that in general these options force the workarounds to be
137 # applied; no CPU-type/version detection exists, unlike the similar options in
138 # the Linux kernel. Do not set these options unless they apply! Also note that
139 # the following can be machine specific errata. These do have ability to
140 # provide rudimentary version and machine specific checks, but expect no
142 # CONFIG_ARM_ERRATA_430973
143 # CONFIG_ARM_ERRATA_454179
144 # CONFIG_ARM_ERRATA_621766
145 # CONFIG_ARM_ERRATA_798870
146 # CONFIG_ARM_ERRATA_801819
147 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
148 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
150 config ARM_ERRATA_430973
153 config ARM_ERRATA_454179
156 config ARM_ERRATA_621766
159 config ARM_ERRATA_716044
162 config ARM_ERRATA_725233
165 config ARM_ERRATA_742230
168 config ARM_ERRATA_743622
171 config ARM_ERRATA_751472
174 config ARM_ERRATA_761320
177 config ARM_ERRATA_773022
180 config ARM_ERRATA_774769
183 config ARM_ERRATA_794072
186 config ARM_ERRATA_798870
189 config ARM_ERRATA_801819
192 config ARM_ERRATA_826974
195 config ARM_ERRATA_828024
198 config ARM_ERRATA_829520
201 config ARM_ERRATA_833069
204 config ARM_ERRATA_833471
207 config ARM_ERRATA_845369
210 config ARM_ERRATA_852421
213 config ARM_ERRATA_852423
216 config ARM_ERRATA_855873
219 config ARM_CORTEX_A8_CVE_2017_5715
222 config ARM_CORTEX_A15_CVE_2017_5715
227 select SYS_CACHE_SHIFT_5
232 select SYS_CACHE_SHIFT_5
237 select SYS_CACHE_SHIFT_5
242 select SYS_CACHE_SHIFT_5
247 select SYS_CACHE_SHIFT_5
253 select SYS_CACHE_SHIFT_5
260 select SYS_CACHE_SHIFT_6
267 select SYS_CACHE_SHIFT_5
268 select SYS_THUMB_BUILD
274 select SYS_ARM_CACHE_CP15
276 select SYS_CACHE_SHIFT_6
280 select SYS_CACHE_SHIFT_5
285 select SYS_CACHE_SHIFT_5
289 default "arm720t" if CPU_ARM720T
290 default "arm920t" if CPU_ARM920T
291 default "arm926ejs" if CPU_ARM926EJS
292 default "arm946es" if CPU_ARM946ES
293 default "arm1136" if CPU_ARM1136
294 default "arm1176" if CPU_ARM1176
295 default "armv7" if CPU_V7A
296 default "armv7" if CPU_V7R
297 default "armv7m" if CPU_V7M
298 default "pxa" if CPU_PXA
299 default "sa1100" if CPU_SA1100
300 default "armv8" if ARM64
304 default 4 if CPU_ARM720T
305 default 4 if CPU_ARM920T
306 default 5 if CPU_ARM926EJS
307 default 5 if CPU_ARM946ES
308 default 6 if CPU_ARM1136
309 default 6 if CPU_ARM1176
314 default 4 if CPU_SA1100
317 config SYS_CACHE_SHIFT_5
320 config SYS_CACHE_SHIFT_6
323 config SYS_CACHE_SHIFT_7
326 config SYS_CACHELINE_SIZE
328 default 128 if SYS_CACHE_SHIFT_7
329 default 64 if SYS_CACHE_SHIFT_6
330 default 32 if SYS_CACHE_SHIFT_5
332 config SYS_ARCH_TIMER
333 bool "ARM Generic Timer support"
334 depends on CPU_V7A || ARM64
337 The ARM Generic Timer (aka arch-timer) provides an architected
338 interface to a timer source on an SoC.
339 It is mandantory for ARMv8 implementation and widely available
343 bool "Support for ARM SMC Calling Convention (SMCCC)"
344 depends on CPU_V7A || ARM64
347 Say Y here if you want to enable ARM SMC Calling Convention.
348 This should be enabled if U-Boot needs to communicate with system
349 firmware (for example, PSCI) according to SMCCC.
352 bool "support boot from semihosting"
354 In emulated environments, semihosting is a way for
355 the hosted environment to call out to the emulator to
356 retrieve files from the host machine.
358 config SYS_THUMB_BUILD
359 bool "Build U-Boot using the Thumb instruction set"
362 Use this flag to build U-Boot using the Thumb instruction set for
363 ARM architectures. Thumb instruction set provides better code
364 density. For ARM architectures that support Thumb2 this flag will
365 result in Thumb2 code generated by GCC.
367 config SPL_SYS_THUMB_BUILD
368 bool "Build SPL using the Thumb instruction set"
369 default y if SYS_THUMB_BUILD
370 depends on !ARM64 && SPL
372 Use this flag to build SPL using the Thumb instruction set for
373 ARM architectures. Thumb instruction set provides better code
374 density. For ARM architectures that support Thumb2 this flag will
375 result in Thumb2 code generated by GCC.
377 config TPL_SYS_THUMB_BUILD
378 bool "Build TPL using the Thumb instruction set"
379 default y if SYS_THUMB_BUILD
380 depends on TPL && !ARM64
382 Use this flag to build SPL using the Thumb instruction set for
383 ARM architectures. Thumb instruction set provides better code
384 density. For ARM architectures that support Thumb2 this flag will
385 result in Thumb2 code generated by GCC.
388 config SYS_L2CACHE_OFF
391 If SoC does not support L2CACHE or one do not want to enable
392 L2CACHE, choose this option.
394 config ENABLE_ARM_SOC_BOOT0_HOOK
395 bool "prepare BOOT0 header"
397 If the SoC's BOOT0 requires a header area filled with (magic)
398 values, then choose this option, and create a file included as
399 <asm/arch/boot0.h> which contains the required assembler code.
401 config ARM_CORTEX_CPU_IS_UP
405 config USE_ARCH_MEMCPY
406 bool "Use an assembly optimized implementation of memcpy"
410 Enable the generation of an optimized version of memcpy.
411 Such implementation may be faster under some conditions
412 but may increase the binary size.
414 config SPL_USE_ARCH_MEMCPY
415 bool "Use an assembly optimized implementation of memcpy for SPL"
416 default y if USE_ARCH_MEMCPY
417 depends on !ARM64 && SPL
419 Enable the generation of an optimized version of memcpy.
420 Such implementation may be faster under some conditions
421 but may increase the binary size.
423 config TPL_USE_ARCH_MEMCPY
424 bool "Use an assembly optimized implementation of memcpy for TPL"
425 default y if USE_ARCH_MEMCPY
426 depends on !ARM64 && TPL
428 Enable the generation of an optimized version of memcpy.
429 Such implementation may be faster under some conditions
430 but may increase the binary size.
432 config USE_ARCH_MEMSET
433 bool "Use an assembly optimized implementation of memset"
437 Enable the generation of an optimized version of memset.
438 Such implementation may be faster under some conditions
439 but may increase the binary size.
441 config SPL_USE_ARCH_MEMSET
442 bool "Use an assembly optimized implementation of memset for SPL"
443 default y if USE_ARCH_MEMSET
444 depends on !ARM64 && SPL
446 Enable the generation of an optimized version of memset.
447 Such implementation may be faster under some conditions
448 but may increase the binary size.
450 config TPL_USE_ARCH_MEMSET
451 bool "Use an assembly optimized implementation of memset for TPL"
452 default y if USE_ARCH_MEMSET
453 depends on !ARM64 && TPL
455 Enable the generation of an optimized version of memset.
456 Such implementation may be faster under some conditions
457 but may increase the binary size.
459 config ARM64_SUPPORT_AARCH32
460 bool "ARM64 system support AArch32 execution state"
462 default y if !TARGET_THUNDERX_88XX
464 This ARM64 system supports AArch32 execution state.
467 prompt "Target select"
472 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
474 config TARGET_EDB93XX
475 bool "Support edb93xx"
479 config TARGET_ASPENITE
480 bool "Support aspenite"
484 bool "Support gplugd"
492 Support for TI's DaVinci platform.
495 bool "Marvell Kirkwood"
496 select ARCH_MISC_INIT
497 select BOARD_EARLY_INIT_F
501 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
521 config TARGET_SPEAR300
522 bool "Support spear300"
523 select BOARD_EARLY_INIT_F
528 config TARGET_SPEAR310
529 bool "Support spear310"
530 select BOARD_EARLY_INIT_F
535 config TARGET_SPEAR320
536 bool "Support spear320"
537 select BOARD_EARLY_INIT_F
542 config TARGET_SPEAR600
543 bool "Support spear600"
544 select BOARD_EARLY_INIT_F
549 config TARGET_STV0991
550 bool "Support stv0991"
563 select BOARD_LATE_INIT
568 config TARGET_WOODBURN
569 bool "Support woodburn"
572 config TARGET_WOODBURN_SD
573 bool "Support woodburn_sd"
581 config TARGET_MX35PDK
582 bool "Support mx35pdk"
583 select BOARD_LATE_INIT
587 bool "Broadcom BCM283X family"
593 select SERIAL_SEARCH_ALL
598 bool "Broadcom BCM63158 family"
604 bool "Broadcom BCM6858 family"
609 config TARGET_VEXPRESS_CA15_TC2
610 bool "Support vexpress_ca15_tc2"
612 select CPU_V7_HAS_NONSEC
613 select CPU_V7_HAS_VIRT
617 bool "Broadcom BCM7XXX family"
621 select OF_PRIOR_STAGE
624 This enables support for Broadcom ARM-based set-top box
625 chipsets, including the 7445 family of chips.
627 config TARGET_VEXPRESS_CA5X2
628 bool "Support vexpress_ca5x2"
632 config TARGET_VEXPRESS_CA9X4
633 bool "Support vexpress_ca9x4"
637 config TARGET_BCM23550_W1D
638 bool "Support bcm23550_w1d"
643 config TARGET_BCM28155_AP
644 bool "Support bcm28155_ap"
649 config TARGET_BCMCYGNUS
650 bool "Support bcmcygnus"
653 imply BCM_SF2_ETH_GMAC
661 bool "Support bcmnsp"
665 bool "Support Broadcom Northstar2"
668 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
669 ARMv8 Cortex-A57 processors targeting a broad range of networking
673 bool "Samsung EXYNOS"
682 imply SYS_THUMB_BUILD
687 bool "Samsung S5PC1XX"
696 bool "Calxeda Highbank"
700 config ARCH_INTEGRATOR
701 bool "ARM Ltd. Integrator family"
712 select SYS_ARCH_TIMER
713 select SYS_THUMB_BUILD
719 bool "Texas Instruments' K3 Architecture"
724 config ARCH_OMAP2PLUS
727 select SPL_BOARD_INIT if SPL
728 select SPL_STACK_R if SPL
734 imply DISTRO_DEFAULTS
736 Support for the Meson SoC family developed by Amlogic Inc.,
737 targeted at media players and tablet computers. We currently
738 support the S905 (GXBaby) 64-bit SoC.
746 select SPL_LIBCOMMON_SUPPORT if SPL
747 select SPL_LIBGENERIC_SUPPORT if SPL
748 select SPL_OF_CONTROL if SPL
751 Support for the MediaTek SoCs family developed by MediaTek Inc.
752 Please refer to doc/README.mediatek for more information.
755 bool "NXP LPC32xx platform"
765 bool "NXP i.MX8 platform"
771 bool "NXP i.MX8M platform"
778 bool "NXP i.MX23 family"
789 bool "NXP i.MX28 family"
795 bool "NXP i.MX31 family"
801 select ROM_UNIFIED_SECTIONS
806 select ARCH_MISC_INIT
807 select BOARD_EARLY_INIT_F
809 select SYS_FSL_HAS_SEC if SECURE_BOOT
810 select SYS_FSL_SEC_COMPAT_4
811 select SYS_FSL_SEC_LE
817 select SYS_FSL_HAS_SEC if SECURE_BOOT
818 select SYS_FSL_SEC_COMPAT_4
819 select SYS_FSL_SEC_LE
820 select SYS_THUMB_BUILD if SPL
825 default "arch/arm/mach-omap2/u-boot-spl.lds"
830 select BOARD_EARLY_INIT_F
835 bool "Actions Semi OWL SoCs"
843 bool "QEMU Virtual Platform"
844 select ARCH_SUPPORT_TFABOOT
854 bool "Renesas ARM SoCs"
855 select BOARD_EARLY_INIT_F if !RZA1
860 imply SYS_THUMB_BUILD
861 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
863 config TARGET_S32V234EVB
864 bool "Support s32v234evb"
866 select SYS_FSL_ERRATUM_ESDHC111
868 config ARCH_SNAPDRAGON
869 bool "Qualcomm Snapdragon SoCs"
882 bool "Altera SOCFPGA family"
883 select ARCH_EARLY_INIT_R
884 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
885 select ARM64 if TARGET_SOCFPGA_STRATIX10
886 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
889 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
891 select SPL_DM_RESET if DM_RESET
893 select SPL_LIBCOMMON_SUPPORT
894 select SPL_LIBGENERIC_SUPPORT
895 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
896 select SPL_OF_CONTROL
897 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10
898 select SPL_SERIAL_SUPPORT
900 select SPL_WATCHDOG_SUPPORT
903 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
905 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
906 select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
915 imply SPL_LIBDISK_SUPPORT
916 imply SPL_MMC_SUPPORT
917 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
918 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
919 imply SPL_SPI_FLASH_SUPPORT
920 imply SPL_SPI_SUPPORT
924 bool "Support sunxi (Allwinner) SoCs"
927 select CMD_MMC if MMC
928 select CMD_USB if DISTRO_DEFAULTS
935 select DM_SCSI if SCSI
937 select DM_USB if DISTRO_DEFAULTS
938 select OF_BOARD_SETUP
941 select SPECIFY_CONSOLE_INDEX
942 select SPL_STACK_R if SPL
943 select SPL_SYS_MALLOC_SIMPLE if SPL
944 select SPL_SYS_THUMB_BUILD if !ARM64
947 select SYS_THUMB_BUILD if !ARM64
948 select USB if DISTRO_DEFAULTS
949 select USB_KEYBOARD if DISTRO_DEFAULTS
950 select USB_STORAGE if DISTRO_DEFAULTS
951 select USE_TINY_PRINTF
954 imply CMD_UBI if NAND
955 imply DISTRO_DEFAULTS
958 imply OF_LIBFDT_OVERLAY
959 imply PRE_CONSOLE_BUFFER
960 imply SPL_GPIO_SUPPORT
961 imply SPL_LIBCOMMON_SUPPORT
962 imply SPL_LIBGENERIC_SUPPORT
963 imply SPL_MMC_SUPPORT if MMC
964 imply SPL_POWER_SUPPORT
965 imply SPL_SERIAL_SUPPORT
969 bool "Support Xilinx Versal Platform"
979 bool "Freescale Vybrid"
981 select SYS_FSL_ERRATUM_ESDHC111
986 bool "Xilinx Zynq based platform"
987 select BOARD_EARLY_INIT_F if WDT
1000 select SPL_BOARD_INIT if SPL
1001 select SPL_CLK if SPL
1002 select SPL_DM if SPL
1003 select SPL_OF_CONTROL if SPL
1004 select SPL_SEPARATE_BSS if SPL
1006 imply ARCH_EARLY_INIT_R
1007 imply BOARD_LATE_INIT
1013 config ARCH_ZYNQMP_R5
1014 bool "Xilinx ZynqMP R5 based platform"
1018 select DM_ETH if NET
1019 select DM_MMC if MMC
1026 bool "Xilinx ZynqMP based platform"
1030 select DM_ETH if NET
1031 select DM_MMC if MMC
1033 select DM_SPI if SPI
1034 select DM_SPI_FLASH if DM_SPI
1035 select DM_USB if USB
1037 select SPL_BOARD_INIT if SPL
1038 select SPL_CLK if SPL
1039 select SPL_SEPARATE_BSS if SPL
1041 imply BOARD_LATE_INIT
1049 imply DISTRO_DEFAULTS
1052 config TARGET_VEXPRESS64_AEMV8A
1053 bool "Support vexpress_aemv8a"
1057 config TARGET_VEXPRESS64_BASE_FVP
1058 bool "Support Versatile Express ARMv8a FVP BASE model"
1063 config TARGET_VEXPRESS64_BASE_FVP_DRAM
1064 bool "Support Versatile Express ARMv8a FVP BASE model booting from DRAM"
1068 This target is derived from TARGET_VEXPRESS64_BASE_FVP and over-rides
1069 the default config to allow the user to load the images directly into
1070 DRAM using model parameters rather than by using semi-hosting to load
1071 the files from the host filesystem.
1073 config TARGET_VEXPRESS64_JUNO
1074 bool "Support Versatile Express Juno Development Platform"
1078 config TARGET_LS2080A_EMU
1079 bool "Support ls2080a_emu"
1081 select ARCH_MISC_INIT
1083 select ARMV8_MULTIENTRY
1084 select FSL_DDR_SYNC_REFRESH
1086 Support for Freescale LS2080A_EMU platform
1087 The LS2080A Development System (EMULATOR) is a pre silicon
1088 development platform that supports the QorIQ LS2080A
1089 Layerscape Architecture processor.
1091 config TARGET_LS2080A_SIMU
1092 bool "Support ls2080a_simu"
1094 select ARCH_MISC_INIT
1096 select ARMV8_MULTIENTRY
1097 select BOARD_LATE_INIT
1099 Support for Freescale LS2080A_SIMU platform
1100 The LS2080A Development System (QDS) is a pre silicon
1101 development platform that supports the QorIQ LS2080A
1102 Layerscape Architecture processor.
1104 config TARGET_LS1088AQDS
1105 bool "Support ls1088aqds"
1107 select ARCH_MISC_INIT
1109 select ARMV8_MULTIENTRY
1110 select ARCH_SUPPORT_TFABOOT
1111 select BOARD_LATE_INIT
1113 select FSL_DDR_INTERACTIVE if !SD_BOOT
1115 Support for NXP LS1088AQDS platform
1116 The LS1088A Development System (QDS) is a high-performance
1117 development platform that supports the QorIQ LS1088A
1118 Layerscape Architecture processor.
1120 config TARGET_LS2080AQDS
1121 bool "Support ls2080aqds"
1123 select ARCH_MISC_INIT
1125 select ARMV8_MULTIENTRY
1126 select ARCH_SUPPORT_TFABOOT
1127 select BOARD_LATE_INIT
1132 select FSL_DDR_INTERACTIVE if !SPL
1134 Support for Freescale LS2080AQDS platform
1135 The LS2080A Development System (QDS) is a high-performance
1136 development platform that supports the QorIQ LS2080A
1137 Layerscape Architecture processor.
1139 config TARGET_LS2080ARDB
1140 bool "Support ls2080ardb"
1142 select ARCH_MISC_INIT
1144 select ARMV8_MULTIENTRY
1145 select ARCH_SUPPORT_TFABOOT
1146 select BOARD_LATE_INIT
1149 select FSL_DDR_INTERACTIVE if !SPL
1153 Support for Freescale LS2080ARDB platform.
1154 The LS2080A Reference design board (RDB) is a high-performance
1155 development platform that supports the QorIQ LS2080A
1156 Layerscape Architecture processor.
1158 config TARGET_LS2081ARDB
1159 bool "Support ls2081ardb"
1161 select ARCH_MISC_INIT
1163 select ARMV8_MULTIENTRY
1164 select BOARD_LATE_INIT
1167 Support for Freescale LS2081ARDB platform.
1168 The LS2081A Reference design board (RDB) is a high-performance
1169 development platform that supports the QorIQ LS2081A/LS2041A
1170 Layerscape Architecture processor.
1172 config TARGET_LX2160ARDB
1173 bool "Support lx2160ardb"
1175 select ARCH_MISC_INIT
1177 select ARMV8_MULTIENTRY
1178 select ARCH_SUPPORT_TFABOOT
1179 select BOARD_LATE_INIT
1181 Support for NXP LX2160ARDB platform.
1182 The lx2160ardb (LX2160A Reference design board (RDB)
1183 is a high-performance development platform that supports the
1184 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1186 config TARGET_LX2160AQDS
1187 bool "Support lx2160aqds"
1189 select ARCH_MISC_INIT
1191 select ARMV8_MULTIENTRY
1192 select ARCH_SUPPORT_TFABOOT
1193 select BOARD_LATE_INIT
1195 Support for NXP LX2160AQDS platform.
1196 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1197 is a high-performance development platform that supports the
1198 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1201 bool "Support HiKey 96boards Consumer Edition Platform"
1208 select SPECIFY_CONSOLE_INDEX
1211 Support for HiKey 96boards platform. It features a HI6220
1212 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1214 config TARGET_HIKEY960
1215 bool "Support HiKey960 96boards Consumer Edition Platform"
1223 Support for HiKey960 96boards platform. It features a HI3660
1224 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1226 config TARGET_POPLAR
1227 bool "Support Poplar 96boards Enterprise Edition Platform"
1236 Support for Poplar 96boards EE platform. It features a HI3798cv200
1237 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1238 making it capable of running any commercial set-top solution based on
1241 config TARGET_LS1012AQDS
1242 bool "Support ls1012aqds"
1245 select ARCH_SUPPORT_TFABOOT
1246 select BOARD_LATE_INIT
1248 Support for Freescale LS1012AQDS platform.
1249 The LS1012A Development System (QDS) is a high-performance
1250 development platform that supports the QorIQ LS1012A
1251 Layerscape Architecture processor.
1253 config TARGET_LS1012ARDB
1254 bool "Support ls1012ardb"
1257 select ARCH_SUPPORT_TFABOOT
1258 select BOARD_LATE_INIT
1262 Support for Freescale LS1012ARDB platform.
1263 The LS1012A Reference design board (RDB) is a high-performance
1264 development platform that supports the QorIQ LS1012A
1265 Layerscape Architecture processor.
1267 config TARGET_LS1012A2G5RDB
1268 bool "Support ls1012a2g5rdb"
1271 select ARCH_SUPPORT_TFABOOT
1272 select BOARD_LATE_INIT
1275 Support for Freescale LS1012A2G5RDB platform.
1276 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1277 development platform that supports the QorIQ LS1012A
1278 Layerscape Architecture processor.
1280 config TARGET_LS1012AFRWY
1281 bool "Support ls1012afrwy"
1284 select ARCH_SUPPORT_TFABOOT
1285 select BOARD_LATE_INIT
1289 Support for Freescale LS1012AFRWY platform.
1290 The LS1012A FRWY board (FRWY) is a high-performance
1291 development platform that supports the QorIQ LS1012A
1292 Layerscape Architecture processor.
1294 config TARGET_LS1012AFRDM
1295 bool "Support ls1012afrdm"
1298 select ARCH_SUPPORT_TFABOOT
1300 Support for Freescale LS1012AFRDM platform.
1301 The LS1012A Freedom board (FRDM) is a high-performance
1302 development platform that supports the QorIQ LS1012A
1303 Layerscape Architecture processor.
1305 config TARGET_LS1028AQDS
1306 bool "Support ls1028aqds"
1309 select ARMV8_MULTIENTRY
1310 select ARCH_SUPPORT_TFABOOT
1311 select BOARD_LATE_INIT
1312 select ARCH_MISC_INIT
1314 Support for Freescale LS1028AQDS platform
1315 The LS1028A Development System (QDS) is a high-performance
1316 development platform that supports the QorIQ LS1028A
1317 Layerscape Architecture processor.
1319 config TARGET_LS1028ARDB
1320 bool "Support ls1028ardb"
1323 select ARMV8_MULTIENTRY
1324 select ARCH_SUPPORT_TFABOOT
1326 Support for Freescale LS1028ARDB platform
1327 The LS1028A Development System (RDB) is a high-performance
1328 development platform that supports the QorIQ LS1028A
1329 Layerscape Architecture processor.
1331 config TARGET_LS1088ARDB
1332 bool "Support ls1088ardb"
1334 select ARCH_MISC_INIT
1336 select ARMV8_MULTIENTRY
1337 select ARCH_SUPPORT_TFABOOT
1338 select BOARD_LATE_INIT
1340 select FSL_DDR_INTERACTIVE if !SD_BOOT
1342 Support for NXP LS1088ARDB platform.
1343 The LS1088A Reference design board (RDB) is a high-performance
1344 development platform that supports the QorIQ LS1088A
1345 Layerscape Architecture processor.
1347 config TARGET_LS1021AQDS
1348 bool "Support ls1021aqds"
1350 select ARCH_SUPPORT_PSCI
1351 select BOARD_EARLY_INIT_F
1352 select BOARD_LATE_INIT
1354 select CPU_V7_HAS_NONSEC
1355 select CPU_V7_HAS_VIRT
1356 select LS1_DEEP_SLEEP
1359 select FSL_DDR_INTERACTIVE
1362 config TARGET_LS1021ATWR
1363 bool "Support ls1021atwr"
1365 select ARCH_SUPPORT_PSCI
1366 select BOARD_EARLY_INIT_F
1367 select BOARD_LATE_INIT
1369 select CPU_V7_HAS_NONSEC
1370 select CPU_V7_HAS_VIRT
1371 select LS1_DEEP_SLEEP
1375 config TARGET_LS1021ATSN
1376 bool "Support ls1021atsn"
1378 select ARCH_SUPPORT_PSCI
1379 select BOARD_EARLY_INIT_F
1380 select BOARD_LATE_INIT
1382 select CPU_V7_HAS_NONSEC
1383 select CPU_V7_HAS_VIRT
1384 select LS1_DEEP_SLEEP
1388 config TARGET_LS1021AIOT
1389 bool "Support ls1021aiot"
1391 select ARCH_SUPPORT_PSCI
1392 select BOARD_LATE_INIT
1394 select CPU_V7_HAS_NONSEC
1395 select CPU_V7_HAS_VIRT
1399 Support for Freescale LS1021AIOT platform.
1400 The LS1021A Freescale board (IOT) is a high-performance
1401 development platform that supports the QorIQ LS1021A
1402 Layerscape Architecture processor.
1404 config TARGET_LS1043AQDS
1405 bool "Support ls1043aqds"
1408 select ARMV8_MULTIENTRY
1409 select ARCH_SUPPORT_TFABOOT
1410 select BOARD_EARLY_INIT_F
1411 select BOARD_LATE_INIT
1413 select FSL_DDR_INTERACTIVE if !SPL
1417 Support for Freescale LS1043AQDS platform.
1419 config TARGET_LS1043ARDB
1420 bool "Support ls1043ardb"
1423 select ARMV8_MULTIENTRY
1424 select ARCH_SUPPORT_TFABOOT
1425 select BOARD_EARLY_INIT_F
1426 select BOARD_LATE_INIT
1429 Support for Freescale LS1043ARDB platform.
1431 config TARGET_LS1046AQDS
1432 bool "Support ls1046aqds"
1435 select ARMV8_MULTIENTRY
1436 select ARCH_SUPPORT_TFABOOT
1437 select BOARD_EARLY_INIT_F
1438 select BOARD_LATE_INIT
1439 select DM_SPI_FLASH if DM_SPI
1441 select FSL_DDR_BIST if !SPL
1442 select FSL_DDR_INTERACTIVE if !SPL
1443 select FSL_DDR_INTERACTIVE if !SPL
1446 Support for Freescale LS1046AQDS platform.
1447 The LS1046A Development System (QDS) is a high-performance
1448 development platform that supports the QorIQ LS1046A
1449 Layerscape Architecture processor.
1451 config TARGET_LS1046ARDB
1452 bool "Support ls1046ardb"
1455 select ARMV8_MULTIENTRY
1456 select ARCH_SUPPORT_TFABOOT
1457 select BOARD_EARLY_INIT_F
1458 select BOARD_LATE_INIT
1459 select DM_SPI_FLASH if DM_SPI
1460 select POWER_MC34VR500
1463 select FSL_DDR_INTERACTIVE if !SPL
1466 Support for Freescale LS1046ARDB platform.
1467 The LS1046A Reference Design Board (RDB) is a high-performance
1468 development platform that supports the QorIQ LS1046A
1469 Layerscape Architecture processor.
1471 config TARGET_LS1046AFRWY
1472 bool "Support ls1046afrwy"
1475 select ARMV8_MULTIENTRY
1476 select ARCH_SUPPORT_TFABOOT
1477 select BOARD_EARLY_INIT_F
1478 select BOARD_LATE_INIT
1479 select DM_SPI_FLASH if DM_SPI
1482 Support for Freescale LS1046AFRWY platform.
1483 The LS1046A Freeway Board (FRWY) is a high-performance
1484 development platform that supports the QorIQ LS1046A
1485 Layerscape Architecture processor.
1487 bool "Support h2200"
1490 config TARGET_COLIBRI_PXA270
1491 bool "Support colibri_pxa270"
1494 config ARCH_UNIPHIER
1495 bool "Socionext UniPhier SoCs"
1496 select BOARD_LATE_INIT
1504 select OF_BOARD_SETUP
1508 select SPL_BOARD_INIT if SPL
1509 select SPL_DM if SPL
1510 select SPL_LIBCOMMON_SUPPORT if SPL
1511 select SPL_LIBGENERIC_SUPPORT if SPL
1512 select SPL_OF_CONTROL if SPL
1513 select SPL_PINCTRL if SPL
1516 imply DISTRO_DEFAULTS
1519 Support for UniPhier SoC family developed by Socionext Inc.
1520 (formerly, System LSI Business Division of Panasonic Corporation)
1523 bool "Support STMicroelectronics STM32 MCU with cortex M"
1530 bool "Support STMicrolectronics SoCs"
1539 Support for STMicroelectronics STiH407/10 SoC family.
1540 This SoC is used on Linaro 96Board STiH410-B2260
1543 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1544 select ARCH_MISC_INIT
1545 select BOARD_LATE_INIT
1554 select OF_SYSTEM_SETUP
1560 select SYS_THUMB_BUILD
1564 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1567 Support for STM32MP SoC family developed by STMicroelectronics,
1568 MPUs based on ARM cortex A core
1569 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1570 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1572 SPL is the unsecure FSBL for the basic boot chain.
1574 config ARCH_ROCKCHIP
1575 bool "Support Rockchip SoCs"
1586 select DM_USB if USB
1587 select ENABLE_ARM_SOC_BOOT0_HOOK
1590 select SPL_DM if SPL
1591 select SPL_SYS_MALLOC_SIMPLE if SPL
1593 select SYS_THUMB_BUILD if !ARM64
1596 imply DEBUG_UART_BOARD_INIT
1597 imply DISTRO_DEFAULTS
1599 imply SARADC_ROCKCHIP
1603 imply USB_FUNCTION_FASTBOOT
1605 config TARGET_THUNDERX_88XX
1606 bool "Support ThunderX 88xx"
1610 select SYS_CACHE_SHIFT_7
1613 bool "Support Aspeed SoCs"
1620 config ARCH_SUPPORT_TFABOOT
1624 bool "Support for booting from TF-A"
1625 depends on ARCH_SUPPORT_TFABOOT
1628 Enabling this will make a U-Boot binary that is capable of being
1631 config TI_SECURE_DEVICE
1632 bool "HS Device Type Support"
1633 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1635 If a high secure (HS) device type is being used, this config
1636 must be set. This option impacts various aspects of the
1637 build system (to create signed boot images that can be
1638 authenticated) and the code. See the doc/README.ti-secure
1639 file for further details.
1641 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1642 config ISW_ENTRY_ADDR
1643 hex "Address in memory or XIP address of bootloader entry point"
1644 default 0x402F4000 if AM43XX
1645 default 0x402F0400 if AM33XX
1646 default 0x40301350 if OMAP54XX
1648 After any reset, the boot ROM searches the boot media for a valid
1649 boot image. For non-XIP devices, the ROM then copies the image into
1650 internal memory. For all boot modes, after the ROM processes the
1651 boot image it eventually computes the entry point address depending
1652 on the device type (secure/non-secure), boot media (xip/non-xip) and
1656 source "arch/arm/mach-aspeed/Kconfig"
1658 source "arch/arm/mach-at91/Kconfig"
1660 source "arch/arm/mach-bcm283x/Kconfig"
1662 source "arch/arm/mach-bcmstb/Kconfig"
1664 source "arch/arm/mach-davinci/Kconfig"
1666 source "arch/arm/mach-exynos/Kconfig"
1668 source "arch/arm/mach-highbank/Kconfig"
1670 source "arch/arm/mach-integrator/Kconfig"
1672 source "arch/arm/mach-k3/Kconfig"
1674 source "arch/arm/mach-keystone/Kconfig"
1676 source "arch/arm/mach-kirkwood/Kconfig"
1678 source "arch/arm/cpu/arm926ejs/lpc32xx/Kconfig"
1680 source "arch/arm/mach-mvebu/Kconfig"
1682 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1684 source "arch/arm/mach-imx/mx2/Kconfig"
1686 source "arch/arm/mach-imx/mx3/Kconfig"
1688 source "arch/arm/mach-imx/mx5/Kconfig"
1690 source "arch/arm/mach-imx/mx6/Kconfig"
1692 source "arch/arm/mach-imx/mx7/Kconfig"
1694 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1696 source "arch/arm/mach-imx/imx8/Kconfig"
1698 source "arch/arm/mach-imx/imx8m/Kconfig"
1700 source "arch/arm/mach-imx/mxs/Kconfig"
1702 source "arch/arm/mach-omap2/Kconfig"
1704 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1706 source "arch/arm/mach-orion5x/Kconfig"
1708 source "arch/arm/mach-owl/Kconfig"
1710 source "arch/arm/mach-rmobile/Kconfig"
1712 source "arch/arm/mach-meson/Kconfig"
1714 source "arch/arm/mach-mediatek/Kconfig"
1716 source "arch/arm/mach-qemu/Kconfig"
1718 source "arch/arm/mach-rockchip/Kconfig"
1720 source "arch/arm/mach-s5pc1xx/Kconfig"
1722 source "arch/arm/mach-snapdragon/Kconfig"
1724 source "arch/arm/mach-socfpga/Kconfig"
1726 source "arch/arm/mach-sti/Kconfig"
1728 source "arch/arm/mach-stm32/Kconfig"
1730 source "arch/arm/mach-stm32mp/Kconfig"
1732 source "arch/arm/mach-sunxi/Kconfig"
1734 source "arch/arm/mach-tegra/Kconfig"
1736 source "arch/arm/mach-uniphier/Kconfig"
1738 source "arch/arm/cpu/armv7/vf610/Kconfig"
1740 source "arch/arm/mach-zynq/Kconfig"
1742 source "arch/arm/mach-zynqmp/Kconfig"
1744 source "arch/arm/mach-versal/Kconfig"
1746 source "arch/arm/mach-zynqmp-r5/Kconfig"
1748 source "arch/arm/cpu/armv7/Kconfig"
1750 source "arch/arm/cpu/armv8/Kconfig"
1752 source "arch/arm/mach-imx/Kconfig"
1754 source "board/bosch/shc/Kconfig"
1755 source "board/bosch/guardian/Kconfig"
1756 source "board/CarMediaLab/flea3/Kconfig"
1757 source "board/Marvell/aspenite/Kconfig"
1758 source "board/Marvell/gplugd/Kconfig"
1759 source "board/armadeus/apf27/Kconfig"
1760 source "board/armltd/vexpress/Kconfig"
1761 source "board/armltd/vexpress64/Kconfig"
1762 source "board/broadcom/bcm23550_w1d/Kconfig"
1763 source "board/broadcom/bcm28155_ap/Kconfig"
1764 source "board/broadcom/bcm963158/Kconfig"
1765 source "board/broadcom/bcm968580xref/Kconfig"
1766 source "board/broadcom/bcmcygnus/Kconfig"
1767 source "board/broadcom/bcmnsp/Kconfig"
1768 source "board/broadcom/bcmns2/Kconfig"
1769 source "board/cavium/thunderx/Kconfig"
1770 source "board/cirrus/edb93xx/Kconfig"
1771 source "board/eets/pdu001/Kconfig"
1772 source "board/emulation/qemu-arm/Kconfig"
1773 source "board/freescale/ls2080a/Kconfig"
1774 source "board/freescale/ls2080aqds/Kconfig"
1775 source "board/freescale/ls2080ardb/Kconfig"
1776 source "board/freescale/ls1088a/Kconfig"
1777 source "board/freescale/ls1028a/Kconfig"
1778 source "board/freescale/ls1021aqds/Kconfig"
1779 source "board/freescale/ls1043aqds/Kconfig"
1780 source "board/freescale/ls1021atwr/Kconfig"
1781 source "board/freescale/ls1021atsn/Kconfig"
1782 source "board/freescale/ls1021aiot/Kconfig"
1783 source "board/freescale/ls1046aqds/Kconfig"
1784 source "board/freescale/ls1043ardb/Kconfig"
1785 source "board/freescale/ls1046ardb/Kconfig"
1786 source "board/freescale/ls1046afrwy/Kconfig"
1787 source "board/freescale/ls1012aqds/Kconfig"
1788 source "board/freescale/ls1012ardb/Kconfig"
1789 source "board/freescale/ls1012afrdm/Kconfig"
1790 source "board/freescale/lx2160a/Kconfig"
1791 source "board/freescale/mx35pdk/Kconfig"
1792 source "board/freescale/s32v234evb/Kconfig"
1793 source "board/grinn/chiliboard/Kconfig"
1794 source "board/gumstix/pepper/Kconfig"
1795 source "board/h2200/Kconfig"
1796 source "board/hisilicon/hikey/Kconfig"
1797 source "board/hisilicon/hikey960/Kconfig"
1798 source "board/hisilicon/poplar/Kconfig"
1799 source "board/isee/igep003x/Kconfig"
1800 source "board/phytec/pcm051/Kconfig"
1801 source "board/silica/pengwyn/Kconfig"
1802 source "board/spear/spear300/Kconfig"
1803 source "board/spear/spear310/Kconfig"
1804 source "board/spear/spear320/Kconfig"
1805 source "board/spear/spear600/Kconfig"
1806 source "board/spear/x600/Kconfig"
1807 source "board/st/stv0991/Kconfig"
1808 source "board/tcl/sl50/Kconfig"
1809 source "board/ucRobotics/bubblegum_96/Kconfig"
1810 source "board/birdland/bav335x/Kconfig"
1811 source "board/toradex/colibri_pxa270/Kconfig"
1812 source "board/variscite/dart_6ul/Kconfig"
1813 source "board/vscom/baltos/Kconfig"
1814 source "board/woodburn/Kconfig"
1815 source "board/xilinx/Kconfig"
1816 source "board/xilinx/zynq/Kconfig"
1817 source "board/xilinx/zynqmp/Kconfig"
1819 source "arch/arm/Kconfig.debug"
1824 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
1825 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
1826 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64