arch/arc/kernel/setup.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
   4  */
   5
   6 #include <linux/seq_file.h>
   7 #include <linux/fs.h>
   8 #include <linux/delay.h>
   9 #include <linux/root_dev.h>
  10 #include <linux/clk.h>
  11 #include <linux/clocksource.h>
  12 #include <linux/console.h>
  13 #include <linux/module.h>
  14 #include <linux/sizes.h>
  15 #include <linux/cpu.h>
  16 #include <linux/of_clk.h>
  17 #include <linux/of_fdt.h>
  18 #include <linux/of.h>
  19 #include <linux/cache.h>
  20 #include <uapi/linux/mount.h>
  21 #include <asm/sections.h>
  22 #include <asm/arcregs.h>
  23 #include <asm/asserts.h>
  24 #include <asm/tlb.h>
  25 #include <asm/setup.h>
  26 #include <asm/page.h>
  27 #include <asm/irq.h>
  28 #include <asm/unwind.h>
  29 #include <asm/mach_desc.h>
  30 #include <asm/smp.h>
  31 #include <asm/dsp-impl.h>
  32
  33 #define FIX_PTR(x)  __asm__ __volatile__(";" : "+r"(x))
  34
  35 unsigned int intr_to_DE_cnt;
  36
  37 /* Part of U-boot ABI: see head.S */
  38 int __initdata uboot_tag;
  39 int __initdata uboot_magic;
  40 char __initdata *uboot_arg;
  41
  42 const struct machine_desc *machine_desc;
  43
  44 struct task_struct *_current_task[NR_CPUS];     /* For stack switching */
  45
  46 struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
  47
  48 static const struct id_to_str arc_legacy_rel[] = {
  49         /* ID.ARCVER,   Release */
  50 #ifdef CONFIG_ISA_ARCOMPACT
  51         { 0x34,         "R4.10"},
  52         { 0x35,         "R4.11"},
  53 #else
  54         { 0x51,         "R2.0" },
  55         { 0x52,         "R2.1" },
  56         { 0x53,         "R3.0" },
  57 #endif
  58         { 0x00,         NULL   }
  59 };
  60
  61 static const struct id_to_str arc_hs_ver54_rel[] = {
  62         /* UARCH.MAJOR, Release */
  63         {  0,           "R3.10a"},
  64         {  1,           "R3.50a"},
  65         {  2,           "R3.60a"},
  66         {  3,           "R4.00a"},
  67         {  0xFF,        NULL   }
  68 };
  69
  70 static void read_decode_ccm_bcr(struct cpuinfo_arc *cpu)
  71 {
  72         if (is_isa_arcompact()) {
  73                 struct bcr_iccm_arcompact iccm;
  74                 struct bcr_dccm_arcompact dccm;
  75
  76                 READ_BCR(ARC_REG_ICCM_BUILD, iccm);
  77                 if (iccm.ver) {
  78                         cpu->iccm.sz = 4096 << iccm.sz; /* 8K to 512K */
  79                         cpu->iccm.base_addr = iccm.base << 16;
  80                 }
  81
  82                 READ_BCR(ARC_REG_DCCM_BUILD, dccm);
  83                 if (dccm.ver) {
  84                         unsigned long base;
  85                         cpu->dccm.sz = 2048 << dccm.sz; /* 2K to 256K */
  86
  87                         base = read_aux_reg(ARC_REG_DCCM_BASE_BUILD);
  88                         cpu->dccm.base_addr = base & ~0xF;
  89                 }
  90         } else {
  91                 struct bcr_iccm_arcv2 iccm;
  92                 struct bcr_dccm_arcv2 dccm;
  93                 unsigned long region;
  94
  95                 READ_BCR(ARC_REG_ICCM_BUILD, iccm);
  96                 if (iccm.ver) {
  97                         cpu->iccm.sz = 256 << iccm.sz00;        /* 512B to 16M */
  98                         if (iccm.sz00 == 0xF && iccm.sz01 > 0)
  99                                 cpu->iccm.sz <<= iccm.sz01;
 100
 101                         region = read_aux_reg(ARC_REG_AUX_ICCM);
 102                         cpu->iccm.base_addr = region & 0xF0000000;
 103                 }
 104
 105                 READ_BCR(ARC_REG_DCCM_BUILD, dccm);
 106                 if (dccm.ver) {
 107                         cpu->dccm.sz = 256 << dccm.sz0;
 108                         if (dccm.sz0 == 0xF && dccm.sz1 > 0)
 109                                 cpu->dccm.sz <<= dccm.sz1;
 110
 111                         region = read_aux_reg(ARC_REG_AUX_DCCM);
 112                         cpu->dccm.base_addr = region & 0xF0000000;
 113                 }
 114         }
 115 }
 116
 117 static void decode_arc_core(struct cpuinfo_arc *cpu)
 118 {
 119         struct bcr_uarch_build_arcv2 uarch;
 120         const struct id_to_str *tbl;
 121
 122         if (cpu->core.family < 0x54) { /* includes arc700 */
 123
 124                 for (tbl = &arc_legacy_rel[0]; tbl->id != 0; tbl++) {
 125                         if (cpu->core.family == tbl->id) {
 126                                 cpu->release = tbl->str;
 127                                 break;
 128                         }
 129                 }
 130
 131                 if (is_isa_arcompact())
 132                         cpu->name = "ARC700";
 133                 else if (tbl->str)
 134                         cpu->name = "HS38";
 135                 else
 136                         cpu->name = cpu->release = "Unknown";
 137
 138                 return;
 139         }
 140
 141         /*
 142          * Initial HS cores bumped AUX IDENTITY.ARCVER for each release until
 143          * ARCVER 0x54 which introduced AUX MICRO_ARCH_BUILD and subsequent
 144          * releases only update it.
 145          */
 146         READ_BCR(ARC_REG_MICRO_ARCH_BCR, uarch);
 147
 148         if (uarch.prod == 4) {
 149                 cpu->name = "HS48";
 150                 cpu->extn.dual = 1;
 151
 152         } else {
 153                 cpu->name = "HS38";
 154         }
 155
 156         for (tbl = &arc_hs_ver54_rel[0]; tbl->id != 0xFF; tbl++) {
 157                 if (uarch.maj == tbl->id) {
 158                         cpu->release = tbl->str;
 159                         break;
 160                 }
 161         }
 162 }
 163
 164 static void read_arc_build_cfg_regs(void)
 165 {
 166         struct bcr_timer timer;
 167         struct bcr_generic bcr;
 168         struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
 169         struct bcr_isa_arcv2 isa;
 170         struct bcr_actionpoint ap;
 171
 172         FIX_PTR(cpu);
 173
 174         READ_BCR(AUX_IDENTITY, cpu->core);
 175         decode_arc_core(cpu);
 176
 177         READ_BCR(ARC_REG_TIMERS_BCR, timer);
 178         cpu->extn.timer0 = timer.t0;
 179         cpu->extn.timer1 = timer.t1;
 180         cpu->extn.rtc = timer.rtc;
 181
 182         cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
 183
 184         READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
 185
 186         /* Read CCM BCRs for boot reporting even if not enabled in Kconfig */
 187         read_decode_ccm_bcr(cpu);
 188
 189         if (is_isa_arcompact()) {
 190                 struct bcr_fp_arcompact sp, dp;
 191                 struct bcr_bpu_arcompact bpu;
 192
 193                 READ_BCR(ARC_REG_FP_BCR, sp);
 194                 READ_BCR(ARC_REG_DPFP_BCR, dp);
 195                 cpu->extn.fpu_sp = sp.ver ? 1 : 0;
 196                 cpu->extn.fpu_dp = dp.ver ? 1 : 0;
 197
 198                 READ_BCR(ARC_REG_BPU_BCR, bpu);
 199                 cpu->bpu.ver = bpu.ver;
 200                 cpu->bpu.full = bpu.fam ? 1 : 0;
 201                 if (bpu.ent) {
 202                         cpu->bpu.num_cache = 256 << (bpu.ent - 1);
 203                         cpu->bpu.num_pred = 256 << (bpu.ent - 1);
 204                 }
 205         } else {
 206                 struct bcr_fp_arcv2 spdp;
 207                 struct bcr_bpu_arcv2 bpu;
 208
 209                 READ_BCR(ARC_REG_FP_V2_BCR, spdp);
 210                 cpu->extn.fpu_sp = spdp.sp ? 1 : 0;
 211                 cpu->extn.fpu_dp = spdp.dp ? 1 : 0;
 212
 213                 READ_BCR(ARC_REG_BPU_BCR, bpu);
 214                 cpu->bpu.ver = bpu.ver;
 215                 cpu->bpu.full = bpu.ft;
 216                 cpu->bpu.num_cache = 256 << bpu.bce;
 217                 cpu->bpu.num_pred = 2048 << bpu.pte;
 218                 cpu->bpu.ret_stk = 4 << bpu.rse;
 219
 220                 /* if dual issue hardware, is it enabled ? */
 221                 if (cpu->extn.dual) {
 222                         unsigned int exec_ctrl;
 223
 224                         READ_BCR(AUX_EXEC_CTRL, exec_ctrl);
 225                         cpu->extn.dual_enb = !(exec_ctrl & 1);
 226                 }
 227         }
 228
 229         READ_BCR(ARC_REG_AP_BCR, ap);
 230         if (ap.ver) {
 231                 cpu->extn.ap_num = 2 << ap.num;
 232                 cpu->extn.ap_full = !ap.min;
 233         }
 234
 235         READ_BCR(ARC_REG_SMART_BCR, bcr);
 236         cpu->extn.smart = bcr.ver ? 1 : 0;
 237
 238         READ_BCR(ARC_REG_RTT_BCR, bcr);
 239         cpu->extn.rtt = bcr.ver ? 1 : 0;
 240
 241         READ_BCR(ARC_REG_ISA_CFG_BCR, isa);
 242
 243         /* some hacks for lack of feature BCR info in old ARC700 cores */
 244         if (is_isa_arcompact()) {
 245                 if (!isa.ver)   /* ISA BCR absent, use Kconfig info */
 246                         cpu->isa.atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
 247                 else {
 248                         /* ARC700_BUILD only has 2 bits of isa info */
 249                         struct bcr_generic bcr = *(struct bcr_generic *)&isa;
 250                         cpu->isa.atomic = bcr.info & 1;
 251                 }
 252
 253                 cpu->isa.be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
 254
 255                  /* there's no direct way to distinguish 750 vs. 770 */
 256                 if (unlikely(cpu->core.family < 0x34))
 257                         cpu->name = "ARC750";
 258         } else {
 259                 cpu->isa = isa;
 260         }
 261 }
 262
 263 static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
 264 {
 265         struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
 266         struct bcr_identity *core = &cpu->core;
 267         char mpy_opt[16];
 268         int n = 0;
 269
 270         FIX_PTR(cpu);
 271
 272         n += scnprintf(buf + n, len - n,
 273                        "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
 274                        core->family, core->cpu_id, core->chip_id);
 275
 276         n += scnprintf(buf + n, len - n, "processor [%d]\t: %s %s (%s ISA) %s%s%s\n",
 277                        cpu_id, cpu->name, cpu->release,
 278                        is_isa_arcompact() ? "ARCompact" : "ARCv2",
 279                        IS_AVAIL1(cpu->isa.be, "[Big-Endian]"),
 280                        IS_AVAIL3(cpu->extn.dual, cpu->extn.dual_enb, " Dual-Issue "));
 281
 282         n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s%s%s\nISA Extn\t: ",
 283                        IS_AVAIL1(cpu->extn.timer0, "Timer0 "),
 284                        IS_AVAIL1(cpu->extn.timer1, "Timer1 "),
 285                        IS_AVAIL2(cpu->extn.rtc, "RTC [UP 64-bit] ", CONFIG_ARC_TIMERS_64BIT),
 286                        IS_AVAIL2(cpu->extn.gfrc, "GFRC [SMP 64-bit] ", CONFIG_ARC_TIMERS_64BIT));
 287
 288         if (cpu->extn_mpy.ver) {
 289                 if (is_isa_arcompact()) {
 290                         scnprintf(mpy_opt, 16, "mpy");
 291                 } else {
 292
 293                         int opt = 2;    /* stock MPY/MPYH */
 294
 295                         if (cpu->extn_mpy.dsp)  /* OPT 7-9 */
 296                                 opt = cpu->extn_mpy.dsp + 6;
 297
 298                         scnprintf(mpy_opt, 16, "mpy[opt %d] ", opt);
 299                 }
 300         }
 301
 302         n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
 303                        IS_AVAIL2(cpu->isa.atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
 304                        IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
 305                        IS_AVAIL2(cpu->isa.unalign, "unalign ", CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS),
 306                        IS_AVAIL1(cpu->extn_mpy.ver, mpy_opt),
 307                        IS_AVAIL1(cpu->isa.div_rem, "div_rem "));
 308
 309         if (cpu->bpu.ver) {
 310                 n += scnprintf(buf + n, len - n,
 311                               "BPU\t\t: %s%s match, cache:%d, Predict Table:%d Return stk: %d",
 312                               IS_AVAIL1(cpu->bpu.full, "full"),
 313                               IS_AVAIL1(!cpu->bpu.full, "partial"),
 314                               cpu->bpu.num_cache, cpu->bpu.num_pred, cpu->bpu.ret_stk);
 315
 316                 if (is_isa_arcv2()) {
 317                         struct bcr_lpb lpb;
 318
 319                         READ_BCR(ARC_REG_LPB_BUILD, lpb);
 320                         if (lpb.ver) {
 321                                 unsigned int ctl;
 322                                 ctl = read_aux_reg(ARC_REG_LPB_CTRL);
 323
 324                                 n += scnprintf(buf + n, len - n, " Loop Buffer:%d %s",
 325                                                lpb.entries,
 326                                                IS_DISABLED_RUN(!ctl));
 327                         }
 328                 }
 329                 n += scnprintf(buf + n, len - n, "\n");
 330         }
 331
 332         return buf;
 333 }
 334
 335 static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
 336 {
 337         int n = 0;
 338         struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
 339
 340         FIX_PTR(cpu);
 341
 342         n += scnprintf(buf + n, len - n, "Vector Table\t: %#x\n", cpu->vec_base);
 343
 344         if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)
 345                 n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
 346                                IS_AVAIL1(cpu->extn.fpu_sp, "SP "),
 347                                IS_AVAIL1(cpu->extn.fpu_dp, "DP "));
 348
 349         if (cpu->extn.ap_num | cpu->extn.smart | cpu->extn.rtt) {
 350                 n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s",
 351                                IS_AVAIL1(cpu->extn.smart, "smaRT "),
 352                                IS_AVAIL1(cpu->extn.rtt, "RTT "));
 353                 if (cpu->extn.ap_num) {
 354                         n += scnprintf(buf + n, len - n, "ActionPoint %d/%s",
 355                                        cpu->extn.ap_num,
 356                                        cpu->extn.ap_full ? "full":"min");
 357                 }
 358                 n += scnprintf(buf + n, len - n, "\n");
 359         }
 360
 361         if (cpu->dccm.sz || cpu->iccm.sz)
 362                 n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
 363                                cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),
 364                                cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
 365
 366         if (is_isa_arcv2()) {
 367
 368                 /* Error Protection: ECC/Parity */
 369                 struct bcr_erp erp;
 370                 READ_BCR(ARC_REG_ERP_BUILD, erp);
 371
 372                 if (erp.ver) {
 373                         struct  ctl_erp ctl;
 374                         READ_BCR(ARC_REG_ERP_CTRL, ctl);
 375
 376                         /* inverted bits: 0 means enabled */
 377                         n += scnprintf(buf + n, len - n, "Extn [ECC]\t: %s%s%s%s%s%s\n",
 378                                 IS_AVAIL3(erp.ic,  !ctl.dpi, "IC "),
 379                                 IS_AVAIL3(erp.dc,  !ctl.dpd, "DC "),
 380                                 IS_AVAIL3(erp.mmu, !ctl.mpd, "MMU "));
 381                 }
 382         }
 383
 384         return buf;
 385 }
 386
 387 void chk_opt_strict(char *opt_name, bool hw_exists, bool opt_ena)
 388 {
 389         if (hw_exists && !opt_ena)
 390                 pr_warn(" ! Enable %s for working apps\n", opt_name);
 391         else if (!hw_exists && opt_ena)
 392                 panic("Disable %s, hardware NOT present\n", opt_name);
 393 }
 394
 395 void chk_opt_weak(char *opt_name, bool hw_exists, bool opt_ena)
 396 {
 397         if (!hw_exists && opt_ena)
 398                 panic("Disable %s, hardware NOT present\n", opt_name);
 399 }
 400
 401 static void arc_chk_core_config(void)
 402 {
 403         struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
 404         int present = 0;
 405
 406         if (!cpu->extn.timer0)
 407                 panic("Timer0 is not present!\n");
 408
 409         if (!cpu->extn.timer1)
 410                 panic("Timer1 is not present!\n");
 411
 412 #ifdef CONFIG_ARC_HAS_DCCM
 413         /*
 414          * DCCM can be arbit placed in hardware.
 415          * Make sure it's placement/sz matches what Linux is built with
 416          */
 417         if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
 418                 panic("Linux built with incorrect DCCM Base address\n");
 419
 420         if (CONFIG_ARC_DCCM_SZ * SZ_1K != cpu->dccm.sz)
 421                 panic("Linux built with incorrect DCCM Size\n");
 422 #endif
 423
 424 #ifdef CONFIG_ARC_HAS_ICCM
 425         if (CONFIG_ARC_ICCM_SZ * SZ_1K != cpu->iccm.sz)
 426                 panic("Linux built with incorrect ICCM Size\n");
 427 #endif
 428
 429         /*
 430          * FP hardware/software config sanity
 431          * -If hardware present, kernel needs to save/restore FPU state
 432          * -If not, it will crash trying to save/restore the non-existant regs
 433          */
 434
 435         if (is_isa_arcompact()) {
 436                 /* only DPDP checked since SP has no arch visible regs */
 437                 present = cpu->extn.fpu_dp;
 438                 CHK_OPT_STRICT(CONFIG_ARC_FPU_SAVE_RESTORE, present);
 439         } else {
 440                 /* Accumulator Low:High pair (r58:59) present if DSP MPY or FPU */
 441                 present = cpu->extn_mpy.dsp | cpu->extn.fpu_sp | cpu->extn.fpu_dp;
 442                 CHK_OPT_STRICT(CONFIG_ARC_HAS_ACCL_REGS, present);
 443
 444                 dsp_config_check();
 445         }
 446 }
 447
 448 /*
 449  * Initialize and setup the processor core
 450  * This is called by all the CPUs thus should not do special case stuff
 451  *    such as only for boot CPU etc
 452  */
 453
 454 void setup_processor(void)
 455 {
 456         char str[512];
 457         int cpu_id = smp_processor_id();
 458
 459         read_arc_build_cfg_regs();
 460         arc_init_IRQ();
 461
 462         pr_info("%s", arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
 463         pr_info("%s", arc_mmu_mumbojumbo(cpu_id, str, sizeof(str)));
 464         pr_info("%s", arc_cache_mumbojumbo(cpu_id, str, sizeof(str)));
 465
 466         arc_mmu_init();
 467         arc_cache_init();
 468
 469         pr_info("%s", arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
 470         pr_info("%s", arc_platform_smp_cpuinfo());
 471
 472         arc_chk_core_config();
 473 }
 474
 475 static inline bool uboot_arg_invalid(unsigned long addr)
 476 {
 477         /*
 478          * Check that it is a untranslated address (although MMU is not enabled
 479          * yet, it being a high address ensures this is not by fluke)
 480          */
 481         if (addr < PAGE_OFFSET)
 482                 return true;
 483
 484         /* Check that address doesn't clobber resident kernel image */
 485         return addr >= (unsigned long)_stext && addr <= (unsigned long)_end;
 486 }
 487
 488 #define IGNORE_ARGS             "Ignore U-boot args: "
 489
 490 /* uboot_tag values for U-boot - kernel ABI revision 0; see head.S */
 491 #define UBOOT_TAG_NONE          0
 492 #define UBOOT_TAG_CMDLINE       1
 493 #define UBOOT_TAG_DTB           2
 494 /* We always pass 0 as magic from U-boot */
 495 #define UBOOT_MAGIC_VALUE       0
 496
 497 void __init handle_uboot_args(void)
 498 {
 499         bool use_embedded_dtb = true;
 500         bool append_cmdline = false;
 501
 502         /* check that we know this tag */
 503         if (uboot_tag != UBOOT_TAG_NONE &&
 504             uboot_tag != UBOOT_TAG_CMDLINE &&
 505             uboot_tag != UBOOT_TAG_DTB) {
 506                 pr_warn(IGNORE_ARGS "invalid uboot tag: '%08x'\n", uboot_tag);
 507                 goto ignore_uboot_args;
 508         }
 509
 510         if (uboot_magic != UBOOT_MAGIC_VALUE) {
 511                 pr_warn(IGNORE_ARGS "non zero uboot magic\n");
 512                 goto ignore_uboot_args;
 513         }
 514
 515         if (uboot_tag != UBOOT_TAG_NONE &&
 516             uboot_arg_invalid((unsigned long)uboot_arg)) {
 517                 pr_warn(IGNORE_ARGS "invalid uboot arg: '%px'\n", uboot_arg);
 518                 goto ignore_uboot_args;
 519         }
 520
 521         /* see if U-boot passed an external Device Tree blob */
 522         if (uboot_tag == UBOOT_TAG_DTB) {
 523                 machine_desc = setup_machine_fdt((void *)uboot_arg);
 524
 525                 /* external Device Tree blob is invalid - use embedded one */
 526                 use_embedded_dtb = !machine_desc;
 527         }
 528
 529         if (uboot_tag == UBOOT_TAG_CMDLINE)
 530                 append_cmdline = true;
 531
 532 ignore_uboot_args:
 533
 534         if (use_embedded_dtb) {
 535                 machine_desc = setup_machine_fdt(__dtb_start);
 536                 if (!machine_desc)
 537                         panic("Embedded DT invalid\n");
 538         }
 539
 540         /*
 541          * NOTE: @boot_command_line is populated by setup_machine_fdt() so this
 542          * append processing can only happen after.
 543          */
 544         if (append_cmdline) {
 545                 /* Ensure a whitespace between the 2 cmdlines */
 546                 strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
 547                 strlcat(boot_command_line, uboot_arg, COMMAND_LINE_SIZE);
 548         }
 549 }
 550
 551 void __init setup_arch(char **cmdline_p)
 552 {
 553         handle_uboot_args();
 554
 555         /* Save unparsed command line copy for /proc/cmdline */
 556         *cmdline_p = boot_command_line;
 557
 558         /* To force early parsing of things like mem=xxx */
 559         parse_early_param();
 560
 561         /* Platform/board specific: e.g. early console registration */
 562         if (machine_desc->init_early)
 563                 machine_desc->init_early();
 564
 565         smp_init_cpus();
 566
 567         setup_processor();
 568         setup_arch_memory();
 569
 570         /* copy flat DT out of .init and then unflatten it */
 571         unflatten_and_copy_device_tree();
 572
 573         /* Can be issue if someone passes cmd line arg "ro"
 574          * But that is unlikely so keeping it as it is
 575          */
 576         root_mountflags &= ~MS_RDONLY;
 577
 578         arc_unwind_init();
 579 }
 580
 581 /*
 582  * Called from start_kernel() - boot CPU only
 583  */
 584 void __init time_init(void)
 585 {
 586         of_clk_init(NULL);
 587         timer_probe();
 588 }
 589
 590 static int __init customize_machine(void)
 591 {
 592         if (machine_desc->init_machine)
 593                 machine_desc->init_machine();
 594
 595         return 0;
 596 }
 597 arch_initcall(customize_machine);
 598
 599 static int __init init_late_machine(void)
 600 {
 601         if (machine_desc->init_late)
 602                 machine_desc->init_late();
 603
 604         return 0;
 605 }
 606 late_initcall(init_late_machine);
 607 /*
 608  *  Get CPU information for use by the procfs.
 609  */
 610
 611 #define cpu_to_ptr(c)   ((void *)(0xFFFF0000 | (unsigned int)(c)))
 612 #define ptr_to_cpu(p)   (~0xFFFF0000UL & (unsigned int)(p))
 613
 614 static int show_cpuinfo(struct seq_file *m, void *v)
 615 {
 616         char *str;
 617         int cpu_id = ptr_to_cpu(v);
 618         struct device *cpu_dev = get_cpu_device(cpu_id);
 619         struct clk *cpu_clk;
 620         unsigned long freq = 0;
 621
 622         if (!cpu_online(cpu_id)) {
 623                 seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
 624                 goto done;
 625         }
 626
 627         str = (char *)__get_free_page(GFP_KERNEL);
 628         if (!str)
 629                 goto done;
 630
 631         seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
 632
 633         cpu_clk = clk_get(cpu_dev, NULL);
 634         if (IS_ERR(cpu_clk)) {
 635                 seq_printf(m, "CPU speed \t: Cannot get clock for processor [%d]\n",
 636                            cpu_id);
 637         } else {
 638                 freq = clk_get_rate(cpu_clk);
 639         }
 640         if (freq)
 641                 seq_printf(m, "CPU speed\t: %lu.%02lu Mhz\n",
 642                            freq / 1000000, (freq / 10000) % 100);
 643
 644         seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
 645                    loops_per_jiffy / (500000 / HZ),
 646                    (loops_per_jiffy / (5000 / HZ)) % 100);
 647
 648         seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
 649         seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
 650         seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
 651         seq_printf(m, arc_platform_smp_cpuinfo());
 652
 653         free_page((unsigned long)str);
 654 done:
 655         seq_printf(m, "\n");
 656
 657         return 0;
 658 }
 659
 660 static void *c_start(struct seq_file *m, loff_t *pos)
 661 {
 662         /*
 663          * Callback returns cpu-id to iterator for show routine, NULL to stop.
 664          * However since NULL is also a valid cpu-id (0), we use a round-about
 665          * way to pass it w/o having to kmalloc/free a 2 byte string.
 666          * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
 667          */
 668         return *pos < nr_cpu_ids ? cpu_to_ptr(*pos) : NULL;
 669 }
 670
 671 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
 672 {
 673         ++*pos;
 674         return c_start(m, pos);
 675 }
 676
 677 static void c_stop(struct seq_file *m, void *v)
 678 {
 679 }
 680
 681 const struct seq_operations cpuinfo_op = {
 682         .start  = c_start,
 683         .next   = c_next,
 684         .stop   = c_stop,
 685         .show   = show_cpuinfo
 686 };
 687
 688 static DEFINE_PER_CPU(struct cpu, cpu_topology);
 689
 690 static int __init topology_init(void)
 691 {
 692         int cpu;
 693
 694         for_each_present_cpu(cpu)
 695             register_cpu(&per_cpu(cpu_topology, cpu), cpu);
 696
 697         return 0;
 698 }
 699
 700 subsys_initcall(topology_init);