arch/arc/dts/hsdk.dts

   1 /*
   2  * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6 /dts-v1/;
   7
   8 #include "skeleton.dtsi"
   9
  10 / {
  11         #address-cells = <1>;
  12         #size-cells = <1>;
  13
  14         aliases {
  15                 console = &uart0;
  16         };
  17
  18         cpu_card {
  19                 core_clk: core_clk {
  20                         #clock-cells = <0>;
  21                         compatible = "fixed-clock";
  22                         clock-frequency = <1000000000>;
  23                         u-boot,dm-pre-reloc;
  24                 };
  25         };
  26
  27         cgu_clk: cgu-clk@f0000000 {
  28                 compatible = "snps,hsdk-cgu-clock";
  29                 reg = <0xf0000000 0x10>, <0xf00014B8 0x4>;
  30                 #clock-cells = <1>;
  31         };
  32
  33         uart0: serial0@f0005000 {
  34                 compatible = "snps,dw-apb-uart";
  35                 reg = <0xf0005000 0x1000>;
  36                 reg-shift = <2>;
  37                 reg-io-width = <4>;
  38         };
  39
  40         ethernet@f0008000 {
  41                 #interrupt-cells = <1>;
  42                 compatible = "altr,socfpga-stmmac";
  43                 reg = <0xf0008000 0x2000>;
  44                 phy-mode = "gmii";
  45         };
  46
  47         ehci@0xf0040000 {
  48                 compatible = "generic-ehci";
  49                 reg = <0xf0040000 0x100>;
  50         };
  51
  52         ohci@0xf0060000 {
  53                 compatible = "generic-ohci";
  54                 reg = <0xf0060000 0x100>;
  55         };
  56 };