arch/arc/dts/axs10x_mb.dtsi

   1 /*
   2  * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 / {
   8         axs10x_mb@e0000000 {
   9                 compatible = "simple-bus";
  10                 #address-cells = <1>;
  11                 #size-cells = <1>;
  12                 ranges = <0x00000000 0xe0000000 0x10000000>;
  13                 u-boot,dm-pre-reloc;
  14
  15                 clocks {
  16                         compatible = "simple-bus";
  17                         u-boot,dm-pre-reloc;
  18
  19                         apbclk: apbclk {
  20                                 compatible = "fixed-clock";
  21                                 clock-frequency = <50000000>;
  22                                 #clock-cells = <0>;
  23                         };
  24
  25                         uartclk: uartclk {
  26                                 compatible = "fixed-clock";
  27                                 clock-frequency = <33333333>;
  28                                 #clock-cells = <0>;
  29                                 u-boot,dm-pre-reloc;
  30                         };
  31                 };
  32
  33                 ethernet@18000 {
  34                         #interrupt-cells = <1>;
  35                         compatible = "altr,socfpga-stmmac";
  36                         reg = < 0x18000 0x2000 >;
  37                         interrupts = < 25 >;
  38                         interrupt-names = "macirq";
  39                         phy-mode = "gmii";
  40                         snps,pbl = < 32 >;
  41                         clocks = <&apbclk>;
  42                         clock-names = "stmmaceth";
  43                         max-speed = <100>;
  44                 };
  45
  46                 ehci@0x40000 {
  47                         compatible = "generic-ehci";
  48                         reg = < 0x40000 0x100 >;
  49                         interrupts = < 8 >;
  50                 };
  51
  52                 ohci@0x60000 {
  53                         compatible = "generic-ohci";
  54                         reg = < 0x60000 0x100 >;
  55                         interrupts = < 8 >;
  56                 };
  57
  58                 uart0: serial0@22000 {
  59                         compatible = "snps,dw-apb-uart";
  60                         reg = <0x22000 0x100>;
  61                         clocks = <&uartclk>;
  62                         reg-shift = <2>;
  63                         reg-io-width = <4>;
  64                 };
  65         };
  66 };