1 menu "ARC architecture"
8 default "arcv1" if ISA_ARCOMPACT
9 default "arcv2" if ISA_ARCV2
12 prompt "ARC Instruction Set"
18 The original ARC ISA of ARC600/700 cores
23 ISA for the Next Generation ARC-HS cores
28 prompt "CPU selection"
29 default CPU_ARC770D if ISA_ARCOMPACT
30 default CPU_ARCHS38 if ISA_ARCV2
34 depends on ISA_ARCOMPACT
37 Choose this option to build an U-Boot for ARC750D CPU.
41 depends on ISA_ARCOMPACT
44 Choose this option to build an U-Boot for ARC770D CPU.
51 Next Generation ARC Core based on ISA-v2 ISA without MMU.
58 Next Generation ARC Core based on ISA-v2 ISA without MMU.
65 Next Generation ARC Core based on ISA-v2 ISA with MMU.
71 default ARC_MMU_V3 if CPU_ARC770D
72 default ARC_MMU_V2 if CPU_ARC750D
73 default ARC_MMU_ABSENT if CPU_ARCEM6
74 default ARC_MMU_ABSENT if CPU_ARCHS36
75 default ARC_MMU_V4 if CPU_ARCHS38
84 depends on CPU_ARC750D
86 Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio
87 when 2 D-TLB and 1 I-TLB entries index into same 2way set.
91 depends on CPU_ARC770D
93 Introduced with ARC700 4.10: New Features
94 Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
95 Shared Address Spaces (SASID)
99 depends on CPU_ARCHS38
101 Introduced as a part of ARC HS38 release.
107 default 0 if ARC_MMU_ABSENT
108 default 2 if ARC_MMU_V2
109 default 3 if ARC_MMU_V3
110 default 4 if ARC_MMU_V4
112 config CPU_BIG_ENDIAN
113 bool "Enable Big Endian Mode"
115 Build kernel for Big Endian Mode of ARC CPU
117 config SYS_ICACHE_OFF
118 bool "Do not enable icache"
120 Do not enable instruction cache in U-Boot.
122 config SPL_SYS_ICACHE_OFF
123 bool "Do not enable icache in SPL"
125 default SYS_ICACHE_OFF
127 Do not enable instruction cache in SPL.
129 config SYS_DCACHE_OFF
130 bool "Do not enable dcache"
132 Do not enable data cache in U-Boot.
134 config SPL_SYS_DCACHE_OFF
135 bool "Do not enable dcache in SPL"
137 default SYS_DCACHE_OFF
139 Do not enable data cache in SPL.
146 config ARC_DBG_IOC_ENABLE
147 bool "Enable IO coherency unit"
148 depends on CPU_ARCHS38
150 Enable IO coherency unit to debug problems with caches and
152 NOTE: as of today linux will not work properly if this option
153 is enabled in u-boot!
158 prompt "Target select"
159 default TARGET_AXS103
165 bool "Support ARC simulation & prototyping platforms"
168 bool "Support Synopsys Designware SDP board AXS101"
171 bool "Support Synopsys Designware SDP board AXS103"
174 bool "Synopsys EM Software Development Platform"
178 bool "Support Synopsys HSDK or HSDK-4xD board"
180 config TARGET_IOT_DEVKIT
181 bool "Synopsys Brite IoT Development kit"
186 source "board/abilis/tb100/Kconfig"
187 source "board/synopsys/axs10x/Kconfig"
188 source "board/synopsys/emsdp/Kconfig"
189 source "board/synopsys/hsdk/Kconfig"
190 source "board/synopsys/iot_devkit/Kconfig"
191 source "board/synopsys/nsim/Kconfig"