2 depends on SANDBOX || NDS32
5 config CREATE_ARCH_SYMLINK
8 config HAVE_ARCH_IOREMAP
11 config NEEDS_MANUAL_RELOC
14 config SYS_CACHE_SHIFT_4
17 config SYS_CACHE_SHIFT_5
20 config SYS_CACHE_SHIFT_6
23 config SYS_CACHE_SHIFT_7
26 config SYS_CACHELINE_SIZE
28 default 128 if SYS_CACHE_SHIFT_7
29 default 64 if SYS_CACHE_SHIFT_6
30 default 32 if SYS_CACHE_SHIFT_5
31 default 16 if SYS_CACHE_SHIFT_4
35 config LINKER_LIST_ALIGN
38 default 8 if ARM64 || X86
41 Force the each linker list to be aligned to this boundary. This
42 is required if ll_entry_get() is used, since otherwise the linker
43 may add padding into the table, thus breaking it.
44 See linker_lists.rst for full details.
47 prompt "Architecture select"
51 bool "ARC architecture"
55 select HAVE_PRIVATE_LIBGCC
56 select SUPPORT_OF_CONTROL
57 select SYS_CACHE_SHIFT_7
61 bool "ARM architecture"
62 select ARCH_SUPPORTS_LTO
63 select CREATE_ARCH_SYMLINK
64 select HAVE_PRIVATE_LIBGCC if !ARM64
65 select SUPPORT_OF_CONTROL
68 bool "M68000 architecture"
69 select HAVE_PRIVATE_LIBGCC
70 select NEEDS_MANUAL_RELOC
71 select SYS_BOOT_GET_CMDLINE
72 select SYS_BOOT_GET_KBD
73 select SYS_CACHE_SHIFT_4
74 select SUPPORT_OF_CONTROL
77 bool "MicroBlaze architecture"
78 select NEEDS_MANUAL_RELOC
79 select SUPPORT_OF_CONTROL
83 bool "MIPS architecture"
84 select HAVE_ARCH_IOREMAP
85 select HAVE_PRIVATE_LIBGCC
86 select SUPPORT_OF_CONTROL
89 bool "NDS32 architecture"
90 select SUPPORT_OF_CONTROL
93 bool "Nios II architecture"
97 select SUPPORT_OF_CONTROL
101 bool "PowerPC architecture"
102 select HAVE_PRIVATE_LIBGCC
103 select SUPPORT_OF_CONTROL
104 select SYS_BOOT_GET_CMDLINE
105 select SYS_BOOT_GET_KBD
108 bool "RISC-V architecture"
109 select CREATE_ARCH_SYMLINK
110 select SUPPORT_OF_CONTROL
125 imply SPL_LIBCOMMON_SUPPORT
126 imply SPL_LIBGENERIC_SUPPORT
132 select ARCH_SUPPORTS_LTO
133 select BOARD_LATE_INIT
144 select GZIP_COMPRESSED
145 select HAVE_BLOCK_DEVICE
147 select OF_BOARD_SETUP
150 select SUPPORT_OF_CONTROL
151 select SYSRESET_CMD_POWEROFF
152 select SYS_CACHE_SHIFT_4
154 select SUPPORT_EXTENSION_SCAN
179 imply PARTITION_TYPE_GUID
182 imply UDP_FUNCTION_FASTBOOT
195 imply ACPI_PMC_SANDBOX
207 bool "SuperH architecture"
208 select HAVE_PRIVATE_LIBGCC
209 select SUPPORT_OF_CONTROL
212 bool "x86 architecture"
215 select CREATE_ARCH_SYMLINK
217 select HAVE_ARCH_IOMAP
218 select HAVE_PRIVATE_LIBGCC
222 select SUPPORT_OF_CONTROL
223 select SYS_CACHE_SHIFT_6
225 select USE_PRIVATE_LIBGCC
228 imply HAS_ROM if X86_RESET_VECTOR
231 imply CMD_FPGA_LOADMK
254 imply USB_ETHER_SMSC95XX
259 imply ACPIGEN if !QEMU
260 imply SYSINFO if GENERATE_SMBIOS_TABLE
261 imply SYSINFO_SMBIOS if GENERATE_SMBIOS_TABLE
264 # Thing to enable for when SPL/TPL are enabled: SPL
267 imply SPL_DRIVERS_MISC
270 imply SPL_LIBCOMMON_SUPPORT
271 imply SPL_LIBGENERIC_SUPPORT
273 imply SPL_SPI_FLASH_SUPPORT
281 imply TPL_DRIVERS_MISC
284 imply TPL_LIBCOMMON_SUPPORT
285 imply TPL_LIBGENERIC_SUPPORT
293 bool "Xtensa architecture"
294 select CREATE_ARCH_SYMLINK
295 select SUPPORT_OF_CONTROL
302 This option should contain the architecture name to build the
303 appropriate arch/<CONFIG_SYS_ARCH> directory.
304 All the architectures should specify this option correctly.
309 This option should contain the CPU name to build the correct
310 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU> directory.
312 This is optional. For those targets without the CPU directory,
313 leave this option empty.
318 This option should contain the SoC name to build the directory
319 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU>/<CONFIG_SYS_SOC>.
321 This is optional. For those targets without the SoC directory,
322 leave this option empty.
327 This option should contain the vendor name of the target board.
329 board/<CONFIG_SYS_VENDOR>/common/Makefile exists, the vendor common
330 directory is compiled.
331 If CONFIG_SYS_BOARD is also set, the sources under
332 board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> directory are compiled.
334 This is optional. For those targets without the vendor directory,
335 leave this option empty.
340 This option should contain the name of the target board.
341 If it is set, either board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD>
342 or board/<CONFIG_SYS_BOARD> directory is compiled depending on
343 whether CONFIG_SYS_VENDOR is set or not.
345 This is optional. For those targets without the board directory,
346 leave this option empty.
348 config SYS_CONFIG_NAME
351 This option should contain the base name of board header file.
352 The header file include/configs/<CONFIG_SYS_CONFIG_NAME>.h
353 should be included from include/config.h.
355 config SYS_DISABLE_DCACHE_OPS
358 This option disables dcache flush and dcache invalidation
359 operations. For example, on coherent systems where cache
360 operatios are not required, enable this option to avoid them.
361 Note that, its up to the individual architectures to implement
366 depends on PPC || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A
367 default 0xFF000000 if MPC8xx
368 default 0xF0000000 if ARCH_MPC8313
369 default 0xE0000000 if MPC83xx && !ARCH_MPC8313
370 default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
371 default SYS_CCSRBAR_DEFAULT
373 Address for the Internal Memory-Mapped Registers (IMMR) window used
374 to configure the features of many Freescale / NXP SoCs.
376 config SKIP_LOWLEVEL_INIT
377 bool "Skip the calls to certain low level initialization functions"
378 depends on ARM || NDS32 || MIPS || RISCV
380 If enabled, then certain low level initializations (like setting up
381 the memory controller) are omitted and/or U-Boot does not relocate
383 Normally this variable MUST NOT be defined. The only exception is
384 when U-Boot is loaded (to RAM) by some other boot loader or by a
385 debugger which performs these initializations itself.
387 config SPL_SKIP_LOWLEVEL_INIT
388 bool "Skip the calls to certain low level initialization functions"
389 depends on SPL && (ARM || NDS32 || MIPS || RISCV)
391 If enabled, then certain low level initializations (like setting up
392 the memory controller) are omitted and/or U-Boot does not relocate
394 Normally this variable MUST NOT be defined. The only exception is
395 when U-Boot is loaded (to RAM) by some other boot loader or by a
396 debugger which performs these initializations itself.
398 config TPL_SKIP_LOWLEVEL_INIT
399 bool "Skip the calls to certain low level initialization functions"
400 depends on SPL && ARM
402 If enabled, then certain low level initializations (like setting up
403 the memory controller) are omitted and/or U-Boot does not relocate
405 Normally this variable MUST NOT be defined. The only exception is
406 when U-Boot is loaded (to RAM) by some other boot loader or by a
407 debugger which performs these initializations itself.
409 config SKIP_LOWLEVEL_INIT_ONLY
410 bool "Skip the call to lowlevel_init during early boot ONLY"
413 This allows just the call to lowlevel_init() to be skipped. The
414 normal CP15 init (such as enabling the instruction cache) is still
417 config SPL_SKIP_LOWLEVEL_INIT_ONLY
418 bool "Skip the call to lowlevel_init during early boot ONLY"
419 depends on SPL && ARM
421 This allows just the call to lowlevel_init() to be skipped. The
422 normal CP15 init (such as enabling the instruction cache) is still
425 config TPL_SKIP_LOWLEVEL_INIT_ONLY
426 bool "Skip the call to lowlevel_init during early boot ONLY"
427 depends on TPL && ARM
429 This allows just the call to lowlevel_init() to be skipped. The
430 normal CP15 init (such as enabling the instruction cache) is still
433 source "arch/arc/Kconfig"
434 source "arch/arm/Kconfig"
435 source "arch/m68k/Kconfig"
436 source "arch/microblaze/Kconfig"
437 source "arch/mips/Kconfig"
438 source "arch/nds32/Kconfig"
439 source "arch/nios2/Kconfig"
440 source "arch/powerpc/Kconfig"
441 source "arch/sandbox/Kconfig"
442 source "arch/sh/Kconfig"
443 source "arch/x86/Kconfig"
444 source "arch/xtensa/Kconfig"
445 source "arch/riscv/Kconfig"