1 config CREATE_ARCH_SYMLINK
4 config HAVE_ARCH_IOREMAP
7 config NEEDS_MANUAL_RELOC
10 config SYS_CACHE_SHIFT_4
13 config SYS_CACHE_SHIFT_5
16 config SYS_CACHE_SHIFT_6
19 config SYS_CACHE_SHIFT_7
22 config SYS_CACHELINE_SIZE
24 default 128 if SYS_CACHE_SHIFT_7
25 default 64 if SYS_CACHE_SHIFT_6
26 default 32 if SYS_CACHE_SHIFT_5
27 default 16 if SYS_CACHE_SHIFT_4
31 config LINKER_LIST_ALIGN
34 default 8 if ARM64 || X86
37 Force the each linker list to be aligned to this boundary. This
38 is required if ll_entry_get() is used, since otherwise the linker
39 may add padding into the table, thus breaking it.
40 See linker_lists.rst for full details.
43 prompt "Architecture select"
47 bool "ARC architecture"
51 select HAVE_PRIVATE_LIBGCC
52 select SUPPORT_OF_CONTROL
53 select SYS_CACHE_SHIFT_7
57 bool "ARM architecture"
58 select ARCH_SUPPORTS_LTO
59 select CREATE_ARCH_SYMLINK
60 select HAVE_PRIVATE_LIBGCC if !ARM64
61 select SUPPORT_OF_CONTROL
64 bool "M68000 architecture"
65 select HAVE_PRIVATE_LIBGCC
66 select NEEDS_MANUAL_RELOC
67 select SYS_BOOT_GET_CMDLINE
68 select SYS_BOOT_GET_KBD
69 select SYS_CACHE_SHIFT_4
70 select SUPPORT_OF_CONTROL
73 bool "MicroBlaze architecture"
74 select NEEDS_MANUAL_RELOC
75 select SUPPORT_OF_CONTROL
79 bool "MIPS architecture"
80 select HAVE_ARCH_IOREMAP
81 select HAVE_PRIVATE_LIBGCC
82 select SUPPORT_OF_CONTROL
85 bool "NDS32 architecture"
86 select SUPPORT_OF_CONTROL
89 bool "Nios II architecture"
93 select SUPPORT_OF_CONTROL
97 bool "PowerPC architecture"
98 select HAVE_PRIVATE_LIBGCC
99 select SUPPORT_OF_CONTROL
100 select SYS_BOOT_GET_CMDLINE
101 select SYS_BOOT_GET_KBD
104 bool "RISC-V architecture"
105 select CREATE_ARCH_SYMLINK
106 select SUPPORT_OF_CONTROL
121 imply SPL_LIBCOMMON_SUPPORT
122 imply SPL_LIBGENERIC_SUPPORT
123 imply SPL_SERIAL_SUPPORT
128 select ARCH_SUPPORTS_LTO
129 select BOARD_LATE_INIT
140 select GZIP_COMPRESSED
141 select HAVE_BLOCK_DEVICE
143 select OF_BOARD_SETUP
146 select SUPPORT_OF_CONTROL
147 select SYSRESET_CMD_POWEROFF
148 select SYS_CACHE_SHIFT_4
150 select SUPPORT_EXTENSION_SCAN
176 imply UDP_FUNCTION_FASTBOOT
189 imply ACPI_PMC_SANDBOX
199 bool "SuperH architecture"
200 select HAVE_PRIVATE_LIBGCC
201 select SUPPORT_OF_CONTROL
204 bool "x86 architecture"
207 select CREATE_ARCH_SYMLINK
210 select HAVE_ARCH_IOMAP
211 select HAVE_PRIVATE_LIBGCC
214 select SUPPORT_OF_CONTROL
215 select SYS_CACHE_SHIFT_6
217 select USE_PRIVATE_LIBGCC
220 imply HAS_ROM if X86_RESET_VECTOR
223 imply CMD_FPGA_LOADMK
246 imply USB_ETHER_SMSC95XX
250 imply ACPIGEN if !QEMU
251 imply SYSINFO if GENERATE_SMBIOS_TABLE
252 imply SYSINFO_SMBIOS if GENERATE_SMBIOS_TABLE
254 # Thing to enable for when SPL/TPL are enabled: SPL
257 imply SPL_DRIVERS_MISC
260 imply SPL_LIBCOMMON_SUPPORT
261 imply SPL_LIBGENERIC_SUPPORT
262 imply SPL_SERIAL_SUPPORT
263 imply SPL_SPI_FLASH_SUPPORT
264 imply SPL_SPI_SUPPORT
271 imply TPL_DRIVERS_MISC
274 imply TPL_LIBCOMMON_SUPPORT
275 imply TPL_LIBGENERIC_SUPPORT
276 imply TPL_SERIAL_SUPPORT
283 bool "Xtensa architecture"
284 select CREATE_ARCH_SYMLINK
285 select SUPPORT_OF_CONTROL
292 This option should contain the architecture name to build the
293 appropriate arch/<CONFIG_SYS_ARCH> directory.
294 All the architectures should specify this option correctly.
299 This option should contain the CPU name to build the correct
300 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU> directory.
302 This is optional. For those targets without the CPU directory,
303 leave this option empty.
308 This option should contain the SoC name to build the directory
309 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU>/<CONFIG_SYS_SOC>.
311 This is optional. For those targets without the SoC directory,
312 leave this option empty.
317 This option should contain the vendor name of the target board.
319 board/<CONFIG_SYS_VENDOR>/common/Makefile exists, the vendor common
320 directory is compiled.
321 If CONFIG_SYS_BOARD is also set, the sources under
322 board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> directory are compiled.
324 This is optional. For those targets without the vendor directory,
325 leave this option empty.
330 This option should contain the name of the target board.
331 If it is set, either board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD>
332 or board/<CONFIG_SYS_BOARD> directory is compiled depending on
333 whether CONFIG_SYS_VENDOR is set or not.
335 This is optional. For those targets without the board directory,
336 leave this option empty.
338 config SYS_CONFIG_NAME
341 This option should contain the base name of board header file.
342 The header file include/configs/<CONFIG_SYS_CONFIG_NAME>.h
343 should be included from include/config.h.
345 config SYS_DISABLE_DCACHE_OPS
348 This option disables dcache flush and dcache invalidation
349 operations. For example, on coherent systems where cache
350 operatios are not required, enable this option to avoid them.
351 Note that, its up to the individual architectures to implement
354 config SKIP_LOWLEVEL_INIT
355 bool "Skip the calls to certain low level initialization functions"
356 depends on ARM || NDS32 || MIPS || RISCV
358 If enabled, then certain low level initializations (like setting up
359 the memory controller) are omitted and/or U-Boot does not relocate
361 Normally this variable MUST NOT be defined. The only exception is
362 when U-Boot is loaded (to RAM) by some other boot loader or by a
363 debugger which performs these initializations itself.
365 config SPL_SKIP_LOWLEVEL_INIT
366 bool "Skip the calls to certain low level initialization functions"
367 depends on SPL && (ARM || NDS32 || MIPS || RISCV)
369 If enabled, then certain low level initializations (like setting up
370 the memory controller) are omitted and/or U-Boot does not relocate
372 Normally this variable MUST NOT be defined. The only exception is
373 when U-Boot is loaded (to RAM) by some other boot loader or by a
374 debugger which performs these initializations itself.
376 config TPL_SKIP_LOWLEVEL_INIT
377 bool "Skip the calls to certain low level initialization functions"
378 depends on SPL && ARM
380 If enabled, then certain low level initializations (like setting up
381 the memory controller) are omitted and/or U-Boot does not relocate
383 Normally this variable MUST NOT be defined. The only exception is
384 when U-Boot is loaded (to RAM) by some other boot loader or by a
385 debugger which performs these initializations itself.
387 config SKIP_LOWLEVEL_INIT_ONLY
388 bool "Skip the call to lowlevel_init during early boot ONLY"
391 This allows just the call to lowlevel_init() to be skipped. The
392 normal CP15 init (such as enabling the instruction cache) is still
395 config SPL_SKIP_LOWLEVEL_INIT_ONLY
396 bool "Skip the call to lowlevel_init during early boot ONLY"
397 depends on SPL && ARM
399 This allows just the call to lowlevel_init() to be skipped. The
400 normal CP15 init (such as enabling the instruction cache) is still
403 config TPL_SKIP_LOWLEVEL_INIT_ONLY
404 bool "Skip the call to lowlevel_init during early boot ONLY"
405 depends on TPL && ARM
407 This allows just the call to lowlevel_init() to be skipped. The
408 normal CP15 init (such as enabling the instruction cache) is still
411 source "arch/arc/Kconfig"
412 source "arch/arm/Kconfig"
413 source "arch/m68k/Kconfig"
414 source "arch/microblaze/Kconfig"
415 source "arch/mips/Kconfig"
416 source "arch/nds32/Kconfig"
417 source "arch/nios2/Kconfig"
418 source "arch/powerpc/Kconfig"
419 source "arch/sandbox/Kconfig"
420 source "arch/sh/Kconfig"
421 source "arch/x86/Kconfig"
422 source "arch/xtensa/Kconfig"
423 source "arch/riscv/Kconfig"